JP2013157238A - Light-emitting element drive, light-emitting device, vehicle - Google Patents

Abstract

PROBLEM TO BE SOLVED: To perform light control of a light-emitting element at a low cost.SOLUTION: A light-emitting element drive 10C includes output voltage generation units 11H, 11L, 12H, 12L, 13, 14 which generate an output voltage Vo from an input voltage Vi so that an output current Io flowing through a light-emitting element Z1 matches a target value during the on period of a light control signal PWM, and stop the output voltage Vo generation operation during the off period of the light control signal PWM, an output capacitor C1 for supplying the output voltage Vo to the light-emitting element Z1 while smoothing, and output voltage discharge units 15, 16, 17 which discharge the output capacitor C1 until the output voltage Vo matches a discharge lower limit voltage Vdis higher than the ground voltage during the off period of the light control signal PWM.

Description

  The present invention relates to a light emitting element driving device for driving a light emitting element, and a light emitting device and a vehicle using the same.

  FIG. 11 is a diagram illustrating a conventional example of a light emitting device. The light emitting device of this conventional example includes at least one light emitting element (light emitting diode in FIG. 11) Z1, a light emitting element driving device 100 for driving the light emitting element Z1, and a power supply path from the light emitting element driving device 100 to the light emitting element Z1. And an inserted P-channel MOS [metal oxide semiconductor] field effect transistor P1.

  The light emitting element driving device 100 generates an output voltage Vo from the input voltage Vi and supplies the output voltage to the light emitting element Z1, and performs on / off control of the transistor P1 based on the dimming signal PWM. And an output current control unit 102 that performs duty control of the output current Io flowing through the light emitting element Z1 (luminance control of the light emitting element Z1).

  In addition, Patent Document 1 and Patent Document 2 can be cited as examples of related art related to the above.

JP 2006-339298 A JP 2007-287964 A

  Certainly, with the light emitting device of the conventional example, it is possible to control the luminance of the light emitting element Z1 based on the dimming signal PWM. However, the light emitting device of the above conventional example has a problem of high cost because it requires the dimming control transistor P1.

  In view of the above-described problems found by the inventors of the present application, the present invention provides a light-emitting element driving device capable of performing dimming control of a light-emitting element at low cost, a light-emitting device using the same, and The object is to provide a vehicle.

  In order to achieve the above object, a light emitting element driving device according to the present invention generates an output voltage from an input voltage so that an output current flowing through the light emitting element coincides with a target value during an on period of a dimming signal, An output voltage generation unit that stops the generation operation of the output voltage in the off period of the dimming signal, an output capacitor that smoothes the output voltage and supplies the output voltage to the light emitting element, and the off-period of the dimming signal in the off period of the dimming signal An output voltage discharging unit that discharges the output capacitor until the output voltage matches a discharge lower limit voltage higher than the ground voltage (first configuration).

  In the light emitting element driving apparatus having the first configuration, the output voltage generation unit is connected in series between the application terminal of the input voltage and a ground terminal, and a connection node of the output voltage generation unit via the coil. An upper transistor and a lower transistor connected to a capacitor; an upper driver and a lower driver that generate control signals for the upper transistor and the lower transistor; an amplifier that generates a feedback voltage according to the output current; A control unit that drives the upper driver and the lower driver to turn on / off the upper transistor and the lower transistor in accordance with the feedback voltage during an on period of the dimming signal (first operation) 2).

  Further, in the light emitting element driving device having the second configuration, the output voltage discharging section includes a comparator that compares the output voltage with the discharge lower limit voltage and generates a discharge lower limit detection signal (third Configuration).

  In the light emitting element driving device having the third configuration, the discharge lower limit voltage may be variable (fourth configuration).

  Further, in the light emitting element driving apparatus having the third or fourth configuration, the control unit drives the upper driver so that the upper transistor is always turned off during an off period of the dimming signal, A configuration in which the lower driver is driven to turn on the lower transistor until the output voltage matches the discharge lower limit voltage based on a discharge lower limit detection signal, and then to turn off the lower transistor (fifth configuration) ).

  Further, in the light emitting element driving apparatus having the third or fourth configuration, the output voltage discharging section is connected between the output voltage application terminal and the ground terminal based on the dimming signal and the discharge lower limit detection signal. It is preferable to use a configuration (sixth configuration) that includes a discharge transistor that conducts / cuts off.

  In the light emitting element driving apparatus having the sixth configuration, the discharge transistor is always turned off during the on period of the dimming signal, and based on the discharge lower limit detection signal during the off period of the dimming signal. It may be configured to be turned on / off (seventh configuration).

  Further, in the light emitting element driving apparatus having the seventh configuration, the control unit includes the upper driver and the lower transistor so that both the upper transistor and the lower transistor are always turned off during the off period of the dimming signal. A configuration for driving the lower driver (eighth configuration) is preferable.

  A light-emitting device according to the present invention includes a light-emitting element driving device having any one of the first to eighth configurations and at least one light-emitting element driven by the light-emitting element driving device (ninth embodiment). It is said that.

  In the light emitting device having the ninth structure, the light emitting element may be a light emitting diode or an organic EL element (tenth structure).

  The light emitting device having the tenth configuration may be configured to be used as an in-vehicle lamp (an eleventh configuration).

  In addition, the light emitting device having the eleventh configuration may be configured to be mounted on the vehicle as a headlight module, a turn lamp module, or a rear lamp module (a twelfth configuration).

  Further, the vehicle according to the present invention has a light emitting device having the above eleventh or twelfth structure (a thirteenth structure).

  Further, in the vehicle having the thirteenth configuration, the light emitting device has a configuration (fourteenth configuration) used as at least one of a headlight, a light source for running day and night, a tail lamp, a stop lamp, and a turn lamp. Good.

  ADVANTAGE OF THE INVENTION According to this invention, the light emitting element drive device which can perform the light control of a light emitting element at low cost, a light emitting device using this, and a vehicle can be provided.

The figure which shows 1st Embodiment of a light-emitting device. Time chart for explaining a first operation example (first dimming method) of the light emitting element driving apparatus 10A Time chart for explaining a second operation example (second dimming method) of the light emitting element driving apparatus 10A The figure which shows 2nd Embodiment of a light-emitting device. Time chart for explaining an operation example (third light control method) of the light emitting element driving device 10B Waveform diagram showing rising behavior of output voltage Vo Waveform diagram showing falling behavior of output voltage Vo The figure which shows IF-VF characteristic of the light emitting element Z1 The figure which shows 3rd Embodiment of a light-emitting device. Time chart for explaining an operation example (fourth dimming method) of the light emitting element driving device 10C External view of the vehicle equipped with the light emitting device (front) External view of vehicle equipped with light emitting device (back) External view of LED headlight module External view of LED turn lamp module External view of LED rear lamp module The figure which shows one prior art example of a light-emitting device

<First Embodiment>
FIG. 1 is a diagram illustrating a first embodiment of a light emitting device. The light emitting device 1 according to the first embodiment includes a light emitting element driving device 10A, a coil L1, an output capacitor C1, a sense resistor Rs, and at least one light emitting element (light emitting diode) Z1.

  The light emitting element driving device 10A includes N-channel MOS field effect transistors 11H and 11L (hereinafter referred to as an upper transistor 11H and a lower transistor 11L), an upper driver 12H and a lower driver 12L, a control unit 13, an amplifier 14 is a semiconductor integrated circuit device (so-called LED driver IC). Further, the light emitting element driving device 10A has external terminals T1 to T6 in order to establish an electrical connection with the outside.

  Outside the light emitting element driving apparatus 10A, the external terminal T1 is connected to the application terminal of the input voltage Vi. The external terminal T2 is connected to the first end of the coil L1. The second end of the coil L1 (the end to which the output voltage Vo is applied) is connected to the first end of the sense resistor Rs. The second end of the sense resistor Rs is connected to the first end (anode) of the light emitting element Z1. The second end (cathode) of the light emitting element Z1 is connected to the ground end. The first end of the output capacitor C1 is connected to the second end of the coil L1. The second terminal of the output capacitor C1 is connected to the ground terminal. The external terminal T3 is connected to the ground terminal. The external terminal T4 is connected to the first end of the sense resistor Rs. The external terminal T5 is connected to the second end of the sense resistor Rs. The external terminal T6 is connected to the application end of the dimming signal PWM.

  Inside the light emitting element driving apparatus 10A, the drain of the upper transistor 11H is connected to the external terminal T1. The source of the upper transistor 11H is connected to the external terminal T2. The gate of the upper transistor 11H is connected to the output terminal of the upper driver 12H. The drain of the lower transistor 11L is connected to the external terminal T2. The source of the lower transistor 11L is connected to the external terminal T3. The gate of the lower transistor 11L is connected to the output terminal of the lower driver 12L. That is, the upper transistor 11H and the lower transistor 11L are connected in series between the application terminal of the input voltage Vi and the ground terminal, and a connection node (application terminal of the switch voltage Vsw) is output via the coil L1. It is connected to the capacitor C1.

  The upper driver 12H generates a control signal GH for the upper transistor 11H based on an instruction from the control unit 13. The upper transistor 11H is turned on when the control signal GH is at a high level, and turned off when the control signal GH is at a low level. The lower driver 12L generates a control signal GL for the lower transistor 11L based on an instruction from the control unit 13. The lower transistor 11L is turned on when the control signal GL is at a high level, and turned off when the control signal GL is at a low level.

  The controller 13 drives the upper driver 12H and the lower driver 12L so as to turn on / off the upper transistor 11H and the lower transistor 11L according to the feedback voltage Vfb during the ON period (high level period) of the dimming signal PWM. To do. On the other hand, the control unit 13 drives the upper driver 12H and the lower driver 12L so as to stop the generation operation of the output voltage Vo in the off period (low level period) of the dimming signal PWM.

  The amplifier 14 amplifies the voltage across the sense resistor Rs applied between the non-inverting input terminal (+) and the inverting input terminal (−) to generate a feedback voltage Vfb. Therefore, the feedback voltage Vfb is a voltage signal that increases or decreases according to the output current Io flowing through the sense resistor Rs.

  The upper transistor 11H, the lower transistor 11L, the upper driver 12H, the lower driver 12L, the control unit 13, and the amplifier 14 described above have the output current Io flowing through the light emitting element Z1 during the ON period of the dimming signal PWM. An output voltage Vo is generated from the input voltage Vi so as to coincide with the target value, and an output voltage generator that stops the generation operation of the output voltage Vo during the OFF period of the dimming signal PWM is formed.

  FIG. 2A is a time chart for explaining a first operation example (first dimming method) of the light emitting element driving apparatus 10A, and in order from the top, the dimming signal PWM, the control signals GH and GL, the switch voltage Vsw, The output voltage Vo and the output current Io are depicted.

  The dimming signal PWM is a pulse width modulation signal whose on-duty (ratio of the on period Ton occupying the period T) is varied according to the luminance of the light emitting element Z1. When increasing the luminance of the light-emitting element Z1, the on-duty of the dimming signal PWM is set to a large value. Conversely, when decreasing the luminance of the light-emitting element Z1, the on-duty of the dimming signal PWM is set to a small value. Is set.

  At time t11, when the dimming signal PWM is raised to a high level, on / off control of the upper transistor 11H and the lower transistor 11L (operation for generating the control signals GH and GL) by the control unit 13 is started, A rectangular wave switch voltage Vsw is generated at the terminal T2. The switch voltage Vsw is supplied to the light emitting element Z1 as a smoothed output voltage Vo through the coil L1 and the output capacitor C1.

  In the ON period Ton (time t11 to t13) of the dimming signal PWM, the upper transistor 11H and the lower transistor 11L are complementary so that the feedback voltage Vfb (and thus the output current Io) matches a predetermined target value. On / off exclusively. If the output current Io flowing through the light emitting element Z1 is constant, the output voltage Vo applied to the light emitting element Z1 is also constant, so that the light emitting element Z1 is lit with a constant luminance.

  Note that the term “complementary (exclusive)” used above refers to the case where the on / off state of the upper transistor 11H and the lower transistor 11L is completely reversed, as well as from the viewpoint of preventing through current. This includes the case where the transistor 11H and the lower transistor 11L are simultaneously turned off.

  When the dimming signal PWM falls to the low level at time t13, the generation operation of the output voltage Vo is stopped. In particular, in the first dimming method shown in FIG. 2A, the control signals GH and GL are both set to the low level during the OFF period Toff (time t13 to t15) of the dimming signal PWM, and the upper transistor 11H and the lower side All of the transistors 11L are turned off. As a result, the external terminal T2 (application terminal of the switch voltage Vsw) is in a high impedance state (Hi-Z), and the light emitting element Z1 is turned off.

After time t13, the output voltage Vo decreases according to the output current Io flowing through the light emitting element Z1 according to the following equation (1). When the output current Io becomes 0 A, the output voltage Vo is substantially maintained at a voltage value corresponding to the amount of charge remaining in the output capacitor C1 at that time.
ΔVo≈Io / C1 × ΔT (1)

  By repeating the on-period Ton and the off-period Toff, the light-emitting element Z1 is repeatedly turned on and off, so that the apparent luminance of the light-emitting element Z1 (the average over the period T) depends on the on-duty of the dimming signal PWM. (Luminance) can be variably controlled. According to the first dimming method, the external transistor P1 for dimming (see FIG. 9) is not necessary, so that the cost can be reduced as compared with the conventional dimming method.

  The merit of the first dimming method is that the output voltage Vo does not fall down to 0V in the off period Toff of the dimming signal PWM. Therefore, in the next on period Ton of the dimming signal PWM, the output current Io and the output voltage Vo are The rise time (see time t11 to t12 and time t15 to t16) until reaching each target value is short.

  On the other hand, the disadvantage of the first dimming method is that the falling speed of the output current Io depends on the characteristics of the light emitting element Z1, and the falling speed decreases as the output current Io decreases. The down time (time t13 to t14) is long.

  FIG. 2B is a time chart for explaining a second operation example (second dimming method) of the light emitting element driving apparatus 10A. From the top, the dimming signal PWM, the control signals GH and GL, the switch voltage Vsw, The output voltage Vo and the output current Io are depicted.

  Similar to the first dimming method (FIG. 2A) described above, in the second dimming method, the feedback voltage Vfb is applied during the ON period Ton (time t21 to t23 and time t25 to t27) of the dimming signal PWM. The upper transistor 11H and the lower transistor 11L are turned on / off so as to coincide with a predetermined target value, and the light emitting element Z1 emits light with a constant luminance.

  In addition, in the OFF period Toff (time t23 to t25) of the dimming signal PWM, the generation operation of the output voltage Vo is stopped and the light emitting element Z1 is turned off, similarly to the first dimming method described above. .

  However, in the second dimming method shown in FIG. 2B, the control signal GH is set to the low level during the OFF period Toff (time t23 to t25) of the dimming signal PWM, unlike the first dimming method described above. While the transistor 11H is turned off, the control signal GL is set to the high level and the lower transistor 11L is turned on. As a result, the first end of the output capacitor C1 (the end to which the output voltage Vo is applied) is short-circuited to the ground end via the coil L1 and the lower transistor 11L, so that the charge of the output capacitor C1 is rapidly discharged and the output The voltage Vo is lowered to 0V. Accordingly, the output current Io flowing through the light emitting element Z1 also quickly becomes 0A, and the light emitting element Z1 is turned off without delay.

  The merit of the second dimming method is that the output capacitor C1 can be rapidly discharged during the OFF period Toff of the dimming signal PWM, and therefore the fall time (time t23 to t24) of the output current Io is short. is there.

  On the other hand, the disadvantage of the second dimming method is that the output voltage Vo is lowered to 0 V in the off period Toff of the dimming signal PWM, so that the output current Io and the output voltage Vo in the on period Ton of the next dimming signal PWM. Is a long rise time (see times t21 to t22 and times t25 to t26) until each reaches a target value.

  As described above, in the light emitting element driving apparatus 10A of the first embodiment, when the first dimming method of FIG. 2A is adopted, the output current Io is long (and the light emitting element Z1 is extinguished) long. When the second dimming method of FIG. 2B is adopted, it takes a long time for the output current Io to rise (and thus the light emitting element Z1 is turned on).

  In view of the above, the light-emitting element driving device 10A of the first embodiment is suitable for an application that does not need to finely control the luminance of the light-emitting element Z1, but corresponds to an application that requires finer dimming control. In order to do so, there was room for further improvement.

Second Embodiment
FIG. 3 is a diagram illustrating a second embodiment of the light emitting device. The second embodiment has basically the same configuration as the first embodiment described above, and is characterized by the internal configuration of the light emitting element driving device 10B and the third dimming method of the light emitting element Z1 using the same. Therefore, the same components as those in the first embodiment are denoted by the same reference numerals as those in FIG. 1, and redundant descriptions are omitted. In the following, the characteristic portions of the second embodiment are mainly described.

  In the light emitting element driving device 10B, in addition to the above-described upper transistor 11H and lower transistor 11L, upper driver 12H and lower driver 12L, control unit 13, and amplifier 14, a comparator 15 is integrated.

  The comparator 15 compares the output voltage Vo applied from the external terminal T4 to the non-inverting input terminal (+) and the discharge lower limit voltage Vdis (however, Vdis> GND) applied to the inverting input terminal (−), A discharge lower limit detection signal DET is generated and sent to the control unit 13. The discharge lower limit detection signal DET is at a high level when the output voltage Vo is higher than the discharge lower limit voltage Vdis, and is at a low level when the output voltage Vo is lower than the discharge lower limit voltage Vdis.

  Further, the control unit 13 that receives the input of the discharge lower limit detection signal DET controls the discharge of the output voltage Vo according to the discharge lower limit detection signal DET during the OFF period Toff of the dimming signal PWM (on / off of the lower transistor 11L). (Off control) is provided.

  FIG. 4 is a time chart for explaining an operation example (third dimming method) of the light emitting element driving device 10B. In order from the top, the dimming signal PWM, the control signals GH and GL, the switch voltage Vsw, and the output The voltage Vo, the discharge lower limit detection signal DET, and the output current Io are depicted.

  Similar to the first dimming method (FIG. 2A) and the second dimming method (FIG. 2B), the on-time period Ton (time t31 to t33 and time t35) of the dimming signal PWM also in the third dimming method. ~ T37), the upper transistor 11H and the lower transistor 11L are turned on / off so that the feedback voltage Vfb matches a predetermined target value, and the light emitting element Z1 emits light with a constant luminance.

  In addition, in the off period Toff (time t33 to t35) of the dimming signal PWM, the generation operation of the output voltage Vo is stopped and the light emitting element Z1 is turned off. It is the same as the optical system.

  However, in the third dimming method shown in FIG. 4, unlike the first dimming method and the second dimming method, the discharge lower limit detection signal is used in the off period Toff (time t33 to t35) of the dimming signal PWM. Discharge control of the output voltage Vo according to DET is performed.

  More specifically, the control unit 13 drives the upper driver 12H so that the upper transistor 11H is always turned off during the OFF period Toff (time t33 to t35) of the dimming signal PWM, and sets the control signal GH to the low level. On the other hand, the lower transistor 11L is not always turned off (first dimming method) or always turned on (second dimming method), but the output voltage Vo is set based on the discharge lower limit detection signal DET. The lower driver 12L is driven to switch the high level / low level of the control signal GL so that the lower transistor 11L is turned on until the lower limit voltage Vdis matches the lower limit voltage Vdis and then the lower transistor 11L is turned off.

  That is, the control unit 13 performs control so that the lower transistor 11L is turned on during the high level period (time t33 to t34) of the discharge lower limit detection signal DET in the off period Toff (time t33 to t35) of the dimming signal PWM. The signal GL is set to the high level, and the control signal GL is set to the low level so that the lower transistor 11L is turned off during the low level period (time t34 to t35) of the discharge lower limit detection signal DET.

  As a result, during the high level period (time t33 to t34) of the discharge lower limit detection signal DET, the first terminal (application terminal of the output voltage Vo) of the output capacitor C1 is connected to the ground terminal via the coil L1 and the lower transistor 11L. Due to the short circuit, the charge of the output capacitor C1 is rapidly discharged, and the output voltage Vo is lowered to the discharge lower limit voltage Vdis. Accordingly, the output current Io flowing through the light emitting element Z1 also quickly becomes 0A, and the light emitting element Z1 is turned off without delay.

  Further, during the low level period (time t34 to t35) of the discharge lower limit detection signal DET, the external terminal T2 (application terminal of the switch voltage Vsw) is in a high impedance state (Hi-Z), and the output voltage Vo is lowered to 0V. Without being substantially maintained at the discharge lower limit voltage Vdis. Therefore, in the ON period Ton (time t31 to t33 and time t35 to t37) of the dimming signal PWM, the output current Io and the output voltage Vo quickly reach their target values, so that the light emitting element Z1 is not delayed. Illuminated.

  As described above, in the light emitting element driving device 10B, the comparator 15, the control unit 13, the lower driver 12L, and the lower transistor 11L have the output voltage Vo equal to the discharge lower limit voltage Vdis during the OFF period Toff of the dimming signal PWM. It functions as an output voltage discharging unit that discharges the output capacitor C1 until they match.

  FIG. 5A is a waveform diagram showing the rising behavior of the output voltage Vo. FIG. 5A shows a behavior when the target value of the output voltage Vo is set to 1 and the discharge lower limit voltage Vdis is set to 0.5 and normalized. In the case of the third dimming method (solid line X1) in which the output voltage Vo is discharged only to 0.5, the output voltage Vo is lower than that in the second dimming method (broken line X2) in which the output voltage Vo is discharged to 0. It can be seen that the rise time is shortened to 1/2.

  FIG. 5B is a waveform diagram showing the falling behavior of the output voltage Vo. FIG. 5B shows the behavior when the target value of the output voltage Vo is 1 and the discharge lower limit voltage Vdis is 0.5 and is normalized. If the output voltage Vo is the third dimming method (solid line Y1) that is rapidly discharged through the lower transistor 11L, the external terminal T2 (application terminal of the switch voltage Vsw) is set to the high impedance state (Hi-Z). Compared with the first dimming method (broken line Y2), the fall time of the output voltage Vo can be greatly shortened.

  As described above, in the light emitting element driving device 10B of the second embodiment, by adopting the third dimming method, the output current Io flowing through the light emitting element Z1 is quickly turned on according to the dimming signal PWM. Therefore, the brightness of the light emitting element Z1 can be finely controlled by narrowing the variable pitch of the pulse width in the dimming signal PWM.

  FIG. 6 is a diagram illustrating the IF-VF characteristics of the light-emitting element Z1. As shown in FIG. 6, the forward current IF of the light emitting element Z1 (corresponding to the output current Io) increases or decreases exponentially with respect to the forward bias voltage VF (corresponding to the output voltage Vo) of the light emitting element Z1. . For example, if the discharge lower limit voltage Vdis is set to 0.5 × Vo with respect to the output voltage Vo during the ON period Ton of the dimming signal PWM, the discharge of the output capacitor C1 during the OFF period Toff of the dimming signal PWM. Since the output current Io afterwards can be reduced to almost 0 A, the light emitting element Z1 can be turned off reliably.

  Since the IF-VF characteristics of the light emitting element Z1 are different for each element used, it is desirable that the discharge lower limit voltage Vdis be configured to be variably set in view of the IF-VF characteristics of the light emitting element Z1. .

<Third Embodiment>
FIG. 7 is a diagram showing a third embodiment of the light emitting device. The third embodiment has basically the same configuration as the second embodiment described above, and is characterized by the internal configuration of the light emitting element driving device 10C and the fourth dimming method of the light emitting element Z1 using the same. Therefore, the same components as those in the second embodiment are denoted by the same reference numerals as those in FIG. 3, and redundant descriptions are omitted. In the following, the characteristic portions of the third embodiment are mainly described.

  The light emitting element driving device 10C includes an N-channel MOS field effect in addition to the above upper transistor 11H and lower transistor 11L, upper driver 12H and lower driver 12L, control unit 13, amplifier 14, and comparator 15. Transistor 16 and AND gate 17 are integrated.

  The drain of the transistor 16 is connected to the external terminal T4. The source of the transistor 16 is connected to the ground terminal. The gate of the transistor 16 is connected to the output terminal (application terminal of the control signal GD) of the AND gate 17. That is, the transistor 16 conducts / cuts off between the application terminal of the output voltage Vo and the ground terminal based on the control signal GD (logical product signal of the logic inversion signal of the dimming signal PWM and the discharge lower limit detection signal DET). Functions as a discharge transistor.

  The AND gate 17 generates a control signal GD of the transistor 16 by performing a logical product operation of the dimming signal PWM logically input from the external terminal T6 and the discharge lower limit detection signal DET input from the comparator 15. . The control signal GD is always at a low level during the high level period (on period Ton) of the dimming signal PWM, regardless of the logic level of the discharge lower limit detection signal DET, and the low level period (off period) of the dimming signal PWM. Toff) has the same logic level as the discharge lower limit detection signal DET.

  FIG. 8 is a time chart for explaining an operation example (fourth dimming method) of the light emitting element driving device 10C. In order from the top, the dimming signal PWM, the control signals GH and GL, the switch voltage Vsw, and the output The voltage Vo, the discharge lower limit detection signal DET, the control signal GD, and the output current Io are depicted.

  Similarly to the first dimming method (FIG. 2A), the second dimming method (FIG. 2B), and the third dimming method (FIG. 4), the dimming signal PWM is turned on also in the fourth dimming method. In the period Ton (time t41 to t43 and time t45 to t47), the upper transistor 11H and the lower transistor 11L are turned on / off so that the feedback voltage Vfb matches a predetermined target value, and the light emitting element Z1. Emits light at a constant brightness.

  In addition, in the off period Toff (time t43 to t45) of the dimming signal PWM, the generation operation of the output voltage Vo is stopped and the light emitting element Z1 is turned off. It is the same as the optical system.

  Further, in the OFF period Toff (time t43 to t45) of the dimming signal PWM, the discharge control of the output voltage Vo corresponding to the discharge lower limit detection signal DET is performed in the same manner as the third dimming method described above. .

  However, in the fourth dimming method shown in FIG. 8, unlike the third dimming method, the lower transistor 11L is used as a discharge path in the off period Toff (time t33 to t35) of the dimming signal PWM. Instead, by using the transistor 16 as a discharge path, discharge control of the output voltage Vo according to the discharge lower limit detection signal DET is performed.

  As described above, the control signal GD is always at a low level during the ON period Ton (high level period) of the dimming signal PWM regardless of the logic level of the discharge lower limit detection signal DET. During the PWM off period Toff (low level period), the same logic level as the discharge lower limit detection signal DET is obtained.

  Therefore, the transistor 16 is always turned off during the ON period Ton (time t41 to 43 and time t45 to t47) of the dimming signal PWM, and is discharged during the OFF period Toff (time t43 to t45) of the dimming signal PWM. It is turned on / off based on the lower limit detection signal DET. More specifically, the transistor 16 controls the high-level control signal GD during the high level period (time t43 to t44) of the discharge lower limit detection signal DET during the off period Toff (time t43 to t45) of the dimming signal PWM. And is turned off in response to the low level control signal GD during the low level period (time t44 to t45) of the discharge lower limit detection signal DET.

  On the other hand, in the OFF period Toff (time t43 to t45) of the dimming signal PWM, the control unit 13 always turns off both the upper transistor 11H and the lower transistor 11L as in the first dimming method (FIG. 2A). As described above, the upper driver 12H and the lower driver 12L are driven to maintain the control signals GH and GL at a low level.

  As a result, during the high level period (time t43 to t44) of the discharge lower limit detection signal DET, the first terminal (application terminal of the output voltage Vo) of the output capacitor C1 is short-circuited to the ground terminal via the transistor 16. The electric charge of the output capacitor C1 is rapidly discharged, and the output voltage Vo is lowered to the discharge lower limit voltage Vdis. Accordingly, the output current Io flowing through the light emitting element Z1 also quickly becomes 0A, and the light emitting element Z1 is turned off without delay.

  Further, during the low level period (time t44 to t45) of the discharge lower limit detection signal DET, the external terminal T2 (application terminal of the switch voltage Vsw) is in a high impedance state (Hi-Z), and the output voltage Vo is lowered to 0V. Without being substantially maintained at the discharge lower limit voltage Vdis. Therefore, in the ON period Ton (time t41 to t43 and time t45 to t47) of the dimming signal PWM, the output current Io and the output voltage Vo quickly reach their target values, so that the light emitting element Z1 is not delayed. Illuminated.

  As described above, in the light emitting element driving apparatus 10C according to the third embodiment, by adopting the above-described fourth dimming method, the output current Io flowing through the light emitting element Z1 is quickly turned on according to the dimming signal PWM. Therefore, the brightness of the light emitting element Z1 can be finely controlled by narrowing the variable pitch of the pulse width in the dimming signal PWM.

  In the light emitting element driving apparatus 10B of the second embodiment, the lower transistor 11L is used as a discharge path for the output capacitor C1, so that the lower transistor 11L is turned on to discharge the output capacitor C1. A current flows from the coil L1 toward the external terminal T2. Therefore, when the lower transistor 11L is turned off and the discharge of the output capacitor C1 is stopped, the input from the external terminal T2 via the body diode (not shown) of the upper transistor 11H is caused by the back electromotive force stored in the coil L1. There was a possibility that the regenerative current toward the application end of the voltage Vi would flow backward.

  On the other hand, in the light emitting element driving device 10C of the third embodiment, the transistor 16 provided on the rear side of the coil L1 (the side closer to the light emitting element Z1) is used as the discharge path of the output capacitor C1. Therefore, even if the transistor 16 is turned on to discharge the output capacitor C1, no discharge current flows through the coil L1. Therefore, when discharging of the output capacitor C1 is stopped, there is no possibility of generating a regenerative current toward the application end of the input voltage Vi.

<Application>
For example, as shown in FIGS. 9A and 9B, the light-emitting device 1 includes a headlight (including a high beam / low beam / small lamp / fog lamp, etc.) X11 of a vehicle X10, a light source X12 for day and night driving (DRL), a tail lamp (small). (Including lamps and back lamps as appropriate) X13, stop lamp X14, turn lamp X15, and the like.

  The light emitting element driving devices 10A and 10B are modules (such as the LED headlight module Y10 in FIG. 10A, the LED turn lamp module Y20 in FIG. 10B, and the LED rear lamp module Y30 in FIG. 10C) together with the light emitting element Z1 to be driven. Or may be provided as a single IC independently of the light emitting element Z1.

<Other variations>
In the above embodiment, the configuration using a light emitting diode as a light emitting element has been described as an example. However, the configuration of the present invention is not limited to this, and for example, an organic EL [ It is also possible to use an electro-luminescence element.

  Various technical features disclosed in the present specification can be variously modified within the scope of the technical creation in addition to the above-described embodiment. For example, mutual replacement of a bipolar transistor and a MOS field effect transistor and logic level inversion of various signals are arbitrary. That is, the above-described embodiment is an example in all respects and should not be considered as limiting, and the technical scope of the present invention is not the description of the above-described embodiment, but the claims. It should be understood that all modifications that come within the meaning and range of equivalents of the claims are included.

  INDUSTRIAL APPLICABILITY The present invention can be used as a light emitting element driving device, a light emitting device using the same, and a technique for realizing cost reduction of a vehicle.

DESCRIPTION OF SYMBOLS 1 Light emitting device 10A, 10B, 10C Light emitting element drive device 11H N channel type MOS field effect transistor (upper transistor)
11L N-channel MOS field effect transistor (lower transistor)
12H Upper side driver 12L Lower side driver 13 Control unit 14 Amplifier 15 Comparator 16 N channel type MOS field effect transistor (discharge transistor)
17 AND gate T1-T6 External terminal L1 Coil C1 Output capacitor Rs Sense resistor Z1 Light emitting element (light emitting diode)
X10 Vehicle X11 Headlight X12 Light source for day / night driving (DRL) X13 Tail lamp X14 Stop lamp X15 Turn lamp Y10 LED headlight module Y20 LED turn lamp module Y30 LED rear lamp module

Claims (14)

An output voltage is generated from the input voltage so that the output current flowing through the light emitting element matches the target value during the ON period of the dimming signal, and the output voltage generation operation is stopped during the OFF period of the dimming signal A voltage generator;
An output capacitor for smoothing the output voltage and supplying the light emitting element;
An output voltage discharging unit that discharges the output capacitor until the output voltage matches a discharge lower limit voltage higher than a ground voltage during an off period of the dimming signal;
A light-emitting element driving device comprising: The output voltage generator is
An upper transistor and a lower transistor that are connected in series between the application terminal of the input voltage and the ground terminal, and whose connection nodes are connected to the output capacitor via a coil;
An upper driver and a lower driver for generating respective control signals of the upper transistor and the lower transistor;
An amplifier that generates a feedback voltage according to the output current;
A controller that drives the upper driver and the lower driver to turn on / off the upper transistor and the lower transistor according to the feedback voltage during an on period of the dimming signal;
The light-emitting element driving device according to claim 1, comprising:   The light emitting element driving apparatus according to claim 2, wherein the output voltage discharging unit includes a comparator that compares the output voltage with the discharge lower limit voltage to generate a discharge lower limit detection signal.   The light emitting element driving device according to claim 3, wherein the discharge lower limit voltage is variable.   The control unit drives the upper driver so that the upper transistor is always turned off during the OFF period of the dimming signal, while the output voltage matches the discharge lower limit voltage based on the discharge lower limit detection signal. 5. The light emitting element driving device according to claim 3, wherein the lower driver is driven such that the lower transistor is turned on until the lower transistor is turned off.   The output voltage discharge unit includes a discharge transistor that conducts / cuts off between the output voltage application terminal and a ground terminal based on the dimming signal and the discharge lower limit detection signal. Or the light emitting element drive device of Claim 4.   7. The discharge transistor according to claim 6, wherein the discharge transistor is always turned off during the on period of the dimming signal, and is turned on / off based on the discharge lower limit detection signal during the off period of the dimming signal. The light emitting element drive device of description.   The control unit drives the upper driver and the lower driver so that both the upper transistor and the lower transistor are always turned off during the OFF period of the dimming signal. The light emitting element drive device of description. The light-emitting element driving device according to any one of claims 1 to 8,
At least one light emitting element driven by the light emitting element driving device;
A light emitting device comprising:   The light emitting device according to claim 9, wherein the light emitting element is a light emitting diode or an organic EL element.   The light emitting device according to claim 10, wherein the light emitting device is used as an in-vehicle lamp.   The light emitting device according to claim 11, wherein the light emitting device is mounted on a vehicle as a headlight module, a turn lamp module, or a rear lamp module.   A vehicle comprising the light-emitting device according to claim 11.   The vehicle according to claim 13, wherein the light emitting device is used as at least one of a headlight, a light source for day / night driving, a tail lamp, a stop lamp, and a turn lamp.

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