JP2013140975A - フォトダイオード・アレイ及び製造方法 - Google Patents
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- H01L27/144—Devices controlled by radiation
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- H01L27/14643—Photodiode arrays; MOS imagers
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Abstract
【解決手段】フォトダイオード・アレイ及び製造方法が提供される。一つのフォトダイオード・アレイは、第一の表面及び裏側の第二の表面を有するシリコン・ウェーハと、このシリコン・ウェーハを貫通する複数の伝導性ビアとを含んでいる。フォトダイオード・アレイはさらに、第一の表面にパターン付き不純物添加エピタキシャル層を含んでおり、このパターン付き不純物添加エピタキシャル層と上述の基材とが複数のダイオード接合を形成している。パターン付きエッチングによって、ダイオード接合のアレイが画定される。
【選択図】図1
Description
22:電磁エネルギの発生源
24:検出器
26:制御器/プロセッサ
28:フォトダイオード・アレイ
30:読み出し電子回路
32:シンチレータ
34:対象
36:対象透過後コリメータ
40:シリコン・ウェーハ
42:基材層
44:高抵抗層
46:光照射面
48:インタコネクト面
50:ビア
51:二酸化物層
52:P++不純物添加多結晶ビア填装材
54:P+不純物添加エピ層
56:
58:開口
60:フォトダイオード
62:SiO2層
64a、64b:金属被覆
100:検出器モジュールを形成する方法
120:検出器モジュール
122:センサ・タイル
124:基材
200:イメージング・システム
202:CTイメージング・システム
204:PETイメージング・システム
206:被検体
210:回転ガントリ
212:X線源
214:検出器アレイ
216:検出器素子
220:コンピュータ
222:電動式テーブル
224:ガントリ開口
240:回転中心
242:制御機構
244:X線制御器
246:ガントリ・モータ制御器
248:ディジタル・データ・バッファ(DDB)
250:画像再構成器
252:記憶装置
260:コンソール
262:視覚表示ユニット
264:テーブル・モータ制御器
270:読み取り装置
272:コンピュータ可読の媒体
274:X線ビーム
Claims (20)
- 第一の表面及び裏側の第二の表面を有するシリコン・ウェーハと、
該シリコン・ウェーハを貫通する複数の伝導性ビアと、
前記第一の表面に設けられたパターン付き不純物添加エピタキシャル層と
を備えたフォトダイオード・アレイであって、前記パターン付き不純物添加エピタキシャル層と前記基材とが複数のダイオード接合を形成し、パターン付きエッチングにより該ダイオード接合のアレイが画定される、フォトダイオード・アレイ。 - 前記シリコン・ウェーハは、前記第一の表面を有する高抵抗エピタキシャル層を含んでいる、請求項1に記載のフォトダイオード・アレイ。
- 前記シリコン・ウェーハは基材層を含んでおり、前記高抵抗エピタキシャル層は該基材層よりも高い抵抗率を有し、前記高抵抗エピタキシャル層と前記基材層とは同じ不純物添加形式を有している、請求項2に記載のフォトダイオード・アレイ。
- 前記複数の伝導性ビアは、不純物添加多結晶シリコン填装材を内部に含んでいる、請求項1に記載のフォトダイオード・アレイ。
- 前記不純物添加多結晶シリコン填装材は、前記シリコン・ウェーハと異なる不純物添加形式を有している、請求項4に記載のフォトダイオード・アレイ。
- 前記不純物添加多結晶シリコン填装材は、前記第一の表面の前記不純物添加エピタキシャル層と同じ不純物添加形式を有している、請求項4に記載のフォトダイオード・アレイ。
- 前記複数の伝導性ビアを前記シリコン・ウェーハから離隔する誘電層をさらに含んでいる請求項1に記載のフォトダイオード・アレイ。
- 前記誘電層は二酸化ケイ素(SiO2)層を含んでいる、請求項7に記載のフォトダイオード・アレイ。
- 前記不純物添加エピタキシャル層は、前記複数のダイオード接合と前記複数の伝導性ビアとを電気的に接続している、請求項1に記載のフォトダイオード・アレイ。
- 前記第二の表面に設けられており、前記複数の伝導性ビアにより前記複数のダイオード接合に電気的に接続されている相補型金属酸化膜半導体(CMOS)電子回路をさらに含んでいる請求項1に記載のフォトダイオード・アレイ。
- 前記基材は多層N不純物添加シリコンであり、前記不純物添加エピタキシャル層はP不純物添加型である、請求項1に記載のフォトダイオード・アレイ。
- 前記不純物添加エピタキシャル層はP+型不純物添加層である、請求項11に記載のフォトダイオード・アレイ。
- 前記複数の伝導性ビアは、P++型不純物添加多結晶填装材を有する不純物添加多結晶シリコン填装材を内部に含んでいる、請求項12に記載のフォトダイオード・アレイ。
- 第一の表面及び裏側の第二の表面を有するシリコン・ウェーハと、
該シリコン・ウェーハを貫通する複数の伝導性ビアと、
金属を有さず前記第一の表面に形成される複数のフォトダイオードと、
前記裏側の第二の表面に形成される読み出し電子回路と
を備えた検出器であって、前記複数のフォトダイオードと前記読み出し電子回路とが前記複数の伝導性ビアにより電気的に接続されている、検出器。 - 前記読み出し電子回路は相補型金属酸化膜半導体(CMOS)電子回路を含んでいる、請求項14に記載の検出器。
- 前記シリコン・ウェーハは、前記第一の表面を有する高抵抗エピタキシャル層と、基材層とを含んでおり、前記高抵抗エピタキシャル層は前記基材層よりも高い抵抗率を有し、前記高抵抗エピタキシャル層と前記基材層とは同じ不純物添加形式を有している、請求項14に記載の検出器。
- 前記複数の伝導性ビアは、前記シリコン・ウェーハと異なる不純物添加形式を有すると共に前記第一の表面の不純物添加エピタキシャル層と同じ不純物添加形式を有する不純物添加多結晶シリコン填装材を内部に含んでいる、請求項14に記載の検出器。
- 前記複数の伝導性ビアを前記シリコン・ウェーハから離隔する誘電層をさらに含んでいる請求項14に記載の検出器。
- 伝導性シリコン貫通電極法を用いてシリコン・ウェーハを予備加工するステップと、
該予備加工済みシリコン・ウェーハの表面に、複数のダイオード接合を形成するように不純物添加エピタキシャル層を堆積させるステップと、
前記ダイオード接合のアレイを画定するように、前記表面にパターンをエッチングするステップと
を備えたフォトダイオード・アレイを製造する方法。 - 前記不純物添加エピタキシャル層を備えた前記表面の裏側の前記予備加工済みシリコン・ウェーハの表面に相補型金属酸化膜半導体(CMOS)電子回路を製造するステップをさらに含んでいる請求項19に記載の方法。
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Application Number | Priority Date | Filing Date | Title |
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US13/343,165 | 2012-01-04 | ||
US13/343,165 US8736008B2 (en) | 2012-01-04 | 2012-01-04 | Photodiode array and methods of fabrication |
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JP2013140975A true JP2013140975A (ja) | 2013-07-18 |
JP2013140975A5 JP2013140975A5 (ja) | 2016-02-12 |
JP6133055B2 JP6133055B2 (ja) | 2017-05-24 |
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Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9306108B2 (en) | 2014-01-14 | 2016-04-05 | Shimadzu Corporation | Radiation detector |
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JP6133055B2 (ja) | 2017-05-24 |
US8736008B2 (en) | 2014-05-27 |
DE102012113168A1 (de) | 2013-07-04 |
US20130168750A1 (en) | 2013-07-04 |
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