JP2013118331A - Light emitting diode and method for manufacturing the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a light emitting diode which has a protection film and an electrode film formed thereon that have uniform film thicknesses, and has high light extraction efficiency, and to provide a method for manufacturing the same.SOLUTION: The light emitting diode includes a support structure portion 6 having an upper face 6a and a side face 6b, and a mesa type structure portion 7 which is arranged on the support structure portion 6 and has an inclined side face 7a and a top face 7b. The inclined side face 7a is formed by wet etching, a protection film 8 is in the inside of a peripheral region 7ba in plan view and is arranged in the periphery of a light emitting hole 9b, and has a current feeding window 8b through which a part of the surface of a compound semiconductor layer is exposed, a first electrode film 9 is a continuous film formed so as to be brought into contact with the surface of the compound semiconductor layer exposed from the current feeding window 8b, cover a part of the protection film 8 formed on the upper face 6a and have the light emitting hole 9b on the top face 7b of the mesa type structure portion 7, and a second electrode film 10 is provided within a range overlapping the light emitting hole 9b, on a rear face 1A of a substrate 1.

Description

  The present invention relates to a light emitting diode and a method for manufacturing the same.

  A point light source type light emitting diode that extracts light generated in the light emitting layer from a part of the upper surface of the element is known. As this type of light emitting diode, one having a current confinement structure for limiting a current-carrying region in a light emitting layer to a part of the surface is known (for example, Patent Document 1). In a light emitting diode having a current confinement structure, a light emitting region is limited, and light is emitted from a light emitting hole provided immediately above the region, so that high light output is obtained and the emitted light is applied to an optical component or the like. It is possible to capture efficiently.

  Among the point light source type light emitting diodes, in particular, a resonator type light emitting diode (RCLED) has an antinode of a standing wave generated in a resonator composed of two mirrors. A high-efficiency light-emitting element that is configured to be located in the light-emitting layer and that operates in LED mode without causing laser oscillation by setting the reflectance of the mirror on the light emission side to be lower than that of the mirror on the substrate side. Yes (Patent Documents 2 and 3). Resonator-type light-emitting diodes can respond faster than ordinary light-emitting diodes due to the effect of the resonator structure due to the narrow emission spectrum line width, high directivity of emitted light, and short carrier lifetime due to spontaneous emission. Because there is a feature such as, there is a suitable sensor.

In the resonator type light emitting diode, the upper mirror layer and the active layer have a pillar structure in order to narrow the light emitting region in the direction parallel to the substrate, and the light extraction surface on the top surface of the pillar structure has an opening for light emission. A configuration including a layer is known (for example, Patent Document 4).
FIG. 12 shows a resonator type light emitting diode having a lower mirror layer 132, an active layer 133, an upper mirror layer 134, and a contact layer 135 in this order on a substrate 131. The active layer 133, the upper mirror The layer 134 and the contact layer 135 are formed as a pillar structure 137, the pillar structure 137 and its periphery are covered with a protective film 138, an electrode film 139 is formed on the protective film 138, and the top surface 137a of the pillar structure 137 (light A resonator type light emitting diode in which an opening 139a for light emission is formed in the electrode film 139 on the extraction surface) is shown. Reference numeral 140 denotes a back electrode.

  The current confinement structure having a pillar structure as shown in FIG. 12 can be applied to a point light source type light emitting diode which is not a resonator type.

JP 2005-31842 A JP 2002-76433 A JP 2007-299949 A JP-A-9-283862

  When forming the pillar structure, in order to remove portions other than the pillar structure after forming the active layer and the like by anisotropic dry etching, as shown in FIG. 12, the side surface 137b of the pillar structure 137 is formed. Is formed perpendicularly or steeply to the substrate 131. Usually, a protective film is formed on the side surface of the pillar structure by vapor deposition or sputtering, and then a metal (for example, Au) film for electrodes is formed by vapor deposition. The protective film is formed on the vertical or steeply inclined side surface. It is not easy to form a film or a metal film for an electrode with a uniform film thickness, and there is a problem that it is likely to be a discontinuous film. When the protective film becomes a discontinuous film (symbol A in FIG. 12), the electrode metal film enters the discontinuous portion and comes into contact with the active layer or the like, causing leakage. In addition, when the electrode metal film becomes a discontinuous film (symbol B in FIG. 12), it causes a conduction failure.

  Further, the light emitting diode shown in FIG. 12 has a problem in that the side surface 132a of the structure supporting the pillar structure is exposed, so that the side surface comes into contact with the atmosphere and moisture in the atmosphere and deteriorates. In particular, when the lower mirror layer 132 is a semiconductor layer having a high Al composition, the side surfaces are oxidized and the characteristics are deteriorated.

  In addition, when the portion other than the pillar structure is removed by dry etching, an expensive apparatus is required, and there is a problem that it takes a long etching time.

  Furthermore, in the point light source type light emitting diode having the light emitting hole on the top surface of the pillar structure as shown in FIG. 12, since current flows through the entire light emitting layer in the pillar structure, Because the amount of light emitted from the part other than directly under the light emitting hole is large, the light emitted from the part other than directly under the light emitting hole is less likely to be emitted outside the light emitting diode than the light emitted directly under the light emitting hole. The improvement of the light extraction efficiency was hindered.

The present invention has been made in view of the above circumstances, and a light-emitting diode having a uniform film thickness and a high light extraction efficiency as well as a leakage and energization. It is an object of the present invention to provide a method of manufacturing a light-emitting diode that can be manufactured at a lower cost than conventional ones while reducing defects and improving yield.
The present invention further provides a light-emitting diode in which stable and high-luminance light emission is ensured, side surface deterioration is prevented, and high reliability and long life are achieved, and a method for manufacturing the same. Objective.

The present invention provides the following means.
(1) A light-emitting diode that includes a compound semiconductor layer including a reflective layer and an active layer in order on a substrate, and emits light to the outside from a light emission hole, the support structure having an upper surface and side surfaces, and the support structure And a mesa structure having an inclined side surface and a top surface. The mesa structure includes at least a part of the active layer, and the inclined side surface is formed by wet etching. And the cross-sectional area in the horizontal direction is continuously reduced toward the top surface, and each of the support structure portion and the mesa structure portion is at least partially formed by a protective film and a first electrode film. The protective film covers at least a part of the upper surface, the inclined side surface of the mesa structure portion, and the peripheral region of the top surface of the mesa structure portion, and in plan view. Said lap An energization window is provided inside the region and around the light emission hole to expose a part of the surface of the compound semiconductor layer, and the first electrode film is exposed from the energization window. A continuous film formed to be in direct contact with the surface of the compound semiconductor layer, cover at least part of the protective film formed on the upper surface, and have a light emission hole on the top surface of the mesa structure portion A light emitting diode comprising a second electrode film on a side opposite to the reflective layer of the substrate in a range overlapping the light emitting hole in plan view.
(2) A light-emitting diode which includes a compound semiconductor layer including a reflective layer and an active layer in order on a substrate, and emits light to the outside from a light emission hole, the support structure having an upper surface and side surfaces, and the support structure A mesa structure having an inclined side surface and a top surface, the support structure portion including at least a part of the reflective layer, and the side surface is formed by wet etching, An inclined portion extending from the upper surface to the substrate side to a position exceeding at least the reflective layer, and a horizontal cross-sectional area including the inclined portion is continuously reduced toward the upper surface; The mold structure part includes at least a part of the active layer, and the inclined side surface is formed by wet etching, and a horizontal cross-sectional area continuously decreases toward the top surface. Each of the support structure section and the mesa structure section is covered with a protective film and a first electrode film in order, and the protective film includes at least a part of the upper surface; Covers at least the inclined portion of the side surface, the inclined side surface of the mesa structure portion, and the peripheral region of the top surface of the mesa structure portion, and is inside the peripheral region in plan view, and An energization window is disposed around the light emission hole to expose a part of the surface of the compound semiconductor layer, and the first electrode film is formed on the surface of the compound semiconductor layer exposed from the energization window. It is a continuous film that is in direct contact, covers at least a part of the protective film formed on the upper surface, and has a light emission hole on the top surface of the mesa structure. On the opposite side of the layer, With a second electrode film in the range overlapping the light emission hole, light emitting diodes, characterized in that.
(3) The light-emitting diode according to any one of (1) and (2), wherein the reflective layer is a DBR reflective layer.
(4) The light-emitting diode according to (3), further comprising an upper DBR reflective layer on the side opposite to the substrate of the active layer.
(5) The inclined portion is composed of two or more inclined portions, and the horizontal cross-sectional area including each inclined portion is continuously small toward the upper surface, and the horizontal cross-sectional area including the inclined portion close to the upper surface. The light emitting diode according to any one of (1) to (4), wherein the light emitting diode is as large as possible.
(6) The light-emitting diode according to any one of (1) to (5), wherein a light leakage prevention film is provided on the first electrode film and / or the protective film.
(7) The light-emitting diode according to any one of (1) to (6), wherein the compound semiconductor layer has a contact layer in contact with the electrode film.
(8) The light-emitting diode according to any one of (1) to (7), wherein the mesa structure portion includes all of the active layer and part or all of the reflective layer.
(9) The light-emitting diode according to any one of (1) to (8), wherein the mesa structure portion is rectangular in plan view.
(10) The light-emitting diode according to (9), wherein each inclined side surface of the mesa structure portion is formed to be offset with respect to the orientation flat of the substrate.
(11) The height of the mesa structure portion is 3 to 7 μm, and the width of the inclined side surface in plan view is 0.5 to 7 μm. Any one of (1) to (10) The light emitting diode according to one item.
(12) The light emitting diode according to any one of (1) to (11), wherein the light emitting hole is circular or elliptical in plan view.
(13) The light emitting diode according to (12), wherein the diameter of the light emitting hole is 50 to 150 μm.
(14) The light-emitting diode according to any one of (1) to (13), wherein a bonding wire is provided in a portion on the upper surface of the first electrode film.
(15) The light emitting diode according to any one of (1) to (14), wherein the light emitting layer included in the active layer is formed of a multiple quantum well.
(16) light-emitting layer included in the active layer _{((Al X1 Ga 1-X1} ) Y1 In 1-Y1 P (0 ≦ X1 ≦ 1,0 <Y1 ≦ 1), (Al X2 Ga 1-X2) As (0 ≦ X2 ≦ 1), (In _X3 Ga _1-X3 ) As (0 ≦ X3 ≦ 1)), according to any one of (1) to (15), Light emitting diode.
(17) A method of manufacturing a light emitting diode, comprising a reflective semiconductor and a compound semiconductor layer including an active layer in order on a substrate, and emitting light to the outside through a light emitting hole, wherein the reflective layer and the active layer are provided on the substrate. A step of forming a compound semiconductor layer, a step of forming a second electrode film on a side opposite to the reflective layer of the substrate in a range overlapping the light emission hole to be formed in plan view, A step of wet-etching the compound semiconductor layer to form a mesa structure having a horizontal cross-sectional area continuously reduced toward the top surface and an upper surface disposed around the mesa structure; And covering at least a part of the upper surface, the inclined side surface of the mesa structure, and the peripheral region of the top surface of the mesa structure, and inside the peripheral region in plan view. And arranged around the light exit hole. Forming a protective film having a current-carrying window exposing a part of the surface of the compound semiconductor layer; and a protection formed on the upper surface while directly contacting the surface of the compound semiconductor layer exposed from the current-carrying window Forming a first electrode film that is a continuous film that covers at least part of the film and has a light emission hole on the top surface of the mesa structure. Manufacturing method of light emitting diode.
(18) A method for manufacturing a light-emitting diode, comprising a reflective layer and a compound semiconductor layer including an active layer in order on a substrate, and emitting light to the outside through a light emitting hole, wherein the reflective layer and the active layer are disposed on the substrate. A step of forming a compound semiconductor layer, a step of forming a second electrode film on a side opposite to the reflective layer of the substrate in a range overlapping the light emission hole to be formed in plan view, First wet etching is performed on the compound semiconductor layer, and a mesa structure portion in which a horizontal cross-sectional area is continuously reduced toward the top surface and the support is disposed around the mesa structure portion. Forming a top surface of the structure portion, performing a second wet etching along the cutting line for singulation to form a slope portion on a side surface of the support structure portion, and forming the slope portion and the top surface At least a portion and the inclination of the mesa structure Covering at least the surface and the peripheral region of the top surface of the mesa structure, and surrounding the light emission hole inside the peripheral region in plan view and around the light emission hole A step of forming a protective film having a current-carrying window that exposes a part of the surface of the compound semiconductor layer; directly contacting a surface of the compound semiconductor layer exposed from the current-carrying window; and Forming a first electrode film that covers at least a part of the formed protective film and is a continuous film formed so as to have a light emission hole on the top surface of the mesa structure portion. A method for producing a light-emitting diode characterized by the above.
(19) The first and second wet etching are at least selected from the group consisting of a phosphoric acid / hydrogen peroxide mixture, an ammonia / hydrogen peroxide mixture, a bromomethanol mixture, and potassium iodide / ammonia. The method for producing a light-emitting diode according to any one of (17) and (18), which is performed using one or more kinds.

According to the light emitting diode of the present invention, the substrate includes a compound semiconductor layer including a reflective layer and an active layer in order on the substrate, emits light to the outside from the light emitting hole, and the protective film is inside the peripheral region and A current-carrying window is disposed around the light emission hole to expose a part of the surface of the compound semiconductor layer, and the first electrode film is in direct contact with the surface of the compound semiconductor layer exposed from the current-carrying window. A continuous film formed so as to cover at least a part of the protective film formed on the upper surface and to have light emission on the top surface of the mesa structure, and on the side opposite to the reflective layer of the substrate Since the configuration including the second electrode film in the range overlapping the light emission hole as viewed is adopted, the first electrode film was formed in the range overlapping the portion where the conduction window was buried and the light emission hole. The current is concentrated between the second electrode film and the light emission hole of the active layer. The amount of light emitted in the lower part is larger than the amount of light emitted in parts other than the part directly below, and as a result, the ratio of light toward the light exit hole is increased, and the light extraction efficiency is improved. ing.
According to the light emitting diode of the present invention, since the structure including the support structure portion having the upper surface and the side surface and the mesa structure portion disposed on the support structure portion and having the inclined side surface and the top surface is adopted, Output can be obtained and the emitted light can be efficiently taken into an optical component or the like.
According to the light emitting diode of the present invention, since the inclined side surface of the mesa structure is formed by wet etching and the cross-sectional area in the horizontal direction is continuously reduced toward the top surface, the configuration is adopted. Compared to the vertical side surface, it is easier to form a protective film and electrode film on the side surface, so a continuous film with a uniform thickness is formed, so there is no leakage or poor conduction due to a discontinuous film. Stable and high luminance light emission is guaranteed. Such an effect is achieved as long as a mesa structure portion having an inclined side surface formed by wet etching is provided, and is an effect obtained regardless of the laminated structure inside the light emitting diode and the configuration of the substrate.

  According to the light emitting diode of the present invention, the support structure portion includes at least a part of the reflective layer, and the side surface thereof is formed by wet etching and extends from the top surface to the substrate side at least beyond the reflective layer. The protective film includes at least a part of the upper surface and at least the inclined part of the side surface. Since the structure covering the inclined side surface and the peripheral region of the top surface is adopted, the side surface of the reflective layer of the support structure is covered with a protective film, and the side surface of the reflective layer deteriorates due to contact with the atmosphere or moisture. Therefore, high reliability and long life are achieved. Such an effect is achieved as long as a mesa structure portion having an inclined side surface formed by wet etching is provided, and is an effect obtained regardless of the laminated structure inside the light emitting diode and the configuration of the substrate.

  According to the light emitting diode of the present invention, it is possible to emit light with a narrow emission spectrum line width by adopting a configuration in which the reflective layer is a DBR reflective layer. Furthermore, by adopting a configuration in which the upper DBR reflective layer is provided on the side opposite to the substrate of the active layer, the emission spectral line width is narrow, the directivity of the emitted light is high, and high-speed response is possible.

  According to the light emitting diode of the present invention, the inclined portion is composed of two or more inclined portions, the horizontal cross-sectional area including each inclined portion is continuously small toward the upper surface, and the horizontal direction including the inclined portion close to the upper surface. By adopting a configuration having a larger cross-sectional area than the vertical side surface, it is easier to form a protective film and an electrode film thereon on the side surface than in the case of the vertical side surface. There are no leaks or poor energization due to the continuous film, and stable and bright light emission is ensured.

  According to the light emitting diode of the present invention, by adopting a configuration in which the light leakage prevention film is provided on the first electrode film and / or the protective film, the light emitted from the active layer is emitted from the first electrode film and / or It is possible to prevent leakage through the protective film and out of the element.

  According to the light emitting diode of the present invention, by adopting a configuration in which the compound semiconductor layer has a contact layer in contact with the first electrode film, the contact resistance of the ohmic electrode is lowered and low voltage driving is possible.

  According to the light emitting diode of the present invention, the mesa structure portion adopts a configuration including all of the active layer and part or all of the reflective layer, so that all light emission occurs in the mesa structure portion. The light extraction efficiency is improved.

  According to the light emitting diode of the present invention, by adopting a rectangular configuration when the mesa structure is viewed in plan, the mesa shape changes depending on the etching depth due to anisotropy in wet etching during manufacturing. Is suppressed, and the mesa area can be easily controlled, so that a highly accurate dimensional shape is obtained.

  According to the light emitting diode of the present invention, by adopting a configuration in which each inclined side surface of the mesa structure portion is formed offset with respect to the orientation flat of the substrate, the four sides constituting the rectangular mesa structure portion are formed. On the other hand, since the influence of the anisotropy due to the substrate orientation is mitigated, a uniform mesa shape / gradient is obtained.

  According to the light emitting diode of the present invention, by adopting a configuration in which the height of the mesa structure portion is 3 to 7 μm and the width of the inclined side surface in a plan view is 0.5 to 7 μm, Compared to the above, it is easy to form a protective film on the side and the electrode film on it, so a continuous film is formed with a uniform film thickness. Luminance emission is guaranteed.

  According to the light emitting diode of the present invention, by adopting a configuration in which the light emitting hole is circular or elliptical in plan view, it is easy to form a uniform contact region as compared with a structure having a corner such as a rectangle. Occurrence of current concentration and the like can be suppressed. Further, it is suitable for coupling to a fiber or the like on the light receiving side.

  According to the light emitting diode of the present invention, by adopting a configuration in which the diameter of the light emitting hole is 50 to 150 μm, the current density in the mesa structure is increased below 50 μm, and the output is saturated at a low current. On the other hand, if it exceeds 150 μm, it is difficult to spread the current to the entire mesa structure, so that the problem that the output is saturated is also avoided.

  According to the light emitting diode of the present invention, by adopting a configuration having a bonding wire in a portion on the upper surface of the first electrode film, the upper surface of the first electrode film to which a sufficient load (and ultrasonic waves) can be applied. Since wire bonding is performed, wire bonding with high bonding strength is realized.

  According to the light emitting diode of the present invention, by adopting a configuration in which the light emitting layer included in the active layer is composed of multiple quantum wells, sufficient injected carriers are confined in the well layer, so that the carrier density in the well layer is increased. As a result, the emission recombination probability increases and the response speed is high.

According to a method for manufacturing a light emitting diode of the present invention, a method for manufacturing a light emitting diode comprising a compound semiconductor layer including a reflective layer and an active layer in order on a substrate, and emitting light to the outside from a light emitting hole, A second electrode is formed on the opposite side of the substrate from the reflective layer and the compound semiconductor layer including the active layer, and overlaps the light emission hole to be formed in plan view on the opposite side of the substrate. Since the structure having the step of forming the film is employed, the current concentrates between the portion of the first electrode film where the conduction window is buried and the through electrode, so that the active layer is directly below the light emission hole. The amount of light emitted from the part is larger than the amount of light emitted from the part other than the part directly below, and as a result, the ratio of the light toward the light exit hole is increased, and a light emitting diode with improved light extraction efficiency is manufactured. can do.
According to the method for manufacturing a light emitting diode of the present invention, a mesa structure portion formed by wet-etching a compound semiconductor layer and having a horizontal cross-sectional area continuously reduced toward the top surface, and the mesa structure portion And an energization window that exposes a part of the surface of the compound semiconductor layer, disposed inside the peripheral region of the mesa structure and around the light emission hole. A step of forming a protective film so as to have a direct contact with the surface of the compound semiconductor layer exposed from the energization window, and at least a part of the protective film formed on the upper surface, covering the top surface of the mesa structure And a step of forming a first electrode film, which is a continuous film formed so as to have a light emission hole, on the optical component and the like. Possible to capture efficiently In addition, since a protective film and an electrode film thereon are easily formed on an inclined slope as compared with the case of a vertical side surface, a continuous film is formed with a uniform film thickness. It is possible to manufacture a light-emitting diode that is free from energization failure and ensures stable and high-luminance light emission. When the pillar structure is formed by conventional anisotropic dry etching, the side surface is formed vertically, but by forming the mesa structure portion by wet etching, the side surface can be formed with a gently inclined side surface. Further, by forming the mesa structure portion by wet etching, the formation time can be shortened as compared with the case where the pillar structure is formed by conventional dry etching.

  According to the light emitting diode manufacturing method of the present invention, the second wet etching is performed along the singulation cutting line to form the inclined portion on the side surface of the support structure portion, and the protective film covering the inclined portion. Therefore, it is possible to manufacture a light emitting diode in which the side surface is prevented from being deteriorated by contact with air or moisture.

It is a cross-sectional model drawing of the light emitting diode which is the 1st Embodiment of this invention. It is a perspective view of the light emitting diode which is the 1st Embodiment of this invention. It is an electron micrograph which shows the cross section of the inclined slope of the light emitting diode which is the 1st Embodiment of this invention. It is a cross-sectional schematic diagram of the active layer of the light emitting diode which is the 1st Embodiment of this invention. It is a cross-sectional schematic diagram of the light emitting diode which is the 2nd Embodiment of this invention. It is a cross-sectional schematic diagram of the light emitting diode which is the 3rd Embodiment of this invention. It is a cross-sectional schematic diagram of the light emitting diode which is the 4th Embodiment of this invention. It is a cross-sectional model diagram for demonstrating the manufacturing method of the light emitting diode of the 1st Embodiment of this invention. It is a cross-sectional model diagram for demonstrating the manufacturing method of the light emitting diode of the 1st Embodiment of this invention. It is a graph which shows the relationship of the depth and width with respect to the etching time of wet etching. It is a cross-sectional model diagram for demonstrating the manufacturing method of the light emitting diode of the 1st Embodiment of this invention. It is a cross-sectional schematic diagram of a conventional light emitting diode.

Hereinafter, a configuration of a light emitting diode to which the present invention is applied and a method for manufacturing the same will be described with reference to the drawings. In addition, in the drawings used in the following description, in order to make the features easy to understand, there are cases where the portions that become the features are enlarged for convenience, and the dimensional ratios of the respective components are not always the same as the actual ones. . In addition, the materials, dimensions, and the like exemplified in the following description are examples, and the present invention is not limited to them, and can be appropriately changed and implemented without changing the gist thereof. For example, the configuration shown in one embodiment can be applied to another embodiment.
In addition, you may provide the layer which is not described below in the range which does not impair the effect of this invention.

[Light-Emitting Diode (First Embodiment)]
FIG. 1 is a schematic cross-sectional view of a resonator type light emitting diode which is an example of a light emitting diode according to a first embodiment to which the present invention is applied. FIG. 2 is a perspective view of a light emitting diode formed on a wafer including the light emitting diode shown in FIG.

A light emitting diode 100 shown in FIG. 1 includes a compound semiconductor layer including a reflective layer 2 and an active layer 3 in order on a substrate 1 and emits light to the outside through a light emitting hole 9b. The support structure portion 6 has a side surface 6b, and a mesa structure portion 7 disposed on the support structure portion 6 and having an inclined side surface 7a and a top surface 7b. The inclined side surface 7a is formed by wet etching, and the cross-sectional area in the horizontal direction is continuously reduced toward the top surface 7b, so that the support structure portion 6 and the mesa structure portion are formed. 7 is at least partially covered with a protective film 8 and a first electrode film 9 in order. The protective film 8 includes at least a part of the upper surface 6a, the inclined side surface 7a of the mesa structure 7, and the mesa. Top of mold structure 7 7b, and a part of the surface of the compound semiconductor layer (contact layer 5) is exposed by being disposed inside the peripheral region 7ba and around the light emitting hole 9b in plan view. The first electrode film 9 has a current-carrying window 8b and is in direct contact with the surface of the compound semiconductor layer (contact layer 5) exposed from the current-carrying window 8b, and is a part of the protective film 8 formed on the upper surface 6a. Is a continuous film formed so as to have at least a light emission hole 9b on the top surface 7b of the mesa structure 7, and emits light in a plan view on the side opposite to the reflective layer 2 of the substrate 1. The second electrode film 10 is provided in a range overlapping the hole 9b.
In the present embodiment, the reflective layer 2 is a DBR reflective layer (lower DBR reflective layer), and is provided in the upper DBR reflective layer 4 on the opposite side of the active layer 3 from the substrate 1, and the compound semiconductor layer is the first electrode film. The contact layer 5 is in contact with 9.
The mesa structure 7 is rectangular in plan view, and the light emission hole 9b of the first electrode film 9 is circular in plan view. The plan view of the mesa structure 7 is not limited to a rectangle, and the plan view of the light emission hole 9b is not limited to a circle.
A light leakage prevention film 16 for preventing light leakage from the side surface is provided on the first electrode film of the mesa structure portion 7.

  As shown in FIG. 2, in the light emitting diode of the present invention, after a large number of light emitting diodes 100 are formed on a wafer-like substrate, streets (scheduled cutting lines) 21 (dotted lines 22 are the lengths of the streets 21) for each light emitting diode. It can be manufactured by cutting along a direction centerline). That is, each light emitting diode can be cut by applying a laser, a blade, or the like to the portion of the street 21 along the dotted line 22.

  The mesa structure portion 7 has a structure protruding upward with respect to the upper surface 6a of the support structure portion 6, and has an inclined side surface 7a and a top surface 7b as outer surfaces. In the case of the example shown in FIG. 1, the inclined side surface 7 a is formed of a first electrode film (a) formed on the entire active layer 3, the upper DBR reflective layer 4, and the inclined cross section of the contact layer 5 via a protective film. The top surface 7b is composed of a surface of a portion 8d covering the central portion of the protective film 8 and a surface of the first electrode film 9 (portions 9ba, 9bb and 9d). Consists of.

Further, the inside of the mesa structure portion 7 of the present invention includes the contact layer 5, the upper DBR reflection layer 4, and at least a part of the active layer 3.
In the case of the example shown in FIG. 1, the inside of the mesa structure portion 7 includes the contact layer 5, the upper DBR reflection layer 4, and the entire active layer 3. The mesa structure 7 may include only a part of the active layer 3, but it is preferable that the entire active layer 3 is included in the mesa structure 7. This is because all the light emitted from the active layer 3 is generated in the mesa structure, and the light extraction efficiency is improved. Further, a part of the lower DBR reflection layer 2 may be included in the mesa structure portion 7.

In addition, the mesa structure 7 has an inclined side surface 7a formed by wet etching, and has a horizontal cross-sectional area that continuously decreases from the substrate 1 side to the top surface. Since the inclined side surface 7a is formed by wet etching, it is formed in a convex shape downward. The height h of the mesa structure 7 is preferably 3 to 7 μm, and the width w of the inclined side surface 7a in plan view is preferably 0.5 to 7 μm. In this case, since the side surface of the mesa structure portion 7 is not vertical or steeply inclined but gently inclined, it is easy to form the protective film and the electrode metal film with a uniform film thickness, which is discontinuous. This is because there is no possibility of forming a film, and therefore there is no leakage or poor conduction due to the discontinuous film, and stable and high-luminance emission is ensured.
Further, it is not preferable to perform wet etching until the height exceeds 7 μm because the inclined side surface tends to be in an overhang shape (reverse taper shape). In the overhang shape (reverse taper shape), it becomes more difficult to form the protective film and the electrode film with a uniform film thickness without discontinuous portions than in the case of the vertical side surface.
In the present specification, the height h means an electrode film that covers the portion 8ba of the protective film 8 from the surface of the electrode film 9 (portion 9c) formed through the protective film on the upper surface 6a. This is the vertical distance (see FIG. 1) to the surface of 9 (part 9ba). Further, the width w is the lowermost portion of the electrode film 9 (reference numeral 9a) on the inclined side surface connected to the edge of the electrode film 9 (reference numeral 9ba) covering the protective film 8 at the reference numeral 8ba. The horizontal distance of the edge (see FIG. 1).

FIG. 3 is an electron micrograph of a cross section in the vicinity of the mesa structure portion 7.
The layer configuration of the example shown in FIG. 3 is the same as that of the example described later except that the contact layer is made of Al0.3Ga0.7As and the layer thickness is 3 μm.

Since the mesa structure portion of the present invention is formed by wet etching, the horizontal cross-sectional area (or width or diameter) of the mesa structure portion increases from the top surface side to the substrate side (downward in the figure). ) To increase. With this shape, it can be determined that the mesa structure is formed not by dry etching but by wet etching.
In the example shown in FIG. 3, the height h is 7 μm, and the width w is 3.5 to 4.5 μm.

  The mesa structure 7 is preferably rectangular in plan view. The mesa shape can be prevented from changing depending on the etching depth due to the influence of anisotropy in wet etching during manufacturing, and the area of each surface of the mesa structure can be easily controlled, so a highly accurate dimensional shape can be obtained. It is.

  As shown in FIGS. 1 and 2, the position of the mesa structure portion 7 in the light emitting diode is preferably shifted to one side in the long axis direction of the light emitting diode in order to reduce the size of the element. Since the upper surface 6a of the support structure portion 6 needs to have a size required for attaching a bonding wire (not shown), there is a limit to narrowing it, and by moving the mesa structure portion 7 to the other side, This is because the range of the upper surface 6a of the support structure 6 can be minimized and the device can be miniaturized.

  The support structure 6 includes an upper surface 6a and a side surface 6b. The upper surface 6 a of the support structure portion 6 is a portion disposed around the mesa structure portion 7. In the present invention, wire bonding is performed on a portion located on the upper surface of the first electrode film to which a sufficient load (and ultrasonic wave) can be applied, so that wire bonding with high bonding strength can be realized.

  A protective film 8 and a first electrode film (front surface electrode layer) 9 are formed in this order on the upper surface 6 a of the support structure portion 6, and a bonding wire ( (Not shown) is attached. The material disposed immediately below the protective film 8 on the upper surface 6 a is determined by the internal configuration of the mesa structure portion 7. In the case of the example shown in FIG. 1, the inside of the mesa structure portion 7 includes the contact layer 5, the upper DBR reflection layer 4, and the entire active layer 3, and the lower DBR which is a layer immediately below the active layer 3. Since the uppermost surface of the reflective layer is disposed directly below the protective film 8 on the upper surface 6a of the support structure 6, the material disposed immediately below the protective film 8 on the upper surface 6a is the material of the uppermost surface of the lower DBR reflective layer.

On the back surface 1A of the substrate 1, a second electrode film (back electrode) 10 is provided in a range overlapping the light emission hole 9b in plan view.
A portion of the first electrode film in which the energization window is filled (“contact portion 9bb”) and a second area formed in a range overlapping the light emission hole 9b disposed inside the energization window 8b in plan view. By concentrating current between the electrode film 10 and the active layer 3, the amount of light emitted from the portion immediately below the light emission hole 9b in the active layer 3 is larger than the amount of light emitted from portions other than the portion immediately below the light emitting hole 9b. As a result, the ratio of light toward the light exit hole is increased, and the light extraction efficiency is improved.

  There is no restriction | limiting in particular in the shape of the 2nd electrode film | membrane 10, A well-known electrode material can be used as the material, For example, Au, AuBe alloy, and AuGe alloy can be used.

The protective film 8 covers a portion 8 a that covers the inclined side surface 7 a of the mesa structure portion 7 and a portion 8 c that covers at least a part of the upper surface 6 a of the support structure portion 6 (covers the upper surface on the opposite side across the mesa structure portion 7. A portion 8ba covering the peripheral region 7ba of the top surface 7b of the mesa structure 7 and a portion 8d covering the central portion of the top surface 7b. And a conduction window 8b exposing a part of the surface of the contact layer 5.
The energization window 8b of the present embodiment is a portion of the surface of the contact layer 5 on the top surface 7b of the mesa structure 7 that is located below the portion 8ba located below the peripheral region 7ba and the portion 8d covering the central portion. An area between two concentric circles with different diameters between and is exposed.
There is no restriction | limiting in the shape of the electricity supply window 8b. It does not have to be annular, and may consist of a plurality of discrete regions instead of being continuous.

The first function of the protective film 8 is to dispose a region where light emission occurs and a range from which light is extracted to be arranged below the front surface electrode layer 9. This is to restrict the inflow or outflow of current between the compound semiconductor layer 20 in contact with the layer 20 to the portion of the energization window 8b of the top surface 7b. That is, after forming the protective film 8, a front electrode layer is formed on the entire surface including the protective film 8, and then the front electrode layer is patterned. Even if the surface electrode layer is not removed, no current flows between the second electrode film (back surface electrode) 10. An energization window 8b of the protective film 8 is formed where it is desired to pass a current between the second electrode film (back electrode) 10.
Therefore, if the energization window 8b is formed on a part of the top surface 7b of the mesa structure 7 so as to have the first function, the shape and position of the energization window 8b is the shape as shown in FIG. It is not limited to or position.

The second function of the protective film 8 is not an essential function while the first function is an essential function. In the case of the protective film 8 shown in FIG. In addition, it is arranged on the surface of the contact layer 5 in the light emitting hole 9a of the surface electrode layer 9, so that light can be extracted through the protective film 8, and the surface of the contact layer 5 from which light is extracted is protected. That is.
In the second embodiment to be described later, there is no protective film under the light emitting hole, and the light is directly extracted from the light emitting hole 9b without the protective film, and the second function is provided. No.

As the material of the protective film 8, a known material can be used as the insulating layer, but a silicon oxide film is preferable because it is easy to form a stable insulating film.
In this embodiment, since light is extracted through the protective film 8 (8d), the protective film 8 needs to have translucency.

  The thickness of the protective film 8 is preferably 0.3 to 1 μm. This is because if the thickness is less than 0.3 μm, the insulation is not sufficient, and if it exceeds 1 μm, it takes too much time to form.

  The first electrode film (front surface electrode layer) 9 includes a portion 9 a that covers a portion 8 a that covers the inclined side surface 7 a of the protective film 8, and a portion 8 c that covers at least a part of the upper surface 6 a of the protective film 8. A covering portion 9c, a covering portion 9ba covering the peripheral region 7ba of the top surface 7b of the mesa structure 7 in the protective film 8, and a portion 9bb for embedding the conduction window 8b of the protective film 8 (hereinafter referred to as appropriate) And a portion 9 d that covers the outer peripheral edge of the portion 8 d that covers the central portion of the top surface 7 b of the protective film 8 on the top surface 7 b of the mesa structure portion 7.

The first function of the first electrode film (front surface electrode layer) 9 is to pass a current between the second electrode film (back surface electrode) 10 and the second function is that emitted light is emitted. It is to limit the range to be ejected. In the case of the example shown in FIG. 1, the contact portion 9bb is responsible for the first function, and the portion 9d covering the outer peripheral edge of the portion 8d covering the center portion is responsible for the second function.
For the second function, a non-translucent protective film may be used so that the protective film bears it.

  The first electrode film 9 may cover the entire protective film 8 on the upper surface 6a of the support structure 6 or may cover a part of the protective film 8. However, in order to attach the bonding wire appropriately, it is as wide as possible. It is preferable to cover. From the viewpoint of cost reduction, it is preferable not to cover the first electrode film on the street 21 when cutting each light emitting diode as shown in FIG.

  Since the first electrode film 9 is in contact with the contact layer 5 only at the contact portion 9bb on the top surface 7b of the mesa structure portion 7, the first electrode film 9, the second electrode film (back electrode) 10, Current flows only between the contact portion 9bb and the second electrode film (back electrode) 10. Therefore, current concentrates in a range where the light emitting layer 13 overlaps with the light emission hole 9b in plan view, and light emission concentrates in that range, so that light can be extracted efficiently.

A known electrode material can be used as the material of the first electrode film 9, but AuBe / Au is most preferable since a good ohmic contact can be obtained.
The film thickness of the first electrode film 9 is preferably 0.5 to 2.0 μm. This is because it is difficult to obtain a uniform and good ohmic contact if the thickness is less than 0.5 μm, and the strength and thickness at the time of bonding are insufficient.

  As shown in FIG. 1, a light leakage prevention film 16 that prevents light emitted from the active layer from leaking from the side surface of the mesa structure 7 to the outside of the device may be provided.

  As the material of the light leakage prevention film 16, a known reflective material can be used. The same AuBe / Au as the first electrode film 9 may be used.

  In the present embodiment, a protective film 8d (8) is formed under the light emitting hole 9b, and light is emitted from the light emitting hole 9b through the protective film 8d (8) on the top surface of the mesa structure portion 7. It is the structure to take out.

  The shape of the light emission hole 9b is preferably circular or elliptical in plan view. Compared to a structure having a corner such as a rectangle, a uniform contact region can be easily formed, and current concentration at the corner can be suppressed. Moreover, it is because it is suitable for the coupling | bonding to the fiber etc. in the light-receiving side.

  The diameter of the light emission hole 9b is preferably 50 to 150 μm. If it is less than 50 μm, the current density at the emission part becomes high and the output is saturated at a low current. On the other hand, if it exceeds 150 μm, it is difficult to diffuse the current to the whole emission part, and the light emission efficiency with respect to the injection current decreases. It is.

  As the substrate 1, for example, a GaAs substrate can be used.

  When a GaAs substrate is used, a commercially available single crystal substrate manufactured by a known manufacturing method can be used. The surface on which the GaAs substrate is epitaxially grown is preferably smooth. The surface orientation of the surface of the GaAs substrate is easily epi-grown, and from the (100) plane and (100) that are mass-produced, a substrate that is turned off within ± 20 ° is preferable from the viewpoint of quality stability. Furthermore, the range of the plane orientation of the GaAs substrate is more preferably 15 ° off ± 5 ° from the (100) direction to the (0-1-1) direction.

The dislocation density of the GaAs substrate is preferably low in order to improve the crystallinity of the lower DBR reflective layer 2, the active layer 3, and the upper DBR reflective layer 4. Specifically, for example, 10,000 pieces cm ⁻² or less, preferably 1,000 pieces cm ⁻² or less are suitable.

The GaAs substrate may be n-type or p-type. The carrier concentration of the GaAs substrate can be appropriately selected from desired electrical conductivity and element structure. For example, when the GaAs substrate is Si-doped n-type, the carrier concentration is preferably in the range of 1 × 10 ^{17 to} 5 × 10 ¹⁸ cm ⁻³ . On the other hand, when the GaAs substrate is p-type doped with Zn, the carrier concentration is preferably in the range of 2 × 10 ^{18 to} 5 × 10 ¹⁹ cm ⁻³ .

  The thickness of the GaAs substrate has an appropriate range depending on the size of the substrate. If the thickness of the GaAs substrate is less than the appropriate range, the compound semiconductor layer may be broken during the manufacturing process. On the other hand, if the thickness of the GaAs substrate is thicker than an appropriate range, the material cost increases. For this reason, when the substrate size of the GaAs substrate is large, for example, when the diameter is 75 mm, a thickness of 250 to 500 μm is desirable to prevent cracking during handling. Similarly, when the diameter is 50 mm, a thickness of 200 to 400 μm is desirable, and when the diameter is 100 mm, a thickness of 350 to 600 μm is desirable.

  Thus, by increasing the thickness of the substrate according to the substrate size of the GaAs substrate, the warpage of the compound semiconductor layer due to the active layer 3 can be reduced. As a result, the temperature distribution during epitaxial growth becomes uniform, so that the in-plane wavelength distribution of the active layer 3 can be reduced. The shape of the GaAs substrate is not particularly limited to a circle, and there is no problem even if it is a rectangle or the like.

  A known functional layer can be added to the structure of the reflective layer (lower DBR reflective layer 2) and the compound semiconductor layer (active layer 3, upper DBR reflective layer 4, contact layer 5) as appropriate. For example, a known layer structure such as a current diffusion layer for planarly diffusing the element driving current over the entire light emitting portion, or a current blocking layer or a current constricting layer for limiting the area through which the element driving current flows is used. Can be provided.

  The reflective layer (lower DBR reflective layer) and the compound semiconductor layer formed on the substrate 1 are configured by sequentially laminating a lower DBR reflective layer 2, an active layer 3, and an upper DBR reflective layer 4.

A DBR (Distributed Bragg Reflector) layer is composed of two types of layers having a film thickness of λ / (4n) (λ: wavelength of light to be reflected in vacuum, n: refractive index of layer material) and different refractive indexes. It consists of a multilayer film laminated alternately. When the difference between the two types of refractive indexes is large, a high reflectance can be obtained with a multilayer film having a relatively small number of layers. Instead of being reflected on a certain surface as in a normal reflective film, the multilayer film as a whole is characterized in that reflection occurs based on the light interference phenomenon.
The material of the DBR reflective layer is preferably transparent with respect to the emission wavelength, and is preferably selected so as to be a combination that increases the difference in refractive index between the two types of materials constituting the DBR reflective layer.

The lower DBR reflective layer 2 is preferably formed by alternately laminating 10 to 50 pairs of two types of layers having different refractive indexes. This is because when the number is 10 pairs or less, the reflectivity is too low and thus does not contribute to an increase in output, and even when the number is 50 pairs or more, the increase in reflectivity is small.
The two types of layers having different refractive indexes constituting the lower DBR reflective layer 2 are two types of (Al _Xh Ga _1-Xh ) _{Y 3} In _{1 -Y 3} P (0 <Xh ≦ 1, Y 3 = 0.5) having different compositions. ), (Al _Xl Ga _1-Xl ) _Y3 In _1-Y3 P; 0 ≦ Xl <1, Y3 = 0.5), and the Al composition difference ΔX = xh−xl from 0.5 It is a combination of large or equal, or a combination of GaInP and AlInP, or two types of different Al _xl Ga _1-xl As (0.1 ≦ xl ≦ 1), Al _xh Ga _1-xh As ( 0.1 ≦ xh ≦ 1), and a high reflectivity can be obtained efficiently if the composition difference ΔX = xh−xl between the two is selected from any of the combinations that are greater than or equal to 0.5. This is desirable.
A combination of AlGaInP having different compositions is preferable because it does not contain As that easily causes crystal defects, and GaInP and AlInP have the largest refractive index difference among them, so that the number of reflective layers can be reduced and the composition can be switched. Is also preferable because it is simple. Moreover, AlGaAs has an advantage that a large difference in refractive index is easily obtained.

  The upper DBR reflective layer 4 can also have a layer structure similar to that of the lower DBR reflective layer 2, but needs to transmit light through the upper DBR reflective layer 4, so that it reflects more than the lower DBR reflective layer 2. The rate is configured to be low. Specifically, when the lower DBR reflective layer 2 is made of the same material, 3 to 10 pairs of two types of layers having different refractive indexes are alternately stacked so that the number of layers is smaller than that of the lower DBR reflective layer 2. Preferably it is. This is because when the number is 2 pairs or less, the reflectivity is too low, so that it does not contribute to an increase in output, and when the number is 11 pairs or more, the amount of light transmitted through the upper DBR reflection layer 4 is too low.

  In the light-emitting diode of the present invention, the active layer 3 is sandwiched between the low-reflectivity upper DBR reflective layer 4 and the high-reflectivity lower DBR reflective layer 2, and the light emitted from the active layer 3 is reflected between the upper DBR reflective layer 4 and the lower DBR reflective. By adopting a configuration in which the antinode of the standing wave is positioned in the light emitting layer by resonating with the layer 2, the light emitting diode has higher directivity and higher efficiency than the conventional light emitting diode without causing laser oscillation. .

  As shown in FIG. 4, the active layer 3 is configured by sequentially laminating a lower clad layer 11, a lower guide layer 12, a light emitting layer 13, an upper guide layer 14, and an upper clad layer 15. That is, the active layer 3 includes a lower clad layer 11 disposed opposite to the lower side and the upper side of the light emitting layer 13 in order to “confine” the carrier and the light emission that cause radiative recombination in the light emitting layer 13. A so-called double hetero (English abbreviation: DH) structure including the lower guide layer 12, the upper guide layer 14, and the upper cladding layer 15 is preferable in order to obtain high-intensity light emission.

  As shown in FIG. 4, the light emitting layer 13 can form a quantum well structure in order to control the light emission wavelength of a light emitting diode (LED). That is, the light emitting layer 13 can have a multilayer structure (laminated structure) of the well layer 17 and the barrier layer 18 having a barrier layer (also referred to as a barrier layer) 18 at both ends.

The layer thickness of the light emitting layer 13 is preferably in the range of 0.02 to 2 μm. The conductivity type of the light emitting layer 13 is not particularly limited, and any of undoped, p-type, and n-type can be selected. In order to increase the luminous efficiency, it is desirable that the crystallinity is undoped or the carrier concentration is less than 3 × 10 ¹⁷ cm ⁻³ .

  As the material of the well layer 17, a known well layer material can be used. For example, AlGaAs, InGaAs, or AlGaInP can be used.

  The thickness of the well layer 17 is preferably in the range of 3 to 30 nm. More preferably, it is the range of 3-10 nm.

  As a material of the barrier layer 18, it is preferable to select a material suitable for the material of the well layer 17. In order to prevent the absorption in the barrier layer 18 and increase the light emission efficiency, it is preferable that the composition has a band gap larger than that of the well layer 17.

For example, when AlGaAs or InGaAs is used as the material of the well layer 17, AlGaAs or AlGaInP is preferable as the material of the barrier layer 18. When AlGaInP is used as the material of the barrier layer 18, it does not contain As which tends to create defects, so that it has high crystallinity and contributes to high output.
When (Al _X1 Ga _1-X1 ) _Y1 In _1-Y1 P (0 ≦ X1 ≦ 1, 0 <Y1 ≦ 1) is used as the material of the well layer 17, the Al composition is higher than the material of the barrier layer 18 ( _{Al X4 Ga 1-X4) Y1} In 1-Y1 P (0 ≦ X4 ≦ 1,0 <Y1 ≦ 1, X1 <X4) or the well layer _{(Al X1 Ga 1-X1)} Y1 In 1-Y1 P (0 ≦ AlGaAs whose band gap energy is larger than X1 ≦ 1, 0 <Y1 ≦ 1) can be used.

  The layer thickness of the barrier layer 18 is preferably equal to or greater than the layer thickness of the well layer 17. By sufficiently thickening the layer thickness range in which the tunnel effect occurs, spreading between the well layers due to the tunnel effect is suppressed, the carrier confinement effect is increased, the probability of recombination of electrons and holes is increased, and the light emission output Can be improved.

In the multilayer structure of the well layer 17 and the barrier layer 18, the number of pairs in which the well layers 17 and the barrier layers 18 are alternately stacked is not particularly limited, but is preferably 2 or more and 40 or less. . That is, the active layer 11 preferably includes 2 to 40 well layers 17. Here, as a preferable range of the luminous efficiency of the active layer 11, it is preferable that the well layer 17 has five or more layers. On the other hand, since the well layer 17 and the barrier layer 18 have a low carrier concentration, the forward voltage (V _F ) increases when the number of pairs is increased. For this reason, it is preferable that it is 40 pairs or less, and it is more preferable that it is 20 pairs or less.

  The lower guide layer 12 and the upper guide layer 14 are provided on the lower surface and the upper surface of the light emitting layer 13, respectively, as shown in FIG. Specifically, the lower guide layer 12 is provided on the lower surface of the light emitting layer 13, and the upper guide layer 14 is provided on the upper surface of the light emitting layer 13.

  As a material of the lower guide layer 12 and the upper guide layer 14, a known compound semiconductor material can be used, and it is preferable to select a material suitable for the material of the light emitting layer 13. For example, AlGaAs or AlGaInP can be used.

For example, when AlGaAs or InGaAs is used as the material of the well layer 17 and AlGaAs or AlGaInP is used as the material of the barrier layer 18, the material of the lower guide layer 12 and the upper guide layer 14 is preferably AlGaAs or AlGaInP. When AlGaInP is used as the material of the lower guide layer 12 and the upper guide layer 14, since it does not contain As which tends to create defects, the crystallinity is high and contributes to high output.
When used as a material for the well layer 17 _{(Al X1 Ga 1-X1)} Y1 In 1-Y1 P (0 ≦ X1 ≦ 1,0 <Y1 ≦ 1), higher Al composition than the material of the guide layer 14 ( _{Al X4 Ga 1-X4) Y1} In 1-Y1 P (0 ≦ X4 ≦ 1,0 <Y1 ≦ 1, X1 <X4) or the well layer _{(Al X1 Ga 1-X1)} Y1 In 1-Y1 P (0 ≦ AlGaAs whose band gap energy is larger than X1 ≦ 1, 0 <Y1 ≦ 1) can be used.

  The lower guide layer 12 and the upper guide layer 14 are provided to reduce the propagation of defects between the lower clad layer 11 and the upper clad layer 15 and the active layer 11, respectively. For this reason, the thickness of the lower guide layer 12 and the upper guide layer 14 is preferably 10 nm or more, and more preferably 20 nm to 100 nm.

The conductivity types of the lower guide layer 12 and the upper guide layer 14 are not particularly limited, and any of undoped, p-type, and n-type can be selected. In order to increase the luminous efficiency, it is desirable that the crystallinity is undoped or the carrier concentration is less than 3 × 10 ¹⁷ cm ⁻³ .

  As shown in FIG. 4, the lower cladding layer 11 and the upper cladding layer 15 are provided on the lower surface of the lower guide layer 12 and the upper surface of the upper guide layer 14, respectively.

  As the material of the lower cladding layer 11 and the upper cladding layer 15, a known compound semiconductor material can be used, and it is preferable to select a material suitable for the material of the light emitting layer 13. For example, AlGaAs or AlGaInP can be used.

For example, when AlGaAs or InGaAs is used as the material of the well layer 17 and AlGaAs or AlGaInP is used as the material of the barrier layer 18, the material of the lower cladding layer 11 and the upper cladding layer 15 is preferably AlGaAs or AlGaInP. When AlGaInP is used as the material of the lower clad layer 11 and the upper clad layer 15, it does not contain As which easily creates defects, so that the crystallinity is high and contributes to high output.
When (Al _X1 Ga _1-X1 ) _Y1 In _1-Y1 P (0 ≦ X1 ≦ 1, 0 <Y1 ≦ 1) is used as the material of the well layer 17, the Al composition is higher than the material of the cladding layer 15 ( _{Al X4 Ga 1-X4) Y1} In 1-Y1 P (0 ≦ X4 ≦ 1,0 <Y1 ≦ 1, X1 <X4) or the well layer _{(Al X1 Ga 1-X1)} Y1 In 1-Y1 P (0 ≦ AlGaAs whose band gap energy is larger than X1 ≦ 1, 0 <Y1 ≦ 1) can be used.

The lower cladding layer 11 and the upper cladding layer 15 are configured to have different polarities.
The carrier concentration and thickness of the lower clad layer 11 and the upper clad layer 15 can be in a known suitable range, and the conditions are preferably optimized so that the light emission efficiency of the active layer 11 is increased. The lower and upper clad layers need not be provided.
Further, by controlling the composition of the lower clad layer 11 and the upper clad layer 15, the warpage of the compound semiconductor layer 20 can be reduced.

The contact layer 5 is provided to reduce the contact resistance with the first electrode film 9. The material of the contact layer 5 is preferably a material having a band gap larger than that of the light emitting layer 13. Further, the lower limit value of the carrier concentration of the contact layer 5 is preferably 5 × 10 ¹⁷ cm ⁻³ or more, and more preferably 1 × 10 ¹⁸ cm ⁻³ or more in order to reduce the contact resistance with the electrode. The upper limit value of the carrier concentration is desirably 2 × 10 ¹⁹ cm ⁻³ or less at which the crystallinity is likely to decrease. The thickness of the contact layer 5 is preferably 0.05 μm or more. The upper limit value of the thickness of the contact layer 5 is not particularly limited, but is desirably 10 μm or less in order to make the cost for epitaxial growth within an appropriate range.

[Light-Emitting Diode (Second Embodiment)]
FIG. 5 is a schematic cross-sectional view showing an example of a resonator type light emitting diode which is an example of a light emitting diode according to the second embodiment to which the present invention is applied.
In the first embodiment, the side surface of the support structure portion is vertical. However, in the second embodiment, the side surface is formed by wet etching, and at least the position beyond the reflective layer from the upper surface of the support structure portion to the substrate side. It is the structure containing the inclination part extended to.
In the following, a configuration different from the first embodiment will be mainly described.

The light emitting diode 200 shown in FIG. 5 includes a support structure 6 having an upper surface 6a and a side surface 6b, and a mesa structure 7 disposed on the support structure 6 and having an inclined side surface 7a and a top surface 7b. The support structure portion 6 includes at least a part of the reflective layer 2, and the side surface 6 b is formed by wet etching, and the inclined portion extends from the upper surface 6 a to the substrate 1 side to a position exceeding at least the reflective layer 2. 6ba, and the horizontal cross-sectional area including the inclined portion 6ba is continuously reduced toward the upper surface 6a. The protective film 8 is formed on the side surface 6b in addition to the same portion as that of the first embodiment. Among them, the second electrode film 10 is provided so as to cover at least the inclined portion 6ba and overlap the light emission hole 9b in plan view on the opposite side of the substrate 1 from the reflective layer 2.
In the present embodiment, the side surface 6b of the support structure 6 includes an inclined portion 6ba (in the present embodiment, the side surface of the reflective layer 2 and the side surface of the substrate 1) and a part 6bb of the side surface of the substrate.
In the present embodiment, the light leakage prevention film 24 is provided on the inclined part 6ba of the side surface 6b of the support structure part 6 via a protective film.

    The support structure portion 6 is a structure disposed below the mesa structure portion 7 and has an upper surface 6a and side surfaces 6b as outer surfaces. The side surface 6b is formed by wet etching and includes an inclined portion 6ba extending from the upper surface 6a to the substrate 1 side to a position at least exceeding the reflective layer 2. The support structure portion 6 is formed such that the horizontal sectional area including the inclined portion 6ba is continuously reduced toward the upper surface 6a (upward). The horizontal cross-sectional area including the side surface excluding the inclined portion 6ba does not change.

  If the inclined portion 6ba is wet-etched until its height exceeds 7 μm, it tends to be in an overhang shape (reverse taper shape).

The inclined portion 6ba may be composed of a plurality of inclined portions. In this case, the horizontal cross-sectional area including each inclined portion is continuously small toward the upper surface (upward), and the horizontal cross-sectional area including the inclined portion close to the upper surface (on the upper side) is increased. Each inclined portion is formed. In particular, as in the case of forming the mesa structure portion, when the height of the inclined portion 6ba exceeds 7 μm, if one inclined portion is formed by wet etching, an overhang shape (reverse taper shape) is likely to occur. Therefore, it is preferable to form the inclined portion 6ba with a plurality of inclined portions of 7 μm or less.
In addition, when the inclined portion is formed deep (high) by wet etching, the etching proceeds in the lateral direction, so that the mesa-type structure portion becomes smaller and the light emission area becomes smaller, and the inclination angle of the inclined portion is close to vertical. In addition, there is a problem that the vertical and horizontal etching rates are different in plan view due to the effect of etching anisotropy, and the depth of the inclined part is deeper (higher). In the case of forming, it is preferably composed of a plurality of inclined portions.

The protective film 8 includes a portion 8c that covers at least a part of the upper surface 6a (including a portion 8cc that covers the upper surface on the opposite side across the mesa structure 7), and a portion 8f that covers at least the inclined portion 6ba of the side surface 6b. And an energization window that has a portion 8a covering the inclined side surface 7a and a portion 8ba covering the peripheral region 7ba of the top surface 7b, and exposes part of the surface of the compound semiconductor layer inside the peripheral region 7ba in plan view. 8b.
The energization window 8b of the present embodiment is a portion of the surface of the contact layer 5 on the top surface 7b of the mesa structure 7 that is located below the portion 8ba located below the peripheral region 7ba and the portion 8d covering the central portion. An area between two concentric circles with different diameters between and is exposed.
Since the protective film 8 includes a portion 8f that covers at least the inclined portion 6ba of the side surface 6b and covers the side surface of the reflective layer of the support structure, the side surface of the reflective layer may deteriorate due to contact with air or moisture. Therefore, high reliability and long life are achieved.

The light leakage prevention film 24 prevents light emitted from the active layer from leaking out of the device through the protective film 8f on the inclined portion 6ba of the side surface 6b of the support structure portion 6.
The light leakage prevention film 24 shown in FIG. 1 is provided only on the inclined portion 6ba (via the protective film 8f) and only on a part of the upper surface 6a on the electrode film 9c. It may be formed on the other part of 6a or the mesa structure part 7.

  A known reflective material can be used as the material for the light leakage prevention film 24, but AuBe / Au is preferable because it can be formed simultaneously with the first electrode film 9.

[Light Emitting Diode (Third Embodiment)]
FIG. 6 is a schematic cross-sectional view showing an example of a resonator type light emitting diode which is an example of a light emitting diode according to a third embodiment to which the present invention is applied.
In the first embodiment, the protective film is formed under the light emitting hole, and the light is extracted from the light emitting hole through the protective film on the top surface of the mesa structure portion. In the embodiment, the protective film is not provided under the light emitting hole, and light is directly extracted from the light emitting hole 9b without using the protective film. Such a configuration may be applied to the second embodiment.
That is, in the resonator type light emitting diode 300 according to the third embodiment, the protective film 28 includes at least a part 28 c of the upper surface 6 a, the inclined side surface 7 a of the mesa structure portion 7, and the top surface of the mesa structure portion 7. 7b, and includes an energization window 28b that exposes the surface of the contact layer 5 inside the peripheral region 7ba in plan view, and the electrode film 29 is disposed at least on the upper surface 6a via the protective film 28. A portion, the inclined side surface 7a of the mesa structure 7 through the protective film 28, and the peripheral region 7ba of the top surface 7b of the mesa structure 7 through the protective film 28 are covered, and the mesa structure 7 has a light emitting hole 29b that covers only a part of the surface of the contact layer 5 exposed from the energizing window 28b on the top surface of the contact layer 5 and exposes the other part 5a of the surface of the contact layer 5, and the reflective layer 2 of the substrate 1 On the opposite side of the And a second electrode film 10 in a range overlapping the injection hole 9b.

  As shown in FIG. 6, the protective film 28 of the third embodiment includes a portion 28 a that covers the inclined side surface 7 a of the mesa structure portion 7, and a portion 28 c that covers at least a part of the upper surface 6 a (the mesa structure portion 7. And a portion 28ba covering the peripheral region 7ba of the top surface 7b of the mesa structure 7 and the contact layer 5 inside the peripheral region 7ba in plan view. An energization window 28b exposing the surface is provided. That is, the energization window 28 b exposes the surface of the contact layer 5 other than the portion located below the peripheral region 7 ba on the top surface 7 b of the mesa structure 7. A first electrode film (front surface electrode layer) 9 is formed on the protective film 8, but a portion where no current flows between the first electrode film 9 and the second electrode film 10 is protected. A film 8 is formed.

Further, as shown in FIG. 6, the first electrode film (front surface electrode layer) 29 of the third embodiment includes a portion 29 a that covers a portion 28 a that covers the inclined side surface 7 a of the protective film 28, and a protective layer. A portion 29c that covers a portion 28c that covers at least a part of the upper surface 6a of the film 28; a portion 29ba that covers a portion of the protective film 28 that covers the peripheral region 7ba of the top surface 7b of the mesa structure 7; The top surface 7b of the mesa structure portion 7 includes a portion 29bb that covers the contact layer 5 so as to open the light emission hole 29b beyond the portion 28ba of the protective film 28.
In the first electrode film (front electrode layer) 29 of the third embodiment, the portion 29bb has both the first function and the second function.

  Also in the third embodiment, the portion of the first electrode film 9 in which the energization window is filled (contact portion 9bb) and the range overlapping the light emission hole 9b arranged inside the energization window 8b in plan view. As a result of current concentration between the second electrode film 10 formed on the first electrode layer 10 and the second electrode film 10, the amount of light emitted from a portion of the active layer 3 immediately below the light emitting hole 9 b is light emitted from a portion other than the portion immediately below it. As a result, the ratio of light toward the light exit hole is increased, and the light extraction efficiency is improved.

[Light Emitting Diode (Fourth Embodiment)]
FIG. 7 is a schematic cross-sectional view showing an example of a light emitting diode which is an example of a light emitting diode of a fourth embodiment to which the present invention is applied.
The light emitting diode 400 according to the fourth embodiment is different from the light emitting diode according to the first embodiment in that there is no upper DBR reflection layer and a current diffusion layer 40 is provided instead.
This embodiment is not a resonator type light emitting diode because it does not include an upper DBR reflective layer.

In the present embodiment, as the material of the current diffusion layer 40, for example, AlGaAs or the like can be used.
The thickness of the current diffusion layer 40 is preferably 0.1 μm or more and 10 μm or less.
If the thickness is less than 0.1 μm, the current diffusion effect is insufficient, and if it exceeds 10 μm, the cost for epitaxial growth is too large for the effect.

  The light-emitting diode of the present invention can be incorporated into electronic devices such as lamps, backlights, mobile phones, displays, various panels, computers, game machines, lighting, etc., and machinery such as automobiles incorporating such electronic devices. it can.

[Method for Manufacturing Light-Emitting Diode (First Embodiment)]
Next, as an embodiment of the method for producing a light emitting diode of the present invention, a method for producing the light emitting diode of the first embodiment will be described.
FIG. 8 is a schematic cross-sectional view showing one step of a method for manufacturing a light emitting diode. FIG. 9 is a schematic sectional view showing one process after FIG.

(Formation process of compound semiconductor layer)
First, the compound semiconductor layer 20 shown in FIG. 8 is produced.
The compound semiconductor layer 20 is produced by sequentially laminating the lower DBR reflective layer 2, the active layer 3, the upper DBR reflective layer 4, and the contact layer 5 on the substrate 1.

A buffer layer (buffer) may be provided between the substrate 1 and the lower DBR reflective layer 2. The buffer layer is provided in order to reduce the propagation of defects between the substrate 1 and the constituent layers of the active layer 3. For this reason, the buffer layer is not necessarily required if the quality of the substrate and the epitaxial growth conditions are selected. The material of the buffer layer is preferably the same as that of the substrate to be epitaxially grown.
As the buffer layer, a multilayer film made of a material different from that of the substrate can be used in order to reduce the propagation of defects. The thickness of the buffer layer is preferably 0.1 μm or more, and more preferably 0.2 μm or more.

  In the present embodiment, a known growth method such as a molecular beam epitaxial method (MBE) or a low pressure metal organic chemical vapor deposition method (MOCVD method) can be applied. Among these, it is most desirable to apply the MOCVD method which is excellent in mass productivity. Specifically, it is desirable that the substrate 1 used for the epitaxial growth of the compound semiconductor layer is subjected to a pretreatment such as a cleaning process or a heat treatment before the growth to remove surface contamination or a natural oxide film. Each layer constituting the compound semiconductor layer can be laminated by setting the substrate 1 having a diameter of 50 to 150 mm in an MOCVD apparatus and simultaneously epitaxially growing the substrate 1. As the MOCVD apparatus, a commercially available large-sized apparatus such as a self-revolving type or a high-speed rotating type can be applied.

When the layers of the compound semiconductor layer 20 are epitaxially grown, examples of the group III constituent element include trimethylaluminum ((CH ₃ ) ₃ Al), trimethylgallium ((CH ₃ ) ₃ Ga), and trimethylindium ((CH ₃ ) ₃ In) can be used. Further, as a Mg doping raw material, for example, biscyclopentadienyl magnesium (bis- (C ₅ H ₅ ) ₂ Mg) or the like can be used. Further, as a Si doping material, for example, disilane (Si ₂ H ₆ ) or the like can be used. In addition, phosphine (PH ₃ ), arsine (AsH ₃ ), or the like can be used as a raw material for the group V constituent element.
Furthermore, the carrier concentration, layer thickness, and temperature conditions of each layer can be selected as appropriate.

  The compound semiconductor layer thus produced can obtain a good surface state with few crystal defects despite having the active layer 3. The compound semiconductor layer 20 may be subjected to surface processing such as polishing corresponding to the element structure.

(Second electrode film forming step)
Next, as shown in FIG. 8, the second electrode film (back electrode) 10 is formed on the back surface of the substrate 1 within a range overlapping the light emission hole 9 b to be formed in plan view. The second electrode film (back electrode) 10 can be formed by a known method.
Specifically, for example, when the substrate 1 is an n-type substrate, an Au film and an AuGe film are sequentially formed on the entire back surface 1A of the substrate 1 by, for example, vapor deposition. Next, the film is patterned by using a photolithography technique to form a second electrode film 10 of an n-type ohmic electrode at a predetermined position.

  The second electrode film 10 may be formed by lift-off. That is, a mask having an opening corresponding to its shape is formed on the back surface 1A of the substrate 1 at the position where the second electrode film 10 is formed, and the second electrode film 10 is formed thereon by vapor deposition or the like. The second electrode film 10 may be formed by forming a film made of the material to be formed and then removing the mask.

(Mesa structure forming process)
Next, in order to form a mesa structure portion (excluding the protective film and the electrode film), at least a part of the compound semiconductor layer other than the mesa structure portion, that is, the contact layer 5 and the active layer 4, or The contact layer 5, the active layer 4, and at least a part of the bonding (contact) layer 3 are wet-etched.
Specifically, first, as shown in FIG. 9, a photoresist is deposited on the contact layer which is the uppermost layer of the compound semiconductor layer, and a resist pattern 23 having an opening 23a other than the mesa structure is formed by photolithography. To do.
The plan view shape of the mesa structure portion is determined by the shape of the opening 23 a of the resist pattern 23. An opening 23 a having a shape corresponding to a desired shape in plan view is formed in the resist pattern 23.
In the resist pattern, it is preferable that the size of the mesa-type structure portion scheduled to be formed is larger than the top surface of the “mesa-type structure portion” by about 10 μm above, below, left and right of each side.
In addition, the depth of etching, that is, to which layer of the compound semiconductor layer is removed by etching depends on the type of etchant and the etching time.
After performing wet etching, the resist is removed.

Next, wet etching is performed on the compound semiconductor layer other than the mesa structure.
An etchant used for wet etching is not limited, but an ammonia-based etchant (for example, a mixed solution of ammonia / hydrogen peroxide solution) is suitable for an As-based compound semiconductor material such as AlGaAs, and P such as AlGaInP. An iodine-based etchant (for example, potassium iodide / ammonia) is suitable for a compound semiconductor material, a phosphoric acid / hydrogen peroxide mixture is suitable for an AlGaAs system, and a bromomethanol mixture is suitable for a P-system. Yes.
In addition, a phosphoric acid mixed solution may be used in a structure formed only of an As system, an ammonia mixed solution may be used in an As system structure portion, and an iodine mixed solution may be used in a P system structure portion in a structure in which an As / P system is mixed. .

When the compound semiconductor layer is formed by sequentially laminating an As-based compound semiconductor layer and a P-based compound semiconductor layer, the As-based compound semiconductor layer and another P-based As-based compound semiconductor layer are etched respectively. It is preferable to use a different etchant with a high speed.
For example, it is preferable to use an iodine-based etchant for etching a P-based layer and an ammonia-based etchant for etching an As-based contact layer and a light-emitting layer.
As the iodine-based etchant, for example, an etchant in which iodine (I), potassium iodide (KI), pure water (H ₂ O), and ammonia water (NH ₄ OH) are mixed can be used.
Further, as the ammonia-based etchant, for example, an ammonia / hydrogen peroxide mixed solution (NH ₄ OH: H ₂ O ₂ : H ₂ O) can be used.

For example, the compound semiconductor layer is formed of AlGaAs contact layer 5, AlGaAs upper DBR reflective layer 4, active layer 3 (AlGaInP upper clad layer, AlGaAs light emitting layer, and AlGaInP lower clad in order from the uppermost layer side. In the case of a structure in which the lower DBR reflective layer 2 made of AlGaAs is stacked in this order, a case where a portion other than the mesa structure portion is removed using a preferable etchant will be described.
First, the contact layer 5 made of AlGaAs and the upper DBR reflective layer 4 made of AlGaAs in portions other than the mesa structure are etched away using an ammonia-based etchant.
In this etching, the upper cladding layer made of AlGaInP, which is the next layer, functions as an etching stop layer, so that it is not necessary to strictly control the etching time. For example, the contact layer and the upper DBR reflection layer made of AlGaAs If the total thickness of 4 is about 1.0 μm, etching may be performed for about 100 seconds.

Next, the upper clad layer made of AlGaInP other than the mesa structure is etched away using an iodine-based etchant.
The etching rate is 0 when an etchant mixed at a ratio of 500 cc of iodine (I), 100 g of potassium iodide (KI), 2000 cc of pure water (H ₂ O) and 90 cc of aqueous ammonia hydroxide (NH ₄ OH) is used. It was 72 μm / min.
Also in this etching, since the light emitting layer made of AlGaAs as the next layer functions as an etching stop layer, it is not necessary to strictly control the etching time. However, in the case of this etchant, the thickness of the cladding layer 63a is If the thickness is about 4 μm, etching may be performed for about 6 minutes.

Next, the light emitting layer made of AlGaAs other than the mesa structure is removed by etching using an ammonia-based etchant.
Also in this etching, the lower cladding layer made of AlGaInP, which is the next layer, functions as an etching stop layer. Therefore, it is not necessary to strictly control the etching time, but the thickness of the light emitting layer is about 0.25 μm. Then, etching may be performed for about 40 seconds.

Next, the lower cladding layer made of AlGaInP other than the mesa structure is etched away using an iodine-based etchant.
Underneath this lower cladding layer, the lower DBR reflective layer 2 made of AlGaAs functions as an etching stop layer, so it is not necessary to strictly control the etching time, but if the thickness of the lower cladding layer is 0.5 μm When the above iodine-based etchant is used, the etching may be performed in 4 minutes or less.

Further, for an As-based compound semiconductor layer, a phosphoric acid / hydrogen peroxide solution mixture (for example, H ₂ PO ₄ : H ₂ O ₂ : H ₂ O = 1-3: 4-6: 8-10) ) Can be used to remove the etching.

In FIG. 10, an etchant having H ₂ PO ₄ : H ₂ O ₂ : H ₂ O = 2: 5: 9 (100: 250: 450), 56% (H ₂ O) and a liquid temperature of 30 ° C. to 34 ° C. is used. Then, the relationship between the depth and the width with respect to the etching time when wet etching is performed on the compound semiconductor layer shown in the examples described later is shown. Table 1 shows the conditions and results in numerical values.

  10 and Table 1, it can be seen that the etching depth (corresponding to “h” in FIG. 1) is substantially proportional to the etching time (sec), but the increasing rate of the etching width increases as the etching time increases. That is, as shown in FIG. 3, it is formed so that the increasing rate of the horizontal sectional area (or width or diameter) of the mesa structure portion increases as the depth increases (as it goes downward in the drawing). This etching shape is different from the etching shape by dry etching. Therefore, it can be determined from the shape of the inclined slope of the mesa structure portion whether the mesa structure portion is formed by dry etching or wet etching.

(Protective film formation process)
Next, a material for the protective film 8 is formed on the entire surface. Specifically, for example, SiO ₂ is formed on the entire surface by sputtering.

(Removal process of protective film on street and contact layer)
Next, a photoresist is deposited on the entire surface, and a resist pattern having openings corresponding to the energization windows 8b on the contact layer and portions corresponding to the streets is formed by photolithography.
Next, the protective film 8 is removed by removing the material of the protective film 8 at the portion corresponding to the current-carrying window 8b on the top surface of the mesa structure and the portion corresponding to the street by wet etching using buffered hydrofluoric acid, for example. Form.
FIG. 11 shows a plan view of the vicinity of the energization window 8 b of the protective film 8.
Thereafter, the resist is removed.

(Front surface electrode layer formation process)
Next, the front electrode layer 9 is formed. That is, the front electrode layer 9 having the light emission holes 9 b is formed on the protective film 8 and on the contact layer 5 exposed from the energization window 8 b of the protective film 8.
Specifically, a photoresist is deposited on the entire surface, and an electrode film including a portion corresponding to the light emission hole 9b by photolithography and a cut portion (street) between a plurality of light emitting diodes on the wafer substrate is unnecessary. A resist pattern having openings other than the portions is formed. Next, an electrode layer material is deposited. If the electrode layer material is not sufficiently deposited on the inclined side surface of the mesa structure by this deposition alone, the deposited metal tends to wrap around in order to deposit the electrode layer material on the inclined side surface of the mesa structure. Vapor deposition is performed using a type of vapor deposition apparatus.
Thereafter, the resist is removed.

  The shape of the light emission hole 9b is determined by the shape of the opening of the resist pattern (not shown). A resist pattern having the opening shape corresponding to the shape of the desired light emission hole 9b is formed.

(Separation process)
Next, the light emitting diodes on the wafer substrate are separated into individual pieces.
Specifically, for example, the street portion is cut by a dicing saw or a laser and cut into individual light emitting diodes on the wafer substrate.

(Metal protective film forming process on the side of the metal substrate)
A metal protective film may be formed on the side surfaces of the cut metal substrate of the separated light emitting diodes under the same conditions as those for forming the upper and lower metal protective films.

[Method for Manufacturing Light-Emitting Diode (Second Embodiment)]
The manufacturing method of the light emitting diode (second embodiment) of the present invention is the light emitting diode of the present invention (the compound semiconductor layer forming step, the second electrode film forming step, and the mesa structure forming step). This can be performed in the same manner as in the manufacturing method of the first embodiment. The wet etching in the process of forming the mesa structure portion is hereinafter described as “first wet etching” in the present embodiment.

(Formation process of inclined part of support structure part)
Due to the first wet etching in the mesa structure forming step, the portions of the wafer substrate excluding the mesa structure (street and support structure) have the same height.
In this step, second wet etching is performed along the cutting line for singulation (dotted line 22 in FIG. 2) to form the inclined portion 6ba of the side surface 6a of the support structure portion 6.
Specifically, first, a photoresist is deposited on the entire surface of the wafer substrate, and an opening is provided in a range of a predetermined distance d (see FIG. 2) from the outer periphery of the street 21 and the upper surface 6a of the support structure 6 by photolithography. A resist pattern is formed.
The first wet etching and the second wet etching can be performed using the same etchant.

Next, for example, the second wet etching is performed using at least one selected from the group consisting of a phosphoric acid / hydrogen peroxide mixture, an ammonia / hydrogen peroxide mixture, a bromomethanol mixture, and potassium iodide / ammonia. I do.
For example, using a phosphoric acid / hydrogen peroxide solution mixture of H ₃ PO ₄ : H ₂ O ₂ : H ₂ O = 1-3: 4-6: 8-10, the wet etching time is 30-60 seconds The inclined portion 6ba of the side surface 6a of the support structure portion 6 can be formed.
Thereafter, the resist is removed.

  The inclination angle, length, and depth of the inclined portion 6ba are determined by the type of etchant and the etching time.

  The subsequent steps can be performed by a method similar to the method for manufacturing the light emitting diode (first embodiment).

[Method for Manufacturing Light Emitting Diode (Third Embodiment)]
The light emitting diode (second embodiment) of the present invention is different from the light emitting diode (first embodiment) only in the arrangement of the protective film and the electrode, and the manufacturing method thereof is the light emitting diode (first embodiment). It can carry out similarly to the manufacturing method of.

[Method for Manufacturing Light-Emitting Diode (Fourth Embodiment)]
The manufacturing method of the light emitting diode (fourth embodiment) of the present invention is different from the manufacturing method of the light emitting diode (first embodiment) in the formation process of the compound semiconductor layer and the lower DBR reflection on the substrate 1. After the layer 2 and the active layer 3 are stacked, the current diffusion layer 40 is stacked on the active layer 3, and the rest can be performed in the same manner as the method for manufacturing the light emitting diode (first embodiment). .

Hereinafter, the light-emitting diode and the manufacturing method thereof of the present invention will be described in more detail with reference to examples. However, the present invention is not limited to these examples. In this example, a light-emitting diode lamp in which a light-emitting diode chip was mounted on a substrate was prepared for characteristic evaluation.
In this embodiment, referring to FIGS. 1 and 4, the outer diameter of the conduction window 8b is 166 μm, the inner diameter is 154 μm, the diameter of the light emission hole is 150 μm, and the second electrode film is circular in plan view. Was 100 μm.

(Example)
In the light-emitting diode of the example, first, an epitaxial wafer was manufactured by sequentially laminating compound semiconductor layers on a GaAs substrate made of an n-type GaAs single crystal doped with Si. The GaAs substrate had a (100) plane as a growth plane and a carrier concentration of 2 × 10 ¹⁸ cm ⁻³ . The layer thickness of the GaAs substrate was about 250 μm. The compound semiconductor layer is an n-type buffer layer made of GaAs doped with Si, and 40 pairs of repeating structures of Al _0.9 Ga _0.1 As and Al _0.1 Ga _0.9 As doped with Si. n-type lower DBR reflective layer, n-type lower clad layer made of Si-doped Al _0.4 Ga _0.6 As, lower guide layer made of Al _0.25 Ga _0.75 As, GaAs / Al _0. Well layer / barrier layer composed of three pairs of ₁₅ Ga _0.85 As, upper guide layer composed of Al _0.25 Ga _0.75 As, p-type composed of C _0.4 doped Al _0.4 Ga _0.6 As Upper clad layer, p-type upper DBR reflective layer having 5 pairs of repetitive structures of C-doped Al _0.9 Ga _0.1 As and Al _0.1 Ga _0.9 As, C-doped p-type Al _{0 .1} Ga _0.9 It is a contact layer made of As.

In this example, a compound semiconductor layer was epitaxially grown on a GaAs substrate having a diameter of 50 mm and a thickness of 250 μm by using a low pressure metal organic chemical vapor deposition apparatus method (MOCVD apparatus) to form an epitaxial wafer. When growing an epitaxial growth layer, trimethylaluminum ((CH ₃ ) ₃ Al), trimethylgallium ((CH ₃ ) ₃ Ga) and trimethylindium ((CH ₃ ) ₃ In) are used as the raw material for the group III constituent element did. Further, tetrabromomethane (CBr ₄ ) was used as a doping material for C. Further, disilane (Si ₂ H ₆ ) was used as a Si doping material. Further, phosphine (PH ₃ ) and arsine (AsH ₃ ) were used as raw materials for the group V constituent elements. The growth temperature of each layer was 700 ° C.

The buffer layer made of GaAs has a carrier concentration of about 2 × 10 ¹⁸ cm ⁻³ and a layer thickness of about 0.5 μm. Lower DBR reflection layer and the carrier concentration of about 1 × ¹⁰ 18 ^{cm -3,} and _Al 0.9 _{Ga 0.1} As that were about 54nm thickness, a carrier concentration of about 1 × ¹⁰ 18 ^{cm -3,} layer thickness 40 pairs of Al _0.1 Ga _0.9 As having a thickness of about 51 nm were alternately laminated. The lower cladding layer had a carrier concentration of about 1 × 10 ¹⁸ cm ⁻³ and a layer thickness of about 54 nm. The lower guide layer was undoped and had a thickness of about 50 nm. The well layer was undoped GaAs having a thickness of about 7 nm, and the barrier layer was undoped Al 7 _.5 Ga _0.85 As having a thickness of about 7 nm. Three pairs of well layers and barrier layers were alternately laminated. The upper guide layer was undoped and had a thickness of about 50 nm. The upper cladding layer had a carrier concentration of about 1 × 10 ¹⁸ cm ⁻³ and a layer thickness of 54 nm. The upper DBR reflection layer and the carrier concentration of about 1 × ¹⁰ 18 ^{cm -3,} and _Al 0.9 _{Ga 0.1} As that were about 54nm thickness, a carrier concentration of about 1 × ¹⁰ 18 ^{cm -3,} layer Five pairs of Al _0.1 Ga _0.9 As having a thickness of about 51 nm were alternately stacked.
The contact layer made of Al _0.1 Ga _0.9 As had a carrier concentration of about 3 × 10 ¹⁸ cm ⁻³ and a layer thickness of about 250 nm.

  Next, on the backside of the substrate, AuGe and Ni alloy are deposited by vacuum deposition so that the thickness is 0.5 μm, Pt is 0.2 μm, and Au is 1 μm, and within the range that overlaps the light emission hole to be formed Then, the n-type second electrode film was formed by patterning so as to have a circular shape in a plan view with an outer diameter of 100 μm.

Next, in order to form a mesa structure portion, a patterned resist (AZ5200NJ (manufactured by Clariant)) was used, and phosphoric acid / H ₂ PO ₄ : H ₂ O ₂ : H ₂ O = 2: 5: 9 Wet etching was performed for 60 seconds using a hydrogen peroxide solution mixture to form a mesa structure and an upper surface. By this wet etching, the contact layer, the upper DBR reflection layer, and the active layer are all removed, and a mesa shape having a rectangular shape in plan view with a top surface size of 190 μm × 190 μm, a height h of 7 μm, and a width w of 5 μm. A structure part (excluding a protective film and an electrode film) was formed.

Next, in order to form a protective film, a protective film made of SiO ₂ was formed to a thickness of about 0.5 μm.
Then, after patterning with a resist (AZ5200NJ (manufactured by Clariant)), using a buffered hydrofluoric acid, a concentric circular opening (outer diameter dout: 166 μm, inner diameter din: 154 μm) (see FIG. 11) and street Part openings were formed.

Next, in order to form a front surface electrode (film), after patterning with a resist (AZ5200NJ (manufactured by Clariant)), 1.2 μm of Au and 0.15 μm of AuBe are sequentially deposited, and circularly viewed in plan view by lift-off A front surface electrode (p-type ohmic electrode) having a light emission hole 9b (diameter: 150 μm) and having a long side of 350 μm and a short side of 250 μm was formed.
Thereafter, heat treatment was performed at 450 ° C. for 10 minutes to form an alloy, and low resistance p-type and n-type ohmic electrodes were formed.

  Next, in order to form the light leakage prevention film 16 on the side surface of the mesa structure, after patterning with a resist (AZ5200NJ (manufactured by Clariant)), Ti 0.5 μm and Au 0.17 μm are sequentially deposited and lift-off is performed. Thus, the light leakage prevention film 16 was formed.

  Next, it cut | disconnected in the street part using the dicing saw from the compound semiconductor layer side, and was chipped. The crushing layer and dirt by dicing were removed by etching with a mixed solution of sulfuric acid and hydrogen peroxide to produce the light emitting diode of the example.

  100 light emitting diode lamps each having the light emitting diode chip of the example manufactured as described above mounted on a mount substrate were assembled. This light-emitting diode lamp was manufactured by supporting (mounting) a mount with a die bonder, wire-bonding a p-type ohmic electrode and a p-electrode terminal with a gold wire, and sealing with a general epoxy resin.

In this light emitting diode (light emitting diode lamp), when an electric current was passed between the n-type and p-type electrodes, infrared light having a peak wavelength of 730 nm was emitted. The forward voltage (V _F ) when a current of 20 mA (mA) was passed in the forward direction was 1.8V. When the forward current was 20 mA, the light emission output was 1.7 mW. The response speed (rise time: Tr) was 12 nsec.

  All of the 100 light-emitting diode lamps produced have the same characteristics, leak (short circuit) when the protective film becomes discontinuous, and the electrode metal film becomes discontinuous. There was no defect that was thought to be due to poor energization.

(Comparative example)
The light emitting diode of the comparative example was formed by a liquid phase epitaxial method which is a conventional technique. This is a light emitting diode having a light emitting part of a double hetero structure having an Al _0.2 Ga _0.8 As light emitting layer on a GaAs substrate.

Specifically, the light-emitting diode of the comparative example is manufactured by forming an n-type upper clad layer made of Al _0.7 Ga _0.3 As on an n-type (100) GaAs single crystal substrate with a thickness of 20 μm and Al _{0. .2} Ga _0.8 As, an undoped light-emitting layer of 2 μm, a p-type lower cladding layer of Al _0.7 Ga _0.3 As, 20 μm, and Al _0.6 Ga _{0. A} p-type thick film layer made of ₄ As was produced by a liquid phase epitaxial method so as to be 120 μm. After this epitaxial growth, the GaAs substrate was removed. Next, an n-type ohmic electrode having a diameter of 100 μm was formed on the surface of the n-type AlGaAs. Next, p-type ohmic electrodes having a diameter of 20 μm were formed on the back surface of the p-type AlGaAs at intervals of 80 μm. Next, after cutting at intervals of 350 μm with a dicing saw, the crushed layer was removed by etching to produce a comparative light-emitting diode chip.

When a current was passed between the n-type and p-type ohmic electrodes, infrared light having a peak wavelength of 730 nm was emitted. The forward voltage (V _F ) when a current of 20 mA (mA) was passed in the forward direction was about 1.9 volts (V). The light emission output when the forward current was 20 mA was 5 mW. Further, the response speed (Tr) was 15.6 nsec, which was slower than the example of the present invention.

1 Substrate 2 Lower DBR layer (reflection layer)
DESCRIPTION OF SYMBOLS 3 Active layer 4 Upper DBR layer 5 Contact layer 6 Support structure part 6a Upper surface 6b Side surface 6ba Inclined part 7 Mesa structure part 7a Inclined side surface 7b Top surface 7ba Peripheral area | region 8, 28 Protective film 8b, 28b Current-carrying window 9, 29 Electrode film 9b, 29b Light exit hole 10 Second electrode film 11 Lower cladding layer 12 Lower guide layer 13 Light emitting layer 14 Upper guide layer 15 Upper cladding layer 16 Light leakage prevention film 20 Compound semiconductor layer 21 Street 23 Resist pattern 24 Light leakage prevention film 40 Current spreading layer 100, 200, 300, 400 Light emitting diode

The present invention provides the following means.
(1) A light-emitting diode that includes a compound semiconductor layer including a reflective layer and an active layer in order on a substrate, and emits light to the outside from a light emission hole, the support structure having an upper surface and side surfaces, and the support structure And a mesa structure having an inclined side surface and a top surface. The mesa structure includes at least a part of the active layer, and the inclined side surface is formed by wet etching. And the cross-sectional area in the horizontal direction is continuously reduced toward the top surface, and each of the support structure portion and the mesa structure portion is at least partially formed by a protective film and a first electrode film. The protective film covers at least a part of the upper surface, the inclined side surface of the mesa structure portion, and the peripheral region of the top surface of the mesa structure portion, and in plan view. Said lap An energization window is provided inside the region and around the light emission hole to expose a part of the surface of the compound semiconductor layer, and the first electrode film is exposed from the energization window. A continuous film formed to be in direct contact with the surface of the compound semiconductor layer, cover at least part of the protective film formed on the upper surface, and have a light emission hole on the top surface of the mesa structure portion A light emitting diode comprising a second electrode film on a side opposite to the reflective layer of the substrate in a range overlapping the light emitting hole in plan view.
(2) A light-emitting diode which includes a compound semiconductor layer including a reflective layer and an active layer in order on a substrate, and emits light to the outside from a light emission hole, the support structure having an upper surface and side surfaces, and the support structure A mesa structure having an inclined side surface and a top surface, the support structure portion including at least a part of the reflective layer, and the side surface is formed by wet etching, An inclined portion extending from the upper surface to the substrate side to a position exceeding at least the reflective layer, and a horizontal cross-sectional area including the inclined portion is continuously reduced toward the upper surface; The mold structure part includes at least a part of the active layer, and the inclined side surface is formed by wet etching, and a horizontal cross-sectional area continuously decreases toward the top surface. Each of the support structure section and the mesa structure section is covered with a protective film and a first electrode film in order, and the protective film includes at least a part of the upper surface; Covers at least the inclined portion of the side surface, the inclined side surface of the mesa structure portion, and the peripheral region of the top surface of the mesa structure portion, and is inside the peripheral region in plan view, and An energization window is disposed around the light emission hole to expose a part of the surface of the compound semiconductor layer, and the first electrode film is formed on the surface of the compound semiconductor layer exposed from the energization window. It is a continuous film that is in direct contact, covers at least a part of the protective film formed on the upper surface, and has a light emission hole on the top surface of the mesa structure. On the opposite side of the layer, With a second electrode film in the range overlapping the light emission hole, light emitting diodes, characterized in that.
(3) The light-emitting diode according to any one of (1) and (2), wherein the reflective layer is a DBR reflective layer.
(4) The light-emitting diode according to (3), further comprising an upper DBR reflective layer on the side opposite to the substrate of the active layer.
(5) The inclined portion is composed of two or more inclined portions, and the horizontal cross-sectional area including each inclined portion is continuously small toward the upper surface, and the horizontal cross-sectional area including the inclined portion close to the upper surface. The light emitting diode according to any one of (1) to (4), wherein is smaller than a horizontal cross-sectional area including an inclined portion far from the upper surface .
(6) The light-emitting diode according to any one of (1) to (5), wherein a light leakage prevention film is provided on the first electrode film and / or the protective film.
(7) The light-emitting diode according to any one of (1) to (6), wherein the compound semiconductor layer has a contact layer in contact with the electrode film.
(8) The light-emitting diode according to any one of (1) to (7), wherein the mesa structure portion includes all of the active layer and part or all of the reflective layer.
(9) The light-emitting diode according to any one of (1) to (8), wherein the mesa structure portion is rectangular in plan view.
(10) The light-emitting diode according to (9), wherein each inclined side surface of the mesa structure portion is formed to be offset with respect to the orientation flat of the substrate.
(11) The height of the mesa structure portion is 3 to 7 μm, and the width of the inclined side surface in plan view is 0.5 to 7 μm. Any one of (1) to (10) The light emitting diode according to one item.
(12) The light emitting diode according to any one of (1) to (11), wherein the light emitting hole is circular or elliptical in plan view.
(13) The light emitting diode according to (12), wherein the diameter of the light emitting hole is 50 to 150 μm.
(14) The light-emitting diode according to any one of (1) to (13), wherein a bonding wire is provided in a portion on the upper surface of the first electrode film.
(15) The light emitting diode according to any one of (1) to (14), wherein the light emitting layer included in the active layer is formed of a multiple quantum well.
(16) light-emitting layer included in the active layer _{((Al X1 Ga 1-X1} ) Y1 In 1-Y1 P (0 ≦ X1 ≦ 1,0 <Y1 ≦ 1), (Al X2 Ga 1-X2) As (0 ≦ X2 ≦ 1), (In _X3 Ga _1-X3 ) As (0 ≦ X3 ≦ 1)), according to any one of (1) to (15), Light emitting diode.
(17) A method of manufacturing a light emitting diode, comprising a reflective semiconductor and a compound semiconductor layer including an active layer in order on a substrate, and emitting light to the outside through a light emitting hole, wherein the reflective layer and the active layer are provided on the substrate. A step of forming a compound semiconductor layer, a step of forming a second electrode film on a side opposite to the reflective layer of the substrate in a range overlapping the light emission hole to be formed in plan view, A step of wet-etching the compound semiconductor layer to form a mesa structure having a horizontal cross-sectional area continuously reduced toward the top surface and an upper surface disposed around the mesa structure; And covering at least a part of the upper surface, the inclined side surface of the mesa structure, and the peripheral region of the top surface of the mesa structure, and inside the peripheral region in plan view. And arranged around the light exit hole. Forming a protective film having a current-carrying window exposing a part of the surface of the compound semiconductor layer; and a protection formed on the upper surface while directly contacting the surface of the compound semiconductor layer exposed from the current-carrying window Forming a first electrode film that is a continuous film that covers at least part of the film and has a light emission hole on the top surface of the mesa structure. Manufacturing method of light emitting diode.
(18) A method for manufacturing a light-emitting diode, comprising a reflective layer and a compound semiconductor layer including an active layer in order on a substrate, and emitting light to the outside through a light emitting hole, wherein the reflective layer and the active layer are disposed on the substrate. A step of forming a compound semiconductor layer, a step of forming a second electrode film on a side opposite to the reflective layer of the substrate in a range overlapping the light emission hole to be formed in plan view, First wet etching is performed on the compound semiconductor layer, and a mesa structure portion in which a horizontal cross-sectional area is continuously reduced toward the top surface and the support is disposed around the mesa structure portion. Forming a top surface of the structure portion, performing a second wet etching along the cutting line for singulation to form a slope portion on a side surface of the support structure portion, and forming the slope portion and the top surface At least a portion and the inclination of the mesa structure Covering at least the surface and the peripheral region of the top surface of the mesa structure, and surrounding the light emission hole inside the peripheral region in plan view and around the light emission hole A step of forming a protective film having a current-carrying window that exposes a part of the surface of the compound semiconductor layer; directly contacting a surface of the compound semiconductor layer exposed from the current-carrying window; and Forming a first electrode film that covers at least a part of the formed protective film and is a continuous film formed so as to have a light emission hole on the top surface of the mesa structure portion. A method for producing a light-emitting diode characterized by the above.
(19) The first and second wet etching are at least selected from the group consisting of a phosphoric acid / hydrogen peroxide mixture, an ammonia / hydrogen peroxide mixture, a bromomethanol mixture, and potassium iodide / ammonia. The method for producing a light-emitting diode according to any one of (17) and (18), which is performed using one or more kinds.

According to the light emitting diode of the present invention, the inclined portion is composed of two or more inclined portions, the horizontal cross-sectional area including each inclined portion is continuously small toward the upper surface, and the horizontal direction including the inclined portion close to the upper surface. By adopting a configuration in which the cross-sectional area is smaller than the horizontal cross-sectional area including the inclined portion far from the upper surface, it is easier to form the protective film and the electrode film thereon on the side surface than in the case of the vertical side surface. Since a continuous film with a uniform film thickness is formed, there is no leakage or poor conduction due to the discontinuous film, and stable and high luminance light emission is ensured.

Mesa structure portion 7 has a structure that protrudes upward relative to the upper surface 6a of the support structure 6, and a tilted side surface 7a and the top surface 7b. In the case of the example shown in FIG. 1, the inclined side surface 7 a is composed of the entire active layer 3, the upper DBR reflective layer 4, and the contact layer 5 , and the protective film 8 and the first layer are formed on the inclined side surface 7 a. An electrode film (front surface electrode layer) 9 and a light leakage prevention film 16 are provided in this order. The top surface 7b is made of the surface of the contact layer 5. On the top surface 7b, a protective film 8 (parts 8ba and 8d) and a first electrode film 9 (parts 9ba, 9bb and 9d) are formed. And are provided.

Claims (19)

A light emitting diode comprising a compound semiconductor layer including a reflective layer and an active layer in order on a substrate, and emitting light to the outside from a light emitting hole,
A support structure portion having an upper surface and a side surface, and a mesa structure portion disposed on the support structure portion and having an inclined side surface and a top surface;
The mesa structure portion includes at least a part of the active layer, and the inclined side surface is formed by wet etching, and a horizontal sectional area is continuously reduced toward the top surface. And
Each of the support structure portion and the mesa structure portion is at least partially covered with a protective film and a first electrode film in order,
The protective film covers at least a part of the upper surface, the inclined side surface of the mesa structure portion, and the peripheral region of the top surface of the mesa structure portion, and is located inside the peripheral region in plan view. And having a current-carrying window that is disposed around the light emission hole and exposes a part of the surface of the compound semiconductor layer,
The first electrode film is in direct contact with the surface of the compound semiconductor layer exposed from the energization window and covers at least a part of the protective film formed on the upper surface, and the top surface of the mesa structure portion It is a continuous film formed so as to have a light emission hole on the top,
A light emitting diode comprising a second electrode film on a side opposite to the reflective layer of the substrate in a range overlapping the light emitting hole in plan view. A light emitting diode comprising a compound semiconductor layer including a reflective layer and an active layer in order on a substrate, and emitting light to the outside from a light emitting hole,
A support structure portion having an upper surface and a side surface, and a mesa structure portion disposed on the support structure portion and having an inclined side surface and a top surface;
The support structure portion includes at least a part of the reflective layer, and a side surface of the support structure portion is formed by wet etching, and an inclined portion that extends from the upper surface to the substrate side at least beyond the reflective layer. A horizontal cross-sectional area including the inclined portion is formed continuously small toward the upper surface,
The mesa structure portion includes at least a part of the active layer, and the inclined side surface is formed by wet etching, and a horizontal sectional area is continuously reduced toward the top surface. And
Each of the support structure part and the mesa structure part is covered with a protective film and a first electrode film in order,
The protective film covers at least a part of the upper surface, at least an inclined portion of the side surfaces, the inclined side surface of the mesa structure portion, and a peripheral region of the top surface of the mesa structure portion, An energization window that is disposed on the inner side of the peripheral region and around the light emission hole in plan view and exposes part of the surface of the compound semiconductor layer;
The first electrode film is in direct contact with the surface of the compound semiconductor layer exposed from the energization window and covers at least a part of the protective film formed on the upper surface, and the top surface of the mesa structure portion It is a continuous film formed so as to have a light emission hole on the top,
A light emitting diode comprising a second electrode film on a side opposite to the reflective layer of the substrate in a range overlapping the light emitting hole in plan view.   The light emitting diode according to claim 1, wherein the reflective layer is a DBR reflective layer. The light emitting diode according to claim 3, further comprising an upper DBR reflective layer on a side opposite to the substrate of the active layer.   The inclined portion is composed of two or more inclined portions, and the horizontal sectional area including each inclined portion is continuously small toward the upper surface, and the horizontal sectional area including the inclined portion close to the upper surface is larger. The light emitting diode according to claim 1, wherein The light emitting diode according to claim 1, further comprising a light leakage prevention film on the first electrode film and / or the protective film.   The light emitting diode according to claim 1, wherein the compound semiconductor layer has a contact layer in contact with the first electrode film.   The light-emitting diode according to claim 1, wherein the mesa structure includes all of the active layer and a part or all of the reflective layer.   The light emitting diode according to any one of claims 1 to 8, wherein the mesa structure portion is rectangular in plan view.   10. The light emitting diode according to claim 9, wherein each inclined side surface of the mesa structure portion is formed to be offset with respect to an orientation flat of the substrate.   11. The height of the mesa structure portion is 3 to 7 μm, and the width of the inclined side surface in a plan view is 0.5 to 7 μm. Light emitting diode.   The light emitting diode according to any one of claims 1 to 11, wherein the light emitting hole is circular or elliptical in plan view.   The light emitting diode according to claim 12, wherein the diameter of the light emitting hole is 50 to 150 μm.   The light emitting diode according to claim 1, further comprising a bonding wire in a portion on the upper surface of the first electrode film.   The light emitting diode according to claim 1, wherein the light emitting layer included in the active layer is formed of a multiple quantum well. The light emitting layer included in the active layer includes ((Al _X1 Ga _1-X1 ) _Y1 In _1-Y1 P (0 ≦ X1 ≦ 1, 0 <Y1 ≦ 1), (Al _X2 Ga _1-X2 ) As (0 ≦ The light emitting diode according to any one of claims 1 to 15, wherein the light emitting diode is any one of X2≤1) and ( _{InX3Ga1 -X3} ) As ( _0≤X3≤1 ). A method for manufacturing a light emitting diode comprising a compound semiconductor layer including a reflective layer and an active layer in order on a substrate, and emitting light to the outside from a light emitting hole,
Forming a compound semiconductor layer including a reflective layer and an active layer on a substrate;
Forming a second electrode film on a side opposite to the reflective layer of the substrate in a range overlapping the light emission hole to be formed in plan view;
A step of wet-etching the compound semiconductor layer to form a mesa structure portion having a horizontal cross-sectional area continuously reduced toward the top surface and an upper surface disposed around the mesa structure portion; When,
Covering at least a part of the upper surface, the inclined side surface of the mesa structure, and the peripheral region of the top surface of the mesa structure, and being inside the peripheral region in plan view; Forming a protective film having a current-carrying window that is disposed around the light emission hole and exposes part of the surface of the compound semiconductor layer;
Directly contacting the surface of the compound semiconductor layer exposed from the energizing window, covering at least part of the protective film formed on the upper surface, and having a light emission hole on the top surface of the mesa structure portion Forming a first electrode film that is a continuous film formed in
A method for producing a light emitting diode, comprising: A method for manufacturing a light emitting diode comprising a compound semiconductor layer including a reflective layer and an active layer in order on a substrate, and emitting light to the outside from a light emitting hole,
Forming a compound semiconductor layer including a reflective layer and an active layer on a substrate;
Forming a second electrode film on a side opposite to the reflective layer of the substrate in a range overlapping the light emission hole to be formed in plan view;
The first wet etching is performed on the compound semiconductor layer, and the mesa structure portion in which the horizontal cross-sectional area is continuously reduced toward the top surface is disposed around the mesa structure portion. Forming a top surface of the support structure;
Performing a second wet etching along the cutting line for singulation to form an inclined portion of the side surface of the support structure; and
At least a part of the inclined portion and the upper surface, the inclined side surface of the mesa structure portion, and the peripheral region of the top surface of the mesa structure portion, and at least an inner side of the peripheral region in plan view And forming a protective film having an energization window that exposes a part of the surface of the compound semiconductor layer by arranging the light emission hole so as to surround the light emission hole, and
Directly contacting the surface of the compound semiconductor layer exposed from the energizing window, covering at least part of the protective film formed on the upper surface, and having a light emission hole on the top surface of the mesa structure portion Forming a first electrode film that is a continuous film formed in
A method for producing a light emitting diode, comprising:   The first and second wet etching is performed by at least one selected from the group consisting of a phosphoric acid / hydrogen peroxide mixture, an ammonia / hydrogen peroxide mixture, a bromomethanol mixture, and potassium iodide / ammonia. The method for producing a light-emitting diode according to claim 17, wherein the method is performed using