JP2013115918A - Switching converter circuit and semiconductor integrated circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a switching converter circuit and a semiconductor integrated circuit capable of quickly responding at the time of abrupt output fluctuation or reference voltage change with no change in characteristics in normal state.SOLUTION: In a switching converter circuit, a differential voltage between a reference voltage and a negative feedback voltage is generated by an error amplifier and a constant voltage is generated on the basis of the differential voltage. The switching converter circuit includes at least one error comparator which outputs a detection signal by detecting a fact that the negative feedback voltage comes to be a predetermined another reference voltage or higher which is lower than said reference voltage by a predetermined voltage, otherwise, a fact that the negative feedback voltage comes to be a predetermined another different reference voltage or higher which is higher than said reference voltage by a predetermined voltage, and a switching means which, on the basis of the detection signal, switches a response speed of a circuit containing the error amplifier.

Description

  The present invention relates to a switching converter circuit that outputs a predetermined constant voltage by a switching operation, and a semiconductor integrated circuit using the switching converter circuit.

  FIG. 1 is a block diagram showing the configuration of a conventional switching converter circuit, and FIG. 2 is a timing chart of each voltage showing the operation of the switching converter circuit of FIG.

  In FIG. 1, a switching converter circuit according to a conventional example includes a reference voltage generation circuit 10 that generates and outputs a reference voltage VR1, and a feedback circuit 11 that divides the output voltage Vout and feeds it back as a negative feedback voltage VFB. The error amplifier 20 detects and amplifies the error voltage based on the non-inverting input voltage VR1 and the inverting input voltage which is the negative feedback voltage VFB, and each of the output driver circuit 33 based on the output voltage of the error amplifier 20 A driver control unit 30 that generates on / off control signals SG1 and SG2 to the switch elements 34 and 35, and a pair of switch elements 34 and 35 controlled based on the control signals SG1 and SG2, and from the input voltage Vin An output driver circuit 33 for generating an output voltage, and the driver control unit 30 controls the output driver circuit 33. Is characterized in that outputs an output voltage of more constant voltage. Here, the feedback circuit 11 divides the output voltage Vout by using, for example, two resistors to generate and output the feedback voltage VFB. The output driver circuit 33 is configured by inserting a series circuit of a pair of switch elements 34 and 35 between the voltage source of the input voltage Vin and the ground, and the output terminal of the output driver circuit 33 has A load 42 is connected via a smoothing circuit including a coil 40 and a capacitor 41.

  In the switching converter circuit configured as described above, when the negative feedback voltage VFB changes due to the fluctuation of the load 42, or when the reference voltage VR1 changes at the time of start-up or switching of the output voltage, the negative feedback voltage VFB and the reference The error amplifier 20 that detects the error voltage of the voltage VR1 is controlled so as to hold the output voltage Vout at a constant voltage by negative feedback. The circuit is a negative feedback circuit. For example, as shown in FIG. 2, when the reference voltage VR1 changes sharply, the output voltage Vout is higher than the change of the reference voltage VR1 due to the response speed of the circuit such as the error amplifier 20. Change late. One factor that determines the response speed of the circuit is the frequency characteristics of the error amplifier 20, and the higher the response speed of the error amplifier 20, the faster the response is possible. However, in order to improve the characteristics of the error amplifier 20, There are trade-off items such as deterioration of stability due to a decrease in phase margin by improving frequency characteristics.

  By the way, for example, in Patent Document 1, even when the reference voltage value to be generated is changed, a desired reference voltage can be generated accurately, and an increase in circuit area and current consumption can be suppressed. And a DC-DC converter including the reference voltage generation circuit is disclosed. In this DC-DC converter, the NMOS transistor M11, which is the output transistor of the second constant voltage circuit, is used as a source follower circuit, and the power supply of the NMOS transistor M11 is directly supplied from the DC power supply BAT having a small internal resistance. Even when the output code signal of the up / down counter in the D / A converter is changed and the current iccd, which is the output current of the reference voltage generation circuit, greatly fluctuates, the fluctuation of the second reference voltage Vrt generated by the reference voltage generation circuit It is characterized by eliminating the.

  Further, for example, Patent Document 2 discloses a DC-DC converter in which an output voltage can quickly follow a change in a reference voltage. This DC-DC converter is an output voltage variable DC-DC converter that uses an output voltage of a DA converter that outputs a voltage corresponding to a voltage setting signal as a reference voltage of an error amplifier circuit, and an oscillation circuit that outputs a clock signal; A delay circuit for inputting a clock signal and outputting a second clock signal delayed by a predetermined delay time with respect to the clock signal; a PMW comparator to which an output of the error amplifying circuit and an output obtained by voltage-converting the current flowing through the inductor are provided; Control means for controlling the switching transistor of the DC-DC converter, which is supplied with the output of the second clock signal of the delay circuit and the output of the PMW comparator, and uses the clock signal to control the DA converter. Use of the second clock signal to control the switching transistor It is a symptom.

  The characteristics required of switching converters for devices used in mobile phones, etc. have output voltage accuracy, and high-speed response is required as a circuit to maintain output voltage accuracy against changes such as load response and output voltage switching. .

  However, as described above, there are trade-off items such as an increase in current consumption and a decrease in phase margin in order to achieve a high-speed response.

  SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a switching converter circuit and a semiconductor integrated circuit that can solve the above-described problems and can perform a high-speed response at the time of steep output fluctuation or reference voltage change without changing the steady state characteristics. It is in.

A switching converter circuit according to a first aspect of the present invention is a switching converter circuit that generates an error voltage between a reference voltage and a negative feedback voltage by an error amplifier, and generates a constant voltage based on the error voltage.
The negative feedback voltage is equal to or higher than a predetermined reference voltage that is lower than the reference voltage by a predetermined voltage, or is equal to or higher than a predetermined another reference voltage that is higher than the reference voltage by a predetermined voltage. At least one error comparator that detects and outputs a detection signal;
And switching means for switching a response speed of a circuit including the error amplifier based on the detection signal.

  According to a second aspect of the present invention, a semiconductor integrated circuit includes the switching converter circuit.

  Therefore, according to the present invention, the negative feedback voltage is equal to or higher than a predetermined another reference voltage that is lower than the reference voltage by a predetermined voltage, or a predetermined further higher than the reference voltage by a predetermined voltage. Since the response speed of the circuit including the error amplifier is switched in response to detecting that the voltage exceeds another reference voltage, for example, when the output voltage fluctuates or the reference voltage changes, By switching the operation speed, a high-speed response can be performed at the time of steep output fluctuation or reference voltage change without changing the steady state characteristics.

It is a block diagram which shows the structure of the switching converter circuit which concerns on a prior art example. 3 is a timing chart of each voltage showing the operation of the switching converter circuit of FIG. 1. 1 is a block diagram showing a configuration of a switching converter circuit according to a first embodiment of the present invention. 4 is a timing chart of each voltage showing the operation of the switching converter circuit of FIG. 3. It is a block diagram which shows the structure of the switching converter circuit which concerns on the 2nd Embodiment of this invention. 6 is a timing chart of each voltage showing the operation of the switching converter circuit of FIG. 5.

  Hereinafter, embodiments according to the present invention will be described with reference to the drawings. In addition, in each following embodiment, the same code | symbol is attached | subjected about the same component.

First embodiment.
FIG. 3 is a block diagram showing the configuration of the switching converter circuit according to the first embodiment of the present invention, and FIG. 4 is a timing chart of each voltage showing the operation of the switching converter circuit of FIG. The switching converter circuit according to the first embodiment is a step-down switching regulator having negative feedback, and includes a reference voltage generation circuit 10 and a feedback circuit 11 as compared with the switching converter circuit according to the conventional example of FIG. Two error comparators 22 and 23 are further provided between the amplifier 20 and the amplifier 20. Detailed descriptions of the same components as those in FIG. 1 are omitted.

  In the switching converter circuit of FIG. 3, the reference voltage generation circuit 10 generates and outputs a reference voltage VR1, and the reference voltage VR1 is input to the non-inverting input terminal of the error amplifier 20. The error amplifier 20 outputs an output voltage corresponding to the error voltage between the reference voltage VR1 and the negative feedback voltage VFB to the driver control unit 30. The driver control unit 30 generates on / off control signals SG1 and SG2 for the switch elements 34 and 35 based on the output voltage from the error amplifier 20, and outputs them to the switch elements 34 and 35, respectively. In the control system of the circuit, switching control is performed on the switch elements 34 and 35 so that the reference voltage VR1 and the negative feedback voltage VFB are the same voltage. Here, the driver control unit 30 performs switching at a predetermined period T by a built-in oscillator, and basically performs switching control as follows. The switch element 34 is turned on by the on / off control signal SG1, and the switch element 34 is turned off by the on / off control signal SG2. At this time, the voltage source of the input voltage Vin and the coil 40 are connected, and the input voltage Vin Is output. On the other hand, the switch element 34 is turned off by the on / off control signal SG1, and the switch element 34 is turned on by the on / off control signal SG2. At this time, the ground and the coil 40 are connected, and one end of the coil 40 is grounded. Is done.

  Here, if the on-resistance values of the switch elements 34 and 35 and the parasitic resistance of each wiring are ignored, the on-time Ton per cycle of the switch element 34 is Vout / Vin × T. In the steady state, the values of the feedback voltage VFB and the reference voltage VR1 are negatively fed back from the error amplifier 20, and thus are controlled so that VFB = VR1. However, if there is a change in the output voltage Vout due to a steep load, or if the input voltage of the error amplifier 20 changes due to switching of the reference voltage VR1 in order to change the output voltage Vout, the error amplifier 20 When the output voltage changes according to the error of the input voltage, the driver control unit 30 controls the ON time of the switch elements 34 and 35, and the switch element 34 so that the reference voltage VR1 and the negative feedback voltage VFB are the same. , 35 is switched. When the output voltage Vout changes with respect to the input voltage of the error amplifier 20, since the error amplifier 20 has a response speed, the driver control unit 30 performs switching control of the switch elements 34 and 35 until the output voltage Vout changes. Takes a certain amount of time.

  Therefore, in order to change the output quickly with respect to the change in the input voltage of the error amplifier 20, it is necessary to increase the response speed of the error amplifier 20. The response speed of the error amplifier 20 is determined by the bias current and the phase compensation circuit 21. In order to increase the response speed of the error amplifier 20, the bias current increases and the stability of the circuit deteriorates.

  The circuit according to the present embodiment further includes two error comparators 22 and 23, and the negative feedback voltage VFB is input to the non-inverting input terminal of the error comparator 22 and the inverting input terminal of the error comparator 23, and the reference voltage The reference voltage VR2 (VR2> VR1) generated by the circuit 10 and arbitrarily determined (that is, the reference voltage VR2 is a voltage higher than the reference voltage VR1 by a predetermined voltage) is applied to the inverting input terminal of the error comparator 22. The reference voltage VR3 (VR3 <VR1) generated by the reference voltage circuit 10 and arbitrarily determined (that is, the reference voltage VR3 is a voltage lower than the reference voltage VR1 by a predetermined voltage) is input to the error comparator 23. Input to the non-inverting input terminal. The output voltages V22 and V23 from the error comparators 22 and 23 are input to the error amplifier 20.

  In the circuit of FIG. 3 configured as described above, since VFB = VR1 is normally obtained by negative feedback, the output voltages of the error comparators 22 and 23 are L level. Here, when there is a change in the output voltage Vout due to a steep change in the load 42, or when there is a change in the input of the error amplifier 20 due to switching of the reference voltage VR1 in order to change the output voltage Vout, When VFB> VR2 or VFB <VR3 and the output voltage of the error comparator 22 or error comparator 23 becomes H level, the error amplifier 20 is driven by the H level output voltage V22 or V23 from the error comparator 22 or 23. The bias current of the error amplifier 20, that is, the bias current of the error amplifier 20, that is, the voltage VR2 and the voltage VR3 arbitrarily set with respect to the reference voltage VR1 is switched. Current consumption can be increased. Here, in order to increase the bias current or current consumption of the error amplifier 20, for example, the element value (for example, resistance value) of the bias circuit connected to each input terminal of the error amplifier 20 is reduced, or the bias voltage is increased. Increase

  In the circuit of FIG. 3, the present invention is not limited to this, and the input current of the error amplifiers 22 and 23 is inverted to switch only when the error amplifiers 22 and 23 output an L level output voltage, thereby increasing the bias current. Alternatively, only one of the error amplifiers 22 or 23 may be provided.

  In the circuit of FIG. 3, when the reference voltage VR1 is sharply changed as shown in FIG. 4, if the circuit of the conventional example of FIG. Although the delay is caused by the response speed, according to the circuit according to the present embodiment, when the reference voltage VR2 is set to a voltage (VR1 × α) (α <1) proportional to the reference voltage VR1, VFB> VR2. In this case, the error comparator 22 outputs an H level output voltage and increases the bias current of the error amplifier 20, thereby increasing the response speed of the circuit and increasing the response speed of the circuit compared to the conventional circuit. be able to. Further, if VFB <VR2, the output voltage of the error comparator 22 becomes the L level voltage again, the bias current of the error amplifier 20 decreases, and the normal operation is restored. Further, even when the reference voltage VR1 drops sharply, the bias current of the error amplifier 20 is increased in the same manner as described above when VFB <VR3 by setting the reference voltage VR3 to VR1 × α (α> 1). The response speed of the circuit can be increased.

Second embodiment.
FIG. 5 is a block diagram showing the configuration of the switching converter circuit according to the second embodiment of the present invention, and FIG. 6 is a timing chart of each voltage showing the operation of the switching converter circuit of FIG. Compared with the switching converter circuit according to the embodiment of FIG. 1, the switching converter circuit according to the second embodiment inputs the output voltages V22 and V23 from the error comparators 22 and 23 directly to the error amplifier 20. Instead of changing the bias current, based on the output voltages V22 and V23 from the error comparators 22 and 23, a plurality of phase compensation circuit units having different phase compensation constants in the phase compensation circuit 21 are selectively selected. In particular, when the response speed of the error amplifier 20 is increased by selecting a phase compensation circuit unit having a phase compensation constant with a fast response speed, the same as in the circuit of FIG. Only the response speed of the circuit can be increased.

  In addition, in the circuit of FIG. 5, as shown in FIG. 6, a delay circuit for generating an output delay from the error comparators 22 and 23 is provided, or the detection time or release thereof is delayed for a predetermined period using a clock counter. By providing an arbitrary delay time for the detection time or the release time of the error comparators 22 and 23, it is possible to adjust so as to increase the response speed of the circuit until VR1 = VFB.

Modified example.
The switching converter circuit and its peripheral circuit according to each of the above embodiments may be constituted by a semiconductor integrated circuit. That is, a semiconductor integrated circuit including a switching converter circuit may be formed.

  As described above, according to the present invention, it is possible to provide a switching converter circuit that performs high-speed response at the time of steep output fluctuation or reference voltage change without changing the steady-state characteristics.

10: Reference voltage generation circuit,
11 ... feedback circuit,
20: Error amplifier,
21 ... Phase compensation circuit,
22, 23 ... error comparator,
30: Driver control unit,
33 ... Output driver circuit,
34, 35 ... switch elements,
40 ... Coil,
41 ... Capacitor,
42 ... Load.

Japanese Unexamined Patent Publication No. 2009-261048 JP 2009-303317 A

Claims (6)

In a switching converter circuit that generates an error voltage from a negative feedback voltage with a reference voltage by an error amplifier, and generates a constant voltage based on the error voltage,
The negative feedback voltage is equal to or higher than a predetermined reference voltage that is lower than the reference voltage by a predetermined voltage, or is equal to or higher than a predetermined another reference voltage that is higher than the reference voltage by a predetermined voltage. At least one error comparator that detects and outputs a detection signal;
A switching converter circuit comprising switching means for switching a response speed of a circuit including the error amplifier based on the detection signal.   2. The switching converter circuit according to claim 1, wherein the switching means switches a response speed of the circuit by changing a current consumption of the error amplifier based on the detection signal.   2. The switching converter circuit according to claim 1, wherein the switching means switches a response speed of the circuit by changing a phase compensation constant of a phase compensation circuit of the error amplifier based on the detection signal.   4. The switching converter circuit according to claim 1, wherein the switching unit controls to increase a response speed of a circuit including the error amplifier based on the detection signal. 5. .   5. The switching converter circuit according to claim 1, further comprising delay means for delaying a detection signal from the error comparator.   A semiconductor integrated circuit comprising the switching converter circuit according to claim 1.

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