JP2013109551A - Power source control device and power source control method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a power source control device and a power source control method which can easily change timing sequence of power supply.SOLUTION: A power source control device comprises: a register 10 for storing pieces of ON-information which define order and timing for turning on a plurality of power sources; an MUX 20 for selecting ON-information stored in the register 10; and a power source control unit 30 for controlling the order and the timing for turning on the plurality of power sources on the basis of the ON-information selected by the MUX 20.

Description

  The present invention relates to a power supply control device and a power supply control method for controlling a plurality of power supplies.

  Conventionally, it is known to control a plurality of power supplies in a system power supply IC for high-efficiency operation (see Patent Document 1). That is, a different power supply voltage is supplied to each circuit block, and this power supply can be individually turned on / off.

  For example, consider a timing sequence in which two types of power supplies are turned on in accordance with the value of the input signal SEQ in an apparatus that supplies three power supply voltages V1, V2, and V3. Specifically, when the input signal SEQ is 0, as shown in FIG. 15, the power supply voltages V1, V2, and V3 are turned on 10 ms, 20 ms, and 30 ms after the start signal POWER_ON is turned on, respectively. To do. When the input signal SEQ is 1, as shown in FIG. 16, the power supply voltages V1, V2, and V3 are turned on 15 ms, 20 ms, and 5 ms after the activation signal POWER_ON is turned on, respectively. The operation of supplying the power supply voltage V1 when the input signal SEQ is 1 in such a situation will be described with reference to FIGS.

  First, when the activation signal POWER_ON becomes 1, a value is loaded into the down counter 101. Here, since it is assumed that the input signal SEQ is 1, a value of 15 ms is selected by the MUX 102 and a value of 15 ms is loaded using the clock signal clk. At the same time, the enable signal cnt_en of the down counter 101 also becomes 1, and the down count operation starts. When the value cot_out of the down counter 101 becomes 0, the output signal eq0 of the comparator 103 becomes 1, the enable signal cnt_en of the down counter 101 is returned to 0, and the voltage V1 supply circuit 104 is turned on. Thus, the power supply voltage V1 can be supplied to a predetermined circuit block 15 ms after the activation signal POWER_ON is turned on.

JP 2009-134576 A

  However, according to the prior art, when changing the timing sequence for turning on the power supply voltage V1, it is necessary to change the input value (10 ms, 15 ms) of the MUX 102. If there are three power supply voltages V1, V2 and V3, there are also three MUXs, so the input values must be changed. As the number of power supply voltages increases, the number of input value changes increases. For this reason, there is a risk of causing an error when changing the input value, and it takes a lot of time to check whether the change operation of the input value is correct.

  An object of the present invention is to provide a power supply control device and a power supply control method capable of easily changing the timing sequence of power supply.

  According to one aspect of the present invention, a storage unit that stores ON information that defines the order and timing of turning on a plurality of power supplies, a selection unit that selects ON information stored in the storage unit, and the selection unit A power supply control device is provided that includes a power supply control unit that controls the order and timing of turning on the plurality of power supplies based on the selected ON information.

  Further, according to another aspect of the present invention, a storing step of storing on information defining the order and timing of turning on a plurality of power supplies, a selecting step of selecting the on information stored in the storing step, There is provided a power supply control method including a power supply control step for controlling the order and timing of turning on the plurality of power supplies based on the on information selected in the selection step.

  ADVANTAGE OF THE INVENTION According to this invention, the power supply control apparatus and power supply control method which can change the timing sequence of power supply easily can be provided.

The typical internal block diagram of the principal part of the power supply control device which concerns on 1st Embodiment. FIG. 2 is a schematic internal configuration diagram of a register according to the first embodiment. The figure for demonstrating the ON information which concerns on 1st Embodiment. It is a typical internal block diagram of ON information which concerns on 1st Embodiment, Comprising: (a) The structural example in case an input signal is 0, (b) The structural example in case an input signal is 1. The typical internal block diagram of the power supply control part which concerns on 1st Embodiment. The typical internal block diagram of the ON signal generation circuit which concerns on 1st Embodiment. The time chart which shows the operation example of the power supply control apparatus which concerns on 1st Embodiment. The typical internal block diagram of the other on information which concerns on 1st Embodiment. The figure for demonstrating the ON information which concerns on 2nd Embodiment. The typical internal block diagram of the ON information which concerns on 2nd Embodiment. The typical internal block diagram of the principal part of the power supply control apparatus which concerns on 2nd Embodiment. The typical internal block diagram of the power supply control part which concerns on 2nd Embodiment. The typical internal block diagram of the ON signal generation circuit which concerns on 2nd Embodiment. The time chart which shows the operation example of the power supply control apparatus which concerns on 2nd Embodiment. It is a figure for demonstrating a prior art, Comprising: The figure which shows the case where an input signal is 0. It is a figure for demonstrating a prior art, Comprising: The figure which shows the case where an input signal is 1. The typical internal block diagram of the part which supplies the power supply voltage V1 of the conventional power supply control apparatus. The time chart which shows the operation example of the conventional power supply control apparatus.

  Next, embodiments of the present invention will be described with reference to the drawings. In the following description of the drawings, the same or similar parts are denoted by the same or similar reference numerals. However, it should be noted that the drawings are schematic, and the relationship between the thickness of each component and the planar dimensions, the ratio of the thickness of each layer, and the like are different from the actual ones. Therefore, specific thicknesses and dimensions should be determined in consideration of the following description. Moreover, it is a matter of course that portions having different dimensional relationships and ratios are included between the drawings.

  Further, the embodiments described below exemplify apparatuses and methods for embodying the technical idea of the present invention, and the embodiments of the present invention include the material, shape, and structure of each component. The arrangement is not specified below. Various modifications can be made to the embodiment of the present invention within the scope of the claims.

[First Embodiment]
As shown in FIG. 1, the power supply control device according to the first embodiment includes a storage unit (described later) such as a register 10 that stores ON information that defines the order and timing of turning on a plurality of power supplies. A selection unit such as a MUX 20 that selects on-information stored in the register 10 and a power control unit 30 that controls the order and timing of turning on a plurality of power sources based on the on-information selected by the MUX 20 are provided.

  The register 10 stores a plurality of pieces of ON information in association with predetermined environmental conditions or operating conditions, and the MUX 20 receives ON conditions corresponding to the environmental conditions or operating conditions when given predetermined environmental conditions or operating conditions. Information may be selected.

  The register 10 may store a value indicating the turn-on order for each area corresponding to each power source included in the plurality of power sources.

  Further, the register 10 may store a value indicating each power source included in a plurality of power sources for each region corresponding to the turn-on order.

  Further, the register 10 may store information indicating that the power supply is not used in an area that defines the order in which a plurality of power supplies are turned on.

  Further, the register 10 may store a value indicating a time from turning on the nth power supply to turning on the n−1th power supply.

  Further, the power supply control unit 30 generates a plurality of ON signals based on the timing defined in the ON information, and selectively generates the voltage V1 supply circuit based on the order defined in the ON information. 41, the voltage V2 supply circuit 42, and the voltage V3 supply circuit 43 may be input.

  Hereinafter, the configuration of the power supply control device according to the first embodiment will be described in more detail. As shown in FIG. 1, the power supply control device is a system power supply IC or the like that supplies a plurality of power supply voltages, and includes a MUX 20 and a power supply control unit 30. The MUX 20 selects the on information stored in the register 10 and supplies the selected on information to the power control unit 30 at the subsequent stage. The power supply control unit 30 controls the order and timing of turning on a plurality of power supplies based on the on information selected by the MUX 20. Specifically, the ON signals V1_ON and V2_ON for individually turning on the voltage V1 supply circuit 41, the voltage V2 supply circuit 42, and the voltage V3 supply circuit 43 (hereinafter, collectively referred to as “voltage supply circuit”). , V3_ON are generated and input to each voltage supply circuit. The voltage supply circuit is connected to a circuit block that is a voltage supply target, such as a CPU, a video processor, and an audio processor. Different power supply voltages are supplied to each circuit block, and the power supply can be individually turned on / off.

  FIG. 2 is a schematic internal configuration diagram of the register 10 according to the first embodiment. This register 10 stores 30-bit on information.

  The 6 bits before the on information define the order in which a plurality of power supplies are turned on. That is, a value indicating the order in which the voltage V1 supply circuit 41 is turned on is stored in the area 11 for the first 2 bits. Further, in the area 12 for the next 2 bits, a value indicating the order in which the voltage V2 supply circuit 42 is turned on is stored. Further, a value representing the order in which the voltage V3 supply circuit 43 is turned on is stored in the area 13 for the next 2 bits. In other words, a value indicating the turn-on order is stored for each region corresponding to each power source included in the plurality of power sources. Here, the 2-bit value “00” means that the turn-on order is first, “01” means that the turn-on order is second, and “10” is on. It means that the order is third. Since it is assumed that there are three power supply voltages V1, V2, and V3, “11” is not used. Of course, when there are four power supply voltages V1, V2, V3 and V4, "11" can be used as a value which means that the turn-on order is fourth.

On the other hand, the 24 bits after the on information define the timing for turning on a plurality of power supplies. That is, as shown in FIG. 3, the 8-bit area 14 stores a time Δt ₁ from when the activation signal POWER_ON is turned on until the _first power supply is turned on. Further, the next 8-bit area 15 stores a time Δt _{2 from} when the first power supply is turned on to when the second power supply is turned on. Further, the next 8-bit area 16 stores a time Δt ₃ from when the second power supply is turned on to when the third power supply is turned on.

  The register 10 stores a plurality of pieces of ON information in association with predetermined environmental conditions or operating conditions. The environmental condition or the operating condition mentioned here means various conditions related to the power supply timing sequence. For example, “type of circuit block to be supplied with voltage” corresponds. That is, there is a case where it is desired to change the power supply timing sequence depending on the type of circuit block. In this case, a plurality of pieces of ON information are stored in advance in the register 10 in association with the type of each circuit block. The type of circuit block can be specified by the value of the input signal SEQ. For example, when the input signal SEQ is 0, it means the video processor A, and when the input signal SEQ is 1, it means the video processor B. When an input signal SEQ designating the type of circuit block is given, the MUX 20 selects on-information stored in the register 10 in association with the type of circuit block (input signal SEQ).

  Hereinafter, a specific example of ON information will be described.

Here again, description will be made using the example of FIG. That is, when the input signal SEQ is 0, the power supply voltages V1, V2, and V3 are turned on 10 ms, 20 ms, and 30 ms after the activation signal POWER_ON is turned on, respectively. The 30-bit on information in this case is as shown in FIG. That is, since the turn-on order of the voltage V1 supply circuit 41 is first, “00” is stored in the area 11a. Further, since the turn-on order of the voltage V2 supply circuit 42 is second, “01” is stored in the region 12a. Furthermore, since the turn-on order of the voltage V3 supply circuit 43 is third, “10” is stored in the area 13a. On the other hand, since the time Δt ₁ from when the activation signal POWER_ON is turned on to when the first power supply is turned on is 10 ms, a value meaning “10 ms” is stored in the area 14a. Further, since the time Δt ₂ from turning on the first power supply to turning on the second power supply is 10 ms, a value meaning “10 ms” is stored in the region 15a. Furthermore, since the time Δt ₃ from when the second power source is turned on to when the third power source is turned on is 10 ms, a value meaning “10 ms” is stored in the area 16a.

Next, a description will be given using the example of FIG. That is, when the input signal SEQ is 1, the power supply voltages V1, V2, and V3 are turned on 15 ms, 20 ms, and 5 ms after the activation signal POWER_ON is turned on, respectively. The 30-bit on information in this case is as shown in FIG. That is, since the turn-on order of the voltage V1 supply circuit 41 is second, “01” is stored in the area 11b. Further, since the turn-on order of the voltage V2 supply circuit 42 is third, “10” is stored in the region 12b. Further, since the turn-on order of the voltage V3 supply circuit 43 is first, “00” is stored in the area 13b. On the other hand, since the time Δt ₁ from when the activation signal POWER_ON is turned on to when the first power supply is turned on is 5 ms, a value meaning “5 ms” is stored in the area 14b. Also, since the time Δt ₂ from turning on the first power supply to turning on the second power supply is 10 ms, a value meaning “10 ms” is stored in the area 15b. Further, since the time Δt ₃ from turning on the second power supply to turning on the third power supply is 5 ms, a value meaning “5 ms” is stored in the area 16b.

FIG. 5 is a schematic internal configuration diagram of the power supply control unit 30 according to the first embodiment. As shown in this figure, the power supply control unit 30 includes an OR circuit 31, a MUX 32, a first down counter t_cnt, a comparator 33, an nth_cnt_en generation circuit 34, a second down counter nth_cnt, And an ON signal generation circuit 35. When the input signal SEQ is 0, Δt ₁ , Δt ₂ , and Δt ₃ are read from the areas 14 a, 15 a, and 16 a of the register 10 and input to the MUX 32, and from the areas 11 a, 12 a, and 13 a of the register 10. V1_nth, V2_nth, and V3_nth are read and input to the ON signal generation circuit 35. On the other hand, when the input signal SEQ is 1, Δt ₁ , Δt ₂ , and Δt ₃ are read from the areas 14 b, 15 b, and 16 b of the register 10 and input to the MUX 32, and the areas 11 b, 12 b, V1_nth, V2_nth, and V3_nth are read from 13b and input to the ON signal generation circuit 35. As will be described in detail later, when the activation signal POWER_ON is turned on, a down-count operation starts and an on signal that rises after Δt ₁ , Δt ₂ , and Δt ₃ is generated. The voltage is selectively input to the voltage supply circuit.

  FIG. 6 is a schematic internal configuration diagram of the ON signal generation circuit 35 according to the first embodiment. As shown in this figure, the ON signal generation circuit 35 includes a first eq0 output circuit 35a, a second eq0 output circuit 35b, a third eq0 output circuit 35c, and MUXs 35d to 35f. When the value nth_cnt_out of the second down counter is 2, the first eq0 output circuit 35a outputs the output signal eq0 of the comparator 33 as the on signal on_1st. When the value nth_cnt_out of the second down counter is 1, the second eq0 output circuit 35b outputs the output signal eq0 of the comparator 33 as the on signal on_2nd. When the value nth_cnt_out of the second down counter is 0, the third eq0 output circuit 35c outputs the output signal eq0 of the comparator 33 as the on signal on_3rd. These on signals on_1st, on_2nd, and on_3rd are input to the MUXs 35d to 35f. Here, the MUX 35d selects on_1st based on V1_nth “00” and outputs V1_ON. Further, the MUX 35e selects on_2nd based on V2_nth “01” and outputs V2_ON. Further, the MUX 35f selects on_3rd based on V3_nth “10” and outputs V3_ON.

  Hereinafter, the operation of the power supply control apparatus according to the first embodiment will be described with reference to FIG. Also here, it is assumed that the power supply voltages V1, V2, and V3 are turned on 10 ms, 20 ms, and 30 ms after the activation signal POWER_ON is turned on, respectively.

First, when the activation signal POWER_ON becomes 1, the load enable signal t_load_en of the first down counter becomes 1, and the load enable signal nth_load_en of the second down counter becomes 1. At this time, since the value nth_cnt_out of the second down counter is 0, Δt ₁ (10 ms) is selected by the MUX 32, and this Δt ₁ is loaded into the first down counter t_cnt (t_load_val). On the other hand, since it is assumed here that there are three power supply voltages V1, V2, and V3, the second down counter nth_cnt is loaded with a fixed value 2 (nth_load_val).

  When the activation signal POWER_ON becomes 1, the count enable signal t_cnt_en of the first down counter becomes 1, and the first down counter t_cnt starts the down-counting operation. As a result, when the value t_cnt_out of the first down counter becomes 0, the output signal eq0 of the comparator 33 becomes 1.

Here, since the load enable signal t_load_en of the first down counter is 1 and the value nth_cnt_out of the second down counter is 2, Δt ₂ (10 ms) is present in the first down counter t_cnt. Loaded. Further, since the value nth_cnt_out of the second down counter is 2, the load enable signal nth_load_en becomes 1, and the value nth_cnt_out of the second down counter becomes 1 after being counted down. Further, since the value nth_cnt_out of the second down counter is 2, the first on signal on_1st is generated at the same timing as the output signal eq0 of the comparator 33.

  Thereafter, the first down counter t_cnt continues the down count operation. As a result, when the value t_cnt_out of the first down counter becomes 0, the output signal eq0 of the comparator 33 becomes 1.

Here, since the load enable signal t_load_en of the first down counter is 1 and the value nth_cnt_out of the second down counter is 1, Δt ₃ (10 ms) is present in the first down counter t_cnt. Loaded. Further, since the second down counter value nth_cnt_out is 1, the load enable signal nth_load_en becomes 1, and the second down counter value nth_cnt_out is counted down to 0. Further, since the value nth_cnt_out of the second down counter is 1, the second on signal on_2st is generated at the same timing as the output signal eq0 of the comparator 33.

  Thereafter, the first down counter t_cnt continues the down count operation. As a result, when the value t_cnt_out of the first down counter becomes 0, the output signal eq0 of the comparator 33 becomes 1.

Here, since the load enable signal t_load_en of the first down counter is 1 and the value nth_cnt_out of the second down counter is 0, Δt ₁ is loaded to the first down counter t_cnt. . At the same time, the load enable signal t_load_en becomes 0, and the first down counter t_cnt stops. Further, when the value nth_cnt_out of the second down counter is 0, the load enable signal nth_load_en remains 0 even when the output signal eq0 of the comparator 33 is generated, so the value of the second down counter nth_cnt_out maintains 0. Further, since the value nth_cnt_out of the second down counter is 0, the third on signal on_3st is generated at the same timing as the output signal eq0 of the comparator 33.

  When the ON signals on_1st, on_2nd, and on_3rd are generated in such an operation, the ON signal generation circuit 35 generates the ON signals V1_ON, V2_ON, and V3_ON as instructed by the V1_nth, V2_nth, and V3_nth. Here, since it is assumed that the power supply voltages V1, V2, and V3 are turned on in this order, the on signal on_1st is V1_ON, on_2st is V2_ON, and on_3st is V3_ON.

  When the on signal V1_ON is input to the voltage V1 supply circuit 41, the voltage V1 supply circuit 41 is turned on to supply the power supply voltage V1. When the ON signal V2_ON is input to the voltage V2 supply circuit 42, the voltage V2 supply circuit 42 is turned on to supply the power supply voltage V2. Further, when the on signal V3_ON is input to the voltage V3 supply circuit 43, the voltage V3 supply circuit 43 is turned on to supply the power supply voltage V3. As a result, the power supply voltages V1, V2, and V3 are supplied 10 ms, 20 ms, and 30 ms after the activation signal POWER_ON is turned on, respectively.

  As described above, according to the power supply control device according to the first embodiment, the timing sequence of power supply can be easily changed. That is, ON information that defines the order and timing of turning on the plurality of power supplies is stored, and the order and timing of turning on the plurality of power supplies are controlled based on the ON information. The timing sequence of power supply can be changed simply by changing. Therefore, it is possible to reduce the possibility of inducing a mistake in the change work as compared with the conventional case, and it is possible to shorten the time required for confirming the change work. It goes without saying that such an effect becomes more prominent as the number of power supply voltages to be supplied increases.

  Note that the register 10 stores a value indicating the turn-on order for each region corresponding to each power source included in the plurality of power sources, but the present invention is not limited to this. That is, as shown in FIG. 8, values representing individual power sources included in a plurality of power sources may be stored for each region corresponding to the turn-on order. That is, a value indicating the voltage supply circuit that is turned on first is stored in the area 11 for the first 2 bits. In the next 2-bit area 12, a value indicating the voltage supply circuit that is turned on second is stored. Further, a value indicating the voltage supply circuit that is turned on third is stored in the area 13 for the next 2 bits. Even in this case, since the order of turning on the plurality of power supplies can be defined, the same effect as described above can be obtained.

Here, since it is assumed that there are three power supply voltages V1, V2, and V3, the on-information “11” is not used, but the present invention is not limited to this. In other words, the on information “11” can be used with a special meaning. For example, instead of using all three power supply voltages V1, V2, and V3, only V1 and V3 may be used. In this case, stores the "11" in the region 12a corresponding to V2 is not used, store the NULL or the like in a region 16a which defines a Delta] t _3. In other words, information indicating that the power supply is not used is stored in an area that defines the order in which a plurality of power supplies are turned on. In this way, it is possible to selectively use only a part of the plurality of power supplies by a simple method of changing the on-information.

[Second Embodiment]
By the way, when turning off a plurality of power supplies, it is usually turned off in the same order and timing as the turn-on order and timing. However, there are cases where it is desired to turn off in an order and timing different from the turn-on order and timing. Therefore, the following configuration is adopted in the second embodiment.

  That is, the register 10 stores off information that defines the order and timing of turning off a plurality of power supplies. Further, the MUX 20 selects the off information stored in the register 10. Furthermore, the power supply control unit 30 controls the order and timing of turning off the plurality of power supplies based on the off information selected by the MUX 20.

The configuration of the power supply control device according to the second embodiment will be specifically described below. Here, as shown in FIG. 9, a case where the power supply voltages V1, V3, and V2 are turned off in this order every 10 ms after the end signal POWER_OFF is turned on is illustrated. The 30-bit off information in this case is as shown in FIG. That is, since the turn-off order of the voltage V1 supply circuit 41 is first, “00” is stored in the area 11c. Further, since the turn-off order of the voltage V2 supply circuit 42 is third, “10” is stored in the region 12c. Furthermore, since the turn-off order of the voltage V3 supply circuit 43 is second, “01” is stored in the area 13c. On the other hand, since the time Δt ₁ , Δt ₂ , Δt ₃ from when the end signal POWER_OFF is turned on to when the first power supply is turned off is 10 ms, all of the regions 14c, 15c, 16c are “10 ms”. Is stored.

  The configuration of the power supply control device is basically the same as that of the first embodiment. That is, the register 10 stores off information that defines the order and timing of turning off a plurality of power supplies, the MUX 20 selects the off information stored in the register 10, and the power control unit 30 is selected by the MUX 20 The order and timing of turning off the plurality of power supplies are controlled based on the off information.

  However, in the present embodiment, as shown in FIGS. 11 and 12, the end signal POWER_OFF is input to the power supply control unit 30 instead of the start signal POWER_ON. The power supply control unit 30 outputs off signals V1_OFF, V2_OFF, and V3_OFF instead of the on signals V1_ON, V2_ON, and V3_ON. For this reason, the OFF signal generation circuit 35 is described instead of the ON signal generation circuit 35, but the internal configuration is the same (see FIG. 13). For this reason, the same reference numerals as those of the ON signal generation circuit shown in FIG. 5 (FIG. 6) are used as the reference numerals of the OFF signal generation circuit shown in FIG. 12 (FIG. 13).

  Here, since it is assumed that the power supply voltages V1, V3, and V2 are turned off in this order, as shown in FIG. 14, the off signal off_1st becomes V1_OFF, the off_2st becomes V3_OFF, and the off_3st becomes V2_OFF. As a result, every 10 ms after the end signal POWER_OFF is turned on, the power supply voltages V1, V3, and V2 are turned off in this order.

  As described above, according to the power supply control device according to the second embodiment, the off information that defines the order and timing of turning off the plurality of power supplies is stored, and the plurality of power supplies are controlled based on the off information. Since the turn-off order and timing are controlled, the turn-off can be turned off in an order and timing different from the turn-on order and timing. In addition, the power supply timing sequence can be easily changed simply by changing the off information.

  As described above, according to the present invention, it is possible to provide a power control device and a power control method capable of easily changing the timing sequence of power supply.

[Other embodiments]
As described above, the present invention has been described according to the first to second embodiments. However, it should be understood that the descriptions and drawings constituting a part of this disclosure are exemplary and limit the present invention. should not do. From this disclosure, various alternative embodiments, examples and operational techniques will be apparent to those skilled in the art.

  As described above, the present invention includes various embodiments not described herein. For example, although the configuration of the power supply control device has been described here, it can also be realized as a power supply control method using a characteristic processing unit included in the power supply control device as a process.

  Since the power supply control device and the power supply control method according to the present invention can be applied to a system power supply IC that supplies a plurality of power supply voltages, it can be applied to various electronic devices such as mobile phones and personal computers. It is.

10. Register (storage unit)
20 ... MUX (selection unit)
30 ... Power supply control unit 41 ... Voltage V1 supply circuit 42 ... Voltage V2 supply circuit 43 ... Voltage V3 supply circuit

Claims (9)

A storage unit that stores ON information that defines the order and timing of turning on a plurality of power supplies;
A selection unit for selecting the on-information stored in the storage unit;
A power supply control unit comprising: a power supply control unit that controls the order and timing of turning on the plurality of power supplies based on on information selected by the selection unit. The storage unit stores a plurality of pieces of on information in association with predetermined environmental conditions or operation conditions,
The power supply control device according to claim 1, wherein the selection unit, when given the predetermined environmental condition or operation condition, selects on-information corresponding to the environmental condition or operation condition.   The power supply control device according to claim 1, wherein the storage unit stores a value indicating an turn-on order for each region corresponding to each power supply included in the plurality of power supplies.   3. The power supply control device according to claim 1, wherein the storage unit stores a value indicating an individual power supply included in the plurality of power supplies for each region corresponding to the turn-on order. 4.   5. The power supply control device according to claim 3, wherein the storage unit stores information indicating that the power supply is not used in an area that defines an order in which a plurality of power supplies are turned on.   6. The storage unit according to claim 1, wherein the storage unit stores a value indicating a time from when the n-th power source is turned on to when the (n−1) -th power source is turned on. Power supply control device.   The power supply control unit generates a plurality of ON signals based on the timing specified in the ON information, and selectively generates the generated ON signals in the voltage supply circuit based on the order specified in the ON information. The power supply control device according to claim 1, wherein the power supply control device is input. The storage unit stores off information that defines the order and timing of turning off a plurality of power supplies,
The selection unit selects off-information stored in the storage unit,
The power supply control unit according to any one of claims 1 to 7, wherein the first-stage power supply control unit controls the order and timing of turning off the plurality of power supplies based on the off information selected by the selection unit. Control device. A storage step of storing ON information defining the order and timing of turning on a plurality of power supplies;
A selection step of selecting the on-information stored in the storage step;
A power control step of controlling the order and timing of turning on the plurality of power sources based on the on information selected in the selection step.

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