JP2013106224A - Imaging apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an afterimage effect to a moving image to be displayed, thereby preventing the sight of a main subject from being lost even when a composition changes drastically.SOLUTION: An imaging apparatus comprises: a photodiode 101 which generates and accumulates optical charge; a transfer transistor 102 which is connected to the photodiode and transfers the optical charge; and an accumulation capacitor which is connected to the transfer transistor and accumulates the optical charge therein. The imaging apparatus has: a first drive mode of executing reset of electric charge accumulated in the accumulation capacitor during the accumulation of the optical charge by the photodiode; and a second drive mode of not executing the reset of the electric charge.

Description

  The present invention relates to an improvement of an imaging apparatus for generating an image, and more particularly to an imaging apparatus capable of adding an afterimage effect to continuously generated images.

  As a function of an imaging device for generating an image, it is well known that there are a still image mode for capturing only one scene and a moving image mode for capturing a plurality of continuous scenes. In addition, various imaging devices capable of displaying and recording these captured still images and moving images have been commercialized.

  By the way, when an object that moves at high speed using an electronic shutter is captured and displayed in the moving image mode, there is a problem that an unnatural image is formed as a moving image. As a countermeasure, in Patent Document 1, the charge accumulated in the photosensitive portion and the transfer process are alternately repeated within a predetermined time during one field (one frame), and the charge is eliminated. Proposals have been made to generate a natural and continuous high-resolution image having an afterimage effect by controlling the amount.

JP 2001-197373 A

  In general, these imaging devices also have a function of displaying an image captured in a moving image mode on a display device in order to determine the composition of the subject, but there are a plurality of similar subjects such as crowds, and the surrounding luminance is dark. If the composition changes suddenly in some cases, the main subject is lost.

  This will be described with reference to FIG.

  FIGS. 9A and 9B show how the composition is changed from FIG. 9A to FIG. 9B when a night sky star is imaged. In this way, when a star is a main subject, there are many similar stars in the surrounding area and the surrounding area is dark, so the target star is often lost.

  In order to avoid losing sight of the main subject at the time of such composition change, it is conceivable that the moving image to be displayed has an afterimage effect so that the main subject can be easily tracked.

  FIG. 9C is a diagram for explaining this, in which the star of the main subject is represented by a thick line and the afterimage is represented by a line. Even when the composition is changed from FIG. 9A to FIG. 9C, it can be seen that the star of the main subject is easy to track because of the afterimage.

  As a technique for giving an afterimage effect, there is the above-mentioned Japanese Patent Application Laid-Open No. 2001-197373. This technique is a technique for giving an afterimage effect within one frame, although it has an effect of naturally displaying a subject moving at high speed. Since the afterimage effect cannot be obtained over several frames, the desired tracking effect cannot be obtained.

  Further, it is conceivable that the captured continuous images are stored in the memory and the afterimage effect is obtained by the subsequent image processing, but there is a concern that the processing circuit scale becomes large.

The present invention is proposed in view of the above problems, and as means for giving an afterimage effect,
A photodiode that receives light to generate and store a photocharge, a transfer transistor that is connected to the photodiode and transfers the photocharge, and a storage capacitor that is connected to the transfer transistor and stores the photocharge. ,
A first drive mode for executing reset of the charge accumulated in the storage capacitor while the photodiode is accumulating photoelectric charge;
The photodiode has a second drive mode in which the reset of the charge accumulated in the storage capacitor is not executed while the photocharge is being accumulated.

In addition, the imaging device reads out a signal in which the photodiode accumulates photocharges, and displays the read signal as an image;
There is a still image shooting mode in which only one frame of the signal is read and displayed, and a moving image shooting mode in which the reading and display of the signal are repeated in a plurality of consecutive frames. To drive.

  According to the present invention, a moving image to be displayed can have an afterimage effect so that the main subject can be easily tracked. Therefore, there are a plurality of similar subjects such as a crowd during a so-called EVF operation for determining the composition of the subject. Even when the composition changes suddenly when the ambient brightness is low, it is possible to prevent the main subject from being lost.

  In particular, even when a star in the night sky is imaged, it is possible to prevent the target star from being lost.

  In addition, it is possible to provide a natural image that normally has no afterimage effect by limiting the drive to give an afterimage effect to a so-called EVF operation or only when the subject brightness is low.

Pixel configuration diagram in the first embodiment of the present invention 1 is a configuration diagram of an image sensor in a first embodiment of the present invention. Timing chart for explaining the second mode of the first and second embodiments of the present invention (No. 1) Timing chart for explaining the second mode of the first and second embodiments of the present invention (No. 2) Pixel configuration diagram in the second embodiment of the present invention Pixel configuration diagram in the third embodiment of the present invention Timing chart for explaining the third embodiment of the present invention 1 is an overall configuration diagram of an image pickup apparatus according to a first embodiment of the present invention. The flowchart explaining operation | movement of the imaging device in 1st Example of this invention. A diagram for explaining a conventional example

[Example 1]
FIG. 1 is a diagram illustrating an embodiment of an imaging device of the present invention, and is a circuit diagram illustrating a configuration example of a pixel cell Pixel of a CMOS type solid-state imaging device.

  The photodiode (PD) 101 that generates the optical signal charge is grounded on the anode side in this example. The cathode side of the photodiode (PD) 101 is connected to the gates of the floating diffusion (Cfd) 107 and the amplification MOS transistor (Tsf) 104 via the transfer MOS transistor (Tx1) 102. The gate potentials of the floating diffusion (Cfd) 107 and the amplification MOS transistor (Tsf) 104 are reset to a fixed potential by being short-circuited to the common power supply (VDD) by the reset MOS transistor (Tres) 103. Further, the amplification MOS transistor (Tsf) 104 has a drain connected to the power supply VDD and a source connected to the drain of the selection MOS transistor (Tsel) 105. Further, the source of the selection MOS transistor (Tsel) 105 is connected to a common vertical output line (Vline) 106 in the same column, thereby outputting a pixel. Further, a pixel memory (Cm) 109 is connected in parallel with the floating diffusion (Cfd) 107 via a transfer MOS transistor (Tx2) 108. A portion surrounded by a broken line constitutes one pixel, and pixels of m rows × n columns are arranged in the imaging apparatus.

  The gate of the transfer MOS transistor (Tx1) 102 is connected to a first row selection line (vertical scanning line) ptx1 arranged extending in the horizontal direction. The gates of similar transfer MOS transistors 102 of other pixel cells Pixel arranged in the same row are also commonly connected to the first row selection line Ptx1.

  The gate of the reset MOS transistor 103 is connected to a second row selection line (vertical scanning line) pres arranged extending in the horizontal direction. The gates of similar reset MOS transistors 103 of other pixel cells Pixel arranged in the same row are also commonly connected to the second row selection line pres.

  The gate of the selection MOS transistor 105 is connected to a third row selection line (vertical scanning line) psel that extends in the horizontal direction. The gates of similar selection MOS transistors 105 of other pixel cells Pixel arranged in the same row are also commonly connected to the third row selection line psel.

  The gate of the transfer MOS transistor (Tx2) 108 is connected to a fourth row selection line (vertical scanning line) ptx2 arranged extending in the horizontal direction. The gates of similar transfer MOS transistors 108 of other pixel cells Pixel arranged in the same row are also commonly connected to the fourth row selection line ptx2.

  These first to fourth row selection lines ptx1, pres, psel, ptx2 are connected to a vertical shift register (not shown) and supplied with a signal voltage. In the remaining rows, pixel cells Pixel having the same configuration and row selection lines are provided, and similarly, signal voltages formed by a vertical shift register (not shown) are sequentially supplied to read out all pixel signals. The configuration is possible.

  FIG. 3 is a timing chart for controlling whether or not the afterimage effect is produced in the CMOS type image pickup device of FIG. 1. First row selection lines Pres_1, Ptx1_1, Ptx2_1 pulse Second row selection lines Pres_2, Ptx1_2, Ptx2_2 pulse timing, pulse (N reading) timing for transferring the signal immediately after reset of each pixel in the first and second rows to the subsequent memory, and a pulse for transferring the photoelectric charge signal to another memory in the subsequent stage (S reading) timing is shown. φPH is a horizontal shift register pulse. By this pulse, all pixel signals in one row (for n columns) are further sent to a processing circuit (not shown) in the subsequent stage.

  Although only the pulse signals in the first and second rows are shown here, the pulse signals for m rows are actually supplied.

  The Psel signal is omitted here because it is only output for each row. Further, the charge of the photodiode (PD) 101 in the first row and the potential of the floating diffusion (Cfd) 107 and the pixel memory (Cm) 109 at each timing are shown as Vcfd and Vcm, respectively.

  FIG. 2 is a configuration diagram of the image sensor in the first embodiment of the present invention, and shows a state in which pixels are arranged in 3 rows × 3 columns.

  The driving pulse common to each row is output from the vertical scanning circuit, the vertical output line signal of each column is input to the post-processing circuit in the vertical scanning circuit, and the subsequent signals are transferred to the subsequent circuit by the horizontal scanning circuit.

  The operation when the afterimage effect is produced will be described with reference to FIG.

  First, Pres_1, Pres_2, Ptx1_1, Ptx2_1, Ptx1_2, and Ptx2_2 pulses are changed from “L” to “H” to “L” at the timing of T1, thereby turning on / off Tres, Tx1, and Tx2. The PD 101, Cm 109, and Cfd 107 are reset by connecting / disconnecting them to / from the power supply VDD. At that time, the charge of the PD 101 is zero, and the potentials Vcfd and Vcm are predetermined potentials corresponding to VDD.

  Immediately after that, the first row all column pixels are selected (not shown), and the first row N reading pulse is changed from “L” → “H” → “L”, so that Vcfd for the first row all columns is set. The data is stored in the subsequent memory through the vertical output line (Vline) 106 (N reading).

  After that, by changing the Ptx1_1 and Ptx2_1 pulses from “L” to “H” to “L” at the timing of T2, the Tx1 and Tx2 in the first row are turned on / off and generated in the PD 101 for all columns in the first row. The charge Q is completely transferred to the floating diffusion (Cfd) 107 and the pixel memory (Cm) 109.

  The charge Q at this time is divided into a floating diffusion capacitor Cfd and a pixel memory capacitor Cm, and becomes a Vcfd potential and a Vcm potential. However, since the PD 101 has just been reset, almost no charge is accumulated, and Qpd, Vcfd, and Vcm are almost equivalent to those when reset, and this is indicated by Qpd, Vcfd, and Vcm in FIG. ing.

  Immediately after the charge of the PD 101 in the first row is completely transferred, the next accumulation in the PD 101 in the first row is started.

  Immediately thereafter, the S reading pulse is changed from “L” → “H” → “L”, and Vcfd for the first column and all the columns is stored in another memory at the subsequent stage via the vertical output line (Vline) 106 (S reading).

  Thereafter, while the S-reading signal-N-reading signal is calculated by the subsequent processing circuit (not shown), all the pixel signals (for n columns) in one row are further processed by the horizontal shift register pulse φPH (not shown). )

  When the signal transfer of the first row is completed, the second row is selected (not shown), and the N-reading pulse of the second row is changed from “L” to “H” to “L”, so that all columns in the first row Vcfd is stored in the subsequent memory via the vertical output line (Vline) 106 (N reading). After that, by changing the Ptx1_2 and Ptx2_2 pulses from “L” → “H” → “L”, the Tx1 and Tx2 in the second row are turned on / off, and the charge Q generated in the PD101 for the entire second row is floating. Completely transferred to the diffusion (Cfd) 107 and the pixel memory (Cm) 109.

  Immediately after the charge of the PD 101 in the second row is completely transferred, the next accumulation in the PD 101 in the second row is started.

  Immediately thereafter, the S reading pulse is changed from “L” → “H” → “L”, so that the Vcfd for the second row and all the columns is stored in another memory in the subsequent stage via the vertical output line (Vline) 106 (S reading).

  Thereafter, while the S-reading signal-N-reading signal is calculated by the subsequent processing circuit (not shown), all the pixel signals (for n columns) in one row are further processed by the horizontal shift register pulse φPH (not shown). )

  By repeating this operation from the first line to the m-th line, signals of all pixels of the image sensor are read out. In FIG. 2, the operation is omitted with two diagonal lines, and the operation up to this point is the operation of the 1st frame.

  Next, only Pres_1 pulse is changed from “L” to “H” to “L” at the timing of T3 to turn on / off Tres for all columns in the first row to connect / disconnect Cfd107 to / from power supply VDD. To reset. At that time, the PD 101 continues to accumulate, and the Cm 109 is not reset. Therefore, the Vcfd potential becomes a predetermined potential corresponding to VDD, but the potential of the previous frame remains as it is for Vcm. However, since Vcm is almost reset in the previous frame, it is almost equivalent to the reset state here.

  Immediately thereafter, the N reading pulse is changed from “L” → “H” → “L”, so that Vcfd for the first row and all columns is stored in the subsequent memory via the vertical output line (Vline) 106 (N reading).

  After that, by changing the Ptx1_1 and Ptx2_1 pulses from “L” to “H” to “L” at the timing of T4, the charge Q1 generated in the PD 101 is floated by turning on and off Tx1 and Tx2 for all columns in the first row. Completely transferred to the diffusion (Cfd) 107 and the pixel memory (Cm) 109.

  At this time, since Cm 109 is not reset, a part of the charge Q of the previous frame Q × (Cm / (Cfd + Cm)) and the newly accumulated charge Q1 are added on Cfd and Cm. Convergence is caused by the potential, and this state is indicated by Vcfd and Vcm in FIG. However, since the charge Q of the PD 101 was almost in the reset state in the previous frame, the Cm 109 is almost equivalent to the reset state, and the newly accumulated charge Q1 is directly distributed to Cfd and Cm.

  Immediately after the charge of the PD 101 in the first row is completely transferred, the next accumulation in the PD 101 in the first row is started.

  Immediately thereafter, the S reading pulse is changed from “L” → “H” → “L”, and Vcfd for the first column and all the columns is stored in another memory at the subsequent stage via the vertical output line (Vline) 106 (S reading).

  Subsequent processing is similar to the 1st frame. While the S reading signal-N reading signal is calculated by a subsequent processing circuit (not shown), all the pixel signals (for n columns) in one row are output by the horizontal shift register pulse φPH. Further, it is sent to a subsequent processing circuit (not shown).

  Only the Pres_2 pulse is changed from “L” to “H” to “L” during horizontal transfer of the first row signal, thereby turning on / off Tres for all the second row columns and connecting Cfd 107 to the power supply VDD / When the horizontal transfer of the first line signal is completed, the second line is selected (not shown). As with the first line, a series of N reading, PD charge complete transfer, S reading, and horizontal transfer is performed. Perform the operation. Although the following description is omitted, it is assumed that the same operation as the 1st frame is performed. In FIG. 2, the operation is omitted with two oblique lines, and the operation up to this point is the operation of the 2nd frame.

  Next, only Pres_1 pulse is changed from “L” to “H” to “L” at the timing of T5 to turn on / off Tres for all columns in the first row to connect / disconnect Cfd107 to / from power supply VDD. To reset. At that time, the PD 101 continues to accumulate, and the Cm 109 is not reset. Therefore, the Vcfd potential becomes a predetermined potential corresponding to VDD, but the potential of the previous frame remains as it is for Vcm.

  Immediately thereafter, the N reading pulse is changed from “L” → “H” → “L”, so that Vcfd for the first row and all columns is stored in the subsequent memory via the vertical output line (Vline) 106 (N reading).

  After that, Ptx1_1 and Ptx2_1 pulses are changed from “L” to “H” to “L” at the timing of T6 to turn on / off Tx1 and Tx2 for all the columns in the first row and to float the charge Q2 generated in the PD101. Completely transferred to the diffusion (Cfd) 107 and the pixel memory (Cm) 109.

  At this time, since Cm 109 is not reset, the charge obtained by adding a part Q1 × (Cm / (Cfd + Cm)) of the charge Q1 of the previous frame and the newly accumulated charge Q2 is divided on Cfd and Cm. Convergence is caused by the potential, and this state is indicated by Vcfd and Vcm in FIG.

  Immediately after the charge of the PD 101 in the first row is completely transferred, the next accumulation in the PD 101 in the first row is started.

  Immediately thereafter, the S reading pulse is changed from “L” → “H” → “L”, and Vcfd for the first column and all the columns is stored in another memory at the subsequent stage via the vertical output line (Vline) 106 (S reading).

  Subsequent processing is similar to the 1st frame. While the S reading signal-N reading signal is calculated by a subsequent processing circuit (not shown), all the pixel signals (for n columns) in one row are output by the horizontal shift register pulse φPH. Further, it is sent to a subsequent processing circuit (not shown).

  When the horizontal transfer of the first row signal is completed, the second row is selected (not shown), and the same operation as the 2nd frame is performed. In FIG. 2, the operation is omitted with two oblique lines, and the operation up to this point is the operation of the 3rd frame.

Thereafter, if these operations are repeated, after the timing of T6,
Total charge of previous frame x (Cm / (Cfd + Cm))
Will always be added. This means that an afterimage effect is produced.

  Specifically, this effect is obtained by not resetting Cm109 in the second and subsequent frames.

  FIG. 3B is a timing chart for performing control that does not produce an afterimage effect in the CMOS type image pickup apparatus of FIG. 1. The difference from FIG. 2 is that the Pres_1 and Pres_2 pulses are changed from “L” to “ By changing Ptx2_1 and Ptx2_2 from “L” to “H” to “L” at the timing of “H” → “L”, Cm109 and Cfd107 are respectively reset. Therefore, the afterimage effect cannot be obtained as shown in FIG. 2, and Vfd becomes a potential corresponding to only the charge accumulated in the PD 101 for each frame.

  With the pixel configuration of FIG. 1, the afterimage effect can be obtained by the driving method of FIG. 2, and the afterimage effect cannot be obtained by the driving method of FIG. 3B. (Still image mode and movie mode) can be used properly.

  Here, when the subject composition is fixed by the driving method of FIG. 2, Vfd continues to change unnaturally due to the influence of the charge of the previous frame, but by making the relationship Cfd> Cm, Vfd is unnatural. Change can be prevented as much as possible.

  Next, the operation of the imaging apparatus such as a digital camera will be described.

  FIG. 7 is a block diagram illustrating a configuration of an imaging apparatus such as a digital camera. In the figure, reference numeral 701 denotes an image sensor, and a CCD or CMOS sensor is used.

  Reference numeral 702 denotes a signal processing circuit AFE that amplifies a signal from the image sensor and performs AD conversion and the like. Reference numeral 703 denotes a DSP (Digital Signal Proseccer) that performs various correction processes on the data from the signal processing circuit 702.

  The DSP 703 controls various memories such as the ROM 706 and the RAM 707 and writes video data to the recording medium 708.

  Reference numeral 704 denotes a TG (Timing Generator) that is a timing generation circuit that supplies a clock signal and a control signal to the image sensor 701, the signal processing circuit 702, and the DSP 703, and is controlled by the CPU 705.

  Reference numeral 705 denotes a CPU that controls the DSP 703 and TG 704 and controls camera functions using various parts (not shown) such as photometry and distance measurement. Each of the switches 709 to 711 is connected, and processing corresponding to each state is executed.

  A ROM 706 stores a camera control program, a correction table, and the like. Reference numeral 707 denotes a RAM that temporarily stores video data and correction data processed by the DSP 703. The RAM 707 can be accessed at a higher speed than the ROM 706.

  Reference numeral 708 denotes a recording medium such as a compact flash (registered trademark) card (hereinafter referred to as “CF”) that stores captured images, and is connected to a camera via a connector (not shown).

  709 is a power switch for starting the camera, 710 is photometry processing, distance measurement processing, and shutter switches SW1 and 711 for instructing start of photographing preparation operation such as so-called EVF operation for displaying the subject image in real time are not shown. A shutter switch SW2 that drives a mirror and a shutter and instructs the start of a series of imaging operations to write a signal read from the imaging device 701 to the recording medium 708 via the signal processing circuit 702 and the DSP 703. Reference numeral 712 denotes a mode dial switch for instructing a camera shooting mode (for example, continuous shooting (moving image) mode, single shooting mode, strobe light emission mode, etc.), 713 denotes a distance measuring circuit for measuring the distance to the subject, and 714 A photometric circuit 715 for measuring subject luminance is a display device for displaying a photographed image on the outside.

  FIG. 8 is a flowchart for explaining the operation of the image pickup apparatus having the configuration of FIG. 7 using the image pickup element of FIG.

  First, in step 801, it is determined whether or not the 709 power switch is ON. If it is OFF, step 801 is repeated. If it is ON, it is determined in step 802 whether or not the switch 710SW1 for starting the shooting preparation operation is ON. If it is OFF, the process returns to step 801, and if it is ON, the process proceeds to step 803.

  In step 803, the distance to the subject is measured by the distance measuring circuit 713 and the luminance of the subject is measured by the photometric circuit 714. In the next step 804, light is made incident on an unillustrated mechanical shutter opening image pickup device.

  Thereafter, in step 805, if the photometric result in step 803 is darker than the preset luminance, it is determined that the night scene shooting includes a star and the process proceeds to step 806, and the pixel memory described in FIG. 2 is not reset. Accumulation and readout are performed by a driving method (second mode) that produces an afterimage effect. If the subject brightness is bright in step 805, it is determined that the subject is photographed except for the night scene, and the process proceeds to step 807, where the pixel memory described in FIG. 3B is reset and the afterimage effect is not produced (first mode). Accumulation and readout are performed at.

  In the next step 808, video is displayed on the external display device 715. In step 809, it is determined whether or not the switch 711SW2 for starting still image shooting is ON. If it is OFF, the process returns to step 802 to return to the next. Move on to frame operation. That is, the operation from step 802 to step 809 performs a so-called EVF operation in which shooting and display are continuously performed.

  If it is determined in step 809 that the switch 711SW2 is ON, the process proceeds to step 810. Based on the photometry and distance measurement information obtained in step 803, the image sensor is stored with the optimum exposure and focus position as a still image. The pixel memory described in 3 (b) is reset to perform the driving method (first mode) that does not produce an afterimage effect. Since this is still image shooting, the mechanical shutter is first closed and then the drive of FIG. 3B is started, and the operation of the first frame is performed. Based on the photometric information, the mechanical shutter (not shown) is stored during the accumulation period of all rows. When a predetermined exposure amount is reached in step 811, a mechanical shutter (not shown) is closed.

  Thereafter, in step 812, all the pixels are read out by performing the operation (first mode) of the second frame in FIG. 3B. In step 813, the image is displayed on the external display device 715. In step 814, the still image is displayed. The video signal is recorded on the 708 recording medium and the process ends.

  That is, in steps 802 to 809, when the subject (ambient) brightness is low, it is determined that the night scene shooting includes stars. If so-called EVF operation is performed at this time, the main subject may be lost when the shooting composition is changed. As a result, accumulation and readout are performed by a driving method (second mode) that produces an afterimage effect, so that the main subject can be easily tracked.

  In addition, when the subject (ambient) brightness is bright or when shooting a still image, driving is performed so as not to produce an afterimage effect (first mode), so that a natural image that is not affected by the previous frame can be obtained.

  Here, although the switch 711SW2 is a switch for starting still image shooting in step 809, the switch 711 may be a switch for starting moving image recording. In other words, during so-called EVF operation, an afterimage effect may or may not be produced depending on the subject situation (brightness), but accumulation and readout are performed by a driving method (first mode) that does not produce an afterimage effect during moving image recording. The recorded video can be a natural video that is not affected by the previous frame.

  In addition, it is possible to provide a natural image that normally has no afterimage effect by limiting the drive to give an afterimage effect to a so-called EVF operation or only when the subject brightness is low.

[Example 2]
FIG. 4 is a diagram showing a second embodiment of the imaging device of the present invention, and is a circuit diagram showing a configuration example of a pixel cell Pixel of a CMOS type solid-state imaging device.

  Since the steps 401 to 407 in the figure are the same as the steps 101 to 107 in FIG.

  Pixel memories (Cm2, Cm3, Cm4) 409, 411, 413 are connected to the floating diffusion (Cfd) 407 in parallel with transfer MOS transistors (Tx2, Tx3, Tx4) 408, 410, 412. The capacity of Cm2 <Cm3 <Cm4.

  The SI_Data signal common to all the pixels is data for selecting a pixel memory, and is input to the selector 417, and the output tx2, tx3, tx4 and the transfer signal ptx2 are input to the AND gates 414, 415, 416, and the pixel memory. Cm2 to Cm4 are selectively connected.

  Signals are input to the first to fourth row selection lines ptx1, pres, psel, and ptx2 in the same configuration as in FIG. 1, and the same signals as in FIG.

  Also in the configuration of FIG. 4, the afterimage effect can be obtained by the driving method of FIG. 2, and the afterimage effect cannot be obtained by the driving method of FIG. (Still image mode and movie mode) can be used properly.

  In addition, since the amount of afterimage can be controlled by selecting which of the pixel memories Cm2, Cm3, and Cm4, for example, in order to obtain a certain afterimage effect while suppressing variations in memory capacity during manufacturing, and depending on the situation It is possible to change the afterimage effect.

[Example 3]
FIG. 5 is a diagram showing a third embodiment of the imaging device of the present invention, and is a circuit diagram showing a configuration example of a pixel cell Pixel of a CMOS type solid-state imaging device.

  In this example, the photodiode (PD) 501 that generates the optical signal charge is grounded on the anode side. The cathode side of the photodiode (PD) 501 is connected to the gates of the floating diffusion (Cfd) 507 and the amplification MOS transistor (Tsf) 504 via transfer MOS transistors (Tx1) 502 and (Tx2) 508. The gate potentials of the floating diffusion (Cfd) 507 and the amplification MOS transistor (Tsf) 504 are reset to a fixed potential by being short-circuited to the common power supply (VDD) by the reset MOS transistor (Tres1) 503. The photodiode (PD) 501 is reset with accumulated charge by being short-circuited with a common power supply (VDD) by a reset MOS transistor (Tres2) 510. Further, the amplification MOS transistor (Tsf) 504 has a drain connected to the power supply VDD and a source connected to the drain of the selection MOS transistor (Tsel) 505. Further, the source of the selection MOS transistor (Tsel) 505 is connected to a common vertical output line (Vline) 506 in the same column, thereby outputting a pixel. Further, the pixel memory (Cm) 509 is connected between the transfer MOS transistors (Tx1) 502 and (Tx2) 508, and the pixel memory (Cm) 509 is turned on by turning on the transfer MOS transistor (Tx2) 508. A floating diffusion (Cfd) 507 can be connected in parallel. A portion surrounded by a broken line constitutes one pixel, and pixels of m rows × n columns are arranged in the imaging apparatus.

  That is, the difference from FIG. 1 is the difference in the arrangement of the transfer MOS transistor (Tx2) 508 and the pixel memory (Cm) 509, and the dedicated reset MOS transistor (Tres2) 510 on the cathode side of the photodiode (PD) 501 and its control. This is a point where the line Pres2 is arranged.

  FIG. 6 is a timing chart for controlling when the afterimage effect is produced and when the afterimage effect is not produced (Ptx2 broken line) in the CMOS image pickup apparatus of FIG.

  The difference from FIG. 3 is that a dedicated reset MOS transistor (Tres2) 510 and its control line Pres2 are arranged on the cathode side of the photodiode (PD) 501 in FIG. The other pulses are the same drive method as in FIG.

  In the Pres2 pulse, PD501, Cm509, and Cfd507 are respectively reset by changing "L" → "H" → "L" at the same timing as Pres1_1 and Pres1_2 for the first frame.

  By driving at such timing, it is possible to produce an afterimage effect or no afterimage effect as in the configuration of FIG.

701: Image sensor 702: AFE (analog front end)
703: DSP (DigitalSignalProseccer)
704: Timing generation circuit 705: CPU
506: ROM
707: RAM
708: Recording medium 709: Power switch 510: Shutter switch SW1
711: Shutter switch SW2
712: Mode dial 713: Distance measuring circuit 714: Photometric circuit 715: Display device
101, 401, 501: Photodiode 102, 103, 104, 105, 108, 402, 403, 404, 405, 408, 410, 412, 502, 503, 404, 505, 508, 510: MOS transistors 107, 407, 507: floating diffusion 109, 409, 411, 413, 509: pixel memory 506: vertical output line

Claims (4)

A photodiode that receives light to generate and store a photocharge, a transfer transistor that is connected to the photodiode and transfers the photocharge, and a storage capacitor that is connected to the transfer transistor and stores the photocharge. ,
A first drive mode for executing reset of the charge accumulated in the storage capacitor while the photodiode is accumulating photoelectric charge;
An image pickup apparatus comprising: a second drive mode in which resetting of charge accumulated in the storage capacitor is not executed while the photodiode is accumulating photoelectric charge. The imaging apparatus according to claim 1, further comprising: a plurality of storage capacitors having different capacities for storing the photoelectric charges, and selection means for selecting the plurality of storage capacitors. The imaging apparatus reads out a signal in which the photodiode accumulates photocharges, and displays the read signal as an image;
There is a still image shooting mode in which only one frame of the signal is read and displayed, and a moving image shooting mode in which the reading and display of the signal are repeated in a plurality of consecutive frames. The imaging apparatus according to claim 1, wherein the imaging apparatus is driven. 4. The imaging apparatus according to claim 1, further comprising means for measuring ambient brightness including a subject, and driving in the second drive mode when the ambient brightness is darker than a predetermined brightness. The imaging device according to any one of the above.