JP2013105894A - Thin film transistor device, manufacturing method of the same, organic el display element and organic el display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a thin film transistor device having high quality, which inhibits mixture of organic semiconductor inks with each other when the organic semiconductor inks are applied to an inside of each of neighboring openings; provide a manufacturing method of the thin film transistor device, and provide an organic EL display element and an organic EL display device.SOLUTION: In a thin film transistor device, a lateral face 1016e of a barrier 1016 on the side of a neighboring opening 1016c, among lateral faces facing an opening 1016b forms a relatively steep slope compared with other lateral faces including a lateral face 1016d. In the thin film transistor device, a lateral face 1016f of a barrier 1016 on the side of a neighboring opening 1016b, among lateral faces facing the opening 1016c forms a steeper slope compared with other lateral faces including a lateral face 1016g. When an organic semiconductor ink is applied to an inside of each of the opening 1016b and the opening 1016c, the organic semiconductor inks have surface profiles slanting in an X-axis direction away from each other.

Description

  The present invention relates to a thin film transistor device and a manufacturing method thereof, an organic EL display element, and an organic EL display device.

In a liquid crystal display panel and an organic EL display panel, a thin film transistor device in which a thin film transistor (TFT) element is formed for each subpixel is employed in order to control light emission in units of subpixels. In particular, development of a thin film transistor device using an organic semiconductor material as a semiconductor layer is underway.
As shown in FIG. 15A, an organic TFT device according to the prior art includes, for example, a gate electrode 9012a, 9012b, an insulating layer 9013, source electrodes 9014a, 9014b, and a drain electrode (not shown) on a substrate 9011. Organic semiconductor layers 9017a and 9017b are sequentially stacked. The organic semiconductor layers 9017a and 9017b are formed on the insulating layer 9013 by applying and drying an organic semiconductor ink so as to fill the space between the source electrodes 9014a and 9014b and the drain electrode and to cover them. Is formed.

  Further, as shown in FIG. 15A, a partition wall 9016 is provided on the insulating layer 9013 so as to partition adjacent elements. A plurality of openings 9016a to 9016c are opened in the partition wall 9016. A connection wiring 9015 connected to the drain electrode is exposed at the bottom of the opening 9016a, and an organic semiconductor layer is formed. Absent. The connection wiring 9015 is an electrode for connecting an electrode of a light emitting element formed above the organic TFT device. In addition, organic semiconductor layers 9017 a and 9017 b partitioned from each other are formed in the openings 9016 b and 9016 c of the partition wall 9016.

  An organic TFT device used for a liquid crystal display panel or an organic EL display panel performs light emission control of a light emitting element by inputting a signal to the gate electrodes 9012a and 9012b.

JP 2009-76791 A

However, in the organic TFT device according to the related art, when ink is applied for forming the organic semiconductor layers 9017a and 9017b, the ink dropped on the opening 9016b and the ink dropped on the adjacent opening 9016c Can be mixed. Specifically, as shown in FIG. 15 (b), opening 9016b bored in the partition wall 9016, 9016C in the organic semiconductor ink 90170A, when the applying (dropping) 90170B, as indicated by the arrow _{F 90,} an organic The semiconductor inks 90170a and 90170b may be mixed with each other. In this case, the organic semiconductor layers 9017a and 9017b have an undesired thickness, and when semiconductor layers having different components are to be formed, mixing of the ink causes a decrease in transistor performance. .

In particular, in liquid crystal display panels and organic EL display panels, downsizing of each subpixel is also required due to the demand for refinement, and the distance between the opening 9016b and the opening 9016c is shortened as each subpixel is downsized. Therefore, it is considered that the ink 90170a and the ink 90170b are easily mixed, and the above problem is likely to occur.
The present invention has been made to solve the above-described problems, and when organic semiconductor ink is dropped into each of adjacent openings, the thin film transistor device is provided with high quality by suppressing mixing of the inks of each other. Another object of the present invention is to provide an organic EL display element and an organic EL display device.

Thus, a thin film transistor device according to one embodiment of the present invention has the following characteristics.
A thin film transistor device according to one embodiment of the present invention includes first and second thin film transistor elements arranged adjacent to each other with a space therebetween. Each thin film transistor element includes a gate electrode, a source electrode and a drain electrode that are stacked above the gate electrode, and are arranged in parallel to each other in a direction intersecting the stacking direction, and the gate electrode and the source electrode. And an insulating layer interposed between the source electrode and the drain electrode, and a gap between the source electrode and the drain electrode, and an organic layer formed on the source electrode and the drain electrode and in close contact with the source electrode and the drain electrode. And a semiconductor layer.

  In the thin film transistor device according to one embodiment of the present invention, a partition wall is formed between the organic semiconductor layer in the first thin film transistor element and the organic semiconductor layer in the second thin film transistor element. The partition wall separately surrounds at least a part of each of the source electrode and the drain electrode in the first thin film transistor element and at least a part of each of the source electrode and the drain electrode in the second thin film transistor element, and has a surface It has liquid repellency.

  An opening formed by a partition surrounding at least a part of each of the source electrode and the drain electrode in the first thin film transistor element is defined as a first opening, and each of the source electrode and the drain electrode in the second thin film transistor element is formed. When the opening formed by enclosing at least a part of the partition wall is the second opening, the side surface of the partition facing the first opening includes a slope with a steep slope and a slope with a gentle slope. It is configured.

  In the thin film transistor device according to one embodiment of the present invention, a portion of the side surface facing the first opening in the partition wall on the side adjacent to the second opening is a slope with a relatively steep slope. And

  In the thin film transistor device according to one embodiment of the present invention, the portion of the side wall facing the first opening in the partition wall on the side adjacent to the second opening is a slope with a relatively steep slope. For this reason, when applying the organic semiconductor ink related to the formation of the organic semiconductor layer, the occurrence of a situation in which the organic semiconductor ink applied to the first opening overflows into the adjacent second opening is reliably suppressed. can do.

  Therefore, the thin film transistor device according to the present invention can suppress the mixing of the inks when the organic semiconductor ink is applied (dropped) to each of the adjacent first opening and second opening. Provide quality.

1 is a schematic block diagram showing a schematic configuration of an organic EL display device 1 according to Embodiment 1 of the present invention. 3 is a schematic cross-sectional view showing a part of the configuration of the organic EL display panel 10. FIG. (A) is a schematic plan view showing a partial configuration of the TFT substrate 101, and (b) is a schematic cross-sectional view thereof. (A) is a process flow diagram which shows the outline of the manufacturing method of the organic electroluminescent display panel 10, (b) is a process flowchart which shows the outline of the formation method of the TFT substrate 101. FIG. 5 is a schematic cross-sectional view showing a state in which an organic semiconductor ink is applied during the manufacturing process of the TFT substrate 101. (A)-(c) is a schematic process drawing which shows in order the process which concerns on formation of the partition 1016 among the manufacture processes of the TFT substrate 101. FIG. (A) And (b) is a schematic process drawing which shows in order the process which concerns on formation of the partition 1016 among the manufacture processes of the TFT substrate 101. FIG. FIG. 10 is a schematic process diagram showing one process related to the formation of a partition wall 1016 of the TFT substrate 101 in the manufacturing process of the organic EL display panel according to the second embodiment of the present invention. (A) And (b) is a schematic process diagram which shows in order the partial process which concerns on formation of the partition 1016 of the TFT substrate 101 among the manufacture processes of the organic electroluminescence display panel which concerns on Embodiment 3 of this invention. (A) And (b) is a schematic process diagram which shows in order the partial process which concerns on formation of the partition 1016 of the TFT substrate 101 among the manufacture processes of the organic electroluminescence display panel which concerns on Embodiment 3 of this invention. It is a schematic plan view which shows the structure of the partition 3016 in a TFT substrate among the structures of the organic electroluminescent display panel which concerns on Embodiment 4 of this invention. It is a schematic plan view which shows the structure of the partition 4016 in a TFT substrate among the structures of the organic electroluminescence display panel which concerns on Embodiment 5 of this invention. (A) And (b) is a schematic diagram which shows how to define the inclination-angle of the side part which faces the opening part of the partition in a TFT substrate. (A) is a schematic plan view which shows the opening shape of the opening part in the partition wall in the TFT substrate which concerns on the modification 1, (b) is the opening shape of the opening part in the partition wall in the TFT substrate which concerns on the modification example 2 FIG. 6C is a schematic plan view showing the opening shape of the opening in the partition wall in the TFT substrate according to Modification 3. (A) is sectional drawing which shows a part of structure of an organic TFT apparatus among the structures of the organic EL display apparatus which concerns on a prior art, (b) is a manufacturing process of the organic TFT apparatus based on a prior art FIG. 5 is a cross-sectional view showing a process related to application of organic semiconductor ink.

[Outline of One Embodiment of the Present Invention]
A thin film transistor device according to one embodiment of the present invention includes first and second thin film transistor elements arranged adjacent to each other with a space therebetween. Each thin film transistor element includes a gate electrode, a source electrode and a drain electrode that are stacked above the gate electrode, and are arranged in parallel to each other in a direction intersecting the stacking direction, and the gate electrode and the source electrode. And an insulating layer interposed between the source electrode and the drain electrode, and a gap between the source electrode and the drain electrode, and an organic layer formed on the source electrode and the drain electrode and in close contact with the source electrode and the drain electrode. And a semiconductor layer.

  In the thin film transistor device according to one embodiment of the present invention, a partition wall is formed between the organic semiconductor layer in the first thin film transistor element and the organic semiconductor layer in the second thin film transistor element. The partition wall separately surrounds at least a part of each of the source electrode and the drain electrode in the first thin film transistor element and at least a part of each of the source electrode and the drain electrode in the second thin film transistor element, and has a surface It has liquid repellency.

  An opening formed by a partition surrounding at least a part of each of the source electrode and the drain electrode in the first thin film transistor element is defined as a first opening, and each of the source electrode and the drain electrode in the second thin film transistor element is formed. When the opening formed by enclosing at least a part of the partition wall is the second opening, the side surface of the partition facing the first opening includes a slope with a steep slope and a slope with a gentle slope. It is configured.

In the thin film transistor device according to one embodiment of the present invention, a portion of the side surface facing the first opening in the partition wall on the side adjacent to the second opening is a slope with a relatively steep slope. And
In the thin film transistor device according to one embodiment of the present invention, the portion of the side wall facing the first opening in the partition wall on the side adjacent to the second opening is a slope with a relatively steep slope. For this reason, when applying the organic semiconductor ink related to the formation of the organic semiconductor layer, the occurrence of a situation in which the organic semiconductor ink applied to the first opening overflows into the adjacent second opening is reliably suppressed. can do.

Therefore, the thin film transistor device according to the present invention can suppress the mixing of the inks when the organic semiconductor ink is applied (dropped) to each of the adjacent first opening and second opening. Provide quality.
Here, when the difference in the slope of the side surface facing the first opening in the partition wall is applied as in the thin film transistor device according to one embodiment of the present invention, when the organic semiconductor ink is applied in the formation of the organic semiconductor layer Furthermore, the surface profile of the ink is biased toward the gentle slope side rather than the steep slope side. This is due to the relationship between the contact angle between the side surface of the partition wall and the ink and the surface tension of the ink.

  That is, the side where the second opening, which is the side on which ink overflow is desired to be suppressed, is a relatively steep slope, and the side face on the side where no problem occurs even if it overflows is a relatively gentle slope. By doing so, the surface profile of the ink can be controlled as described above, and the ink applied to the first opening and the ink applied to the second opening are reliably prevented from being undesirably mixed. be able to. Therefore, in the thin film transistor device according to one embodiment of the present invention, as described above, when the organic semiconductor ink is applied (dropped) to each of the adjacent first opening and second opening, mixing of the inks of each other is performed. Can be suppressed, and high quality is provided.

  In the thin film transistor device according to one embodiment of the present invention, in the above structure, the side surface portion facing the second opening in the partition wall is also configured with a slope with a steep slope and a slope with a gentle slope, and the second opening in the partition wall. Of the side surfaces facing the portion, the portion on the side adjacent to the first opening is an inclined surface having a relatively steep slope. As described above, among the side surfaces facing the second opening in the partition wall, the portion on the side adjacent to the first opening also has a relatively steep slope, thereby relating to the formation of the organic semiconductor layer. When the organic semiconductor ink is applied, it is possible to reliably suppress the occurrence of a situation in which the organic semiconductor ink applied to the second opening overflows to the adjacent first opening.

Therefore, in the case of adopting the above configuration, when the organic semiconductor ink is applied (dropped) to each of the adjacent first opening and second opening, mixing of the inks with each other is more reliably suppressed. And high quality.
In the thin film transistor device according to one embodiment of the present invention, in the above structure, the side surface portion facing the second opening portion of the partition wall sandwiches the second opening portion with respect to the portion adjacent to the first opening portion. The opposing portions are slopes with relatively gentle slopes. As described above, among the side portions facing the second opening in the partition wall, the portion facing the second opening with respect to the portion adjacent to the first opening is defined as a relatively gentle slope. As a result, the organic semiconductor ink applied to the inside of the second opening has a surface profile in which the inclination is biased toward a relatively gentle slope. Therefore, the situation where the organic semiconductor ink applied to the inside of the second opening is mixed with the organic semiconductor ink applied to the inside of the first opening can be more reliably suppressed.

Therefore, in the case of adopting the above configuration, when the organic semiconductor ink is applied (dropped) to each of the adjacent first opening and second opening, mixing of the inks with each other is more reliably suppressed. And high quality.
In the thin film transistor device according to one embodiment of the present invention, in the above structure, of the side surfaces facing the second opening in the partition, the other portions except the portion adjacent to the first opening are relatively inclined. It is characterized by a gentle slope. In this way, by making the other part of the side part facing the second opening part except the part adjacent to the first opening part into an inclined surface having a relatively gentle slope, The organic semiconductor ink applied to the inside has a surface profile that is biased toward other portions except the side where the first opening is adjacent. Therefore, the situation where the organic semiconductor ink applied to the inside of the second opening is mixed with the organic semiconductor ink applied to the inside of the first opening can be more reliably suppressed.

Therefore, in the case of adopting the above configuration, when the organic semiconductor ink is applied (dropped) to each of the adjacent first opening and second opening, mixing of the inks with each other is more reliably suppressed. And high quality.
In the thin film transistor device according to one embodiment of the present invention, in the above structure, the side surface portion of the partition facing the first opening portion has the first opening portion sandwiched between the side portion adjacent to the second opening portion. The opposing portions are slopes with relatively gentle slopes. Thus, of the side surface facing the first opening in the partition wall, the portion facing the second opening adjacent to the portion adjacent to the second opening is an inclined surface having a relatively gentle slope. By doing so, the organic semiconductor ink applied to the inside of the first opening has a surface profile in which the inclination is biased toward a relatively gentle slope. Therefore, the situation where the organic semiconductor ink applied to the inside of the first opening is mixed with the organic semiconductor ink applied to the inside of the second opening can be more reliably suppressed.

Therefore, in the case of adopting the above configuration, when the organic semiconductor ink is applied (dropped) to each of the adjacent first opening and second opening, mixing of the inks with each other is more reliably suppressed. And high quality.
In the thin film transistor device according to one embodiment of the present invention, in the above structure, a portion of the side wall portion facing the first opening in the partition except the portion adjacent to the second opening has a relatively gentle slope. It is a slope. In this way, by making the other part of the side part facing the first opening part except the part on the side adjacent to the second opening part into an inclined surface having a relatively gentle slope, The organic semiconductor ink applied inside has a surface profile that is biased toward other portions except the side where the second opening is adjacent. Therefore, the situation where the organic semiconductor ink applied to the inside of the first opening is mixed with the organic semiconductor ink applied to the inside of the second opening can be more reliably suppressed.

Therefore, in the case of adopting the above configuration, when the organic semiconductor ink is applied (dropped) to each of the adjacent first opening and second opening, mixing of the inks with each other is more reliably suppressed. And high quality.
The thin film transistor device according to one embodiment of the present invention is characterized in that the inclination is defined by the size of an angle formed between the side surface of the partition wall and the upper surface of the base layer on which the partition wall is provided.

In the thin film transistor device according to one embodiment of the present invention, among the side surfaces facing the first opening in the partition, the portion on the side adjacent to the second opening which is a relatively steep slope is relatively inclined. The inclination angle is 5 [deg. ] Larger than that.
In the above, it is preferable that the inclination angle of the “slope having a relatively gentle inclination” is, for example, in the range of 25 ° to 30 °. In the above description, it is preferable that the inclination angle of the “slope having a relatively steep inclination” is in the range of 35 ° to 40 °.

  In the organic EL display device according to one aspect of the present invention, the thin film transistor device according to any one of the above aspects, a planarization film provided above the thin film transistor device, and a contact hole that penetrates the planarization film in the thickness direction thereof A lower electrode electrically connected to a drain electrode or a source electrode in the first thin film transistor element or the second transistor element through a contact hole, and formed above the lower electrode. And an organic light emitting layer interposed between the lower electrode and the upper electrode.

As described above, since the organic EL display element according to one embodiment of the present invention includes the thin film transistor device according to one embodiment of the present invention, the above effect can be obtained as it is, and high emission quality can be obtained. Have.
An organic EL display device according to one embodiment of the present invention includes the organic EL display element according to one embodiment of the present invention. As described above, the organic EL display device according to one embodiment of the present invention includes the organic EL display element according to one embodiment of the present invention, and thus has high emission quality as described above.

A manufacturing method of a thin film transistor device according to one embodiment of the present invention includes the following first to sixth steps.
(I) First step: forming first and second gate electrodes adjacent to each other in a state of being spaced apart from each other on the substrate.
(Ii) Second step; an insulating layer is formed so as to cover the first and second gate electrodes.

  (Iii) Third step: On the insulating layer, in correspondence with the first gate electrode, the first source electrode and the first source electrode are spaced apart from each other in a direction intersecting the layer thickness direction of the insulating layer. The first source electrode and the second source electrode are arranged in parallel with each other in the direction intersecting the layer thickness direction of the insulating layer corresponding to the second gate electrode. The drain electrodes are arranged side by side.

(Iv) Fourth step: A photosensitive resist material is laminated on the insulating layer so as to cover the first and second source electrodes and the first and second drain electrodes.
(V) Fifth step; by patterning the laminated photosensitive resist material by mask exposure, at least a part of each of the first source electrode and the first drain electrode, the second source electrode, and the second source electrode At least a part of each of the two drain electrodes is separately surrounded, and a partition wall having liquid repellency is formed.

  (Vi) Sixth step: the inside of the first opening formed by surrounding at least a part of each of the first source electrode and the first drain electrode with the partition, the second source electrode, and the second source electrode An organic semiconductor material is applied to the inside of the second opening formed by surrounding at least a part of each of the drain electrodes with a partition wall and dried, and the first source electrode and the first source electrode are then dried. A first organic semiconductor layer in close contact with the drain electrode and a second organic semiconductor layer in close contact with the second source electrode and the second drain electrode are formed.

  In the method for manufacturing a thin film transistor device according to one aspect of the present invention, in the fifth step, the side surface of the partition facing the first opening is configured with a slope with a steep slope and a slope with a gentle slope. A partition wall is formed so that a portion of the side surface portion facing the first opening portion on the side where the second opening portion is adjacent is an inclined surface having a relatively steep slope.

  In the method for manufacturing a thin film transistor device according to one aspect of the present invention, when forming the partition wall in the fifth step, the portion of the side surface portion facing the first opening portion that is adjacent to the second opening portion is inclined. Since the slope is relatively steep, when the organic semiconductor ink containing the organic semiconductor material is applied to the inside of the first opening, the ink is different from the side adjacent to the second opening, and the slope is relatively The surface profile is biased toward a gentle slope. Thus, in the fifth step, the organic semiconductor ink applied to the inside of the first opening is the organic semiconductor to the portion where the slope in the side surface portion is a steep slope, that is, the side where the second opening is adjacent. Overflow of ink is reliably suppressed, and thereby mixing of the organic semiconductor ink applied to the inside of the first opening and the organic semiconductor ink applied to the inside of the second opening can be suppressed. A high-quality thin film transistor device can be manufactured.

  In the method of manufacturing a thin film transistor device according to one aspect of the present invention, in the fifth step, the side surface portion facing the second opening in the partition wall is also configured with a slope with a steep slope and a slope with a gentle slope. The partition wall is formed so that a portion of the side surface portion facing the second opening portion of the partition wall on the side where the first opening portion is adjacent becomes a relatively steep slope. Thus, in the fifth step, among the side portions facing the second opening in the partition wall, the portion on the side adjacent to the first opening is also formed as a slope with a relatively steep slope. When applying the organic semiconductor ink in the process, it is possible to reliably suppress the occurrence of a situation in which the organic semiconductor ink applied to the inside of the second opening overflows into the adjacent first opening.

Therefore, in the case of adopting the above configuration, the overflow of the organic semiconductor ink to the side where the first opening is adjacent is surely suppressed, so that the organic semiconductor ink applied to the inside of the first opening Mixing with the organic semiconductor ink applied inside the second opening can be suppressed, and a high-quality thin film transistor device can be manufactured.
The following method can be employed as a specific method for forming a slope with a relatively steep slope and a slope with a relatively gentle slope on the side surface facing the first opening.

(1) In the method for manufacturing a thin film transistor device according to one aspect of the present invention, in the fifth step, a portion of the side surface facing the first opening in the partition wall is a portion that is inclined to have a relatively steep slope. It is characterized in that the exposure amount is set larger than the exposure amount for a portion that is intended to be a slope having a relatively gentle slope.
(2) In the method of manufacturing a thin film transistor device according to one aspect of the present invention, in the fifth step, the photosensitive resist material is exposed to a portion of the partition that is to form the side surface facing the first opening. Later, an exposure process is additionally performed on a portion of the side surface facing the first opening in the partition wall, which is intended to be a relatively steep slope.

(3) In the method of manufacturing a thin film transistor device according to one aspect of the present invention, in the fifth step, the portion of the side surface portion facing the first opening in the partition wall that is intended to be a relatively steep slope. The exposure is performed using a mask having a light transmittance larger than the light transmittance of a portion where the slope is relatively gentle.
Even when any of the above methods (1) to (3) is adopted, a slope having a steep slope and a slope having a gentle slope can be reliably formed on the side surface.

In the above description, the term “upward” does not indicate the upward direction (vertically upward) in absolute space recognition, but is defined based on the stacking order in the stacking configuration. Further, the term “upward” is applied not only when there is a gap between them but also when they are in close contact with each other.
Below, the characteristics of the aspect which concerns on this invention, an effect | action and an effect are demonstrated using some specific examples. The present invention is not limited to the following embodiments except for essential characteristic components.

[Embodiment 1]
1. Overall Configuration of Organic EL Display Device 1 Hereinafter, the configuration of the organic EL display device 1 according to Embodiment 1 of the present invention will be described with reference to FIG.
As shown in FIG. 1, the organic EL display device 1 includes an organic EL display panel 10 and a drive control circuit unit 20 connected thereto.

The organic EL display panel 10 is a panel using an electroluminescence phenomenon of an organic material, and a plurality of organic EL elements are arranged in a matrix, for example. The drive control circuit unit 20 includes four drive circuits 21 to 24 and a control circuit 25.
In the organic EL display device 1 according to the present embodiment, the arrangement of the drive control circuit unit 20 with respect to the organic EL display panel 10 is not limited to this.

2. Configuration of Organic EL Display Panel 10 The configuration of the organic EL display panel 10 will be described with reference to the schematic cross-sectional view of FIG. 2 and the schematic plan view of FIG.
As shown in FIG. 2, the organic EL display panel 10 includes a TFT (thin film transistor) substrate 101. A TFT substrate 101 as a TFT device is formed by laminating gate electrodes 1012a and 1012b on a substrate 1011 with a space therebetween, and an insulating layer 1013 is laminated so as to cover the gate electrodes 1012a and 1012b. On the insulating layer 1013, source electrodes 1014a and 1014b are provided corresponding to the gate electrodes 1012a and 1012b, respectively, and as shown in FIG. Drain electrodes 1014c and 1014d are provided at intervals in the axial direction.

As shown in FIGS. 2 and 3A, a connection wiring 1015 is formed on the insulating layer 1013 with a space leftward in the X-axis direction with respect to the source electrode 1014a. Note that the connection wiring 1015 extends from the source electrode 1014a or the drain electrode 1014c, or is electrically connected to one of them.
As shown in FIGS. 2 and 3A, a partition wall 1016 is formed on the insulating layer 1013 so as to surround the connection wiring 1015, the source electrode 1014a and the drain electrode 1014c, and the source electrode 1014b and the drain electrode 1014d. ing. In other words, as shown in FIG. 3A, of the three openings 1016a, 1016b, and 1016c opened in the partition wall 1016, the opening 1016a on the left side in the X-axis direction where the connection wiring 1015 is exposed at the bottom is a channel. It is a part different from the part and functions as a contact part with the anode 103.

On the other hand, an opening 1016b where the source electrode 1014a and the drain electrode 1014c are exposed at the bottom and an opening 1016c where the source electrode 1014b and the drain electrode 1014d are exposed at the bottom are portions that function as channel portions.
Among the regions surrounded by the partition wall 1016, the organic semiconductor layers 1017a and 1017b are respectively formed in the region corresponding to the source electrode 1014a and the drain electrode 1014c and the region corresponding to the source electrode 1014b and the drain electrode 1014d. They are stacked. The organic semiconductor layer 1017a is formed so as to fill the gap between the source electrode 1014a and the drain electrode 1014c and the source electrode 1014a and the drain electrode 1014c, and is in close contact with the electrodes 1014a and 1014c. Similarly, the organic semiconductor layer 1017b is formed in close contact with the electrodes 1014b and 1014d. The organic semiconductor layers 1017a and 1017b are partitioned from each other by a partition wall 1016.

As shown in FIG. 2, a passivation film 1018 is laminated so as to cover the organic semiconductor layers 1017 a and 1017 b and the insulating layer 1013. However, the portion corresponding to the connection wiring 1015 is opened.
The TFT substrate 101 of the organic EL display panel 10 according to the present embodiment has the above configuration.

  Next, as shown in FIG. 2, the TFT substrate 101 is covered with a planarizing film 102. However, a contact hole 102 a is opened on the connection wiring 1015. An anode 103, a transparent conductive film 104, and a hole injection layer 105 are sequentially stacked along the main surface of the planarizing film 102. The anode 103, the transparent conductive film 104, and the hole injection layer 105 are also formed along the side surface of the planarization film 102 facing the contact hole 102a. The anode 103 is in contact with the connection wiring 1015 and is electrically It is connected to the.

A bank 106 is formed on the hole injection layer 105 so as to surround a portion corresponding to a light emitting portion (subpixel). In the opening formed by surrounding the bank 106, a hole transport layer 107, an organic light emitting layer 108, and an electron transport layer 109 are sequentially stacked.
Further, a cathode 110 and a sealing layer 111 are sequentially stacked so as to cover the electron transport layer 109 and the exposed surface of the bank 106, and a CF (color filter) substrate 113 is disposed so as to face the sealing layer 111. The adhesive layer 112 is filled in between and bonded to each other. The CF substrate 113 is configured by forming a color filter 1132 and a black matrix 1133 on the lower main surface in the Z-axis direction of the substrate 1131.

3. Components of Organic EL Display Panel 10 In the organic EL display panel 10, for example, each part can be formed using the following materials.
(I) Substrate 1011
The substrate 1011 is, for example, a glass substrate, a quartz substrate, a silicon substrate, molybdenum sulfide, copper, zinc, aluminum, stainless steel, magnesium, iron, nickel, gold, silver or other metal substrate, a gallium arsenide based semiconductor substrate, or a plastic substrate. Etc. can be used.

  As the plastic substrate, either a thermoplastic resin or a thermosetting resin may be used. For example, polyolefin such as polyethylene, polypropylene, ethylene-propylene copolymer, ethylene-vinyl acetate copolymer (EVA), cyclic polyolefin, modified polyolefin, polyvinyl chloride, polyvinylidene chloride, polystyrene, polyamide, polyimide (PI), Polyamideimide, polycarbonate, poly- (4-methylbenten-1), ionomer, acrylic resin, polymethyl methacrylate, acrylic-styrene copolymer (AS resin), butadiene-styrene copolymer, polio copolymer (EVOH) ), Polyesters such as polyethylene terephthalate (PET), polybutylene terephthalate, polyethylene naphthalate (PEN), precyclohexane terephthalate (PCT), polyethers, polyether ketones , Polyethersulfone (PES), polyetherimide, polyacetal, polyphenylene oxide, modified polyphenylene oxide, polyarylate, aromatic polyester (liquid crystal polymer), polytetrafluoroethylene, polyvinylidene fluoride, other fluororesins, styrene, polyolefin , Polyvinyl chloride, polyurethane, fluoro rubber, chlorinated polyethylene, and other thermoplastic elastomers, epoxy resins, phenol resins, urea resins, melamine resins, unsaturated polyesters, silicone resins, polyurethanes, etc. Main copolymers, blends, polymer alloys and the like can be mentioned, and one or a laminate obtained by laminating two or more of these can be used.

(Ii) Gate electrodes 1012a and 1012b
The gate electrodes 1012a and 1012b are not particularly limited as long as they are conductive materials, for example.
Specific materials include, for example, chromium, aluminum, tantalum, molybdenum, niobium, copper, silver, gold, platinum, platinum, palladium, indium, nickel, neodymium, or an alloy thereof, or zinc oxide or tin oxide. , Conductive metal oxides such as indium oxide and gallium oxide or indium tin complex oxide (hereinafter abbreviated as “ITO”), indium zinc complex oxide (hereinafter abbreviated as “IZO”), aluminum zinc complex oxide (AZO), conductive metal composite oxides such as gallium zinc composite oxide (GZO), or conductive polymers such as polyaniline, polypyrrole, polythiophene, polyacetylene, and acids such as hydrochloric acid, sulfuric acid, sulfonic acid, etc. Lewis acid such as phosphorus hexafluoride, arsenic pentafluoride, iron chloride, iodine Halogen atoms, such as, sodium, obtained by adding a dopant such as a metal atom such as potassium or, and a composite material of the conductive dispersed carbon black or metal particles. Alternatively, a polymer mixture containing fine metal particles and conductive particles such as graphite may be used. These may be used alone or in combination of two or more.

(Iii) Insulating layer 1013
The insulating layer 1013 functions as a gate insulating layer and is not particularly limited as long as it is an insulating material, for example, and any known organic material or inorganic material can be used.
As the organic material, for example, an acrylic resin, a phenol resin, a fluorine resin, an epoxy resin, an imide resin, a novolac resin, or the like can be used.

  Examples of inorganic materials include silicon oxide, aluminum oxide, tantalum oxide, zirconium oxide, cerium oxide, zinc oxide, cobalt oxide and other metal oxides, silicon nitride, aluminum nitride, zirconium nitride, cerium nitride, zinc nitride, Examples thereof include metal nitrides such as cobalt nitride, titanium nitride, and tantalum nitride, and metal composite oxides such as barium strontium titanate and lead zirconium titanate. These can be used alone or in combination of two or more.

Furthermore, the surface treatment agent (ODTS OTS HMDS βPTS) and the like are also included.
(Iv) Source electrodes 1014a and 1014b, drain electrodes 1014c and 1014d, and connection wiring 1015
The source electrodes 1014a and 1014b, the drain electrodes 1014c and 1014d, and the connection wiring 1015 can be formed using the above-described material for forming the gate electrodes 1012a and 1012b.

(V) Organic semiconductor layers 1017a and 1017b
The organic semiconductor layers 1017a and 1017b are not particularly limited as long as they have, for example, semiconductor characteristics and are soluble in a solvent. For example, poly (3-alkylthiophene), poly (3-hexylthiophene) (P3HT), poly (3-octylthiophene), poly (2,5-thienylenevinylene) (PTV) or quarterthiophene (4T), Α-oligothiophenes such as cithiophene (6T) and octathiophene or 2,5-bis (5′-biphenyl-2′-thienyl) -thiophene (BPT3), 2,5- [2,2 ′-(5 , 5'-diphenyl) dithienyl] -thiophene, thiophene derivatives such as poly (para-phenylenevinylene) (PPV), fluorene derivatives such as poly (9,9-dioctylfluorene) (PFO), triallylamine Polymers such as anthracene, tetracene, pentacene and hexacene Cene compounds, 1,3,5-tris [(3-phenyl-6-tri-fluoromethyl) quinoxalin-2-yl] benzene (TPQ1) and 1,3,5-tris [{3- (4-t- Butyl derivatives such as butylphenyl) -6-trisfluoromethyl} quinoxalin-2-yl] benzene (TPQ2), phthalocyanine derivatives such as phthalocyanine, copper phthalocyanine (CuPc) and iron phthalocyanine, tris (8-hydroxyquinolinolate) Organometallic compounds such as aluminum (Alq3) and factory (2-phenylpyridine) iridium (Ir (ppy) 3), C60, oxadiazole polymer, triazole polymer, carbazole polymer and fluorene polymer Polymeric compounds such as polymers and poly (9 9-dioctylfluorene-co-bis-N, N ′-(4-methoxyphenyl) -bis-N, N′-phenyl-1,4-phenylenediamine) (PFMO), poly (9,9-dioctylfluorene- Co-benzothiadiazole) (BT), fluorene-triallylamine copolymer and copolymers with fluorene such as poly (9,9-dioctylfluorene-co-dithiophene) (F8T2). These can be used alone or in combination of two or more.

It is also possible to use an inorganic material soluble in a solvent.
(Vi) Passivation film 1018
The passivation film 1018 can be formed using, for example, a water-soluble resin such as polyvinyl alcohol (PVA), a fluorine resin, or the like.
(Vii) Planarizing film 102
The planarization film 102 is formed using an organic compound such as polyimide, polyamide, or acrylic resin material.

(Viii) Anode 103
The anode 103 is made of a metal material containing silver (Ag) or aluminum (Al). In the case of the organic EL display panel 10 according to this embodiment of the top emission type, it is preferable that the surface portion has high reflectivity.
(Ix) Transparent conductive film 104
The transparent conductive film 104 is formed using, for example, ITO (Indium Tin Oxide) or IZO (Indium Zinc Oxide).

(X) Hole injection layer 105
The hole injection layer 105 may be formed of, for example, an oxide such as silver (Ag), molybdenum (Mo), chromium (Cr), vanadium (V), tungsten (W), nickel (Ni), iridium (Ir), or PEDOT. It is a layer made of a conductive polymer material such as (mixture of polythiophene and polystyrene sulfonic acid). In the organic EL display panel 10 according to the present embodiment shown in FIG. 2, it is assumed that the hole injection layer 105 made of a metal oxide is formed. In this case, a conductive polymer such as PEDOT is used. Compared to the case where a material is used, the hole has a function of injecting holes into the organic light emitting layer 108 stably or by assisting the generation of holes, and has a large work function.

Here, when the hole injection layer 105 is composed of an oxide of a transition metal, a plurality of levels can be obtained by taking a plurality of oxidation numbers. As a result, hole injection is facilitated and the drive voltage is increased. Can be reduced. In particular, it is desirable to use tungsten oxide (WO _X ) from the viewpoint of stably injecting holes and assisting the generation of holes.

(Xi) Bank 106
The bank 106 is formed using an organic material such as resin and has an insulating property. Examples of the organic material used for forming the bank 106 include acrylic resin, polyimide resin, and novolac type phenol resin. The bank 106 preferably has organic solvent resistance. Furthermore, since the bank 106 may be subjected to an etching process, a baking process, or the like during the manufacturing process, the bank 106 should be formed of a highly resistant material that does not excessively deform or alter the process. Is preferred. Moreover, in order to give the surface water repellency, the surface can be treated with fluorine.

When the bank 106 is formed using a lyophilic material, the difference in lyophilicity / liquid repellency between the surface of the bank 106 and the surface of the light emitting layer 108 is reduced, and the organic light emitting layer 108 is formed. For this reason, it is difficult to selectively hold the ink containing the organic substance in the opening defined by the bank 106.
Furthermore, as for the structure of the bank 106, not only a single layer structure as shown in FIG. 2, but also a multilayer structure of two or more layers can be adopted. In this case, the above materials can be combined for each layer, and an inorganic material and an organic material can be used for each layer.

(Xii) hole transport layer 107
The hole transport layer 107 is formed using a polymer compound having no hydrophilic group. For example, polyfluorene or a derivative thereof, or a polymer compound such as polyarylamine or a derivative thereof that does not have a hydrophilic group can be used.
(Xiii) Organic light emitting layer 108
As described above, the light-emitting layer 108 has a function of emitting light by generating an excited state when holes and electrons are injected and recombined. As a material used for forming the organic light emitting layer 108, it is necessary to use a light emitting organic material that can be formed by a wet printing method.

  Specifically, for example, an oxinoid compound, a perylene compound, a coumarin compound, an azacoumarin compound, an oxazole compound, an oxadiazole compound, a perinone compound, and pyrrolopyrrole described in Japanese Patent Publication (JP-A-5-163488). Compound, naphthalene compound, anthracene compound, fluorene compound, fluoranthene compound, tetracene compound, pyrene compound, coronene compound, quinolone compound and azaquinolone compound, pyrazoline derivative and pyrazolone derivative, rhodamine compound, chrysene compound, phenanthrene compound, cyclopentadiene compound, stilbene compound , Diphenylquinone compound, styryl compound, butadiene compound, dicyanomethylenepyran compound, dicyanomethylenethiopyran compound, fluorene In compounds, pyrylium compounds, thiapyrylium compounds, serenapyrylium compounds, telluropyrylium compounds, aromatic ardadiene compounds, oligophenylene compounds, thioxanthene compounds, anthracene compounds, cyanine compounds, acridine compounds, 8-hydroxyquinoline compound metal complexes, 2- It is preferably formed of a fluorescent substance such as a metal complex of a bipyridine compound, a Schiff salt and a group III metal complex, an oxine metal complex, or a rare earth complex.

(Xiv) Electron transport layer 109
The electron transport layer 109 has a function of transporting electrons injected from the cathode 110 to the light emitting layer 108. For example, an oxadiazole derivative (OXD), a triazole derivative (TAZ), a phenanthroline derivative (BCP, Bphen) Etc. are formed.
(Xv) Cathode 110
The cathode 110 is formed using, for example, ITO (Indium Tin Oxide) or IZO (Indium Zinc Oxide). As in this embodiment, in the case of the organic EL display panel 10 according to this embodiment of the top emission type, it is necessary to be formed of a light transmissive material. About light transmittance, it is preferable that the transmittance | permeability shall be 80 [%] or more.

  In addition to the above, the material used for forming the cathode 110 includes, for example, a layer structure containing an alkali metal, an alkaline earth metal, or a halide thereof, or a layer containing silver in any one of the above layers. A structure in which the layers are stacked in this order can also be used. In the above, the layer containing silver may be formed of silver alone, or may be formed of a silver alloy. In order to improve the light extraction efficiency, a highly transparent refractive index adjusting layer can be provided on the silver-containing layer.

(Xvi) Sealing layer 111
The sealing layer 111 has a function of suppressing exposure of an organic layer such as the light emitting layer 108 to moisture or exposure to air. For example, SiN (silicon nitride), SiON (silicon oxynitride), or the like. It is formed using the material. Further, a sealing resin layer made of a resin material such as an acrylic resin or a silicone resin may be provided on a layer formed using a material such as SiN (silicon nitride) or SiON (silicon oxynitride).

In the case of the organic EL display panel 10 according to the present embodiment which is a top emission type, the sealing layer 111 needs to be formed of a light transmissive material.
4). Configuration of Partition Wall 1016 on TFT Substrate 101 Of the configuration of the organic EL display panel 10, the configuration of the partition wall 1016 on the TFT substrate 101 and its surroundings will be described with reference to FIGS. 3 (a) and 3 (b).

  As shown in FIGS. 3A and 3B, in the TFT substrate 101 of the organic EL display panel 10 according to the present embodiment, a part of the connection wiring 1015, each of the source electrode 1014a and the drain electrode 1014c. A partition wall 106 is formed so as to surround each part of the source electrode 1014b and the drain electrode 1014d. As a result, as shown in FIGS. 3A and 3B, the partition 1016 has three openings 1016a, 1016b, and 1016c.

In FIGS. 3A and 3B, the configuration corresponding to the other subpixels in the TFT substrate 101 is not shown, but the configuration is the same.
As shown in FIGS. 3A and 3B, the connection wiring 1015 is exposed at the bottom of the opening 1016a provided on the leftmost side in the X-axis direction. The wiring 1015 is connected to one of the source electrode 1014a and the drain electrode 1014c (in this embodiment, the drain electrode 1014c), and the anode 103 is connected as shown in FIG.

As shown in FIG. 3A and FIG. 3B, a part of each of the source electrode 1014a and the drain electrode 1014c is exposed at the bottom of the central opening 1016b in the X-axis direction, and the X-axis direction Part of each of the source electrode 1014b and the drain electrode 1014d is exposed at the bottom of the right opening 1016c.
As shown in FIG. 3A, in each of the openings 1016b and 1016c, the source electrodes 1014a and 1014b and the drain electrodes 1014c and 1014d are arranged in a state of being spaced from each other in the Y-axis direction. As described above, the organic semiconductor layers 1017a and 1017b are formed in the openings 1016b and 1016c, and these portions function as channel portions.

  Next, as shown in FIG. 3B, in the TFT substrate 101 according to the present embodiment, the side surfaces facing the openings 1016a, 1016b, and 1016c in the partition wall 1016 are formed of slopes, and one of them. The slope of the part is steep compared to the others. Specifically, among the side surfaces facing the opening 1016b, the inclination of the side surface 1016e on the opening 1016c side faces the Y-axis direction across the side surface 1016d on the opening 1016a side and the opening 1016b. It is steeper than the inclination of the side portions 1016h and 1016i.

In addition, among the side surfaces facing the opening 1016c, the inclination of the side surface portion 1016f on the opening 1016b side is such that the side surface portion 1016g facing the opening portion 1016c and the side surface facing the Y-axis direction across the opening portion 1016c. The slopes of the portions 1016j and 1016k are steeper.
Here, the inclination angle of the side surface portion 1016d with respect to the surfaces of the insulating layer 1013, the source electrode 1014a, and the drain electrode 1014c, which is the base layer, is an angle θd. Similarly, the inclination angle of the side surface portion 1016e is the angle θe, In this embodiment, when the angle is the angle θh and the inclination angle of the side surface portion 1016i is the angle θi, the following relationship is satisfied.

[Formula 1] θe> θd
[Equation 2] θe> θh
[Equation 3] θe> θi
In addition, the inclination angle of the side surface portion 1016f with respect to the surfaces of the insulating layer 1013, the source electrode 1014b, and the drain electrode 1014d as the base layer is an angle θf. Similarly, the inclination angle of the side surface portion 1016g is the angle θg, Is the angle θj, and the inclination angle of the side surface portion 1016k is the angle θk, the following relationship is also satisfied.

[Formula 4] θf> θg
[Formula 5] θf> θj
[Formula 6] θf> θk
Here, the inclination angles θe and θf of the side portions (steeply inclined side portions) 1016e and 1016f with a steep inclination are the inclination angles of the other side portions (slowly inclined side portions) 1016d, 1016g, 1016h, 1016i, 1016j and 1016k. For θd, θg, θh, θi, θj, θk, 5 [deg. It is preferable that it is larger.

  In addition, the inclination angles θe and θf of the side portions (steeply inclined side portions) 1016e and 1016f with steep inclinations are preferably in the range of 35 [°] to 40 [°], for example. Furthermore, the inclination angles θd, θg, θh, θi, θj, and θk of the gently inclined side surface portions 1016d, 1016g, 1016h, 1016i, 1016j, and 1016k having a gentle inclination are, for example, 25 [°] or more and 30 [°] or less. It is preferable to be within the range.

  As described above, the partition wall 106 is provided with a difference in the inclination angle of the side surface portions 1016d to 1016k facing the openings 1016a, 1016b, and 1016c when the organic semiconductor layers 1017a and 1017b are formed. This is to prevent the organic semiconductor ink applied inside and the organic semiconductor ink applied inside the opening 1016c from being mixed. In other words, when the organic semiconductor ink is applied to the inside of the opening 1016b and the inside of the 1016c, the surface flange of the organic semiconductor ink is placed on the side portions 1016d, 1016g, 1016h, 1016i, 1016j, and 1016k that are gently inclined. The profile is biased. This will be described later.

5. Manufacturing Method of Organic EL Display Device 1 A manufacturing method of the organic EL display device 1, particularly a manufacturing method of the organic EL display panel 10, will be described with reference to FIGS.
As shown in FIGS. 2 and 4A, first, a substrate 1011 serving as a base of the TFT substrate 101 is prepared (step S1). Then, TFT (thin film transistor) elements are formed on the substrate 1011 to form the TFT substrate 101 (step S2).

Next, as shown in FIGS. 2 and 4A, a planarizing film 102 made of an insulating material is formed on the TFT substrate 101 (step S3). As shown in FIG. 2, in the planarization film 102, a contact hole 102 a is formed in a portion corresponding to the upper side of the connection wiring 1015 in the TFT substrate 101, and the other portion in the Z-axis direction upper surface is substantially planarized.
Next, the anode 103 is formed on the planarizing film 102 (step S4). Here, as shown in FIG. 2, the anode 103 is divided and formed by light emitting units (subpixels), and a part thereof is connected to the connection wiring 1015 of the TFT substrate 101 along the side wall of the contact hole 102a. .

The anode 103 can be formed by, for example, forming a metal film by a sputtering method, a vacuum deposition method, or the like, and then etching in units of subpixels.
Next, the transparent conductive film 104 is formed so as to cover the upper surface of the anode 103 (step S5). As shown in FIG. 2, the transparent conductive film 104 covers not only the upper surface of the anode 103 but also the side end surface, and also covers the upper surface of the anode 103 in the contact hole 102a. Note that, as described above, the transparent conductive film 104 is formed by forming a film using a sputtering method, a vacuum evaporation method, or the like, and then partitioning into sub-pixel units by etching.

Next, the hole injection layer 105 is formed on the transparent conductive film 104 (step S6). As shown in FIG. 2, the hole injection layer 105 is formed so as to cover the entire surface of the transparent conductive film 104. However, the hole injection layer 105 may be formed in a state of being divided for each subpixel.
When the hole injection layer 105 is formed from a metal oxide (for example, tungsten oxide), the metal oxide film is formed using, for example, a gas composed of argon gas and oxygen gas as a gas in the chamber of the sputtering apparatus. The total pressure of the gas exceeds 2.7 [Pa] and is 7.0 [Pa] or less, and the ratio of the oxygen gas partial pressure to the total pressure is 50 [%] or more and 70 [%] or less. Furthermore, it is possible to employ film forming conditions in which the input power density per target unit area is 1 [W / cm ² ] or more and 2.8 [W / cm ² ] or less.

Next, a bank 106 that defines each subpixel is formed (step S7). As shown in FIG. 2, the bank 106 is stacked on the hole injection layer 105.
The bank 106 is formed by first laminating the material layer of the bank 106 on the hole injection layer 105. This material layer is formed by a spin coating method or the like using a material including a photosensitive resin component and a fluorine component, such as an acrylic resin, a polyimide resin, and a novolac type phenol resin. In the present embodiment, as an example of the photosensitive resin material, a negative photosensitive material (product number: ZPN1168) manufactured by Nippon Zeon can be used. Next, the material layer is patterned to form openings corresponding to the respective subpixels. The opening can be formed by arranging a mask on the surface of the material layer, performing exposure, and then developing.

Next, a hole transport layer 107, an organic light emitting layer 108, and an electron transport layer 109 are sequentially stacked in each recess defined by the bank 106 on the hole injection layer 105 (steps S8 to S10).
The hole transport layer 107 is formed by forming a film made of an organic compound as a constituent material of the hole transport layer 107 by a printing method and baking the film. Similarly, the organic light emitting layer 108 is formed by baking after being formed by a printing method.

Next, the cathode 110 and the sealing layer 111 are sequentially laminated on the electron transport layer 109 (steps S11 and S12). As shown in FIG. 2, the cathode 110 and the sealing layer 111 are formed so as to cover the top surface of the bank 106, and are formed on the entire surface.
Next, an adhesive resin material is applied on the sealing layer 111, and a previously prepared CF (color filter) panel is joined (step S13). As shown in FIG. 2, the CF panel 113 bonded by the adhesive layer 112 has a color filter 1132 and a black matrix 1133 formed on the lower surface of the substrate 1031 in the Z-axis direction.

As described above, the organic EL display panel 10 as an organic EL display element is completed.
Although not shown, after the drive control unit 20 is attached to the organic EL display panel 10 to form the organic EL display device 1 (see FIG. 1), the organic EL display is subjected to an aging process. The display device 1 is completed. The aging process is performed, for example, by energizing the hole injectability before the process until the hole mobility becomes 1/10 or less. Specifically, the aging process is more than the luminance in actual use. In addition, the energization process is executed for a predetermined time so that the luminance is three times or less.

Next, a method for forming the TFT substrate 101 will be described with reference to FIGS. 3B and 4B.
As shown in FIGS. 3B and 4B, gate electrodes 1012a and 1012b are formed on the main surface of the substrate 1011 (step S21). Regarding the formation of the gate electrodes 1012a and 1012b, a method similar to the method of forming the anode 103 can be used.

Next, an insulating layer 1013 is formed so as to cover the gate electrodes 1012a and 1012b and the substrate 1011 (step S22). Then, source electrodes 1014a and 1014b, drain electrodes 1014c and 1014d, and a connection wiring 1015 are formed on the main surface of the insulating layer 1013 (step S23).
Next, a resist film for forming the partition wall 1016 is deposited so as to cover the source electrodes 1014a and 1014b, the drain electrodes 1014c and 1014d, the connection wiring 1015, and the insulating layer 1013 (step S24). Then, mask exposure and patterning are performed on the deposited resist film (step S25), and a partition wall 1016 is formed (step S26). This part will be described later with a specific example.

After the partition wall 1016 is formed, an organic semiconductor ink for forming the organic semiconductor layers 1017a and 1017b is applied to the openings 1016b and 1016c defined by the partition wall 1016 (step S27). And by drying this (step S28), organic-semiconductor layers 1017a and 1017b can be formed (step S29).
Finally, a passivation film 1018 is formed so as to cover the whole except for the opening 1016a (step S30), and the TFT substrate 101 is completed.

6). Surface Profile when Applying Organic Semiconductor Inks 10170a and 10170b The surface profiles of the organic semiconductor inks 10170a and 10170b applied in step S27 will be described with reference to FIG.
As shown in FIG. 5, the organic semiconductor inks 10170a and 10170b applied to the inside of the opening 1016b and the opening 1016c, respectively, have their surface profiles not symmetrical in the X-axis direction. The surface profile is biased in the direction away from (directions indicated by arrows F ₁ and F ₂ ).

  This is because the slope of the side face part 1016e is steeper than the other side face parts 1016d, 1016h, 1016i among the side face parts facing the opening 1016b, and the slope of the side face part 1016f is different from the side face parts facing the opening part 1016c. This is because it is steeper than the side portions 1016g, 1016j, and 1016k. That is, since the liquid repellency of the surface of the partition wall 1016 is substantially the same in the plane, the relationship between the surface of the partition wall 1016 and the contact angle between the inks 10170a and 10170b, the relationship between the surface tensions of the organic semiconductor inks 10170a and 10170b, Based on the relationship of the inclination angles of the side surface portions 1016d, 1016e, 1016f, 1016g, 1016h, 1016i, 1016j, and 1016k facing the openings 1016b and 1016c of the partition wall 1016 (see [Expression 1] to [Expression 6] above), The surface profiles of the inks 10170a and 10170b are defined as shown in FIG.

Although not shown, the inclination of the side surface portions 1016h, 1016i, 1016j, and 1016k is gentler than that of the side surface portions 1016e and 1016f (see FIG. 3A). Each contact portion is the same as each contact form of the inks 10170a and 10170b with respect to the side surface portions 1016d and 1016g.
7). In the organic EL display panel 10 according to the present embodiment, in the TFT substrate 101, the side surfaces 1016e and 1016f among the side surfaces facing the openings 1016b and 1016c of the partition wall 1016 are inclined to other side surfaces. The portions 1016d and 1016g to 1016k are steeper. Therefore, as shown in FIG. 5, when the organic semiconductor inks 10170a and 10170b are applied to the insides of the openings 1016b and 1016c, the side portions where the organic semiconductor inks 10170a and 10170b are steep slopes. The surface profiles are biased toward the side surface portions 1016d, 1016g to 1016k excluding 1016e and 1016f.

In the present embodiment, as described above, by controlling the surface profiles of the organic semiconductor inks 10170a and 10170b as shown in FIG. 5, the mixing of the organic semiconductor ink 10170a and the organic semiconductor ink 10170b is surely suppressed. Can do.
Therefore, in the TFT substrate 101 according to the present embodiment, as described above, mixing of the organic semiconductor ink 10170a and the organic semiconductor ink 10170b is suppressed during the formation of the organic semiconductor layers 1017a and 1017b. Has high quality. And the organic EL display panel 10 provided with the TFT substrate 101 which has such an effect as a component, and also the organic EL display device 1 provided with the same have high quality.

8). Method for Forming Partition Wall 1016 in TFT Substrate 101 A method for forming the partition wall 1016 in the TFT substrate 101 will be described with reference to FIGS.
First, as shown in FIG. 6A, an intermediate in which gate electrodes 1012a and 1012b, an insulating layer 1013, source electrodes 1014a and 1014b, drain electrodes 1014c and 1014d, and a connection wiring 1015 are formed on a substrate 1011 is prepared. To do. 6 and 7, the drain electrode 1014c. Illustration of 1014d is omitted.

Next, as shown in FIG. 6B, a photosensitive resist material film 10160 is deposited so as to cover the insulating layer 1013 and the electrodes 1014a to 1014d and 1015 by using, for example, a spin coat method.
Next, as shown in FIG. 6C, a mask 501 having openings 501 a to 501 d is provided above the photosensitive resist material film 10160 at locations where the partition walls 1016 are to be formed. In this state, exposure is performed through the openings 501a to 501d of the mask 501.

  Next, as shown in FIG. 7A, openings 502a to 502d are formed at locations where a slope with a relatively steep slope is to be formed above the photosensitive resist material film 10161 on which the first exposure has been performed. A mask 502 with a gap is disposed. In this state, the second exposure is performed through the openings 502a to 502d of the mask 502. Here, the slopes with relatively steep slopes are the side faces 1016e and 1016f shown in FIG.

Next, by performing development and baking, as shown in FIG. 7 (b), side portions 1016e and 1016f having relatively steep slopes and side portions having relatively gentle slopes. A partition wall 1016 having 1016d, 1016g to 1016k can be formed.
[Embodiment 2]
A method for manufacturing an organic EL display panel according to Embodiment 2 will be described with reference to FIG. The structure of the organic EL display panel according to the present embodiment is the same as that of the first embodiment, and the organic EL display panel manufacturing method excluding the method of forming the partition 1016 in the TFT substrate 101 is also applicable. This is the same as in the first embodiment.

  As shown in FIG. 8, a mask 503 which is a halftone mask is disposed above the deposited photosensitive resist material film 10160. The mask 503 is provided with light transmitting portions 503a to 503h. Among these, the light transmission portions 503a, 503d, 503f, and 503h and the light transmission portions 503b, 503c, 503e, and 503g have different light transmittances. Specifically, the light transmittance of the light transmitting portions 503b, 503c, 503e, and 503g at the portions corresponding to the side portions 1016e, 1016f,. , 503d, 503f, and 503h.

  By performing exposure / development in the state where the mask 503 having the above-described configuration is arranged and baking, a partition wall 1016 as shown in FIG. 3B can be formed. In other words, the portion exposed through the light transmitting portions 503b, 503c, 503e, and 503g where the light transmittance is set to be large is higher than the portion exposed through the other light transmitting portions 503a, 503d, 503f, and 503h. As in the relations expressed by [Expression 1] to [Expression 6], the inclination angles of the side surface portions 1016e and 1016f are increased.

The subsequent steps are the same as those in the first embodiment.
The organic EL display device 1 according to the first embodiment can also be manufactured by the manufacturing method as described above.
Even if such a manufacturing method is used, among the side portions facing the openings 1016b and 1016c, the side portions 1016e and 1016f can be inclined with a relatively steep slope, and the above-described effects can be obtained. Can do.

[Embodiment 3]
Next, another embodiment of the method for manufacturing the organic EL display device 1 will be described with reference to FIGS. 9 and 10. 9 and 10 show processes corresponding to the processes shown in FIGS. 6B to 7B.
As shown in FIG. 9A, after a photosensitive resist material film 10160 is deposited, a mask 504 is disposed thereon. In the mask 504, openings 504a to 504d are formed corresponding to each part where the partition wall 106 is to be formed.

  Then, by performing the first exposure and development through the openings 504a to 504d of the mask 504, as shown in FIG. 9B, the photosensitive resist material film 10162 remains at locations corresponding to the openings 504a to 504d. . Here, the side portions 10162d to 10162g,... Facing the openings 10162a to 10162c defined by the photosensitive resist material film 10162 all have the same inclination angle, and the side portions 1016d and 1016g to 1016k in FIG. It is the same as the tilt angle.

In the manufacturing method according to the present embodiment, baking is not performed at this point.
Next, as shown in FIG. 10A, a mask 505 is disposed above the photosensitive resist material film 10162. In the mask 505, openings 505a to 505d are formed corresponding to locations where the side portions 1016e, 1016f,.

Then, second exposure and development are performed through the openings 505a to 505d opened in the mask 505. Thereafter, by baking, a partition wall 1016 as shown in FIG. 10B can be formed.
Thereafter, the organic EL display device 1 can be manufactured by executing the same processes as those in the first and second embodiments.

Even if such a manufacturing method is used, among the side portions facing the openings 1016b and 1016c, the side portions 1016e and 1016f can be inclined with a relatively steep slope, and the above-described effects can be obtained. Can do.
[Embodiment 4]
The configuration of the organic EL display device according to Embodiment 4 of the present invention will be described with reference to FIG. In the following, only the configuration of the partition 3016 in the TFT substrate, which is different from the first embodiment, will be described.

As shown in FIG. 11, in the partition 3016 of the TFT substrate according to the present embodiment, three openings 3016a to 3016c are opened. Although the TFT substrate as a whole has a larger number of openings, the illustration is omitted.
The partition wall 3016 of the TFT substrate according to this embodiment is different from the first embodiment in the shapes of the openings 3016a to 3016c. Specifically, in the first embodiment, the opening shapes of the openings 1016a to 1016c are rectangular, whereas in the present embodiment, the opening shapes of the openings 3016a to 3016c have a curvature at each corner portion. It is configured with. For this reason, the side part which faces the openings 3016a to 3016c cannot be clearly divided into a plurality of side parts.

  Similar to the first embodiment, a connection wiring 3015 provided for connection to the anode is provided at the bottom of the opening 3016a. The openings 3016b and 3016c have source electrodes 3014a and 3014b and Drain electrodes 3014c and 3014d are provided. Similarly to the above, the openings 3016b and 3016c are portions that function as channel portions by forming the organic semiconductor layer.

In the above configuration, of the side portions facing the openings 3016b and 3016c, the regions 3016e and 3016f are slopes that are relatively steep compared to other regions including the regions 3016d and 3016g.
By adopting the configuration as described above, in the manufacture of the TFT substrate according to the present embodiment, when the organic semiconductor ink is applied to the insides of the openings 3016b and 3016c, the organic semiconductor applied to the inside of the openings 3016b. Mixing of the ink and the organic semiconductor ink applied to the inside of the opening 3016c can be reliably suppressed. Therefore, the manufactured TFT substrate is of high quality, and the organic EL display panel and the organic EL display device including the TFT substrate can be of high quality.

[Embodiment 5]
The configuration of the organic EL display device according to Embodiment 5 of the present invention will be described with reference to FIG. Hereinafter, only the configuration of the partition 4016 in the TFT substrate, which is different from the first embodiment, will be described.
As shown in FIG. 12, in the partition 4016 of the TFT substrate according to this embodiment, three openings 4016a to 4016c are opened. Although the TFT substrate as a whole has a larger number of openings, the illustration is omitted.

  The partition 4016 of the TFT substrate according to this embodiment differs from the first and fifth embodiments in the shapes of the openings 4016a to 4016c. Specifically, in the first embodiment, the opening shapes of the openings 1016a to 1016c are rectangular, and in the fifth embodiment, the opening shapes of the openings 3016a to 3016c are rounded (the corner has a curvature). In the present embodiment, the opening shapes of the openings 4016a to 4016c are octagons.

  As in the first embodiment, a connection wiring 4015 provided for connection to the anode is disposed at the bottom of the opening 4016a. The openings 4016b and 4016c have source electrodes 4014a and 4014b and Drain electrodes 4014c and 4014d are provided. Similarly to the above, the opening portions 4016b and 4016c are portions that function as channel portions by forming the organic semiconductor layer.

Note that the bottoms of the openings 4016b and 4016c are arranged so that the entire source electrodes 4014a and 4016b and drain electrodes 4014c and 4014d are exposed.
In the above description, of the side parts facing the openings 4016b and 4016c, the side parts 4016e and 4016f are inclined with a relatively steep slope as compared with the other side parts.

  By adopting the configuration as described above, in the manufacture of the TFT substrate according to the present embodiment, when applying the organic semiconductor ink to each of the openings 4016b and 4016c, the organic semiconductor applied to the inside of the opening 4016b. Mixing of the ink and the organic semiconductor ink applied to the inside of the opening 4016c can be reliably suppressed. Therefore, the manufactured TFT substrate is of high quality, and the organic EL display panel and the organic EL display device including the TFT substrate can be of high quality.

In addition, about the opening shape of the opening parts 4016b and 4016c, it is not limited to a square or an octagon, Various shapes can be employ | adopted. Moreover, it is not always necessary that the opening shapes and the opening sizes are the same between the adjacent openings, and the opening shapes can be different from each other, the opening sizes can be different from each other.
[Other matters]
In the said Embodiment 1-5, although the TFT substrate used for the organic electroluminescence display panel 10 was made into an example, an application object is not limited to this. For example, it can be applied to a liquid crystal display panel, a field emission display panel, or the like. Furthermore, the present invention can be applied to electronic paper.

Moreover, each constituent material of the said Embodiment 1-5 was shown as an example, Comprising: It can change suitably.
Further, as shown in FIG. 2, in the organic EL display panel 10 according to the first embodiment, a top emission type configuration is taken as an example, but a bottom emission type can also be adopted. In that case, appropriate changes can be made to each material used and layout design.

  In the above description, the definition of the inclination angle of the side surface facing the opening in the TFT substrate 101 or the like has not been described, but the side surface with respect to the main surface of the underlayer is formed as shown in FIG. The angle θ can be set. In addition, as shown in FIG. 13B, when “sag” occurs in the portion near the bottom of the opening of the side surface (portion surrounded by a two-dot chain line), it is considered that “sag” is excluded. In this case, the inclination angle can be obtained.

  In the above description, four shapes are shown as an example of the opening shape of the opening defined by the partition wall. However, other shapes having various opening shapes can be employed. For example, as shown in FIG. 14A, a square opening shape, as shown in FIG. 14B, a shape in which one side is an arc shape and the remaining three sides are straight lines, As shown in FIG. 14 (c), it may be circular or oval.

  Further, the present invention is not only for suppressing the mixing of the organic semiconductor ink between the adjacent openings, but for example, when it is not desired to overflow the organic semiconductor ink applied to the adjacent openings. Also, the above configuration can be adopted.

  The present invention is used for a display device including a display panel such as an organic EL display panel, and is useful for realizing a high-quality TFT element even with high definition.

1. Organic EL display device 10. Organic EL display panel 20. Drive control circuit unit 21-24. Drive circuit 25. Control circuit 101. TFT substrate 102. Planarization film 102a. Contact hole 103. Anode 104. Transparent conductive film 105. Hole injection layer 106. Bank 107. Hole transport layer 108. Organic light emitting layer 109. Electron transport layer 110. Cathode 111. Sealing layer 112. Adhesive layer 113. CF substrate 501,502,503,504,505. Mask 1011, 1131. Substrate 1012a, 1012b. Gate electrode 1013. Insulating layers 1014a, 1014b, 3014a, 3014b, 4014a, 4014b. Source electrodes 1014c, 1014d, 3014c, 3014d, 4014c, 4014d. Drain electrode 1015, 3015, 4015. Connection wiring 1016, 3016, 4016. Septum 1016a, 1016b, 1016c, 3016a, 3016b, 3016c, 4016a, 4016b, 4016c. Openings 1016d, 1016e, 1016f, 1016g, 1016h, 1016i, 1016j, 1016k, 3016d, 3016e, 3016f, 3016g, 4016d, 4016e, 4016f, 4016g. Side portions 1017a, 1017b. Organic semiconductor layer 1018. Passivation film 1132. Color filter 1133. Black matrix 10160, 10161, 10162. Photosensitive resist material films 10170a, 10170b. Organic semiconductor ink

Claims (15)

Comprising first and second thin film transistor elements arranged adjacent to each other at a distance from each other;
Each thin film transistor element has a gate electrode,
A source electrode and a drain electrode, which are stacked above the gate electrode, and are arranged in parallel with each other in a direction crossing the stacking direction;
An insulating layer interposed between the gate electrode and the source and drain electrodes;
A gap between the source electrode and the drain electrode, and an organic semiconductor layer formed on the source electrode and the drain electrode and in close contact with the source electrode and the drain electrode;
Prepared,
A partition partitioning each other is formed between the organic semiconductor layer in the first thin film transistor element and the organic semiconductor layer in the second thin film transistor element,
The partition separately separates at least a part of each of the source electrode and the drain electrode in the first thin film transistor element and at least a part of each of the source electrode and the drain electrode in the second thin film transistor element. Surrounding, and the surface has liquid repellency,
An opening formed by the partition surrounding at least a part of each of the source electrode and the drain electrode in the first thin film transistor element is defined as a first opening, and the source electrode in the second thin film transistor element And when the opening formed by the partition surrounding at least a part of each of the drain electrodes is a second opening,
The side part facing the first opening in the partition wall is composed of a slope with a steep slope and a slope with a gentle slope,
The thin film transistor device, wherein a portion of the side wall facing the first opening in the partition wall on the side adjacent to the second opening is a slope having a relatively steep slope. The side surface facing the second opening in the partition wall is also composed of a slope with a steep slope and a slope with a gentle slope,
2. The part of the side surface facing the second opening in the partition wall, the portion on the side adjacent to the first opening is an inclined surface having a relatively steep slope. Thin film transistor device. Of the side surface of the partition wall facing the second opening, the portion facing the second opening with respect to the portion adjacent to the first opening has a relatively gentle slope. The thin film transistor device according to claim 2, wherein the thin film transistor has a slope. The other part of the side wall part facing the second opening part in the partition, except for the part on the side where the first opening part is adjacent, is a slope having a relatively gentle slope. Item 3. The thin film transistor device according to Item 2. Of the side surface of the partition facing the first opening, the portion facing the second opening adjacent to the portion adjacent to the second opening has a relatively gentle slope. The thin film transistor device according to any one of claims 1 to 4, wherein the thin film transistor device is an inclined surface. The portion of the side surface portion facing the first opening in the partition wall, except for the portion adjacent to the second opening, is an inclined surface having a relatively gentle slope. The thin film transistor device according to claim 5. 7. The slanting / inclination of the slope is defined by the size of an angle formed between a side surface portion of the partition wall and an upper surface of the base layer on which the partition wall is provided. A thin film transistor device according to claim 1. Of the side surface facing the first opening in the partition wall, the portion on the side adjacent to the second opening that is a slope with a relatively steep slope is more than the portion with the relatively gentle slope. 8. The thin film transistor device according to claim 1, wherein the inclination angle is larger by 5 degrees or more. A thin film transistor device according to any one of claims 1 to 8,
A planarization film provided above the thin film transistor device;
A contact hole that penetrates the planarizing film in its thickness direction;
A lower electrode formed on the planarization film and electrically connected to the drain electrode or the source electrode in the first thin film transistor element or the second transistor element through the contact hole;
An upper electrode formed above the lower electrode;
An organic light emitting layer interposed between the lower electrode and the upper electrode;
An organic EL display element comprising: An organic EL display device comprising the organic EL display element according to claim 9. Forming a first step and a second gate electrode adjacent to each other in a state of being spaced apart from each other on the substrate;
A second step of forming an insulating layer so as to cover the top of the first and second gate electrodes;
On the insulating layer, a first source electrode and a first drain electrode corresponding to the first gate electrode and spaced apart from each other in a direction intersecting the layer thickness direction of the insulating layer And a second source electrode and a second drain corresponding to the second gate electrode and spaced apart from each other in a direction intersecting the layer thickness direction of the insulating layer. A third step of arranging electrodes side by side;
A fourth step of laminating a photosensitive resist material on the insulating layer so as to cover the first and second source electrodes and the first and second drain electrodes;
By patterning the laminated photosensitive resist material by mask exposure, at least a part of each of the first source electrode and the first drain electrode, the second source electrode, and the second source electrode are patterned. A fifth step of separately forming at least a part of each of the drain electrodes and forming a partition wall having liquid repellency on the surface;
An interior of a first opening formed by surrounding at least a part of each of the first source electrode and the first drain electrode by a partition; the second source electrode; and the second drain electrode. An organic semiconductor material is applied and dried to each of the inside of the second opening formed by surrounding at least a part of each of the first source electrode and the first drain. A sixth step of forming a first organic semiconductor layer in close contact with the electrode, and a second organic semiconductor layer in close contact with the second source electrode and the second drain electrode;
With
In the fifth step,
The side surface facing the first opening in the partition wall is composed of a slope with a steep slope and a slope with a gentle slope,
Of the side surface facing the first opening in the partition wall, the portion on the side adjacent to the second opening is such that the slope is a relatively steep slope.
A method of manufacturing a thin film transistor device, wherein the partition wall is formed. In the fifth step,
The side surface facing the second opening in the partition wall is also composed of a slope with a steep slope and a slope with a gentle slope,
Among the side surfaces facing the second opening in the partition wall, the portion on the side adjacent to the first opening is such that the slope becomes a relatively steep slope.
The method for manufacturing a thin film transistor device according to claim 11, wherein the partition is formed. In the fifth step,
Of the side surface facing the first opening of the partition wall, the exposure amount for the portion that is intended to be a slope with a relatively steep slope is the exposure amount for the portion that is intended to be a slope with a relatively gentle slope. The method of manufacturing a thin film transistor device according to claim 11, wherein the method is larger than the amount. In the fifth step,
After exposing the photosensitive resist material to the portion of the partition that is to form the side surface facing the first opening,
The exposure process is additionally performed on a portion of the side surface of the partition wall facing the first opening that is intended to be a relatively steep slope. Manufacturing method of the thin film transistor device. In the fifth step,
Of the side surface of the partition wall facing the first opening, the light transmittance of the portion that is intended to be a relatively steep slope is that of the portion that is intended to be a slope whose slope is relatively gentle. The method of manufacturing a thin film transistor device according to claim 11, wherein the exposure is performed using a mask having a light transmittance larger than that of the light transmittance.

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