JP2013092619A - Control device, electro-optical device, electronic apparatus, and control method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enhance a user's feel in a rewriting speed on a display device rewriting an image by means of multiple times of voltage applications.SOLUTION: A control device includes: memory control means for controlling access to first memory, second memory and third memory, where, for each of plural pixels, the first memory stores the current gradation value, the second memory stores a gradation value to be displayed next, and the third memory stores any of b-piece of indexes (b<a) indicating the number of residual times of voltage applications; storage means for storing information indicating correlation between an index and the number of residual times; and index control means for writing a first index to the third memory, the first index as an index of a target pixel if an index corresponding the number of residual times a is stored in the storage means in a case where, for a target pixel constituting a process target, of the plural pixels, the gradation value stored in the first memory is different from the gradation value stored in the second memory and also the number of residual times indicated by the index is zero.

Description

  The present invention relates to a technique for controlling an electro-optical device in which an image is rewritten by applying a voltage multiple times.

  Some display devices such as electrophoretic display devices perform rewriting once using a plurality of frames. Such rewriting is performed when the display element takes a relatively long time to change the display state (ie, gradation). When performing such rewriting, the display element cannot start the next rewriting unless one rewriting is completed (that is, the time for a plurality of frames has not elapsed).

  Patent Document 1 describes a technique for rewriting an image for each partial region by pipeline processing in a display device such as an electrophoretic display device. In this way, rewriting can be started in an area where rewriting has not been performed without depending on rewriting in other areas, so that the time required for rewriting can be shortened compared to rewriting the entire image. There is a case.

JP 2009-251615 A

In the case of the technique described in Patent Document 1, in order to rewrite a plurality of areas in parallel, as many pipelines as the number of areas are necessary. In other words, in the technique described in Patent Document 1, the number of areas that can be rewritten in parallel is limited by the number of pipelines. In the technique described in Patent Document 1, when a region to be rewritten overlaps with another region, rewriting of another region is started unless rewriting of this region is completed. I can't.
The present invention provides a technique for improving a user's perceived rewriting speed in a display device that rewrites an image by applying a voltage a plurality of times.

The present invention provides a current gradation value for each of a plurality of pixels corresponding to a plurality of electro-optic elements whose optical state changes from a first state to a second state by applying a voltage a times in units of a predetermined period. , A second memory storing a gradation value to be displayed next, and a third memory storing any one of b indexes (b <a) indicating the remaining number of voltage applications. A memory control unit that controls access to a memory; a storage unit that stores first information indicating a correspondence relationship between the index and the remaining number of times; and a target pixel to be processed among the plurality of pixels. The gradation value stored in one memory is different from the gradation value stored in the second memory, and the remaining number indicated by the index stored in the third memory is zero. In some cases, the first determination unit determines whether an index corresponding to the remaining number of times a is stored in the storage unit, and the first index is stored in the storage unit as an index corresponding to the remaining number of times a. If determined, index control means for controlling the memory control means to write the first index to the third memory as an index of the target pixel, and the target pixel is stored in the third memory. When the remaining number indicated by the index is not zero, drive control means for controlling voltage application to the target pixel and the first information stored in the storage means when the predetermined period has elapsed There is provided a control device having a remaining number control means for performing a control for decrementing the indicated remaining number.
According to this control device, in a display device that rewrites an image by applying a voltage multiple times, compared to a configuration in which a rewrite operation is started in a region where a new rewrite is started after the ongoing rewrite operation is completed, the user's Experiential rewriting speed can be improved.

In a preferred aspect, when the first determination unit determines that the index corresponding to the remaining number of times a is not stored in the storage unit, the control device is configured to store the remaining indexes among the b indexes in the storage unit. A second determination unit configured to determine whether there is a second index for which a correspondence relationship with the number of times is not defined, and when it is determined that there is the second index, the remaining number control unit includes: Information indicating a correspondence relationship with the remaining number of times a is written in the storage unit, and the index control unit controls the memory control unit to write the second index into the third memory as an index of the target pixel. May be.
According to this control device, a free index (second index) can be assigned to a pixel where writing starts newly.

In another preferred aspect, when the second determination unit determines that the second index is not present, the index control unit is configured to store an index of the target pixel for the target pixel in the predetermined period. You may wait without writing.
According to this control apparatus, when there is no empty index, it is possible to wait until an empty index is generated.

In still another preferred embodiment, the memory control unit controls access to a fourth memory storing data indicating previously displayed gradation values for each of the plurality of pixels, and the storage unit includes: Storing the second information that correlates the gradation value stored in the fourth memory, the gradation value stored in the first memory, the remaining number of times, and the applied voltage; The tone value stored in the first memory is different from the tone value stored in the second memory, and the remaining number indicated by the index stored in the third memory is zero. The value of the first memory is substituted into the fourth memory, the value of the second memory is substituted into the first memory, and the drive control means is stored in the fourth memory in the voltage application. Tone value stored in the first memory, the remaining number of times corresponding to the index stored in the third memory, and the second information stored in the storage means The determined voltage may be applied.
According to this control device, when performing multi-gradation display, it is possible to improve the user's perceived rewriting speed.

In addition, the present invention provides an electro-optical device that includes any one of the above-described control devices and the plurality of electro-optical elements.
According to this electro-optical device, in a display device that rewrites an image by applying a voltage a plurality of times, compared to a configuration in which a rewrite operation is started in a region where a new rewrite operation is started after the ongoing rewrite operation is completed, It is possible to improve the experiential rewriting speed.

Furthermore, the present invention provides an electronic apparatus having the above electro-optical device.
According to this electronic apparatus, in a display device that rewrites an image by applying a voltage a plurality of times, compared to a configuration in which a rewrite operation is started in a region where a new rewrite is started after the ongoing rewrite operation is completed, the user's Experiential rewriting speed can be improved.

Furthermore, the present invention provides a plurality of electro-optical elements whose optical state changes from a first state to a second state by a voltage application a unit of a predetermined period, a control device, and the plurality of electro-optical elements. A first memory storing a current gradation value for each of a plurality of corresponding pixels; a second memory storing a gradation value to be displayed next for each of the plurality of pixels; and the plurality of pixels For each of the above, a third memory storing data indicating any one of the b indexes (b <a) indicating the remaining number of times of voltage application, and a third relationship indicating the correspondence between the index and the remaining number of times. A method for controlling an electro-optical device having storage means for storing one information, wherein a gradation value stored in the first memory and the second pixel are processed for a target pixel to be processed among the plurality of pixels. When the gradation value stored in the memory is different and the remaining number indicated by the index stored in the third memory is zero, an index corresponding to the remaining number a is stored in the storage means. The controller determines whether the first index is stored in the storage means as an index corresponding to the remaining number of times a. If the remaining number indicated by the index stored in the third memory is not zero for the target pixel and writing the first index to the third memory, the control device applies a voltage to the target pixel. When the predetermined period has elapsed, and the control device performs the storage operation. To provide a control method and a step of decrementing the remaining number of times indicated by the first information stored in the.
According to this control method, in a display device that rewrites an image by applying a voltage multiple times, compared to a configuration in which a rewrite operation is started in a region where a new rewrite is started after the ongoing rewrite operation is completed, the user's Experiential rewriting speed can be improved.

It is the figure which showed the external appearance of the electronic device 1 which concerns on one Embodiment. 2 is a block diagram illustrating a hardware configuration of the electronic device 1. FIG. 3 is a schematic diagram showing a cross-sectional structure of a display unit 10. FIG. 3 is a diagram illustrating a circuit configuration of a display unit 10. FIG. 3 is a diagram illustrating an equivalent circuit of a pixel 14. FIG. 2 is a block diagram illustrating a functional configuration of the electronic device 1. FIG. 4 is a diagram illustrating a specific example of a configuration of a controller 20. FIG. 4 is a flowchart showing the operation of the controller 20. It is a figure which shows the initial state of an operation example. The state which the process of step S110 of the 1st frame was completed is shown. The state where the process of step S115 of the first frame is completed is shown. The state where the process of step S115 of the second frame is finished is shown. The state where the process of step S115 of the third frame is finished is shown. The state where the process of step S110 of the fourth frame is finished is shown. The state where the process of step S115 of the fourth frame is completed is shown. The state which the process of step S110 of the 5th frame was completed is shown. The state which the process of step S115 of the 5th frame was completed is shown. The state where the process of step S115 of the sixth frame is completed is shown. The state which the process of step S115 of the 7th frame was completed is shown. The state which the process of step S110 of the 8th frame was completed is shown. The state which the process of step S115 of the 8th frame was completed is shown. The state which the process of step S115 of the 9th frame was completed is shown. The state where the process of step S115 of the tenth frame is finished is shown. The state which the process of step S110 of the 11th frame was completed is shown. The state which the process of step S115 of the 11th frame was completed is shown. The state where the process of step S115 of the 17th frame is finished is shown. 10 is a block diagram showing a functional configuration of an electronic apparatus 1 according to Modification 1. FIG. It is a figure which shows the structure of the controller 20 which concerns on the modification 1. FIG. 5 is a diagram illustrating a waveform table 2131. FIG.

1. Configuration FIG. 1 is a diagram illustrating an appearance of an electronic apparatus 1 according to an embodiment. The electronic device 1 is a display device that displays an image. In this example, the electronic device 1 is a device for browsing an electronic book (an example of a document), a so-called electronic book reader. An electronic book is data including images of a plurality of pages. The electronic device 1 displays an electronic book on the display unit 1 in a certain unit (for example, one page at a time). Of the plurality of pages included in the electronic book, one page to be displayed is referred to as a “selected page”. The selection page is changed according to the operation of the buttons 9A to 9F by the user. That is, the user can turn the page of the electronic book (page advance or page return) by operating the buttons 9A to 9F.

  FIG. 2 is a block diagram illustrating a hardware configuration of the electronic device 1. The electronic device 1 includes a display unit 10, a controller 20, a CPU (Central Processing Unit) 30, a VRAM (Video Random Access Memory) 40, a RAM (Random Access Memory) 50, a storage unit 60, and an input unit 70. And have. The display unit 10 includes a display panel including a display element that displays an image. In this example, the display unit 10 includes a display element using electrophoretic particles as a memory-type display element that holds a display without applying energy by applying a voltage or the like. With this display element, the display unit 10 displays an image having a plurality of monochrome gradations (in this example, monochrome two gradations). The controller 20 is a control device that controls the display unit 10. The CPU 30 is a device that controls each unit of the electronic device 1. The CPU 30 executes a program stored in a ROM (Read Only Memory, not shown) or the storage unit 60 using the RAM 50 as a work area. The VRAM 40 is a memory that stores image data indicating an image to be displayed on the display unit 10. The RAM 50 is a volatile memory that stores data. The storage unit 60 is a storage device that stores various data and application programs in addition to electronic book data (book data), and includes a nonvolatile memory such as an HDD (Hard Disk Drive) or a flash memory. The storage unit 60 can store data of a plurality of electronic books. The input unit 70 is an input device for inputting user instructions, and includes, for example, a touch screen, a keypad, or buttons. The above elements are connected by a bus.

  FIG. 3 is a schematic diagram showing a cross-sectional structure of the display unit 10. The display unit 10 includes a first substrate 11, an electrophoretic layer 12, and a second substrate 13. The first substrate 11 and the second substrate 13 are substrates for sandwiching the electrophoretic layer 12.

  The first substrate 11 includes a substrate 111, an adhesive layer 112, and a circuit layer 113. The substrate 111 is made of an insulating and flexible material such as polycarbonate. The substrate 111 may be formed of a resin material other than polycarbonate as long as it has lightness, flexibility, elasticity, and insulation. In another example, the substrate 111 may be formed of non-flexible glass. The adhesive layer 112 is a layer that adheres the substrate 111 and the circuit layer 113. The circuit layer 113 is a layer having a circuit for driving the electrophoretic layer 12. The circuit layer 113 has a pixel electrode 114.

  The electrophoretic layer 12 includes microcapsules 121 and a binder 122. The microcapsule 121 is fixed by a binder 122. As the binder 122, a material having good affinity with the microcapsule 121, excellent adhesion with the electrode, and insulating properties is used. The microcapsule 121 is a capsule in which a dispersion medium and electrophoretic particles are stored. The microcapsule 121 is made of a flexible material such as an Arabic gum / gelatin compound or a urethane compound. Note that an adhesive layer formed of an adhesive may be provided between the microcapsule 121 and the pixel electrode 114.

  Dispersion media include water, alcohol solvents (methanol, ethanol, isopropanol, butanol, octanol, methyl cellosolve, etc.), esters (ethyl acetate, butyl acetate, etc.), ketones (acetone, methyl ethyl ketone, methyl isobutyl ketone, etc.), Aliphatic hydrocarbons (pentane, hexane, octane, etc.), alicyclic hydrocarbons (cyclohexane, methylcyclohexane, etc.), aromatic hydrocarbons (benzene, toluene, benzenes with long chain alkyl groups (xylene, Hexylbenzene, hebutylbenzene, octylbenzene, nonylbenzene, decylbenzene, undecylbenzene, dodecylbenzene, tridecylbenzene, tetradecylbenzene)), halogenated hydrocarbons (methylene chloride, chloroform, carbon tetrachloride, 1, - dichloroethane), or a carboxylic acid salt. In another example, the dispersion medium may be other oils. The dispersion medium may be a mixture of these substances. In still another example, a surfactant or the like may be added to the dispersion medium.

  Electrophoretic particles are particles (polymer or colloid) having the property of moving by an electric field in a dispersion medium. In the present embodiment, white electrophoretic particles and black electrophoretic particles are stored in the microcapsule 121. The black electrophoretic particles are particles containing a black pigment such as aniline black or carbon black, and are positively charged in this embodiment. The white electrophoretic particles are particles containing a white pigment such as titanium dioxide or aluminum oxide, and are negatively charged in this embodiment.

  The second substrate 13 includes a common electrode 131 and a film 132. The film 132 serves to seal and protect the electrophoretic layer 12. The film 132 is formed of a transparent and insulating material such as polyethylene terephthalate. The common electrode 131 is formed of a transparent and conductive material, for example, indium tin oxide (ITO).

  FIG. 4 is a diagram illustrating a circuit configuration of the display unit 10. The display unit 10 and the controller 20 are collectively referred to as an electro-optical device. The display unit 10 includes m scanning lines 115, n data lines 116, m × n pixels 14, a scanning line driving circuit 16, and a data line driving circuit 17. The scanning line driving circuit 16 and the data line driving circuit 17 are controlled by the controller 20. The scanning line 115 is disposed along the row direction (x direction) and transmits a scanning signal. The scanning signal is a signal for sequentially and exclusively selecting one scanning line 115 from the m scanning lines 115. The data line 116 is arranged along the column direction (y direction) and transmits a data signal. The data signal is a signal indicating the gradation of each pixel. The scanning line 115 and the data line 116 are insulated. The pixel 14 is provided corresponding to the intersection of the scanning line 115 and the data line 116, and indicates a gradation corresponding to the data signal. In addition, when it is necessary to distinguish one scanning line 115 from the other among the plurality of scanning lines 115, the scanning lines 115 are referred to as the first row, the second row,. The same applies to the data line 116. A display area 15 is formed by m × n pixels 14. In the display area 15, when the pixel 14 in the i-th row and the j-th column is distinguished from other pixels 14, it is referred to as a pixel (j, i). The same applies to parameters corresponding to the pixels 14 on a one-to-one basis, such as gradation values.

  The scanning line driving circuit 16 outputs a scanning signal Y for sequentially and exclusively selecting one scanning line 115 from the m scanning lines 115. The scanning signal Y is a signal that sequentially becomes H (High) level exclusively. The data line driving circuit 17 outputs a data signal X. The data signal X is a signal indicating a data voltage corresponding to the gradation value of the pixel. The data line driving circuit 17 outputs a data signal indicating a data voltage corresponding to the pixel in the row selected by the scanning signal. The scanning line driving circuit 16 and the data line driving circuit 17 are controlled by the controller 20.

  FIG. 5 is a diagram illustrating an equivalent circuit of the pixel 14. The pixel 14 includes a transistor 141, a capacitor 142, and an electrophoretic element 143. The electrophoretic element 143 includes a pixel electrode 114, the electrophoretic layer 12, and a common electrode 131. The transistor 141 is an example of a switching unit that controls writing of data to the pixel electrode 114, and is an n-channel TFT (Thin Film Transistor), for example. The gate, source, and drain of the transistor 141 are connected to the scanning line 115, the data line 116, and the pixel electrode 114, respectively. When an L (Low) level scanning signal (non-selection signal) is input to the gate, the source and drain of the transistor 141 are insulated. When an H-level scanning signal (selection signal) is input to the gate, the source and drain of the transistor 141 are turned on, and a data voltage is written to the pixel electrode 114. A capacitor 142 is also connected to the drain of the transistor 141. The capacitor 142 holds a charge corresponding to the data voltage. One pixel electrode 114 is provided for each pixel 14 and faces the common electrode 131. The common electrode 131 is common to all the pixels 14 and is supplied with the potential EPcom. The electrophoretic layer 12 is sandwiched between the pixel electrode 114 and the common electrode 131. An electrophoretic element 143 is formed by the pixel electrode 114, the electrophoretic layer 12, and the common electrode 131. A voltage corresponding to the potential difference between the pixel electrode 114 and the common electrode 131 is applied to the electrophoretic layer 12. In the microcapsule 121, the electrophoretic particles move according to the voltage applied to the electrophoretic layer 12 to express gradation. When the potential of the pixel electrode 114 is positive (for example, +15 V) with respect to the potential EPcom of the common electrode 131, the negatively charged white electrophoretic particles move to the pixel electrode 114 side and are positively charged. Black electrophoretic particles move to the common electrode 131 side. At this time, when the display unit 10 is viewed from the second substrate 13 side, the pixels appear black. When the potential of the pixel electrode 114 is negative (for example, −15 V) with respect to the potential EPcom of the common electrode 131, the positively charged black electrophoretic particles move to the pixel electrode 114 side and are negatively charged. The white electrophoretic particles moving to the common electrode 131 side. At this time, the pixel appears white.

  In the following description, the period from when the scanning line driving circuit 16 selects the first scanning line to when the selection of the m-th scanning line is completed is referred to as “frame period” or simply “frame”. . Each scanning line 115 is selected once per frame, and a data signal is supplied to each pixel 14 once per frame.

  FIG. 6 is a block diagram showing a functional configuration of the electronic device 1 (particularly the controller 20). The VRAM 40 includes a current memory 41 (an example of a first memory), a next memory 42 (an example of a second memory), and an index memory 43 (an example of a third memory). The current memory 41 is a memory that stores the current gradation value C (j, i) for each of the plurality of pixels 14. An image represented by data currently stored in the memory 41 is referred to as a “current image”. Note that the current gradation value C (j, i) and the “current image” do not necessarily represent the current image at all timings, but at least when the predetermined rewrite sequence is completed, Represents a key value. The plurality of pixels 14 has a plurality of electrophoretic elements 143 whose optical state changes from a first state (for example, black) to a second state (for example, white) by applying a voltage a unit in a predetermined period (for example, a frame). This corresponds to (an example of an electro-optical element). The next memory 42 is a memory that stores, for each of a plurality of pixels, a gradation value N (j, i) displayed after the next period (frame), that is, an image to be written next. An image represented by data stored in the next memory 42 is referred to as a “next image”. The index memory 43 is a memory for storing any one index I (j, i) of b indexes (b <a) indicating the remaining number of times of voltage application for each of the plurality of pixels 14.

  The controller 20 includes a storage unit 22, a memory control unit 21, a first determination unit 23, an index control unit 24, a drive control unit 25, and a remaining number control unit 26. The memory control unit 21 controls access (data writing or reading) to the VRAM 40. The storage unit 22 stores first information indicating the correspondence between the index and the remaining number of times. The first determination means 23 is different from the gradation value currently stored in the memory 41 and the gradation value stored in the next memory 42 for the target pixel to be processed among the plurality of pixels 14 and the index. When the remaining number indicated by the index stored in the memory 43 is zero, it is determined whether an index corresponding to the remaining number a is stored in the storage unit 22. When it is determined that the first index is stored in the storage unit 22 as an index corresponding to the remaining number of times a, the index control unit 24 writes the first index into the index memory 43 as the index of the target pixel. The memory control means 21 is controlled. The drive control unit 25 performs control to apply a voltage to the target pixel when the remaining number indicated by the index stored in the index memory 43 is not zero for the target pixel. The remaining number control means 26 performs control to decrement the remaining number stored in the storage means 22 when a predetermined period (one frame) has elapsed.

  In this example, the controller 20 further includes second determination means 27. When the first determination unit 23 determines that the index corresponding to the remaining number of times a is not stored in the storage unit 22, the second determination unit 27 sets the remaining number of b indexes out of the b indexes in the storage unit 22. It is determined whether there is a second index for which no correspondence is defined. When it is determined that there is the second index, the remaining number control unit 26 writes information indicating the correspondence between the second index and the remaining number a to the storage unit 22, and the index control unit 24 calculates the index of the target pixel. As a result, the memory control means 21 is controlled to write the second index into the index memory 43.

  FIG. 7 is a diagram illustrating a specific example of the configuration of the controller 20. The controller 20 includes a host bus IF 201, a memory controller 202, a FIFO (First In First Out) 203, a FIFO 204, a FIFO 205, a pixel control unit 206, a drawing number control unit 207, a line memory 208, and a timing generator. 209, a LUT (Look Up Table) memory 210, and a register 211.

  The host bus IF 201 is an interface for inputting and outputting data via the system bus. The memory controller 202 writes data to an external memory such as the VRAM 40 or reads data from the external memory. The FIFO 203, the FIFO 204, and the FIFO 205 are memories that store data read from the external memory by the memory controller 202 or data to be written to the external memory. In particular, the FIFO 203 is a memory for storing data currently read from the memory 41 or data to be written to the current memory 41. The FIFO 204 is a memory that stores data read from the next memory 42. The FIFO 205 is a memory that stores data read from the index memory 43 or data to be written to the index memory 43.

  The pixel control unit 206 performs control such as writing data to the line memory 208 for the target pixel. The drawing number control unit 207 reads and writes data to the FIFO 205, reads and writes data to the LUT memory 210, and reads data from the register 211. The LUT memory 210 is a memory that stores the index LUT 2101. The index LUT 2101 is a table that defines the correspondence between the index and the remaining number of times. The register 211 is a memory that stores an initial value of the remaining number of times. The line memory 208 is a memory that stores data indicating an applied voltage for a target pixel group among a plurality of pixels 14. The timing generator 209 reads data from the line memory 208 at a predetermined timing for each frame, and supplies a signal corresponding to the read data to the display unit 10.

  The memory controller 202 is an example of the memory control unit 21. The LUT memory 210 is an example of the storage unit 22. The index LUT 2101 is an example of first information. The drawing number control unit 207 is an example of the first determination unit 23, the index control unit 24, the remaining number control unit 26, and the second determination unit 27. The pixel control unit 206, the line memory 208, and the timing generator 209 are examples of the drive control unit 25.

2. Operation 2-1. Overview of Operation FIG. 8 is a flowchart showing the operation of the controller 20. The flow in FIG. 8 starts when an event that triggers image rewriting has occurred. This event is, for example, an event that an image rewriting command is input from the CPU 30.

  In step S101, the memory controller 202 determines whether a new frame has been started. The start of a new frame is indicated by, for example, a synchronization signal output from a real time clock (not shown). When it is determined that a new frame has been started (step S101: YES), the memory controller 202 shifts the processing to step S102. If it is determined that a new frame has not been started (step S101: NO), the memory controller 202 waits until a new frame is started.

  In step S102, the memory controller 202 initializes the loop counter i of the processing loop 1. The loop counter i is a parameter that specifies a row to be processed. In this example, the loop counter i is initialized to i = 1. The loop counter i is incremented by 1 at the end of the loop. Processing loop 1 is repeated for m rows, i.e., i = m.

  In step S103, the memory controller 202 initializes the loop counter j of the processing loop 2. The loop counter j is a parameter that specifies a column to be processed. That is, the target pixel is a pixel in the i-th row and the j-th column. In this example, the loop counter j is initialized to j = 1. The loop counter j is incremented by 1 at the end of the loop. Processing loop 2 is repeated for n columns, that is, j = n.

  In step S104, the memory controller 202 acquires data indicating the gradation value and index of the target pixel. Specifically, the memory controller 202 reads the current frame gradation value C (j, i) of the target pixel from the current memory 41, and writes the read gradation value to the FIFO 203. The memory controller 202 reads the gradation value N (j, i) of the next image of the target pixel from the next memory 42 and writes the read gradation value to the FIFO 204. Further, the memory controller 202 reads the target pixel index I (j, i) from the index memory 43 and writes the read index to the FIFO 205.

  In step S105, the pixel control unit 206 determines whether the gradation value C (j, i) of the current frame matches the gradation value N (j, i) of the next image for the target pixel. Specifically, the pixel control unit 206 reads the gradation value C (j, i) from the FIFO 203 and the gradation value N (j, i) from the FIFO 204, respectively, and whether these two gradation values match. to decide. If it is determined that these two gradation values match (step S105: YES), the pixel control unit 206 moves the process to step S111. If it is determined that these two gradation values do not match (step S105: NO), the pixel control unit 206 moves the process to step S106.

  In step S106, the pixel control unit 206 determines whether the remaining number of times indicated by the index I (j, i) is zero. Specifically, the pixel control unit 206 reads the index I (j, i) from the FIFO 205. Next, the pixel control unit 206 reads the remaining number of times corresponding to the index I (j, i) from the index LUT 2101 stored in the LUT memory 210. The pixel control unit 206 determines whether the read remaining number is zero. If the remaining number is not zero (step S106: NO), the pixel control unit 206 moves the process to step S111. If the remaining number is zero (step S106: YES), the pixel control unit 206 moves the process to step S107.

  In step S107, the rendering count control unit 207 determines whether an index corresponding to the remaining count a is registered in the index LUT 2101, that is, whether an index corresponding to the remaining count a is defined in the index LUT 2101. When it is determined that an index corresponding to the remaining number of times a is registered in the index LUT 2011 (step S107: YES), the drawing number control unit 207 moves the process to step S110. When it is determined that the index corresponding to the remaining number of times a is not registered in the index LUT 2011 (step S107: NO), the drawing number control unit 207 moves the process to step S108.

  In step S108, the drawing number control unit 207 determines whether there is a free index. The free index is an index for which the correspondence relationship with the remaining number is not defined (registered) in the index LUT 2101. When it is determined that there is an empty index (step S108: YES), the drawing number control unit 207 moves the process to step S109. When it is determined that there is no empty index (step S108: NO), the drawing number control unit 207 moves the process to step S111.

  In step S <b> 109, the drawing number control unit 207 writes the correspondence between the empty index and the remaining number of times a in the index LUT 2101. More specifically, the drawing number control unit 207 reads the initial value of the remaining number of times from the register 211. The initial value of the remaining number of times is determined according to conditions such as temperature. The temperature is measured by, for example, a temperature sensor (not shown). The CPU 30 determines an initial value of the remaining number based on the temperature measured by the temperature sensor, and writes the determined initial value in the register 211. The drawing number control unit 207 writes the initial value of the remaining number of times read from the register 211 in the storage area corresponding to the empty index of the index LUT 2101.

  In step S <b> 110, the drawing number control unit 207 writes an index corresponding to the remaining number of times a in the index memory 43. More specifically, the drawing number control unit 207 writes an index corresponding to the remaining number of times a in the FIFO 205. The memory controller 202 reads the index from the FIFO 205 and writes the read index in the storage area of the target pixel in the index memory 43.

  If there is no free index, the processing in steps S109 and S110 is skipped, so that the drawing count control unit 207 waits without writing to the index memory 43 until a free index is generated. I can say that.

  In step S <b> 111, the pixel control unit 206 writes data corresponding to the index I (j, i) in the line memory 208. The data written here indicates the polarity and voltage value of the voltage applied to the electrophoretic element 143. In this example, data written to the line memory 208 is any one of “−1”, “0”, and “1”. For example, when the index I (j, i) indicates that white writing is being performed, “1” is written as data. When the index I (j, i) indicates that black writing is being performed, “−1” is written as data. When the index I (j, i) indicates that neither white writing nor black writing is performed, “0” is written as data.

  At this time, when the remaining number indicated by the index I (j, i) is 1, the pixel control unit 206 uses the gradation value C (j, i) of the target pixel currently stored in the memory 41. rewrite. That is, the pixel control unit 206 sets C (j, i) = N (j, i). More specifically, the pixel control unit 206 writes the rewritten data in the FIFO 203. The memory controller 202 reads data from the FIFO 203 and writes the read data in the storage area of the target pixel in the current memory 41. Further, in this case, the drawing number control unit 207 resets the index of the target pixel. That is, the drawing count control unit 207 writes an index corresponding to the remaining count of 0 in the index memory 43 as the index of the target pixel.

  In step S112, the memory controller 202 performs processing at the loop end of the processing loop 2. Specifically, the memory controller 202 determines whether the loop counter j is j = n. If j = n is not true, the memory controller 202 increments the loop counter j, and the process proceeds to step S104. If j = n, the memory controller 202 shifts the processing to step S112.

  In step S113, the timing generator 209 outputs a signal for driving the display unit 10. Specifically, the timing generator 209 reads data from the line memory 208 and outputs the read data to the data line driving circuit 17 at a timing synchronized with the scanning of the scanning line 115. When the first row is a processing target row, the timing generator 209 outputs a signal for starting scanning of the scanning line 115 to the scanning line driving circuit 16. When the second and subsequent rows are processing target rows, the timing generator 209 outputs a signal indicating the scanning timing to the scanning line driving circuit 16. In the display unit 10, data is written to the pixels 14 in the i-th row by these signals.

  In step S114, the memory controller 202 performs processing at the loop end of the processing loop 1. Specifically, the memory controller 202 determines whether the loop counter i is i = m. If i = m is not true, the memory controller 202 increments the loop counter i, and the process proceeds to step S103. If i = m, the memory controller 202 shifts the processing to step S115.

  In step S115, the drawing number control unit 207 decrements all remaining times recorded in the index LUT 2101. The drawing number control unit 207 determines whether there is an index whose remaining number becomes 0 due to decrement. When there is an index whose remaining number is 0, the drawing number control unit 207 rewrites the remaining number corresponding to the index into data (or a null value) indicating undefined.

  In step S116, the drawing number control unit 207 determines whether the remaining number of times of all pixels is zero. Specifically, the drawing number control unit 207 determines whether all the remaining numbers recorded in the index LUT 2101 are zero. When it is determined that there is a pixel whose remaining number is not zero (step S116: NO), the drawing number control unit 207 moves the process to step S101. When it is determined that the remaining number of times of all pixels is zero (step S116: YES), the drawing number control unit 207 ends the flow of FIG.

2-2. Operation Example FIG. 9 is a diagram illustrating an initial state of the operation example. Here, a description will be given using the following specific example. The display unit 10 includes pixels 14 in 4 rows and 4 columns. That is, m = n = 4. The image data, that is, the gradation value C and the gradation value N take one of binary values of 0 or 1. In this example, 0 indicates black and 1 indicates white. The number of times the voltage is applied to rewrite display (hereinafter referred to as “white writing”) from a black display pixel (hereinafter referred to as “black pixel”) to a white display pixel (hereinafter referred to as “white pixel”), and from white pixel to black pixel The number of times of voltage application for rewriting (hereinafter referred to as “black writing”) is 7 times, that is, a = 7.

  The index I is any integer from 0 to 3. That is, the index memory 43 is a memory having a 2-bit storage area for each pixel. The index LUT 2101 records the remaining number of times corresponding to the indexes “0”, “1”, “2”, and “3”. The remaining number of times corresponding to the index “0” is fixed to zero. The remaining number of times includes information indicating the number of times of voltage application and the polarity of the applied voltage (that is, whether white writing or black writing). In this example, the polarity of the applied voltage is indicated by a positive or negative sign. For example, the remaining number “+7” indicates that the remaining number of times of voltage application for white writing is seven. In another example, the remaining number “−4” indicates that the remaining number of times of voltage application for white writing is four. Hereinafter, in the remaining number display, the plus sign is omitted and simply represented as “7”. The symbol “-” indicates a state in which the correspondence with the remaining number is not defined. In the initial state, for the indexes “1”, “2”, and “3”, the correspondence with the remaining number is not defined.

In the following drawings, the optical state of the pixel 14 in the display unit 10 is expressed using integers from 0 to 7. “0” indicates a black display state, and “7” indicates a white display state. Reference numerals 1 to 6 indicate states during the transition to black display or white display. In the initial state, the display unit 10 is in a state where all pixels are displayed in black. The data in the current memory 41 is C = 0 for all pixels. The data in the next memory 42 is
N (1,1) = N (2,2) = N (2,3) = 1
N = 0 for other pixels. The data in the index memory 43 is I = 0 for all pixels.

  When a screen rewrite command is input from the CPU 30, the process of the flow of FIG. 8 is started. First, in the first frame, for the pixel (1, 1), the pixel (2, 2), and the pixel (2, 3), C ≠ N (step S105: NO), and the remaining number is zero. (Step S106: YES). In the index LUT 2101, an index corresponding to the remaining number of 7 times is not defined (step S 107: NO), but a free index exists (step S 108: YES). Therefore, the remaining number of times of 7 is assigned to the free index, here, index “1”, which is the index with the smallest number among the plurality of free indexes. Information indicating the correspondence between the index “1” and the remaining number of 7 times is written in the index LUT 2101 (step S109). For the pixel (1, 1), the pixel (2, 2), and the pixel (2, 3), the index “1” corresponding to the remaining number of times of 7 is written in the index memory 43 (step S110).

FIG. 10 shows a state in which the processing in step S110 has been completed for all the pixels. In addition, since the application of the voltage to the electro-optic element 143 of the display unit 10 is performed row by row together with the writing of data to the index memory 43, the pixel (1, 1), the pixel (2, 2), In addition, although the optical state of the pixel (2, 3) has changed, here, in order to simplify the description, a state where a voltage is not yet applied to the electro-optical element 143 (virtual) is illustrated. Yes. The same applies to the following figures. The data stored in the index memory 43 is
I (1,1) = I (2,2) = I (2,3) = 1
It is. In the index LUT 2101, it is defined that the remaining number of times corresponding to the index “1” is 7 times. In this state, a voltage is applied to the electro-optical element 143 corresponding to the pixel whose remaining number is not zero. In this example, a white writing voltage is applied to the pixel (1, 1), the pixel (2, 2), and the pixel (2, 3) (step S113). After the voltage application, the remaining number of times of the index LUT 2101 is decremented (step S115). That is, the remaining number of the index “1” is decremented from 7 to 6.

FIG. 11 shows a state where the process of step S115 of the first frame is finished. At this time, in the pixel (1, 1), the pixel (2, 2), and the pixel (2, 3), the optical state of the electro-optical element 143 is a state in which a white writing voltage is applied once. The data stored in the index memory 43 is
I (1,1) = I (2,2) = I (2,3) = 1
It is. The index LUT 2101 indicates that the number of writes corresponding to the index “1” is “6”.

FIG. 12 shows a state where the process of step S115 of the second frame is finished. At this time, in the pixel (1, 1), the pixel (2, 2), and the pixel (2, 3), the optical state of the electro-optical element 143 is a state in which the white writing voltage is applied twice. The data stored in the index memory 43 is
I (1,1) = I (2,2) = I (2,3) = 1
It is. The index LUT 2101 indicates that the number of writes corresponding to the index “1” is “5”. From here, the processing of the second frame is performed.

FIG. 13 shows a state where the process of step S115 of the third frame is finished. At this time, in the pixel (1, 1), the pixel (2, 2), and the pixel (2, 3), the optical state of the electro-optical element 143 is a state in which the white writing voltage is applied three times. The data stored in the index memory 43 is
I (1,1) = I (2,2) = I (2,3) = 1
It is. The index LUT 2101 indicates that the write count corresponding to the index “1” is “4”. Further, the data in the next memory 42 has been rewritten by the CPU 30 at the time before step S115. Specifically, in the next memory 42, the data of N (2,1), N (4,1), N (3,3), and N (1,4) is changed from “0” to “1”. It has been rewritten.

  In the fourth frame, C ≠ N for the pixel (2, 1), the pixel (4, 1), the pixel (3, 3), and the pixel (1, 4) (step S105: NO), and the remaining The number of times is zero (step S106: YES). In the index LUT 2101, an index corresponding to the remaining number of 7 times is not defined (step S 107: NO), but a free index exists (step S 108: YES). Accordingly, the remaining number of times is assigned to the free index, here, index “2”, which is the index having the smallest number among the plurality of free indexes. Information indicating the correspondence between the index “2” and the remaining number of 7 times is written in the index LUT 2101 (step S109). For the pixel (2, 1), the pixel (4, 1), the pixel (3, 3), and the pixel (1, 4), the index “2” corresponding to the remaining number of times is written in the index memory 43 ( Step S110).

FIG. 14 shows a state in which the processing in step S110 has been completed for all the pixels in the fourth frame. The data stored in the index memory 43 is
I (1,1) = I (2,2) = I (2,3) = 1
I (2,1) = I (4,1) = I (3,3) = I (1,4) = 2
It is. In the index LUT 2101, it is defined that the remaining number of times corresponding to the index “1” is four times and the remaining number of times corresponding to the index “2” is seven times. In this state, a voltage is applied to the electro-optical element 143 corresponding to the pixel whose remaining number is not 0 (step S113). After the voltage application, the remaining number of times of the index LUT 2101 is decremented (step S115). That is, the remaining number of index “1” is decremented from 4 to 3, and the remaining number of index “2” is decremented from 7 to 6.

FIG. 15 shows a state where the process of step S115 of the fourth frame is finished. At this time, in the pixel (1, 1), the pixel (2, 2), and the pixel (2, 3), the optical state of the electro-optical element 143 is a state in which the white writing voltage is applied four times. In the pixel (2, 1), pixel (4, 1), pixel (3, 3), and pixel (1, 4), the optical state of the electro-optical element 143 is a state in which a white writing voltage is applied once. It is. The data stored in the index memory 43 is
I (1,1) = I (2,2) = I (2,3) = 1
I (2,1) = I (4,1) = I (3,3) = I (1,4) = 2
It is. The index LUT 2101 indicates that the number of writes corresponding to the index “1” is “3” and that the number of writes corresponding to the index “2” is “6”. Further, the data in the next memory 42 has been rewritten by the CPU 30 at the time before step S115. Specifically, in the next memory 42, the data of N (3, 1) is rewritten from “0” to “1”.

  In the fifth frame, C ≠ N for the pixel (3, 1) (step S105: NO), and the remaining number is zero (step S106: YES). In the index LUT 2101, an index corresponding to the remaining number of 7 times is not defined (step S 107: NO), but a free index exists (step S 108: YES). Therefore, the remaining number of times is assigned to the empty index, here, the index “3”. Information indicating the correspondence between the index “3” and the remaining number of times of 7 is written in the index LUT 2101 (step S109). For the pixel (3, 1), the index “3” corresponding to 7 remaining times is written in the index memory 43 (step S110).

FIG. 16 shows a state in which the processing in step S110 has been completed for all the pixels in the fifth frame. The data stored in the index memory 43 is
I (1,1) = I (2,2) = I (2,3) = 1
I (2,1) = I (4,1) = I (3,3) = I (1,4) = 2
I (3,1) = 3
It is. In the index LUT 2101, the remaining number of times corresponding to the index “1” is three times, the remaining number of times corresponding to the index “2” is six times, and the remaining number of times corresponding to the index “3” is seven times. It is defined that there is. In this state, a voltage is applied to the electro-optical element 143 corresponding to the pixel whose remaining number is not 0 (step S113). After the voltage application, the remaining number of times of the index LUT 2101 is decremented (step S115). That is, the remaining number of the index “1” is decremented from 3 to 2, the remaining number of the index “2” is decremented from 6 to 5, and the remaining number of the index “3” is decremented from 7 to 6.

FIG. 17 shows a state where the process of step S115 of the fifth frame is finished. At this time, in the pixel (1, 1), the pixel (2, 2), and the pixel (2, 3), the optical state of the electro-optical element 143 is a state in which the white writing voltage is applied five times. In the pixel (2, 1), pixel (4, 1), pixel (3, 3), and pixel (1, 4), the optical state of the electro-optical element 143 is a state in which white writing voltage is applied twice. It is. In the pixel (3, 1), the optical state of the electro-optical element 143 is a state in which a white writing voltage is applied once. The data stored in the index memory 43 is
I (1,1) = I (2,2) = I (2,3) = 1
I (2,1) = I (4,1) = I (3,3) = I (1,4) = 2
I (3,1) = 3
It is. The number of writes corresponding to the index “1” is “2”, the number of writes corresponding to the index “2” is “5”, and the number of writes corresponding to the index “3” is “6”. This is indicated by the index LUT 2101. Further, the data in the next memory 42 has been rewritten by the CPU 30 at the time before step S115. Specifically, in the next memory 42, the data of the pixel (1, 2) is rewritten from “0” to “1”.

  In the sixth frame, for the pixel (1, 2), C ≠ N (step S105: NO) and the remaining number is zero (step S106: YES). In the index LUT 2101, an index corresponding to the remaining number of 7 times is not defined (step S 107: NO), but there is no empty index (step S 108: NO). Therefore, data is not written to the index LUT 2101 or the index memory 43.

FIG. 18 shows a state in which the process in step S115 of the sixth frame is finished. At this time, in the pixel (1, 1), the pixel (2, 2), and the pixel (2, 3), the optical state of the electro-optical element 143 is a state in which the white writing voltage is applied six times. In the pixel (2, 1), the pixel (4, 1), the pixel (3, 3), and the pixel (1, 4), the optical state of the electro-optical element 143 is a state in which white writing voltage is applied three times. It is. In the pixel (3, 1), the optical state of the electro-optical element 143 is a state in which a white writing voltage is applied twice. The data stored in the index memory 43 is
I (1,1) = I (2,2) = I (2,3) = 1
I (2,1) = I (4,1) = I (3,3) = I (1,4) = 2
I (3,1) = 3
It is. The number of writes corresponding to the index “1” is “1”, the number of writes corresponding to the index “2” is “4”, and the number of writes corresponding to the index “3” is “5”. This is indicated by the index LUT 2101.

  In step S115 of the seventh frame, the remaining number of the index “1” is decremented from 1 to 0, and the remaining number of the index “1” is in an undefined state. Also, the index “0” is written into the index memory 43 for the pixel (1, 1), the pixel (2, 2), and the pixel (2, 3). Further, data “1” is written in the current memory 41 for these pixels.

FIG. 19 shows a state where the process of step S115 of the seventh frame is finished. At this time, in the pixel (1, 1), the pixel (2, 2), and the pixel (2, 3), the optical state of the electro-optical element 143 is a state in which white writing voltage is applied seven times. In the pixel (2, 1), pixel (4, 1), pixel (3, 3), and pixel (1, 4), the optical state of the electro-optical element 143 is a state in which white writing voltage is applied four times. It is. In the pixel (3, 1), the optical state of the electro-optical element 143 is a state in which a white writing voltage is applied three times. The data stored in the index memory 43 is
I (2,1) = I (4,1) = I (3,3) = I (1,4) = 2
I (3,1) = 3
It is. The number of writes corresponding to the index “1” is undefined, the number of writes corresponding to the index “2” is “3”, and the number of writes corresponding to the index “3” is “4”. Is indicated by the index LUT2101.

  In the eighth frame, C ≠ N for the pixel (1, 2) (step S105: NO), and the remaining number is zero (step S106: YES). In the index LUT 2101, an index corresponding to the remaining number of 7 times is not defined (step S 107: NO), but a free index exists (step S 108: YES). Therefore, the remaining number of times is assigned to the empty index, here, the index “1”. Information indicating the correspondence between the index “1” and the remaining number of 7 times is written in the index LUT 2101 (step S109). For the pixel (1, 2), the index “1” corresponding to 7 remaining times is written into the index memory 43 (step S110).

FIG. 20 shows a state in which the processing in step S110 has been completed for all pixels in the eighth frame. The data stored in the index memory 43 is
I (1,2) = 1
I (2,1) = I (4,1) = I (3,3) = I (1,4) = 2
I (3,1) = 3
It is. In the index LUT 2101, the remaining number of times corresponding to the index “1” is seven times, the remaining number of times corresponding to the index “2” is three times, and the remaining number of times corresponding to the index “3” is four times. It is defined that there is. In this state, a voltage is applied to the electro-optical element 143 corresponding to the pixel whose remaining number is not 0 (step S113). After the voltage application, the remaining number of times of the index LUT 2101 is decremented (step S115). That is, the remaining number of the index “1” is decremented from 7 to 6, the remaining number of the index “2” is decremented from 3 to 2, and the remaining number of the index “3” is decremented from 4 to 3.

FIG. 21 shows a state where the process of step S115 of the eighth frame is finished. At this time, in the pixel (1, 1), the pixel (2, 2), and the pixel (2, 3), the optical state of the electro-optical element 143 is a state in which white writing voltage is applied seven times. In the pixel (2, 1), pixel (4, 1), pixel (3, 3), and pixel (1, 4), the optical state of the electro-optical element 143 is a state in which white writing voltage is applied five times. It is. In the pixel (3, 1), the optical state of the electro-optical element 143 is a state in which white writing voltage is applied four times. In the pixel (1, 2), the optical state of the electro-optical element 143 is a state in which a white writing voltage is applied once. The data stored in the index memory 43 is
I (1,2) = 1
I (2,1) = I (4,1) = I (3,3) = I (1,4) = 2
I (3,1) = 3
It is. The number of writes corresponding to the index “1” is “6”, the number of writes corresponding to the index “2” is “3”, and the number of writes corresponding to the index “3” is “4”. This is indicated by the index LUT 2101.

FIG. 22 shows a state where the process of step S115 of the ninth frame is finished. At this time, in the pixel (1, 1), the pixel (2, 2), and the pixel (2, 3), the optical state of the electro-optical element 143 is a state in which white writing voltage is applied seven times. In the pixel (2, 1), pixel (4, 1), pixel (3, 3), and pixel (1, 4), the optical state of the electro-optical element 143 is a state in which white writing voltage is applied six times. It is. In the pixel (3, 1), the optical state of the electro-optical element 143 is a state where white writing voltage is applied five times. In the pixel (1, 2), the optical state of the electro-optical element 143 is a state in which a white writing voltage is applied twice. The data stored in the index memory 43 is
I (1,2) = 1
I (2,1) = I (4,1) = I (3,3) = I (1,4) = 2
I (3,1) = 3
It is. The number of writes corresponding to the index “1” is “5”, the number of writes corresponding to the index “2” is “1”, and the number of writes corresponding to the index “3” is “2”. This is indicated by the index LUT 2101. Further, the data in the next memory 42 has been rewritten by the CPU 30 at the time before step S115. Specifically, N (1,1) is rewritten from “1” to “0”.

  In the tenth frame, C ≠ N for the pixel (1, 1) (step S105: NO) and the remaining number is zero (step S106: YES). In the index LUT 2101, an index corresponding to the remaining number of 7 times is not defined (step S 107: NO), but there is no empty index (step S 108: NO). Therefore, data is not written to the index LUT 2101 or the index memory 43.

FIG. 23 shows a state where the process of step S115 of the tenth frame is finished. At this point, pixel (1,1), pixel (2,2), pixel (2,3), pixel (2,1), pixel (4,1), pixel (3,3), and pixel (1 4), the optical state of the electro-optical element 143 is a state in which a white writing voltage is applied seven times. In the pixel (3, 1), the optical state of the electro-optical element 143 is a state in which white writing voltage is applied six times. In the pixel (1, 2), the optical state of the electro-optical element 143 is a state in which a white writing voltage is applied three times. The data stored in the index memory 43 is
I (1,2) = 1
I (3,1) = 3
It is. The number of writes corresponding to index “1” is “4”, the number of writes corresponding to index “2” is undefined, and the number of writes corresponding to index “3” is “1”. Is indicated by the index LUT2101.

  In the eleventh frame, C ≠ N for the pixel (1, 1) (step S105: NO), and the remaining number is zero (step S106: YES). In the index LUT 2101, an index corresponding to the remaining number of 7 times is not defined (step S 107: NO), but a free index exists (step S 108: YES). Therefore, the remaining number of times is assigned to the empty index, here, index “2”. The polarity of writing at this time is “−”. Information indicating the correspondence between the index “2” and the remaining number of 7 times is written in the index LUT 2101 (step S109). For the pixel (1, 1), the index “2” corresponding to 7 remaining times is written into the index memory 43 (step S110).

FIG. 24 shows a state in which the processing in step S110 has been completed for all pixels in the eleventh frame. The data stored in the index memory 43 is
I (1,2) = 1
I (1,1) = 2
I (3,1) = 3
It is. In the index LUT 2101, the remaining number of times corresponding to the index “1” is four times, the remaining number of times corresponding to the index “2” is seven times, and the remaining number of times corresponding to the index “3” is one time. It is defined that there is. In this state, a voltage is applied to the electro-optical element 143 corresponding to the pixel whose remaining number is not 0 (step S113). After the voltage application, the remaining number of times of the index LUT 2101 is decremented (step S115). That is, the remaining number of the index “1” is decremented from 4 to 3, the remaining number of the index “2” is decremented from 7 to 6, and the remaining number of the index “3” is decremented from 1 to 0.

FIG. 25 shows a state where the process of step S115 of the eleventh frame is finished. At this time, in the pixel (1, 1), the optical state of the electro-optical element 143 is a state where a black writing voltage is applied once. In pixel (2,2), pixel (2,3), pixel (2,1), pixel (4,1), pixel (3,3), pixel (1,4), and pixel (3,1) The optical state of the electro-optical element 143 is a state in which white writing voltage is applied seven times. In the pixel (1, 2), the optical state of the electro-optical element 143 is a state in which a white writing voltage is applied four times. The data stored in the index memory 43 is
I (1,2) = 1
I (1,1) = 2
I (3,1) = 3
It is. The number of writes corresponding to index “1” is “3”, the number of writes corresponding to index “2” is “6”, and the number of writes corresponding to index “3” is undefined. Is indicated by the index LUT2101.

  FIG. 26 shows a state where the process of step S115 of the 17th frame is finished. In this example, the next memory 42 is not rewritten from the state of FIG. At this time, in the pixel (1, 1), the optical state of the electro-optical element 143 is a state in which the white writing voltage is applied seven times. Pixel (2,2), pixel (2,3), pixel (2,1), pixel (4,1), pixel (3,3), pixel (1,4), pixel (3,1), and In the pixel (1, 2), the optical state of the electro-optical element 143 is a state in which a white writing voltage is applied seven times. All data stored in the index memory 43 is “0”. The index LUT 2101 indicates that the number of writes corresponding to the indexes “1”, “2”, and “3” is undefined.

  As described above, according to the controller 20, even when a new rewriting area is generated in the case where the rewriting operation for the area where rewriting has been started is in progress, the rewriting is not in progress. , Rewriting starts immediately. Therefore, compared with a configuration in which a rewriting operation is started in a region in which rewriting is newly performed after the ongoing rewriting operation is completed, the sensible display speed for the user can be increased. Further, according to the present embodiment, a pixel to which a positive voltage is applied and a pixel to which a negative voltage is applied can coexist in a single frame (in this way, the positive voltage and Drive that can select both negative voltages is called "bipolar drive").

Further, according to the controller 20, the memory capacity and the data transfer amount can be reduced as compared with the configuration in which the remaining number of times for each pixel is stored in the memory without using the index memory 43 and the index LUT 2101. The voltage application frequency a also changes in the single display unit 10 according to environmental conditions such as temperature and other conditions. For example, if the number of times of voltage application a at room temperature is 7, but the maximum value of the number of times of voltage application a (for example, the number of times of voltage application at the operating lower limit temperature) is a _max = 256, the remaining number of times per pixel is stored. If a memory is used, this memory requires a storage capacity of 8 bits for each pixel. However, when the four indexes described in the operation example are used, the index memory 43 only needs to have a storage capacity of 2 bits for each pixel, and the memory capacity and the data transfer amount can be reduced to ¼. Can do.

3. Modifications The present invention is not limited to the above-described embodiments, and can be implemented in various forms. Hereinafter, some modifications will be described. Two or more of the following modifications may be used in combination.

3-1. Modification 1
The timing for updating the gradation value C in the current memory 41 is not limited to that described in the embodiment. In the embodiment, the number of times of writing corresponding to the index I (j, i) is decremented for each frame, and “0” indicating the remaining number of times is written to the index I (j, i). The value of N (j, i) is substituted for C (j, i) (FIG. 19). However, the timing for updating the gradation value C may be other than this. For example, N (j, i) is rewritten so that C (j, i) ≠ N (J, i), and a predetermined value is written to I (j, i) in steps S107 to S110 in FIG. Thus, the value of N (j, i) may be substituted for C (j, i). In this case, the remaining number indicated by the index I (j, i) of the pixel is zero regardless of whether C (j, i) and N (j, i) of the target pixel match in each frame. If not, the white (black) write voltage is applied once to the pixel, and if it is zero, it is not applied.

3-2. Modification 2
FIG. 27 is a block diagram illustrating a functional configuration of the electronic device 1 according to the first modification. In the embodiment, the example in which the gradation of the pixel 14 is a binary value of white and black has been described. However, in Modification 1, the gradation of the pixel 14 has a k value (k ≧ 3). In the first modification, the VRAM 40 includes a front memory 44 (an example of a fourth memory) in addition to the configuration of FIG. The previous memory 44 is a memory that stores the gradation value P (j, i) before rewriting, that is, before the current period (frame), for each of the plurality of pixels 14. The current memory 41, the next memory 42, and the previous memory 44 have storage areas corresponding to k gradations. For example, in the case of four gradations (k = 4), the current memory 41, the next memory 42, and the previous memory 44 have a 2-bit storage area for each pixel.

  The memory control means 21 controls access to the previous memory 44 in addition to the current memory 41, the next memory 42, and the index memory 43. Further, the storage means 22 stores second information. The second information is information that associates the gradation value P (j, i), the gradation value C (j, i), the remaining number of times, and the applied voltage. The drive control unit 25 stores the gradation value P (j, i), the gradation value C (j, i), the remaining number corresponding to the index I (j, i), and the second stored in the storage unit 22. A voltage determined based on the information is applied.

  FIG. 28 is a diagram illustrating a configuration of the controller 20 according to the first modification. The controller 20 includes a FIFO 212 and a waveform memory 213 in addition to the configuration of FIG. The FIFO 212 is a memory that stores data read from the previous memory 44 or data to be written to the previous memory 44. The waveform memory 213 stores a waveform table 2131. Further, the controller 20 according to the modified example 1 does not have the register 211.

  FIG. 29 is a diagram illustrating a waveform table 2131. Here, a case of four gradations (k = 4) is shown as an example. A plurality of waveform tables 2131 are prepared according to conditions (for example, temperature conditions), but only a table corresponding to a certain temperature condition is shown here. The gradation values are 0 (black: B), 1 (dark gray: DG), 2 (light gray: LG), or 3 (white: W), which have a relative luminance of 0%, 33%, 67%. , And 100%. In this example, the waveform table 2131 includes a plurality of data sets including the gradation value P, the gradation value C, the voltage application count, and the applied voltage value for each remaining count. For example, when rewriting from gradation value P = 0 to gradation value C = 1, the number of times of voltage application is 3, the first two applied voltages are Vw, and the last one applied voltage is Vn. It is shown that there is.

Hereinafter, the operation of the controller 20 according to the first modification will be described with reference to FIG. As an example, P (j, i) = 0 (B), C (j, i) = 3 (W), N (j, i) = 3 (W), I (j, i) = 0 A case where a certain pixel is rewritten as N (j, i) = 2 (LG) will be described. The processing in steps S101 to S103 is the same as that described in the embodiment. In step S104, the memory controller 202 acquires data indicating the gradation value and index of the target pixel. In addition to the gradation value C (j, i), gradation value N (j, i), and I (j, i) described in the embodiment, the memory controller 202 has a gradation value P (j, i). Is read from the previous memory 44 and the read gradation value is written in the FIFO 212. The processing in steps S105 and S106 is the same as that described in the embodiment. Specifically, since C (j, i) ≠ N (j, i) and I (j, i) = 0 (step S105: NO, step S106: YES), the process proceeds to step S107. Here, in this modification, the value of C (j, i) is substituted for P (j, i) and the value of N (j, i) is substituted for C (j, i) before the start of step S107. The step of substituting is included. Therefore, P (j, i) = 3, C (j, i) = 2, and N (j, i) = 2.
In this modification, the step of acquiring the remaining number in step S107 is performed by referring to the values of P (j, i) and C (j, i) in the waveform table of FIG. That is, since C (j, i) = 3 and N (j, i) = 2, the lowermost waveform (voltage application count: 3 times) is selected in the waveform table of FIG. When the remaining three times of the index is not defined (step S107: NO) and there is an empty index (step S108: YES), the process proceeds to step S109.

  In step S <b> 109, the drawing number control unit 207 writes the correspondence between the empty index and the remaining number of times a in the index LUT 2101. More specifically, the drawing number control unit 207 determines from the waveform table 2131 stored in the waveform memory 213 that the number of times of voltage application corresponding to P (j, i) = 3 and C (j, i) = 2. 3 ”is read out. The drawing number control unit 207 writes the read voltage application number “3” in the storage area corresponding to the empty index of the index LUT 2101 as the initial value of the remaining number of times. The processing in step S110 is the same as that described in the embodiment.

  In step S <b> 111, the pixel control unit 206 reads the voltage value corresponding to the gradation value P (j, i), the gradation value C (j, i), and the index I (j, i) from the waveform table 2131. . For example, when P (j, i) = 3 and C (j, i) = 2 and the remaining number of times indicated by the index I (j, i) is 3, the pixel control unit 206 uses the waveform table 2131. The voltage value Vb is read out from. The pixel control unit 206 writes data indicating the read voltage value in the line memory 208.

  Thereafter, the voltage is applied to the pixel by referring to the remaining number of times indicated by P (j, i), C (j, i), and I (j, i) and the voltage value applied from the waveform table of FIG. 29 for each frame. And the value of the remaining number of times indicated by I (J, i) is decremented. Even if the value of N (j, i) changes before rewriting is completed, the waveform referenced by P (j, i) and C (j, i) does not change, so a predetermined waveform To complete the rewrite sequence. When the value of N (j, i) changes before the rewriting is completed, when I (j, i) = 0 (step S106), C (j, i) is changed to P (j, i). A step of substituting the value and substituting the value of N (j, i) into C (j, i) is performed, a new I (j, i) is set, and the rewrite sequence is started.

  According to the first modification, even in the display unit 10 that performs multi-gradation display, the display speed experienced by the user can be improved while reducing the memory capacity and the data transfer amount.

3-3. Modification 3
In the embodiment, the example in which the initial value of the remaining number is the same for white writing and black writing has been described, but the initial value of the remaining number is different between white writing and black writing. May be. In this case, the register 211 stores an initial value for white writing and an initial value for black writing. The drawing number control unit 207 reads an initial value corresponding to the writing polarity from the register 211.

  Further, in the first modification, the example in which the number of times of voltage application (that is, the initial value of the remaining number) is different depending on the combination of the gradation value P and the gradation value N has been described. However, even in the case of multi-gradation display, the initial value of the remaining number may be the same for white writing and black writing.

3-4. Modification 4
The configuration of the controller 20 is not limited to that illustrated in FIGS. 7 and 28. The controller 20 may have any configuration as long as the functions of FIGS. 6 and 27 can be realized. In another example, other elements such as the CPU 30 and the RAM 50 may have a part of the function of the controller 20. In this case, the electronic device 1 may have the functions described with reference to FIGS. 6 and 27 as a whole. Further, the operation of the controller 20, particularly the processing order, is not limited to that described in the flow of FIG. For example, the process of resetting the target pixel index may be performed before step S111.

3-5. Modification 5
The first information and the second information are not limited to the index LUT 2101 and the waveform table 2131. For example, as long as the first information is information that associates the index with the remaining number of times, the format of the information is not limited to the table, and any information may be used. The same applies to the waveform table 2131.

3-6. Other Modifications The electronic device 1 is not limited to an electronic book reader. The electronic device 1 may be a personal computer, a PDA (Personal Digital Assistant), a mobile phone, a smartphone, a tablet terminal, or a portable game machine.

  The equivalent circuit of the pixel 14 is not limited to that described in the embodiment. As long as a controlled voltage can be applied between the pixel electrode 114 and the common electrode 131, the switching element and the capacitor may be combined in any way. In addition, this pixel is driven by a bipolar drive in which there is an electrophoretic element 143 having a different polarity of applied voltage in a single frame, or in all electrophoretic elements 143 in a single frame. Any one of the unipolar drives to which the above voltage is applied may be used.

  The structure of the pixel 14 is not limited to that described in the embodiment. For example, the polarity of the charged particles is not limited to that described in the embodiment. The black electrophoretic particles may be negatively charged and the white electrophoretic particles may be positively charged. In this case, the polarity of the voltage applied to the pixel is opposite to that described in the embodiment. The display element is not limited to an electrophoretic display element using microcapsules. Other display elements such as a liquid crystal element or an organic EL (Electro Luminescence) element may be used.

  The parameters (for example, the number of gradations, the number of pixels, the voltage value, the number of times of voltage application, etc.) described in the embodiment are merely examples, and the present invention is not limited to this.

DESCRIPTION OF SYMBOLS 1 ... Electronic device, 10 ... Display part, 11 ... 1st board | substrate, 12 ... Electrophoresis layer, 13 ... 2nd board | substrate, 14 ... Pixel, 15 ... Display area, 16 ... Scanning line drive circuit, 17 ... Data line drive circuit , 20 ... controller, 21 ... memory control means, 22 ... storage means, 23 ... first judgment means, 24 ... index control means, 25 ... drive control means, 26 ... remaining number control means, 27 ... second judgment means, 30 ... CPU, 40 ... VRAM, 41 ... present memory, 42 ... next memory, 43 ... index memory, 44 ... previous memory, 50 ... RAM, 60 ... storage unit, 70 ... input unit, 111 ... substrate, 112 ... adhesive layer, DESCRIPTION OF SYMBOLS 113 ... Circuit layer, 114 ... Pixel electrode, 115 ... Scan line, 116 ... Data line, 121 ... Microcapsule, 122 ... Binder, 131 ... Common electrode, 132 ... Film, 141 Transistors 142... Capacitors 143 Electrophoretic elements 201. Host bus IF 202 202 Memory controller 203 FIFOs 204 FIFOs 205 FIFOs 206 Pixel control unit 207 Drawing number control unit 208 Line memory, 209 ... Timing generator, 210 ... LUT memory, 211 ... Register, 212 ... FIFO, 213 ... Waveform memory, 2101 ... Index LUT, 2131 ... Waveform table

Claims (7)

The current gradation value is stored for each of a plurality of pixels corresponding to a plurality of electro-optic elements whose optical state changes from the first state to the second state by applying a voltage a times in units of a predetermined period. Access to one memory, the second memory storing the gradation value to be displayed next, and the third memory storing one of the b indexes (b <a) indicating the remaining number of times of voltage application Memory control means for controlling
Storage means for storing first information indicating a correspondence relationship between the index and the remaining number of times;
For the target pixel to be processed among the plurality of pixels, the gradation value stored in the first memory is different from the gradation value stored in the second memory, and is stored in the third memory. A first determination unit that determines whether an index corresponding to the remaining number of times a is stored in the storage unit when the remaining number of times indicated by the index being indexed is zero;
When it is determined that a first index is stored in the storage unit as an index corresponding to the remaining number of times a, the memory control unit writes the first index into the third memory as an index of the target pixel. Index control means for controlling
Drive control means for controlling voltage application to the target pixel when the remaining number indicated by the index stored in the third memory is not zero for the target pixel;
And a remaining number control unit that performs control to decrement the remaining number indicated by the first information stored in the storage unit when the predetermined period has elapsed. When the first determination unit determines that the index corresponding to the remaining number of times a is not stored in the storage unit, a correspondence relationship with the remaining number of the b indexes is defined in the storage unit. A second judging means for judging whether there is no second index,
When it is determined that the second index exists, the remaining number control unit writes information indicating a correspondence relationship between the second index and the remaining number of times a into the storage unit, and the index control unit includes the target The control device according to claim 1, wherein the memory control unit is controlled to write the second index as an index of a pixel in the third memory. When the second determination unit determines that there is no second index, the index control unit waits without writing an index to the third memory for the target pixel during the predetermined period. The control device according to claim 2. The memory control means controls access to a fourth memory storing data indicating previously displayed gradation values for each of the plurality of pixels;
The storage means stores second information that associates the gradation value stored in the fourth memory, the gradation value stored in the first memory, the remaining number of times, and the applied voltage,
The memory control means is configured so that a gradation value stored in the first memory is different from a gradation value stored in the second memory, and the remaining value indicated by an index stored in the third memory is used. If the number of times is zero, the value of the first memory is assigned to the fourth memory, the value of the second memory is assigned to the first memory,
The drive control means corresponds to the gradation value stored in the fourth memory, the gradation value stored in the first memory, and the index stored in the third memory in the voltage application. The control device according to any one of claims 1 to 3, wherein a voltage determined based on the remaining number of times and the second information stored in the storage unit is applied. A control device according to any one of claims 1 to 4,
An electro-optical device having the plurality of electro-optical elements.   An electronic apparatus comprising the electro-optical device according to claim 5. A plurality of electro-optic elements whose optical state changes from the first state to the second state by applying a voltage a time in units of a predetermined period; a control device; and a plurality of pixels corresponding to the plurality of electro-optic elements. For each of the plurality of pixels, a first memory storing the current gradation value, a second memory storing a gradation value to be displayed next, and a voltage application to each of the plurality of pixels A third memory storing data indicating any one of b indexes indicating the remaining number of times (b <a), and a memory storing first information indicating a correspondence relationship between the index and the remaining number A control method of an electro-optical device having means,
For the target pixel to be processed among the plurality of pixels, the gradation value stored in the first memory is different from the gradation value stored in the second memory, and is stored in the third memory. The controller determines whether an index corresponding to the remaining number of times a is stored in the storage means when the remaining number of times indicated by the index being indexed is zero;
When it is determined that the first index is stored in the storage unit as the index corresponding to the remaining number of times a, the control device writes the first index as the index of the target pixel in the third memory. When,
For the target pixel, when the remaining number indicated by the index stored in the third memory is not zero, the control device performs control to apply a voltage to the target pixel;
And a step of decrementing the remaining number of times indicated by the first information stored in the storage means when the predetermined period has elapsed.

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