JP2013086334A - Recorder and method of controlling transmission of data in the recorder - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a recorder of which the efficiency of transmission of data to a memory is improved so as to enhance recording performance, and to provide a method of controlling the transmission of data in the recorder.SOLUTION: The recorder performs recording on a recording medium in such a manner that it drives a recording head in accordance with color image data composed of a plurality of color components received from a host device. In the recorder, the following control processes are performed. Namely, the recorder receives color image data from a host device to store the data to a DDR-SDRAM, and reads the color image data stored in the DDR-SDRAM to perform image processing for each predetermined data amount while using an SRAM as a working area. At that time, the recorder transmits the color image data subjected to the image processing from the SRAM to the DDR-SDRAM so as to write the data therein every time the recorder completes the image processing for the predetermined data amount. After the recorder completes all the transmission from the SRAM and the writing, the recorder performs control so as to write additional information generated by the image processing into the DDR-SDRAM.

Description

  The present invention relates to a recording apparatus and a data transfer control method in the apparatus, and more particularly to an ink jet recording apparatus and a data transfer control method in a memory of the recording apparatus.

  In general, an inkjet printer, which is a type of image recording apparatus, records an image by ejecting ink onto a recording medium. The ink jet printer includes a recording head for ejecting ink onto a recording medium such as recording paper, a carriage that holds the recording head, a conveying unit that conveys the recording medium, and a carriage that is substantially perpendicular to the conveying direction of the recording medium. Drive means for movement. The recording head has a plurality of nozzles that eject ink droplets. Further, the ink jet printer includes a memory such as DDR-SDRAM or SRAM, and is used for storing image data and image processing.

  An inkjet printer (hereinafter referred to as a recording device) is usually connected to a host device such as a personal computer (PC), and all image data and dot count data transferred from the host device are provided in a DDR-SDRAM provided in the device. First stored. When the storage is completed, image processing is performed using the SRAM provided in the ASIC.

  FIG. 7 is a diagram showing a storage state of image data in the SRAM provided in the ASIC of the conventional recording apparatus. In FIG. 7, the effective image data size is 256 bits (column direction) × 256 bits (raster direction). In addition, since the SRAM requires an area of image data + α necessary for image processing, it is assumed here that the size of the SRAM is 320 bits × 256 bits.

  FIG. 7 schematically shows a state in which image data input from the external interface circuit of the recording apparatus is stored in the SRAM. As shown in FIG. 7A, the input image data is stored at consecutive addresses in the horizontal (raster) direction. On the other hand, FIG. 7B schematically shows a state in which image data after image processing is stored in the SRAM. As shown in FIG. 7B, the image data is stored with continuous addresses in the vertical (column) direction.

  After such image processing, image data is transferred from the SRAM to the DDR-SDRAM by 256 bits from the left in the state shown in FIG. 7B by the memory control circuit. If all the image data stored in the SRAM is transferred to the DDR-SDRAM, the next image data is transferred from the external interface circuit.

  FIG. 8 is a diagram for explaining an example of a dot counting method in a conventional recording apparatus.

  For example, the dot count is performed on an area obtained by dividing the image data of 256 bits × 256 bits as shown in FIG. Here, it is assumed that dot counting is performed for an area of 16 bits in the horizontal (raster) direction and 32 bits in the vertical (column) direction.

  When 256-bit × 256-bit image data is subjected to dot count in units of 16 bits in the horizontal direction and 32 bits in the vertical direction, the image data of 256 bits per column is divided into 8 areas as follows. That is, [255: 224], [223: 192], [191: 160], [159: 128], [127: 96], [95:64], [63:32], [31: 0] Divide into 8 areas and perform dot count. By performing this for 16 columns, a dot count value in a region of 16 bits in the horizontal direction and 32 bits in the vertical direction is obtained.

  As shown in FIG. 8, in the transfer to the DDR-SDRAM, dot count values in 8 regions (indicated by 0 to 7) of 16 bits in the horizontal (raster) direction and 32 bits in the vertical (column) direction are combined into 256 bits. And transferred as dot count data.

  As a transfer control technique for dot count data created based on such conventional image data, there is a method of speeding up access by controlling a bus (see, for example, Patent Document 1).

JP-A-8-202508

  However, in the conventional example, the dot count data is transferred to the DDR-SDRAM by interrupting the transfer of the image data to the DDR-SDRAM. The image data is stored at continuous addresses of the DDR-SDRAM, while the dot count data is stored at addresses discontinuous with the image data. Therefore, every time the transfer of dot count data is interrupted, data writing to discontinuous addresses occurs in the DDR-SDRAM, and the data transfer efficiency decreases. Although it is possible to improve the data transfer efficiency by providing a memory dedicated to dot count data, in that case, an extra memory is mounted, which increases the production cost of the apparatus.

  Further, in the conventional method, in order to obtain dot count data for each color component of the color image data in a certain area, the program is started, the CPU accesses the DDR-SDRAM, and the dot count data for each color component is read and obtained. Was. Therefore, access from the CPU to the DDR-SDRAM occurs at random, and the data transfer efficiency to the DDR-SDRAM has been reduced.

  The present invention has been made in view of the above conventional example, and an object of the present invention is to provide a recording apparatus in which data transfer efficiency to a memory is improved and recording performance is improved, and a data transfer control method in the apparatus.

  In order to achieve the above object, the recording apparatus of the present invention has the following configuration.

  That is, a recording apparatus that drives a recording head based on color image data including a plurality of color components received from a host apparatus and performs recording on a recording medium, and stores the color image data received from the host apparatus. 1 memory, image processing means for reading out color image data stored in the first memory and performing image processing for each predetermined amount of data, and a work area for image processing by the image processing means A second memory used as a memory, and a memory control means for controlling data input / output to the first memory and the second memory, wherein the memory control means has an image of the predetermined data amount. Each time processing is completed, the image-processed color image data is transferred from the second memory to the first memory for writing, and the image data from the second memory is written. And controlling to write the additional information generated by the image processing after sending the write is completed in the first memory.

  According to another aspect of the present invention, there is provided a data transfer control method in a recording apparatus that drives a recording head based on color image data composed of a plurality of color components received from a host apparatus and performs recording on a recording medium. A storage step of receiving the color image data from the host device and storing the color image data in a first memory; and reading out the color image data stored in the first memory to generate a second for each predetermined amount of data. An image processing step for performing image processing while using the memory as a work area, and a memory control step for controlling data input / output to the first memory and the second memory, and in the memory control step, Each time image processing of the predetermined data amount is completed, the color processed image data is transferred from the second memory to the first memory and written. A data transfer control method for controlling the additional information generated by the image processing to be written in the first memory after the transfer and writing from the second memory are completed. Prepare.

  Therefore, according to the present invention, the control is performed so that the additional information generated by the image processing is written in the first memory after the transfer of the image-processed color image data from the second memory to the first memory is completed. Therefore, there is an effect that the transfer efficiency to the first memory is improved.

  For example, when obtaining the dot count value of each color component of color image data of a predetermined data amount, the number of random accesses to the DDR-SDRAM as the first memory can be reduced, and the transfer efficiency is improved.

1 is a perspective view showing a main mechanism portion of an ink jet recording apparatus which is a typical embodiment of the present invention. FIG. 2 is a block diagram illustrating a control configuration of the recording apparatus illustrated in FIG. 1. It is the flowchart which showed the transfer control process of the image data to the receiving buffer according to Example 1 of this invention. It is a figure which shows the processing timing of image data. It is the flowchart which showed the transfer control process of the image data to the receiving buffer according to Example 2 of this invention. It is the flowchart which showed the transfer control process of the image data to the receiving buffer according to Example 3 of this invention. It is a figure which shows the storage state of the image data to SRAM with which the conventional recording device was equipped. It is a figure explaining an example of the conventional dot count method.

  Hereinafter, preferred embodiments of the present invention will be described more specifically and in detail with reference to the accompanying drawings. The configurations disclosed in the following embodiments are merely examples, and the present invention is not limited to the illustrated configurations.

  In this specification, “recording” (sometimes referred to as “printing”) is not limited to the case of forming significant information such as characters and graphics, but may be significant. Furthermore, it also represents a case where an image, a pattern, a pattern, or the like is widely formed on a recording medium or a medium is processed regardless of whether or not it is manifested so that a human can perceive it visually.

  “Recording medium” refers not only to paper used in general recording apparatuses but also widely to cloth, plastic film, metal plate, glass, ceramics, wood, leather, and the like that can accept ink. Shall.

  Further, “ink” (sometimes referred to as “liquid”) should be interpreted widely as in the definition of “recording (printing)”. Therefore, by being applied on the recording medium, it is used for formation of images, patterns, patterns, etc., processing of the recording medium, or ink processing (for example, solidification or insolubilization of the colorant in the ink applied to the recording medium). It shall represent a liquid that can be made.

   Further, the “recording element” (sometimes referred to as “nozzle”) is a general term for an ink discharge port, a liquid path communicating with this, and an element that generates energy used for ink discharge unless otherwise specified. Say it.

  FIG. 1 is a perspective view showing a main mechanism configuration of an ink jet recording apparatus (hereinafter referred to as a recording apparatus) which is a typical embodiment of the present invention.

  As shown in FIG. 1, this recording apparatus includes an inkjet recording head (hereinafter referred to as recording head) 601 having a plurality of nozzles for ejecting ink, and a carriage shaft 603 in the directions of arrows Q1 and Q2 (main scanning direction). A carriage 602 that reciprocates along the axis is provided. When the carriage 602 reciprocates, the encoder film 604 provided parallel to the carriage axis is read, and the recording timing by the recording head 601 is generated. An optical sensor 605 is disposed on the side surface of the carriage 602, and measures the distance between the ink ejection surface of the recording head and the recording medium P every time the carriage is scanned.

  Further, a maintenance device 609 for the recording head 601 is provided in the vicinity of the home position of the carriage 602, and performs capping of the recording head 601, wiping of the ink ejection surface of the head, recovery of the recording head, and the like. The recording head 601 is capped by a head cap 610, and the nozzles of the recording head 601 are sealed to prevent ink drying.

  When the recording operation is started, the recording medium P is fed to a paper feeding position by a paper feeding roller (not shown) and conveyed to a predetermined printing start position by a conveying roller 607. The recording medium P transported to the recordable area by the transport roller 607 is supported by the platen 608 from below.

  The carriage 602 reciprocates along the main scanning direction in a scanning area including a recording area of a carriage motor (not shown), while the recording head 601 is directed from the nozzle toward the recording medium P positioned below the nozzle. Ink is ejected. As a result, recording for one scan is performed. When one main scanning is completed, the recording medium P is transported by a certain amount in the direction indicated by the arrow R (sub-scanning direction) to prepare for the next main scanning. By repeating these main scanning and sub-scanning, recording is performed on the entire surface of the recording medium P.

  At this time, the inter-paper distance is measured by the optical sensor 605 mounted on the carriage 602, and the slit of the encoder film 604 is read by the encoder sensor 606 mounted on the carriage 602. Thereby, the recording timing by the recording head 601 is obtained.

  FIG. 2 is a block diagram showing a control configuration of the recording apparatus shown in FIG.

  In FIG. 2, reference numeral 100 denotes an external input device such as a PC, digital camera, or HDD, 101 denotes a CPU for controlling the entire apparatus, 102 denotes an ASIC for performing hardware control specific to the recording apparatus, and 103 denotes connection to the external input device 100. External interface circuit. The external interface circuit 103 includes circuits such as a USB interface circuit, a LAN interface circuit, and an IDE interface circuit. A CPU interface circuit 104 is connected to the CPU 101 to receive information from the CPU 101, and a memory control circuit 105 controls data input / output with the memory. PCs, digital cameras, HDDs, and the like are sometimes collectively referred to as host devices.

  The memory control circuit 105 is connected to the external interface (IF) circuit 103, the SRAM 106, and the image data processing circuit 107. The memory control circuit 105 transfers image data input from the external input device 100 to the SRAM 106.

  An SRAM 106 is used as a work area and stores image data divided into specific sizes. The number of SRAMs is determined depending on the number of ink colors used by the recording apparatus, the number of nozzles of the recording head, and the like. In this embodiment, the image data is processed by being divided into six color components corresponding to the number of ink colors used in the printing apparatus, and the SRAM is provided with six SRAMs 0 to 5 corresponding to this. To do.

  An image data processing circuit 107 performs image processing such as HV conversion, smoothing processing, and undischarge interpolation on the image data stored in the SRAM 106. Reference numeral 108 denotes an apparatus main body drive circuit that drives the motor 109, and 110 denotes a head control circuit that controls the recording head 601. Reference numeral 112 denotes a dot count generation circuit that calculates the cumulative number of dots per rectangular area of image data that has undergone image processing. Reference numeral 114 denotes a dot count addition circuit that adds the dot count data generated by the dot count generation circuit 112. .

  In addition to the dot count generation circuit 112 and the dot count addition circuit 114, the memory control circuit 105 includes all circuits that perform processing on image data on which image processing has been performed and create recording data.

  Reference numeral 113 denotes a DDR-SDRAM that is externally attached to the ASIC and serves as a reception buffer and stores image-processed image data, dot count data, dot count addition data, and the like.

  The head control circuit 110 converts the image data stored in the DDR-SDRAM 113 into data in a format that matches the nozzle configuration of the recording head, and transfers this to the recording head 601. The dot count data is used to adjust the amount of ink ejected from the nozzles when the head control circuit 110 converts the image data into data in a format that matches the nozzle configuration, or according to the dot count data from the apparatus main body drive circuit 108. Used for motor drive. The dot count addition data is used for adjusting the number of simultaneous ejection nozzles of the recording head, thinning out output image data, and the like.

  Next, several embodiments of image data transfer control executed in the recording apparatus having the above configuration will be described.

  FIG. 3 is a flowchart showing a process for controlling the transfer of image data to the reception buffer.

  First, in step S100, image data is input from the external input device 100, and in step S150, the external interface circuit 103 receives the image data. In step S200, the memory control circuit 105 writes the image data received by the external interface circuit 103 into the SRAM 106 (first memory). In step S250, the image data processing circuit 107 performs image processing on the SRAM 106 in which the image data is stored.

  Now, in step S300, the memory control circuit 105 reads out the image data for each specific unit, for example, 256 bits from the SRAM 106 storing the image data for which image processing has been completed. In step S350, the dot count generation circuit 112 performs dot count on the image data read by 256 bits and generates dot count data. Further, in step S400, the memory control circuit 105 transfers the image data to the DDR-SDRAM (second memory) 113 by 256 bits.

  Since the transfer of the image data for the specific column to the DDR-SDRAM 113 is completed at the time when the generation of the dot count data is completed, the area of the SRAM 106 in which the transferred image data is stored becomes an empty area. ing. At this timing, since the image data is not transferred from the external interface circuit 103 to the SRAM 106, the dot count data is transferred to the empty area by the memory control circuit 105 in step S450.

After the transfer of the image data to the DDR-SDRAM 113 is completed by the memory control circuit 105, the dot count data is transferred to the DDR-SDRAM 113 in step S500.
When all the image data and dot count data are transferred to the DDR-SDRAM 113, the same processing is performed in the next SRAM.

  FIG. 4 is a diagram showing processing timing of image data. 4A shows the processing timing of image data in the prior art, and FIG. 4B shows the processing timing of image data in the recording apparatus according to this embodiment. Here, it is assumed that the color image data is processed by being divided into six color components corresponding to the number of ink colors used in the printing apparatus.

  The SRAMs 106 are SRAM0, SRAM1, SRAM2, SRAM3, SRAM4, and SRAM5 corresponding to the color components, respectively. First, the image data is transferred to the SRAM 0 by the external interface circuit 103. When the transfer to the SRAM0 is completed, the image data is transferred to the SRAM1, SRAM2,. The transfer of image data from the external interface circuit 103 is stopped until the image data stored in all six SRAMs is transferred to the DDR-SDRAM 113.

  The image data stored in each SRAM is subjected to image processing and then transferred to the DDR-SDRAM 113. According to a conventional transfer method to a DDR-SDRAM (see FIG. 4A), dot count data is transferred after transferring image data a plurality of times. After the transfer of the SRAM0 data to the DDR-SDRAM, the SRAM1 data is transferred to the DDR-SDRAM. After the data stored in all the SRAMs is transferred to the DDR-SDRAM, the next image data is transferred from the external interface circuit 103.

  Now, comparing FIG. 4A and FIG. 4B, it can be seen that in this embodiment, the DDR-SDRAM transfer time is shorter than the control timing in the conventional example. This is because, unlike the conventional example in which the image data and the dot count data are sent alternately, all the dot count data is transferred after the transfer of all the image data, so that the address only needs to be rewritten once. is there.

  According to the conventional example, for example, when dot count is performed for a data amount of a 16-bit horizontal and 32-bit vertical area, data is stored in areas having different addresses as follows. That is, a total of 31 times when changing from image data transfer to dot count data transfer and when changing from dot count data transfer to image data transfer. On the other hand, according to the method according to this embodiment, since the address is rewritten only once, the transfer speed to the DDR-SDRAM is improved. It is clear from the figure that this effect becomes more remarkable as the number of SRAMs used increases.

  The dot count data of each color component of the image data in a certain area is necessary for the control of the recording head in that area, such as adjustment of the number of simultaneous ejection nozzles of the recording head and thinning of the output image data.

  In the second embodiment, an example will be described in which the dot count adding circuit 114 shown in FIG. 2 is used to reduce the number of times that the CPU accesses the DDR-SDRAM randomly. As a result, according to this embodiment, not only is the processing speed increased by simply changing the software processing to the hardware processing, but the access efficiency to the DDR-SDRAM is increased, and the processing speed can be further increased. .

  FIG. 5 is a flowchart showing a process for controlling the transfer of image data to the reception buffer according to the second embodiment. Note that the same processing steps as those described in the first embodiment are denoted by the same step reference numerals, and description thereof is omitted.

  After the processing in steps S100 and S150, in step S200 ', the image data received by the external interface circuit 103 is written in the order of SRAM0, SRAM1, SRAM2, SRAM3, SRAM4, and SRAM5 by the memory control circuit 105. The image data is not written into the SRAM 106 by the memory control circuit 105 until all the image data is transferred to the DDR-SDRAM 113.

  Further, in step S300 ', image processing by the image data processing circuit 107 is performed in the order of SRAM0, SRAM1, SRAM2, SRAM3, SRAM4, and SRAM5 with respect to the SRAM 106 in which the image data is stored.

  Next, in step S301, the memory control circuit 105 reads the image data for each specific unit, for example, 256 bits from the SRAM 0 for which image processing has been completed. In step S302, the dot count generation circuit 112 performs dot count on the image data read out by 256 bits to generate dot count data. In step S303, the memory control circuit 105 transfers the image data in the SRAM 0 to the DDR-SDRAM 113 by 256 bits.

  At this point, generation of dot count data is completed, and image data for a specific column has been transferred to the DDR-SDRAM. Therefore, the area of SRAM 0 in which the transferred image data is stored is an empty area. It has become. At this timing, since the image data is not transferred from the external interface circuit 103 to the SRAM 0, in step S304, the memory control circuit 105 transfers the dot count data to the empty area.

  The processing in steps S301 to S304 is repeated until the transfer of image data is completed.

  In step S310, the transfer of the image data to the DDR-SDRAM by the memory control circuit 105 ends. In a state where all the image data of SRAM0 is transferred to the DDR-SDRAM, dot count data executed for SRAM0 is stored in SRAM0.

  Next, in step S351, the memory control circuit 105 reads image data for each specific unit, for example, 256 bits from the SRAM 1 for which image processing has been completed. In step S352, the dot count generation circuit 112 performs dot count on the image data read out by 256 bits to generate dot count data. In step S353, the memory control circuit 105 transfers the image data in the SRAM 1 to the DDR-SDRAM 113 by 256 bits.

  In step S354, the memory control circuit 105 reads dot count data in the same area as the dot count data of SRAM1 from SRAM0. Further, in step S355, after the dot count data generation of the SRAM 1 is completed, the dot count addition circuit 114 generates dot count data that is the sum of the dot count data of the SRAM 0 and SRAM 1, and transfers this to the empty area of the SRAM 1.

  The processing from the above steps S351 to S355 is similarly performed for other SRAMs. As a result, the dot count data obtained by adding the dot count values of the SRAMs 0 to 5 in the same area is stored in the SRAM 5 area after the image data of the SRAM 5 is transferred to the DDR-SDRAM.

  After all the image data in the SRAM 5 has been transferred to the DDR-SDRAM in step S455, the memory control circuit 105 transfers the dot count data to the DDR-SDRAM 113 in step S500 '. The dot count data transferred to the DDR-SDRAM 113 is dot count data obtained by summing the dot count values of the SRAM0 to SRAM5 in the same area.

  Therefore, according to the above-described embodiment, the CPU executes a predetermined program and reads the dot count data from the DDR-SDRAM, so that the sum of the dot count values of the respective color components in a certain area can be easily performed without the need for addition processing. Can be obtained.

  In the second embodiment, the example in which only the dot count value of each color component of the image data in a certain area is transferred to the DDR-SDRAM has been described. Here, an example will be described in which the dot count value for each SRAM is sent together at the end of the image data and the total dot count value of each color component is transferred to the end of the final color as in the first embodiment.

  FIG. 6 is a flowchart showing a process for controlling transfer of image data to the reception buffer according to the third embodiment. Note that the same processing steps as those described in the first and second embodiments are denoted by the same step reference numerals, and description thereof is omitted.

  The processing of steps S301 to S304 is executed on the SRAM 0 for which image processing has been completed. After the transfer of the image data to the DDR-SDRAM 113 by the memory control circuit 105, the dot count data is transferred to the DDR-SDRAM in step S305. In this way, in step S310, all the image data stored in the SRAM0 is transferred to the DDR-SDRAM. At this time, the dot count data of SRAM0 is stored in SRAM0.

  Next, the processing of steps S351 to S354 is executed on the SRAM 1 for which image processing has been completed, as in the second embodiment. In step S354a, the memory control circuit 105 transfers the dot count data to the empty area of the SRAM 1. Further, in step S355, the dot count addition circuit 114 calculates the sum of the dot count data that is the same as that transferred to the SRAM 1 and the dot count data of the SRAM 0, and transfers this to the empty area of the SRAM 1.

  In step S360, the memory control circuit 105 transfers the dot count data to the DDR-SDRAM 113 after completing the transfer of the image data to the DDR-SDRAM. Thus, in step S370, all the image data stored in the SRAM 1 is transferred to the DDR-SDRAM 113. At this time, the dot count data obtained by summing the dot count data of SRAM0 and SRAM1 is stored in SRAM1.

  The processing from the above steps S351 to S370 is similarly executed for other SRAMs. As a result, in the area of the SRAM 5 after transferring the image data of the SRAM 5 to the DDR-SDRAM, dot count data obtained by summing the dot count values of the SRAM 0 to 5 in the same area as the dot count data for the image data stored in the SRAM 5 is stored. Stored.

  In step S455, after all the image data in the SRAM 5 and the dot count data for the SRAM 5 have been transferred to the DDR-SDRAM, the memory control circuit 105 transfers the dot count data to the DDR-SDRAM 113 in step S500 '.

  Therefore, according to the embodiment described above, the dot count value for each SRAM can be sent together at the end of the image data, and the total dot count value of each color component can be transferred to the end of the final color.

  In the first to third embodiments, dot count data has been used as an example of additional information generated from image data. However, the present invention is not limited to this and is information other than dot count data. May be. For example, the number of dots of image data in a certain area is predicted, and when the number of dots is larger than the actual number of dots in a certain area, “1” is set, and when it is less, “0” is set. Information may be obtained and transferred to the DDR-SDRAM.

  However, among the information generated from the image data, the dot count data is necessary information for the ejection control of the recording head and the drive control of the motor. Therefore, the dot count data is frequently generated and used from the image data. Application to is suitable in the present invention.

Claims (7)

A recording device that drives a recording head based on color image data composed of a plurality of color components received from a host device and performs recording on a recording medium,
A first memory for storing color image data received from the host device;
Image processing means for reading out color image data stored in the first memory and performing image processing for each predetermined amount of data;
A second memory used as a work area for image processing by the image processing means;
Memory control means for controlling data input / output to and from the first memory and the second memory;
The memory control means transfers the image-processed color image data from the second memory to the first memory and writes the image-processed color image data every time the predetermined amount of image processing is completed. A recording apparatus that controls to write additional information generated by the image processing into the first memory after all of the transfer and writing from the second memory are completed. The recording head is an inkjet recording head that discharges a plurality of colors of ink;
The plurality of color components of the color image data correspond to the plurality of colors,
The second memory is divided into a plurality of regions by the number of the plurality of colors;
The recording apparatus according to claim 1, wherein the image processing unit uses one of the plurality of regions corresponding to image processing of each of a plurality of color components of the color image data. The image processing includes a dot count executed for each predetermined amount of data,
The additional information is a value of the dot count;
The memory control means controls to write the value of the dot count into the area of the second memory which is vacated by transferring the color image data subjected to the image processing to the first memory. The recording apparatus according to claim 2, wherein the recording apparatus is a recording apparatus. Further comprising an adding means for adding a dot count for each of the plurality of regions,
The memory control means further executes the transfer of the color processed image data from the second memory to the first memory in order for the plurality of areas, and each time the transfer is executed in order, 4. The recording apparatus according to claim 3, wherein addition is performed by an adding means, and control is performed so that the added dot count value is written in the area that has become free as a result of the transfer.   The memory control means further executes a value of dot count for each of the plurality of areas each time the image processed color image data is transferred from the second memory to the first memory in order. The recording apparatus according to claim 4, wherein the recording apparatus is controlled to transfer the data to the first memory. The first memory is a DDR-SDRAM;
The recording apparatus according to claim 1, wherein the second memory is an SRAM. A data transfer control method in a recording apparatus for driving a recording head based on color image data composed of a plurality of color components received from a host apparatus and recording on a recording medium,
Receiving the color image data from the host device and storing it in a first memory;
An image processing step of reading color image data stored in the first memory and performing image processing while using the second memory as a work area for each predetermined amount of data;
A memory control step for controlling data input / output to and from the first memory and the second memory;
In the memory control step, each time image processing of the predetermined amount of data is completed, the color processed image data is transferred from the second memory to the first memory and written, A data transfer control method comprising: controlling the additional information generated by the image processing to be written in the first memory after all the transfer and writing from the second memory are completed.

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