JP2013085081A - Semiconductor device, semiconductor design method, transmitter and transceiver - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device provided with an output power detection circuit outputting a detection voltage having wide dynamic range and minimized temperature fluctuation because a correct output voltage cannot be obtained when the detection voltage by the output power detection circuit depends on a temperature.SOLUTION: An output power detection circuit 1 comprises: a regulator circuit which outputs a reference voltage having predetermined temperature characteristics, and first and second reference currents having no temperature characteristics; a first detector circuit which accepts an input signal and converts a voltage of the input signal to a first voltage and invalidates temperature characteristics of the first voltage depending on the reference voltage and the first reference current to output the resultant as a first detection voltage; a second detector circuit which accepts an input signal and converts a voltage of the input signal to a second voltage and invalidates temperature characteristics of the second voltage depending on the reference voltage and the second reference current to output the resultant as a second detection voltage; and a detection circuit outputting a voltage obtained by composition of the first and the second detection voltages.

Description

  The present invention relates to a semiconductor device. In particular, the present invention relates to a semiconductor device including an output power detection circuit, a semiconductor device design method, a transmitter, and a transceiver.

  In recent years, electronic devices compatible with Bluetooth and wireless LAN (Local Area Network) have been widely used. These electronic devices communicate with a host device, an access point, and the like using wireless as a communication means.

  The electric power of radio waves output from these electronic devices is regulated to be a certain value or less. This is because if each electronic device outputs radio waves randomly, the radio waves interfere with each other, causing trouble. Therefore, electronic devices capable of wireless communication need to comply with regulations stipulated by laws and regulations of each country. Therefore, an electronic device capable of wireless communication includes an output power detection circuit that detects output power of radio waves.

  An electronic device capable of wireless communication uses the detection voltage output from the output power detection circuit to control the gain of the amplifier circuit and comply with regulations regarding output power. Further, the power of radio waves does not fluctuate within a narrow range, and the fluctuation range is wide. Therefore, the output power detection circuit needs to be able to accurately detect the power even when the radio wave power is low or high. That is, the range (dynamic range) that can be detected by the output power detection circuit must be wide.

  Here, Patent Documents 1 to 3 disclose techniques for improving the dynamic range of the output power detection circuit.

  The output power detection circuit disclosed in Patent Document 1 includes a multistage amplifier that amplifies a high-frequency signal extracted through a capacitive element or the like. Furthermore, a plurality of detection circuits for detecting the output of each stage amplifier and a detection circuit for detecting a high-frequency signal that does not pass through a multistage amplifier are provided, and the output power detection signal is a combination of the outputs of these detection circuits. Output. As a result, the dynamic range of the output power detection circuit is expanded, and continuous detection without an inflection point is possible from a low output power region to a high output power region.

  The output power detection circuit disclosed in Patent Document 2 includes two detection circuits. The output power detection circuit disclosed in Patent Document 2 expands the dynamic range of the output power detection circuit by linking two detection circuits. More specifically, the output voltage of the previous detection circuit is used as a bias for the subsequent detection circuit, and the sensitivity of each detection circuit is changed.

  The output power detection circuit disclosed in Patent Document 3 includes two detection circuits. The output power detection circuit disclosed in Patent Document 3 uses a different detection circuit for each of a low output voltage region and a high output voltage region, thereby expanding the dynamic range of the output power detection circuit. More specifically, a switch is provided in a detection circuit responsible for detection in a region where the output voltage is low, and the above-described switch is turned off at the timing when the detection circuit responsible for detection in a region where the output voltage is high starts detection. As a result, the influence on the detection circuit on the high frequency side is eliminated from the detection circuit on the low frequency side, and the dynamic range of the output power detection circuit can be expanded.

JP 2007-116651 A JP 2006-094075 A JP 2000-329802 A

  Each disclosure of the above prior art document is incorporated herein by reference. The following analysis has been made from the viewpoint of the present invention.

  Here, the wireless communication is not limited to a device used only indoors, but is also used in a vehicle-mounted device (for example, ECT (Electronic Toll Collection)) or RFID (Radio Frequency IDentification). The operating temperature range guaranteed by these devices is extremely wide. For example, a vehicle-mounted device is required to operate normally even in an environment where it is exposed to an environment below freezing for a long time or in an environment where it is exposed to direct sunlight for a long time.

  Even in such a harsh environment, the power of radio waves output from electronic devices capable of wireless communication must satisfy regulations. That is, it is not necessary to satisfy the regulations only in a room temperature environment, and even when the ambient temperature is extremely low or high, the power of the radio wave must comply with the regulations.

  However, Patent Documents 1 to 3 described above do not disclose an output power detection circuit that takes into account the temperature characteristics of a semiconductor element such as a diode.

なお、Ｖ_Ｔは熱電圧（常温で約２６ｍＶ）、Ｉｓは飽和電流である。さらに、飽和電流Ｉｓは下記の式（２）で表すことができる。

なお、ｋはボルツマン定数、Ｔは絶対温度、Ａは定数、Ｅｇはシリコンバンドギャップエネルギーである。式（１）を温度Ｔで微分することにより、ダイオードのベース・エミッタ間電圧Ｖ_ＢＥの温度特性が計算できる。

なお、ｑはクーロン定数である。このように、ダイオードのベース・エミッタ間電圧Ｖ_ＢＥは温度に依存する。 Here, the base-emitter voltage V _BE at which the diode is turned on can be expressed by the following equation (1).

Note that V _T is a thermal voltage (about 26 mV at room temperature), and Is is a saturation current. Further, the saturation current Is can be expressed by the following formula (2).

Here, k is a Boltzmann constant, T is an absolute temperature, A is a constant, and Eg is a silicon band gap energy. By differentiating the equation (1) with the temperature T, the temperature characteristic of the base-emitter voltage V _BE of the diode can be calculated.

Note that q is a Coulomb constant. Thus, the base-emitter voltage V _BE of the diode depends on the temperature.

FIG. 10 is a diagram illustrating an example of a current-voltage characteristic of the diode. As shown in FIG. 10, the base-emitter voltage V _BE when the diode transitions to the on state becomes higher as the temperature is lower, and becomes lower as the temperature is higher.

  As described above, semiconductor elements such as diodes each have temperature characteristics. The output power detection circuit designed without considering this temperature characteristic outputs a different detection voltage if the ambient temperature is different even if the input voltage is the same. If the detection voltage of the output power detection circuit depends on temperature, an electronic device capable of wireless communication cannot obtain accurate output power even if the dynamic range is wide. Therefore, a semiconductor device, a semiconductor device design method, a transmitter, and a transceiver that include an output power detection circuit that outputs a detection voltage with a wide dynamic range and suppressed temperature fluctuation are desired.

  According to a first aspect of the present invention, a regulator circuit that outputs a reference voltage having a predetermined temperature characteristic and first and second reference currents that do not have a temperature characteristic, an input signal is received, and the input A first detection circuit that converts a signal voltage into a first voltage, invalidates a temperature characteristic of the first voltage in accordance with the reference voltage and the first reference current, and outputs the first voltage as a first detection voltage. A circuit, receiving the input signal, converting a voltage of the input signal into a second voltage, invalidating a temperature characteristic of the second voltage according to the reference voltage and the second reference current, And a detection circuit that outputs a power detection voltage obtained by synthesizing the first and second detection voltages, and a second detection circuit that outputs the second detection voltage as a second detection voltage.

  According to a second aspect of the present invention, the semiconductor device according to the first aspect, a control block that receives the power detection voltage, a variable gain amplifier that is connected to the control block and receives a transmission signal, and the variable A power amplifier that amplifies the voltage output from the gain amplifier, and the output of the power amplifier is used as an input signal to the first and second detection circuits, and the control block is based on the power detection voltage. A transmitter for changing the gain of the variable gain amplifier is provided.

  According to a third aspect of the present invention, the semiconductor device according to the first aspect, a control block that receives the power detection voltage, a variable gain amplifier that is connected to the control block and receives a transmission signal, and the variable A power amplifier that amplifies the voltage output from the gain amplifier, and the output of the power amplifier is used as an input signal to the first and second detection circuits, and the control block is based on the power detection voltage. A transceiver for changing the gain of the variable gain amplifier is provided.

  According to a fourth aspect of the present invention, a regulator circuit that includes a bandgap reference circuit and outputs a reference voltage having a predetermined temperature characteristic and first and second reference currents having no temperature characteristic; An input signal is received, the voltage of the input signal is converted into a first voltage, the temperature characteristic of the first voltage is invalidated according to the reference voltage and the first reference current, and the first detection voltage A first detection circuit that outputs the input signal, receives the input signal, converts the voltage of the input signal to a second voltage, and determines the second voltage according to the reference voltage and the second reference current. A semiconductor device comprising: a second detection circuit that invalidates the temperature characteristics and outputs the second detection voltage as a second detection voltage; and a detection circuit that outputs a power detection voltage obtained by synthesizing the first and second detection voltages. The design method of Designing a gap gap reference circuit; determining amplitudes of the first and second voltages based on a dynamic range of the detection circuit; and disabling temperature characteristics of the first and second voltages. A method for designing a semiconductor device is provided that includes a step of determining the predetermined temperature characteristic of the reference voltage and the current values of the first and second reference currents.

  According to each aspect of the present invention, a semiconductor device including an output power detection circuit that outputs a detection voltage in which a dynamic range is wide and temperature fluctuation is suppressed, a semiconductor device design method, a transmitter, and a transceiver include: Provided.

It is a figure which shows an example of a structure of the output power detection circuit 1 contained in the semiconductor device which concerns on the 1st Embodiment of this invention. It is a figure which shows an example of the circuit structure of the regulator circuit 10 shown in FIG. It is a figure which shows an example of the circuit structure of the detection circuit 20 shown in FIG. 3 is a diagram illustrating an example of a detection voltage in a detection circuit 21. FIG. 3 is a diagram illustrating an example of a detection voltage in a detection circuit 21. FIG. It is a figure which shows an example of the output waveform of the detection circuits 21 and 22. FIG. It is a figure which shows an example of the electric power detection voltage V_det which the output electric power detection circuit 1 outputs. 3 is a flowchart illustrating an example of a design method for the output power detection circuit 1. It is a figure which shows an example of the internal structure of the transmitting apparatus 2 which concerns on the 2nd Embodiment of this invention. It is a figure which shows an example of the electric current-voltage characteristic of a diode.

  First, an outline of an embodiment will be described with reference to FIG. Note that the reference numerals of the drawings attached to this summary are attached to the respective elements for convenience as an example for facilitating understanding, and are not intended to limit the present invention to the illustrated embodiment.

  As described above, if the detection voltage of the output power detection circuit depends on temperature, an electronic device capable of wireless communication cannot obtain accurate output power even if the dynamic range is wide. Therefore, a semiconductor device including an output power detection circuit that outputs a detection voltage with a wide dynamic range and suppressed temperature fluctuation is desired.

  An output power detection circuit 1 shown in FIG. 1 receives a reference voltage having a predetermined temperature characteristic and a first and second reference currents having no temperature characteristic, an input signal, and an input signal. A first detection circuit that converts the voltage of the signal into a first voltage, invalidates the temperature characteristic of the first voltage in accordance with the reference voltage and the first reference current, and outputs the first voltage as the first detection voltage; Receiving the input signal, converting the voltage of the input signal into a second voltage, invalidating the temperature characteristic of the second voltage according to the reference voltage and the second reference current, and outputting the second detection voltage as the second detection voltage; And a detection circuit 20 that outputs a voltage obtained by combining the first and second detection voltages.

  The regulator circuit 10 supplies a reference voltage Vref_det having a predetermined temperature characteristic and reference currents I_det1 and I_det2 having no temperature characteristic to the detection circuit 20. The detection circuit 20 detects the power of the input signal using the power supply (reference voltage Vref_det, reference currents I_det1 and I_det2) output from the regulator circuit 10. At this time, the temperature characteristic of the reference voltage Vref_det is designed to invalidate the temperature characteristic of the semiconductor element included in the detection circuit 20 (cancel the temperature characteristic). Therefore, the temperature characteristic of the voltage output from the first and second detection circuits included in the detection circuit 20 can be invalidated. Needless to say, invalidation of the temperature characteristic does not mean that the temperature characteristic has disappeared. Disabling the temperature characteristic means to reduce the original temperature characteristic. The same is true for “not having temperature characteristics”, meaning that the inherent temperature characteristics have been reduced.

  Furthermore, the voltages (amplitudes) of the input signals to the first and second detection circuits are converted, and the input ranges in the first and second detection circuits are designed to be different ranges. More specifically, if the signal input to the second detection circuit is attenuated more than the signal input to the first detection circuit, the second detection circuit detects a signal having a larger amplitude. Can do. As described above, in the first and second detection circuits, the input ranges are made different from each other, and the detection voltage output from each is synthesized, so that the dynamic range of the output power detection circuit can be expanded.

  As described above, the power source that can invalidate the temperature characteristic of the detection voltage of the detection circuit 20 from the regulator circuit 10 is supplied. Furthermore, the detection circuit 20 includes two detection circuits having different input ranges, and the dynamic range is expanded by synthesizing the output voltages of the respective detection circuits. As a result, it is possible to provide an output power detection circuit that outputs a detection voltage in which the dynamic range is wide and temperature fluctuation is suppressed.

  In the present invention, the following modes are possible.

  [Mode 1] As in the semiconductor device according to the first aspect.

  [Mode 2] The regulator circuit includes a band gap reference circuit including a first current source, a second current source that supplies the first reference current, and a third current source that supplies the second reference current. A current source; and the regulator circuit includes a first resistor disposed between an output node of the bandgap reference circuit and the first current source, and the first current source and the current source The reference voltage is output from a connection node to the first resistor, and the current supplied from the second and third current sources is based on the voltage output from the bandgap reference circuit and the reference resistor having no temperature characteristic. It is preferable that the value is determined.

  [Mode 3] In the first detection circuit, the input signal is received by the collector via the second resistor and the emitter-grounded first transistor and the base are commonly connected to the base of the first transistor. A second emitter-grounded second transistor, wherein the second detector circuit receives the input signal at a collector via a third resistor, and a base has a base, A grounded-emitter fourth transistor commonly connected to the base of the third transistor, and the reference voltage output node and the second transistor are connected via a fourth resistor, and the reference voltage The output node of the first transistor and the fourth transistor are connected via a fifth resistor, the second current source and the collector of the first transistor are connected, and the third transistor It is preferable that current sources and collector of said third transistor is connected.

  [Mode 4] The resistance value of the third resistor is preferably higher than the resistance value of the second resistor.

  [Mode 5] The predetermined temperature characteristic is determined by a resistance value of the first resistor, and the temperature characteristic of the first voltage is determined by the predetermined temperature characteristic of the reference voltage and the first reference current. The second voltage is determined based on a current value and a resistance value of the fourth resistor, and the temperature characteristic of the second voltage is the predetermined temperature characteristic of the reference voltage and the current value of the second reference current. And a resistance value of the fifth resistor.

  [Mode 6] The transmitter according to the second aspect.

  [Mode 7] The transmitter / receiver according to the third aspect.

  [Mode 8] The method for designing a semiconductor device according to the fourth aspect.

  Hereinafter, specific embodiments will be described in more detail with reference to the drawings.

[First Embodiment]
The first embodiment of the present invention will be described in more detail with reference to the drawings.

  FIG. 1 is a diagram illustrating an example of a configuration of an output power detection circuit 1 included in the semiconductor device according to the present embodiment.

  The output power detection circuit 1 includes a regulator circuit 10 and a detection circuit 20.

  The regulator circuit 10 is supplied with a power supply voltage VDD from a power supply generation circuit included in the semiconductor device. The regulator circuit 10 outputs a reference voltage Vref_det and reference currents I_det1 and I_det2. Further, the regulator circuit 10 is connected to the reference resistor Rref.

  The detection circuit 20 receives the reference voltage Vref_det output from the regulator circuit 10 and the reference currents I_det1 and I_det2. The detection circuit 20 receives a signal for power detection via the input terminal In. The detection circuit 20 outputs a voltage proportional to the power of the signal received from the input terminal In from the output terminal Out.

  Next, the regulator circuit 10 will be described.

  FIG. 2 is a diagram illustrating an example of the circuit configuration of the regulator circuit 10. The regulator circuit 10 includes diodes D01 to D03, P channel type MOS transistors P01 to P07, operational amplifiers A01 to A03, and resistors R01 to R04. The diode D02 indicates that N (N is an integer of 2 or more, the same applies hereinafter) diodes are connected in parallel. The diodes D01 and D03 are one diode.

  The sources of the P-channel MOS transistors P01 to P03 are connected to the power supply voltage VDD. The gate of the P-channel MOS transistor P01 is connected to the output node of the operational amplifier A01. The drain of the P-channel MOS transistor P01 is connected to the anode of the diode D01 and the input node (inverting input) of the operational amplifier A01. The gate of the P-channel MOS transistor P02 is connected to the output node of the operational amplifier A01. The drain of the P-channel MOS transistor P02 is connected to the anode of the diode D02 and the input node (non-inverting input) of the operational amplifier A01. The gate of the P-channel MOS transistor P03 is connected to the output node of the operational amplifier A01. The drain of the P-channel MOS transistor P03 is connected to the anode of the diode D03 and the input node (inverting input) of the operational amplifier A02 via the resistor R03.

  A connection node of the drain of the P-channel MOS transistor P03, the resistor R03, and the input node of the operational amplifier A03 is a node S01. A connection node of the input node of the resistor R03 and the operational amplifier A02 is a node S02.

  The cathode of the diode D01 is connected to the ground voltage GND. The cathode of the diode D02 is connected to the ground voltage GND through the resistor R01. The cathode of the diode D03 is connected to the ground voltage GND through the resistor R02.

  The sources of the P-channel MOS transistors P04 to P06 are connected to the power supply voltage VDD. The gate of the P-channel MOS transistor P04 is connected to the output node of the operational amplifier A02. The drain of the P-channel MOS transistor P04 is connected to the input node (non-inverting input) of the operational amplifier A02 and is connected to the ground voltage GND through the reference resistor Rref. A connection node between the drain of the P-channel MOS transistor P04 and the input node of the operational amplifier A02 is a node S03. The gates of the P-channel MOS transistors P05 and P06 are connected to the output node of the operational amplifier A02. The drains of the P-channel MOS transistors P05 and P06 are connected to the input node of the detection circuit 20 (not shown in FIG. 2). The currents supplied from the P-channel MOS transistors P05 and P06 are reference currents I_det1 and I_det2, respectively.

  The source of the P-channel MOS transistor P07 is connected to the power supply voltage VDD, and the gate is connected to the output node of the operational amplifier A03. The drain of the P-channel MOS transistor P07 is connected to the input node (non-inverting input) of the operational amplifier A03, and is connected to the ground voltage GND through the resistor R04. A connection node of the drain of the P-channel MOS transistor P07, the resistor R04, and the input node of the operational amplifier A03 is defined as a node S04.

  Each input node of the operational amplifier A03 is connected to a connection node (node S01) between the drain of the P-channel MOS transistor P03 and the resistor R03, and a connection node (node S04) between the drain of the P-channel MOS transistor P07 and the resistor R04. Yes. The voltage of the node S04 is the reference voltage Vref_det output from the regulator circuit 10.

  Here, the diodes D01 to D03, the P-channel MOS transistors P01 to P03, the operational amplifier A01, and the resistors R01 and R02 constitute a band gap reference circuit.

なお、ｒ０１及びｒ０２は抵抗Ｒ０１及びＲ０２の抵抗値とする（以下の説明においても、抵抗と抵抗値は同様の表記とする）。Ｖ_ＢＥ３はダイオードＤ０３のベース・エミッタ間電圧とする。さらに、熱電圧Ｖ_Ｔを、ボルツマン定数（ｋ）、絶対温度（Ｔ）、電子のクーロン定数（ｑ）を用いて表すと、式（４）は下記の式（５）と等価になる。

A band gap reference voltage V _BGR compensated for temperature is output from the node S02. The band gap reference voltage V _BGR can be expressed by the following formula (4).

Note that r01 and r02 are resistance values of the resistors R01 and R02 (in the following description, the resistance and the resistance value are represented in the same manner). V _BE3 is the base-emitter voltage of the diode D03. Furthermore, when the thermal voltage V _T is expressed using the Boltzmann constant (k), the absolute temperature (T), and the electron Coulomb constant (q), the expression (4) is equivalent to the following expression (5).

さらに、ダイオードＤ０３のベース・エミッタ間電圧Ｖ_ＢＥ３の温度特性は、式（７）で表すことができる。

そのため、式（６）において、抵抗値ｒ０１及びｒ０２と、ダイオードＤ０２に含まれるダイオードの並列数Ｎを適切に選択すれば、バンドギャップリファレンス電圧Ｖ_ＢＧＲの温度特性を無効化することができる。 In the equation (5), when the temperature T is differentiated as a variable, the following equation (6) can be obtained.

Further, the temperature characteristic of the base-emitter voltage V _BE3 of the diode D03 can be expressed by Expression (7).

Therefore, in Equation (6), if the resistance values r01 and r02 and the parallel number N of the diodes included in the diode D02 are appropriately selected, the temperature characteristics of the band gap reference voltage V _BGR can be invalidated.

ノードＳ０１とノードＳ０４は、それぞれオペアンプＡ０３の入力ノードに接続されている。従って、オペアンプＡ０３は、ノードＳ０１の電圧とノードＳ０４の電圧（基準電圧Ｖｒｅｆ＿ｄｅｔ）が等しくなるように、Ｐチャンネル型ＭＯＳトランジスタＰ０７のゲートに印加する電圧を制御する。即ち、基準電圧Ｖｒｅｆ＿ｄｅｔも式（８）で表すことができる。式（８）において、温度Ｔを変数として微分すると、以下の式（９）を得ることができる。

Next, consider the voltage at node S01. The voltage of the node S01 can be expressed by the following equation (8).

Node S01 and node S04 are each connected to the input node of operational amplifier A03. Accordingly, the operational amplifier A03 controls the voltage applied to the gate of the P-channel MOS transistor P07 so that the voltage at the node S01 and the voltage at the node S04 (reference voltage Vref_det) are equal. That is, the reference voltage Vref_det can also be expressed by Expression (8). In the equation (8), when the temperature T is differentiated as a variable, the following equation (9) can be obtained.

As described above, the temperature characteristic of the base-emitter voltage _{V BE3} of the diode D03, so can be represented by the formula (7), the resistance value R01～r03, the parallel number N of diodes included in the diode D02 properly By selecting, the temperature characteristic of the reference voltage Vref_det can be set to a desired value. For example, if r02 / r01 = 11.2 and N = 8 are selected, the temperature characteristics of the bandgap reference voltage V _BGR can be invalidated. Furthermore, by setting r03 / r01 = 2.2, the temperature characteristic of the reference voltage Vref_det can be set to +0.4 mV / ° C.

  Next, generation of the reference currents I_det1 and I_det2 will be described.

As described above, the band gap reference voltage V _BGR does not have temperature characteristics. Therefore, the voltage of the node S03 connected to the node S02 via the operational amplifier A02 is substantially equal to the band gap reference voltage V _BGR . Further, the temperature dependence of the resistance value of the reference resistor Rref is extremely small as compared with a semiconductor element such as a diode. Therefore, it can be said that the current (hereinafter referred to as the reference current Iref) supplied by the P-channel MOS transistor P04 is a current having no temperature characteristic.

  Further, if the P channel type MOS transistors P04 to P06 are made to have the same size, the gates of the transistors are connected in common, so that the current supplied by the P channel type MOS transistors P05 and P06 and the reference current Iref are Almost equal. The currents supplied by the P-channel MOS transistors P05 and P06 are reference currents I_det1 and I_det2, respectively. Since the reference current Iref does not have temperature characteristics, the reference currents I_det1 and I_det2 similarly do not have temperature characteristics.

  As described above, the regulator circuit 10 can output the reference voltage Vref_det having a desired temperature characteristic (which can be arbitrarily set by the designer) and the reference currents I_det1 and I_det2 having no temperature characteristic.

  Next, the detection circuit 20 will be described.

  FIG. 3 is a diagram illustrating an example of a circuit configuration of the detection circuit 20. The detection circuit 20 is composed of two detection circuits 21 and 22. A signal input from the input terminal In is input to the detection circuits 21 and 22. The reference voltage Vref_det generated by the regulator circuit 10 is supplied to the detection circuits 21 and 22. Further, the reference current I_det1 generated by the regulator circuit 10 is supplied to the detection circuit 21, and the reference current I_det2 is supplied to the detection circuit 22. A voltage obtained by combining the voltages output from the two detection circuits 21 and 22 is output from the output terminal Out as the power detection voltage V_det.

  The detection circuit 21 includes npn-type bipolar transistors TR01 and TR02, resistors R05 to R08, and capacitors C01 and C02.

  The emitter of npn-type bipolar transistor TR01 is connected to ground voltage GND, and the base is connected to the base of npn-type bipolar transistor TR02 via resistor R06. The collector and base of the npn bipolar transistor TR01 are connected in common. The collector of the npn bipolar transistor TR01 is connected to the input terminal In via the capacitor C01 and the resistor R05, and is also connected to the drain of the P-channel MOS transistor P05 of the regulator circuit 10 (supply of the reference current I_det1). receive). The emitter of npn-type bipolar transistor TR02 is connected to ground voltage GND, and the base is connected to the base of npn-type bipolar transistor TR01 via resistor R06. The collector of the npn bipolar transistor TR02 is connected to the node S04 of the regulator circuit 10 (receives supply of the reference voltage Vref_det) and is connected to the output terminal Out via the resistor R08. Here, the current flowing into the collector of the npn bipolar transistor TR02 is Ic1, and the voltage of the collector of the npn bipolar transistor TR02 is the detection voltage V_det1. Capacitor C02 is connected between the collector of npn bipolar transistor TR02 and ground voltage GND.

  The detection circuit 22 includes npn-type bipolar transistors TR03 and TR04, resistors R09 to R12, and capacitors C03 and C04. Since the configuration of the detection circuit 22 is not different from the configuration of the detection circuit 21, further description is omitted. Similar to the detection circuit 21, the current flowing into the collector of the npn bipolar transistor TR04 is Ic2, and the collector voltage of the npn bipolar transistor TR04 is the detection voltage V_det2.

  Next, an outline of the operation of the detection circuits 21 and 22 will be described.

  The amplitude of the signal input from the input terminal In is attenuated by the resistors R05 and R09. The collectors and bases of the npn bipolar transistors TR01 and TR03 receive the attenuated input signal.

Since the bases of the npn-type bipolar transistors TR01 and TR02 (TR03 and TR04) are connected to each other, the base voltage of the npn-type bipolar transistors TR02 and TR04 varies depending on the amplitude of the input signal. When the base voltages of the npn bipolar transistors TR02 and TR04 are determined, the currents Ic1 and Ic2 are determined. Here, since the resistors R07 and R11 are supplied with the reference voltage Vref_det, the detection voltages V_det1 and V_det2 are obtained from the following equations (10) and (11), respectively.

V_det1 = Vref_det−r07 × Ic1 (10)

V_det2 = Vref_det−r11 × Ic2 (11)

  A voltage obtained by averaging the detection voltages V_det1 and V_det2 by the ratio of the resistance values of the resistors R08 and R12 is the power detection voltage V_det. Therefore, if the resistance values of the resistors R08 and R12 are equal, the average voltage of the detection voltages V_det1 and V_det2 is the power detection voltage V_det.

  Next, the detailed operation of the detection circuit 21 will be described. Note that the operation of the detection circuit 22 is the same as the operation of the detection circuit 21, and therefore the description thereof is omitted.

さらに、電流Ｉｃ（ｔ）とｎｐｎ型バイポーラトランジスタＴＲ０１のベース電圧ＶＢ（ｔ）との間には、以下の式（１３）の関係が成り立つ。

式（１３）を式（１２）に代入し、以下の式（１４）を得る。

Let Ic (t) be the current flowing through the collector of the npn bipolar transistor TR01. When the period of the input signal received from the input terminal In is C, the base voltage of the npn bipolar transistor TR01 also varies with the period C. The current Ic (t) also changes in the cycle C according to the change in the base voltage. On the other hand, the collector of the npn bipolar transistor TR01 is supplied with the reference current I_det1. Accordingly, the relationship of the following formula (12) is established between the reference current I_det1 and the current Ic.

Further, the relationship of the following formula (13) is established between the current Ic (t) and the base voltage VB (t) of the npn bipolar transistor TR01.

By substituting equation (13) into equation (12), the following equation (14) is obtained.

なお、ＶＢ＿ａｖｅはベース電圧ＶＢ（ｔ）の平均ベース電圧、Ｖｐ１は抵抗Ｒ０５において減衰された入力信号の振幅とする。式（１５）及び（１６）を用いると、式（１４）は、以下の式（１７）と近似できる。

・・・（１７）

式（１７）をさらに変形して、式（１８）を得ることができる。

・・・（１８） Here, the one-cycle average voltage of the base voltage VB (t) can be regarded as the average of the minimum value and the maximum value of the base voltage VB (t). The minimum value of the base voltage VB (t) can be expressed by Expression (15), and the maximum value can be expressed by Expression (16).

VB_ave is the average base voltage of the base voltage VB (t), and Vp1 is the amplitude of the input signal attenuated by the resistor R05. Using the equations (15) and (16), the equation (14) can be approximated with the following equation (17).

... (17)

Equation (17) can be further modified to obtain Equation (18).

... (18)

式（１９）を平均ベース電圧ＶＢ＿ａｖｅで解くと、以下の式（２０）を得る。

式（２０）から、ｎｐｎ型バイポーラトランジスタＴＲ０２のベース電圧が定まり、検出電圧Ｖ＿ｄｅｔ１は、以下の式（２１）で求まる。

・・・（２１）
式（２１）を温度Ｔについて微分すると、式（２２）が得られる。 In Expression (18), the thermal voltage V _T (about 26 mV at room temperature) is extremely small compared to the amplitude Vp1 of the input signal (Vp1 is often 1 V or more in many cases). Therefore, exp (−Vp1 / V _T ) is small enough to be ignored. Therefore, the equation (18) can be approximated to the following equation (19).

Solving equation (19) with average base voltage VB_ave yields equation (20) below.

From the equation (20), the base voltage of the npn bipolar transistor TR02 is determined, and the detection voltage V_det1 is obtained by the following equation (21).

... (21)
Differentiating equation (21) with respect to temperature T yields equation (22).

・・・（２２）
さらに、以下の式（２３）を満たせば（式（２２）の右辺が０になれば）、検出電圧Ｖ＿ｄｅｔ１の温度特性を無効化できる。

・・・（２３）
式（２３）において、入力信号の振幅Ｖｐ１と温度Ｔがパラメータであり、クーロン定数ｑ、ボルツマン係数ｋは固定値である。また、基準電圧Ｖｒｅｆ＿ｄｅｔの温度特性及び基準電流Ｉ＿ｄｅｔ１はレギュレータ回路１０の設計により定まり、抵抗値ｒ０７は検波回路２１の設定により定まる。これらの設計可能なパラメータを適切に定め、半導体装置の使用が想定される入力信号の振幅Ｖｐ１と温度Ｔの範囲で、検出電圧Ｖ＿ｄｅｔ１の温度特性を無効化する。

(22)
Furthermore, if the following expression (23) is satisfied (if the right side of expression (22) becomes 0), the temperature characteristic of the detection voltage V_det1 can be invalidated.

(23)
In Expression (23), the amplitude Vp1 and temperature T of the input signal are parameters, and the Coulomb constant q and the Boltzmann coefficient k are fixed values. Further, the temperature characteristic of the reference voltage Vref_det and the reference current I_det1 are determined by the design of the regulator circuit 10, and the resistance value r07 is determined by the setting of the detection circuit 21. These designable parameters are appropriately determined, and the temperature characteristic of the detection voltage V_det1 is invalidated in the range of the amplitude Vp1 and the temperature T of the input signal assumed to use the semiconductor device.

  FIG. 4 is a diagram illustrating an example of the detection voltage in the detection circuit 21. In FIG. 4, it is assumed that the temperature characteristic of the reference voltage Vref_det supplied to the detection circuit 20 is invalidated. Since the temperature characteristic of the reference voltage Vref_det is invalidated, Expression (23) does not hold. Therefore, in the equation (22), the temperature characteristic of the detection voltage V_det1 is not invalidated. As a result, the detection voltage V_det1 (vertical axis in FIG. 4) changes depending on the temperature even if the amplitude of the input signal is the same.

  FIG. 5 is a diagram illustrating an example of a detection voltage in the detection circuit 21. In FIG. 5, it is assumed that the reference voltage Vref_det supplied to the detection circuit 20 has a predetermined temperature characteristic. More specifically, the temperature characteristic of the reference voltage Vref_det is determined so that Expression (23) is established. As a result, the temperature characteristic of the detection voltage V_det1 is invalidated from the equation (22).

  Comparing FIG. 4 and FIG. 5, in the range where the amplitude of the input signal is assumed to fluctuate (the detection range shown in FIGS. 4 and 5), the temperature characteristic of the detection voltage V_det1 in FIG. 5 is invalidated. I understand. Similarly, for the detection voltage V_det2, the temperature characteristic can be invalidated in a range where the amplitude of the input signal is assumed to fluctuate.

  As described above, by supplying the reference voltage Vref_det having predetermined temperature characteristics and the reference currents I_det1 and I_det2 having no temperature characteristics from the regulator circuit 10, the temperatures of the npn-type bipolar transistors included in the detection circuits 21 and 22 are increased. The characteristic can be invalidated.

  Next, the dynamic range of the output power detection circuit 1 will be described.

  In order to expand the dynamic range of the output power detection circuit 1, the resistance values of the resistors R05 and R09 included in the detection circuits 21 and 22 are designed to be different from each other. More specifically, the resistance value r09 is set larger than the resistance value r05 (r09> r05). Since the resistance value r09 is larger than the resistance value r05, the attenuation amount of the amplitude of the input signal received by the detection circuit 22 is larger than the attenuation amount of the amplitude of the input signal received by the detection circuit 21. Therefore, the detection circuit 22 performs a detection operation on an input signal having a larger amplitude than that of the detection circuit 21.

  FIG. 6 is a diagram illustrating an example of output waveforms of the detection circuits 21 and 22. As shown in FIG. 6, it can be seen that the detection circuit 21 detects a small-amplitude input signal, and the detection circuit 22 detects a large-amplitude input signal. A voltage obtained by averaging the detection voltage (V_det1) of the detection circuit 21 and the detection voltage (V_det2) of the detection circuit 22 by the resistors R08 and R12 is the power detection voltage V_det.

  FIG. 7 is a diagram illustrating an example of the power detection voltage V_det. By adjusting the resistors 05 and R09, it is possible to output a detection voltage in which the temperature characteristics are invalidated while corresponding to different input ranges in the detection circuits 21 and 22.

  Next, a design method of the output power detection circuit 1 will be described.

  FIG. 8 is a flowchart illustrating an example of a design method for the output power detection circuit 1.

In step S01, a band gap reference circuit of the regulator circuit 10 is designed. Specifically, the resistance values of the resistors R01 and R02 that invalidate the temperature characteristics of the bandgap reference voltage V _BGR represented by Expression (6) are determined.

  In step S02, the detection circuit 20 is designed. Specifically, the resistance values of the resistors R05 and R09 are determined according to the dynamic range required for the output power detection circuit 1. Further, the resistance values of the resistors R08 and R12 are determined according to the weighting of the detection voltage V_det1 and the detection voltage V_det2. When the detection voltage V_det1 and the detection voltage V_det2 are simply averaged, the resistance values of the resistors R08 and R12 are made equal.

  In step S03, a resistance value or the like that invalidates the temperature characteristic of the detection circuit 20 is designed. Specifically, the temperature characteristic of the reference voltage Vref_det, the current value of the reference current I_det1, and the resistance values of the resistors R07 and R11 are determined so that Expression (23) is satisfied in the detection range required for the output power detection circuit 1. The above is the design method of the output power detection circuit 1.

  As described above, the reference voltage Vref_det having a predetermined temperature characteristic and the reference currents I_det1 and I_det2 having no temperature characteristic are supplied from the regulator circuit 10. The detection circuit 20 operates with the reference voltage Vref_det and the reference currents I_det1 and I_det2 supplied from the regulator circuit 10 as power sources, and can invalidate the temperature characteristics of the detection voltage. Furthermore, by changing the input ranges of the two detection circuits 21 and 22 included in the detection circuit 20 and averaging the voltages output from the detection circuits 21 and 22, the dynamic range is wide and temperature fluctuations are suppressed. The output power detection circuit 1 that outputs the detected voltage can be obtained.

  Further, the output power detection circuit 1 can measure a low power region and a high power region with one measurement terminal (output terminal Out). Therefore, unlike the output power detection circuit disclosed in Patent Document 3, a switch or the like for switching between a low power measurement terminal and a high power measurement terminal becomes unnecessary. As a result, it is possible to simplify the input / output interface of the module that incorporates the output power detection circuit 1 and performs power control using the detected voltage.

[Second Embodiment]
Next, a second embodiment will be described in detail with reference to the drawings.

  FIG. 9 is a diagram illustrating an example of an internal configuration of the transmitter 2 according to the present embodiment. 9, the same components as those in FIG. 1 are denoted by the same reference numerals, and the description thereof is omitted.

  The transmitter 2 according to the present embodiment includes the output power detection circuit 1 according to the first embodiment. The transmitter 2 includes an output power detection circuit 1, a control block 30, a variable gain amplifier 40, and a power amplifier 50.

  The transmitter 2 receives a transmission signal at the input terminal and outputs a voltage amplified signal from the output terminal. The amplitude of the input signal is increased or decreased by the variable gain amplifier 40 and sent to the power amplifier 50. The output node of the power amplifier 50 is connected to the input terminal In of the output power detection circuit 1. The output terminal Out of the output power detection circuit 1 is connected to the control block 30. The control block 30 controls the gain of the variable gain amplifier 40 based on the power detection voltage V_det output from the output power detection circuit 1. That is, the output of the power amplifier 50 is fed back to the output power detection circuit 1, and the control block 30 controls the gain of the variable gain amplifier 40 so that the power of the output waveform does not exceed the regulation value.

  At this time, since the temperature characteristic of the power detection voltage V_det output from the output power detection circuit 1 is invalidated, the power of the output waveform is kept constant even if the gain of the variable gain amplifier 40 or the power amplifier 50 varies depending on the temperature. Can be kept in. The output power detection circuit 1 can be used to configure a transceiver.

  Each disclosure of the cited patent documents and the like cited above is incorporated herein by reference. Within the scope of the entire disclosure (including claims) of the present invention, the embodiment can be changed and adjusted based on the basic technical concept. Various disclosed elements (including each element of each claim, each element of each embodiment, each element of each drawing, etc.) can be combined or selected within the scope of the claims of the present invention. . That is, the present invention of course includes various variations and modifications that could be made by those skilled in the art according to the entire disclosure including the claims and the technical idea.

DESCRIPTION OF SYMBOLS 1 Output power detection circuit 2 Transmitter 10 Regulator circuit 20 Detection circuit 21, 22 Detection circuit 30 Control block 40 Variable gain amplifier 50 Power amplifier A01-A03 Operational amplifier C01-C04 Capacitance D01-D03 Diode P01-P07 P channel type MOS transistor R01 ~ R12 Resistance Rref Reference resistance TR01 ~ TR04 npn type bipolar transistor

Claims (8)

A regulator circuit for outputting a reference voltage having a predetermined temperature characteristic and first and second reference currents having no temperature characteristic;
An input signal is received, the voltage of the input signal is converted into a first voltage, the temperature characteristic of the first voltage is invalidated according to the reference voltage and the first reference current, and the first detection voltage A first detector circuit that outputs as
Receiving the input signal, converting the voltage of the input signal into a second voltage, invalidating a temperature characteristic of the second voltage according to the reference voltage and the second reference current, and performing a second detection; A second detection circuit that outputs as a voltage,
A detection circuit for outputting a power detection voltage obtained by combining the first and second detection voltages;
A semiconductor device comprising: The regulator circuit includes a band gap reference circuit including a first current source;
A second current source for supplying the first reference current;
A third current source for supplying the second reference current;
With
The regulator circuit includes a first resistor disposed between an output node of the bandgap reference circuit and the first current source, and includes a connection node between the first current source and the first resistor. 2. The semiconductor device according to claim 1, wherein the reference voltage is output, and a current value supplied from the second and third current sources is determined based on a voltage output from the bandgap reference circuit and a reference resistor having no temperature characteristic. . The first detection circuit includes:
A grounded first transistor that receives the input signal at a collector via a second resistor, and a grounded second transistor that has a base commonly connected to the base of the first transistor; Including
The second detection circuit includes:
A third transistor with grounded emitter that receives the input signal at a collector via a third resistor, and a fourth transistor with grounded emitter, the base of which is commonly connected to the base of the third transistor. Including
The reference voltage output node and the second transistor are connected via a fourth resistor, the reference voltage output node and the fourth transistor are connected via a fifth resistor, and the second resistor The semiconductor device according to claim 2, wherein a current source and a collector of the first transistor are connected, and a third current source and the collector of the third transistor are connected.   The semiconductor device according to claim 3, wherein a resistance value of the third resistor is higher than a resistance value of the second resistor. The predetermined temperature characteristic is determined by a resistance value of the first resistor, and the temperature characteristic of the first voltage includes the predetermined temperature characteristic of the reference voltage, a current value of the first reference current, And a resistance value of the fourth resistor,
The temperature characteristic of the second voltage is determined based on the predetermined temperature characteristic of the reference voltage, a current value of the second reference current, and a resistance value of the fifth resistor. 3 or 4 semiconductor devices. A semiconductor device according to any one of claims 1 to 5;
A control block for receiving the power detection voltage;
A variable gain amplifier connected to the control block and receiving a transmission signal;
A power amplifier that amplifies the voltage output from the variable gain amplifier;
With
The output of the power amplifier is used as an input signal to the first and second detection circuits, and the control block changes the gain of the variable gain amplifier based on the power detection voltage. Machine. A semiconductor device according to any one of claims 1 to 5;
A control block for receiving the power detection voltage;
A variable gain amplifier connected to the control block and receiving a transmission signal;
A power amplifier that amplifies the voltage output from the variable gain amplifier;
With
The output of the power amplifier is used as an input signal to the first and second detection circuits, and the control block changes the gain of the variable gain amplifier based on the power detection voltage. Machine. A regulator circuit including a bandgap reference circuit and outputting a reference voltage having a predetermined temperature characteristic and first and second reference currents having no temperature characteristic;
An input signal is received, the voltage of the input signal is converted into a first voltage, the temperature characteristic of the first voltage is invalidated according to the reference voltage and the first reference current, and the first detection voltage A first detector circuit that outputs as
Receiving the input signal, converting the voltage of the input signal into a second voltage, invalidating a temperature characteristic of the second voltage according to the reference voltage and the second reference current, and performing a second detection; A second detection circuit that outputs as a voltage,
A detection circuit for outputting a power detection voltage obtained by combining the first and second detection voltages;
A method for designing a semiconductor device comprising:
Designing the bandgap reference circuit;
Determining amplitudes of the first and second voltages based on a dynamic range of the detection circuit;
Determining the predetermined temperature characteristics of the reference voltage and the current values of the first and second reference currents, which invalidate the temperature characteristics of the first and second voltages;
A method for designing a semiconductor device, comprising:

Images