JP2013084097A - Semiconductor integrated circuit for regulator - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent a useless current from flowing when an input voltage becomes low at the time of no load in a semiconductor integrated circuit for a regulator that is adapted to improve transient response characteristics by increasing the operation current of an error amplifier when the output current is large.SOLUTION: A semiconductor integrated circuit for a regulator is provided with a transistor (Tr1) for voltage control that is connected between a voltage input terminal and an output terminal, a control circuit (11) into which a feedback voltage in proportion to an output voltage and a predetermined reference voltage are input and that controls the transistor for voltage control so that the output voltage becomes constant, and operation current generation circuits (CI2, 13, 14) that flow an operation current into the control circuit. The operation current generation circuits are adapted to have a function to increase the operation current when the output current output from the output terminal becomes large and a function to limit the function to increase the operation current when the input voltage becomes equal to or less than a predetermined voltage which is close to the target value of the output voltage.

Description

  The present invention relates to a DC power supply apparatus and further to a voltage regulator that converts a DC voltage, for example, a technique effective for use in a semiconductor integrated circuit (regulator IC) constituting a series regulator (LDO: including a low saturation regulator). .

As a DC power supply device that converts DC voltage, a voltage proportional to the output voltage is fed back to the error amplifier, and the error amplifier controls the control transistor connected between the voltage input terminal and the output terminal to Series regulators are known that keep them constant.
In the series regulator, the transient response characteristic of the error amplifier depends on the operating current, and the transient response characteristic is improved as the operating current is increased, and the fluctuation of the output voltage can be suppressed when the load fluctuates. However, if the operating current of the error amplifier is increased, the current consumption of the circuit increases, which is not suitable for a system using a battery power supply as a power supply voltage.

  Therefore, conventionally, when the load current is large, the operating current of the error amplifier is increased to improve the transient response characteristics, and when the load current is small, the operating current of the error amplifier is decreased to reduce the current consumption. A series regulator has been proposed (for example, Patent Document 1). According to such a regulator, fluctuations in the output voltage when the load current is large can be suppressed, and when the load current is small, the fluctuation in the output voltage does not increase even if the transient response characteristic of the error amplifier is lowered. It is possible to reduce current consumption without causing problems.

  FIG. 6 shows an example of a series regulator in which the operating current of the error amplifier is changed according to the magnitude of the load current. The regulator of FIG. 6 causes the operating current I4 of the error amplifier 11 to flow through the current mirror circuit 13 that folds the current of the constant current source CI2, and in parallel with the constant current source CI2, a transistor that is current mirror connected to the control transistor Tr1. A current boost circuit composed of Tr2 is provided. By providing such a current boost circuit, when the output current increases, the current flowing through the transistor Tr2 of the boost circuit also increases, and the operating current of the error amplifier 11 can be increased by the current mirror circuit 13 to improve the transient response characteristics. .

JP 2001-75663 A

However, in the regulator of FIG. 6, when the input voltage (power supply voltage) VDD becomes lower than the target value of the output voltage Vout in the no-load state where the output current Iout is close to zero, the control transistor Tr1 is fully driven. . Therefore, the current boosting transistor Tr2 to which the same voltage as the gate voltage of Tr1 (the output of the miscalculation amplifier) is applied is also fully driven, and the control transistor Tr1 has a target value of VDD <Vout. Even if no current flows, a relatively large current flows through Tr2, and the operating current I4 of the error amplifier 11 also increases, resulting in an increase in wasted current.
FIG. 7 shows current consumption characteristics with respect to the input voltage at no load when the transistor Tr2, that is, the current boost circuit is provided and when it is not provided. In FIG. 7, the alternate long and short dash line A is the current consumption when the boost circuit is provided, and the solid line B is the current consumption when the boost circuit is not provided. From the figure, it can be seen that when a current boost circuit is provided, useless current consumption increases when the input voltage approaches the output voltage VDD when there is no load, as indicated by a dashed line A.

  The present invention has been made under the background as described above, and the object of the present invention is for a regulator for improving the transient response characteristics by increasing the operating current of the error amplifier when the output current is large. An object of the semiconductor integrated circuit is to prevent a wasteful current from flowing even when the input voltage becomes low at no load.

In order to achieve the above object, the present invention provides:
A voltage control transistor connected between the voltage input terminal and the output terminal;
A control circuit for controlling the control transistor so that the output voltage is constant by inputting a feedback voltage proportional to the output voltage and a predetermined reference voltage; and
A regulator semiconductor integrated circuit comprising: an operating current generating circuit for supplying an operating current to the control circuit;
The operating current generation circuit includes:
A function of increasing the operating current when the output current output from the output terminal increases;
A function for limiting the function of increasing the operating current when the voltage input to the voltage input terminal is equal to or lower than the target value of the output voltage output from the output terminal or a predetermined voltage close to the target value. And so that it has.

  According to the above-described means, when the output current is large, the operating current of the error amplifier can be increased to improve the transient response characteristics. On the other hand, when the input voltage is lowered, the operating current of the control circuit (error amplifier) is increased. Since the function is limited, it is possible to prevent a wasteful current from flowing when there is no load or a light load close to no load. The target value of the output voltage can be defined by the reference voltage when the control circuit (error amplifier) compares the output feedback voltage with the reference voltage to control the control transistor.

Preferably, the operating current generation circuit includes:
A constant current source for generating a current serving as a reference for the operating current;
A current mirror circuit that generates a current proportional to the current passed by the constant current source and flows the current as the operating current to the control circuit;
A current boost circuit that generates a boost current that is added to a current that is a reference of the operating current when the output current that is output from the output terminal increases and that flows to the current mirror circuit, and the voltage input terminal The boost current is limited when the input voltage is equal to or lower than the target value of the output voltage output from the output terminal or a predetermined voltage close to the target value.

  As a result, the operating current generation circuit generates a current that serves as a reference for the operating current, and a current mirror that generates a current proportional to the current passed by the constant current source and flows it to the control circuit as the operating current. The input voltage is low when the circuit consists of a circuit and a current boost circuit that generates a boost current that is added to the current that becomes the reference of the operating current when the output current that is output from the output terminal increases. In this case, the function of increasing the operating current of the control circuit (error amplifier) can be limited so that no unnecessary current flows.

  Preferably, the current boost circuit is configured so that the voltage control transistor and a current mirror circuit can be configured, and an output voltage of the control circuit is applied to a control terminal of the voltage control transistor. And a boost current transistor that supplies a current that is proportional to the current flowing through the voltage control transistor as the boost current, and the voltage that is input to the voltage input terminal is the output terminal. The current flowing through the boost current transistor is limited when the output voltage is less than a target value of the output voltage or a predetermined voltage close to the target value.

  As a result, when the current boost circuit is composed of a voltage control transistor and a boost current transistor connected to form a current mirror, the operating current of the control circuit (error amplifier) is increased when the input voltage is lowered. The function can be limited, thereby preventing a wasteful current from flowing when there is no load.

Preferably, the current boost circuit includes a first transistor connected in series with the boost current transistor, a second transistor connected in series between the output terminal and a reference potential point, and A constant current source,
The control terminals of the first transistor and the second transistor are coupled to each other, the control terminal of the second transistor is connected to the drain terminal of the second transistor, and the voltage input to the voltage input terminal Is less than or equal to a target value of the output voltage output from the output terminal, the first transistor and the second transistor operate as a current mirror circuit, and the current flowing through the boost current transistor is Configure to be restricted.
As a result, a circuit that limits the function of increasing the operating current of the control circuit (error amplifier) using the boost current transistor can be realized with a relatively simple circuit. In addition, when the input voltage becomes equal to or lower than the target value of the output voltage, the current flowing through the boost current transistor can be limited.

Further, preferably, the current boost circuit includes a transistor connected in series with the boost current transistor, and the transistor has a control terminal connected to the output terminal and input to the voltage input terminal. It is configured to operate so as to be in a current limiting state when the voltage that is present becomes equal to or lower than a predetermined voltage close to the target value of the output voltage output from the output terminal.
As a result, when the current boost circuit is composed of a voltage control transistor and a boost current transistor connected to form a current mirror, the control circuit (error) The function of increasing the operating current of the amplifier) can be limited.

  According to the present invention, when the output current is large, the operating current of the error amplifier is increased to improve the transient response characteristic. In the regulator semiconductor integrated circuit, even if the input voltage becomes low at no load, the current is wasted. There is an effect that can be prevented from flowing.

It is a circuit block diagram which shows one Example of control IC of the series regulator to which this invention is applied. It is a circuit block diagram which shows the 2nd Example of control IC of the series regulator of embodiment. 2 is a timing chart showing changes in voltage and current of each part when it is assumed that the input voltage gradually decreases in the series regulator control IC of the embodiment of FIG. FIG. 7 is a timing chart showing changes in voltage and current of each part when it is assumed that the input voltage gradually decreases in the conventional type series regulator shown in FIG. 6. 3 is a timing chart showing changes in voltage and current of each part when it is assumed that the input voltage gradually decreases in the control IC of the series regulator of the second embodiment of FIG. 2. It is a circuit block diagram which shows the structural example of control IC of the conventional series regulator provided with the current boost circuit which increases the operating current of an error amplifier. FIG. 7 is a voltage-current characteristic diagram showing a relationship between an input voltage and no-load current when there is no load in the conventional type series regulator shown in FIG. 6.

DESCRIPTION OF EXEMPLARY EMBODIMENTS Hereinafter, preferred embodiments of the invention will be described with reference to the drawings.
FIG. 1 shows an embodiment of a series regulator (including an LDO) to which the present invention is applied. Although not particularly limited, the elements constituting the circuit of the portion surrounded by the alternate long and short dash line in FIG. 1 are formed on one semiconductor chip as a semiconductor integrated circuit (series regulator IC) 10. Composed.

  The series regulator IC 10 in this embodiment includes a P-channel MOSFET (insulated gate field effect transistor: hereinafter referred to as a MOS transistor) between a voltage input terminal IN to which a DC voltage VDD from a DC power supply (not shown) is applied and an output terminal OUT. The bleeder resistors R1 and R2 for dividing the output voltage Vout are connected in series between the output terminal OUT and the ground terminal GND to which the ground potential is applied. . The voltage VFB divided by the bleeder resistors R1 and R2 is fed back to the non-inverting input terminal of the error amplifier 11 that controls the gate voltage of the voltage control transistor Tr1.

  The error amplifier 11 controls the gate voltage of the voltage control transistor Tr1 in accordance with the potential difference between the feedback voltage VFB and the reference voltage Vref so as to control the output voltage Vout to a desired potential. The potential of the output voltage Vout can be set by the resistance ratio of the bleeder resistors R1 and R2. The series regulator of this embodiment operates so as to keep the output voltage Vout constant even if the input voltage VDD or the load current changes by the feedback control as described above. Although not shown, an external capacitor for stabilizing the output voltage Vout is connected to the output terminal OUT.

The regulator IC 10 of the present embodiment defines a reference voltage circuit 12 for generating a reference voltage Vref, a constant current source CI1 that supplies a constant current to the reference voltage circuit 12, and an operating current of the error amplifier 11. A constant current source CI2 to be turned on, a current mirror circuit 13 for turning back the current I2 from the constant current source CI2 to pass the operating current I4 to the error amplifier 11, and a current boost circuit 14 for increasing the current to be passed to the current mirror circuit 13. Is provided.
The reference voltage circuit 12 can be configured by a constant voltage circuit formed of a Zener diode, or a reference voltage generation circuit in which a depletion type MOS transistor and an enhancement type MOS transistor that operate as a constant current source are connected in series.

  The current boost circuit 14 is provided in parallel with the constant current source CI1, and the voltage control transistor Tr1 and the transistor Tr2 whose source terminals are commonly connected are connected in series with the transistor Tr2, and the current flowing through the transistor Tr2 is supplied. Between the transistor Tr3 to be limited, the transistor Tr4 whose gate terminal is commonly connected to the transistor Tr3 and whose source terminal is connected to the output terminal OUT, and the ground terminal (reference potential point) GND of the drain terminal of the transistor Tr4 The constant current source CI3 is connected in series. In this embodiment, P-channel MOS transistors are used as the transistors Tr2, Tr3, Tr4.

Similar to the gate terminal of the voltage control transistor Tr1, the output voltage of the error amplifier 11 is applied to the gate terminal of the transistor Tr2, so that the transistors Tr1 and Tr2 form a current mirror circuit. A current I3 proportional to the drain current, that is, the output current Iout is passed. The size ratio between the transistors Tr2 and Tr1 is determined according to the current value to be increased at the time of current boost. Since the current I3 may be a current value sufficiently smaller than the output current Iout, I3 << Iout.
Note that the current of the error amplifier 11 that is desired to be increased at the time of current boost can be adjusted by the mirror ratio of the current mirror circuit 13, so that the drain current I3 of the transistor Tr2 is generally several hundred to several thousandths of the output current Iout. Set to That is, the size of the transistor Tr2 may be several hundred to several thousandths of the size of the transistor Tr1, and an increase in chip area associated with the provision of the current boost circuit can be suppressed.

The transistors Tr3 and Tr4 and the constant current source CI3 have a boost current if the input voltage VDD is low when the output current Iout increases and the current boost circuit 14 tries to increase the current flowing to the current mirror circuit 13. This is for limiting I3. Specifically, when the input voltage VDD becomes lower than a predetermined voltage value close to the target value (Vout specification value) of the output voltage Vout, the transistors Tr3 and Tr4 operate as a current mirror circuit, and the drain current of the transistor Tr3 is reduced. The current is limited to a current proportional to the current I5 of the constant current source CI3.
As a result, even if the transistor Tr2 is fully driven to increase the boost current I3, it is limited by the drain current of the Tr3 so that the boost current I3 hardly flows. Since the constant current source CI3 always flows, the current value I5 of the constant current source CI3 is preferably set to a small value such as 1 μA, and the boost current I3 is the size of Tr3 and Tr4. This is possible because the ratio can be adjusted.

  When the input voltage VDD is sufficiently higher than the value of the output voltage Vout, the gate-source voltage Vgs3 of the transistor Tr3 is much larger than the gate-source voltage Vgs4 of the transistor Tr4, so that the transistors Tr3 and Tr4 are It does not operate as a current mirror circuit, a sufficiently large drain current can flow through the transistor Tr3, and the drain current of the transistor Tr2, that is, the boost current I3 is not limited. At this time, an increase in current consumption due to the current I5 of the constant current source CI3 is suppressed by setting the size ratio of the transistors Tr3 and Tr4 such that Tr3> Tr4 so that the boost current I3 is not insufficient. However, when the operating current of the error amplifier 11 needs to be boosted, a sufficiently large boost current I3 can be passed. The transistor Tr3 may function like a switch element.

  Next, in the regulator IC 10 of the above embodiment, the operation of the circuit when it is assumed that the input voltage VDD gradually decreases is shown in FIG. 6 using the timing charts of FIGS. The operation will be described in comparison with the operation. 3 and FIG. 4, FIG. 3 is a timing chart of the regulator of the embodiment shown in FIG. 1, and FIG. 4 is a timing chart of the conventional type regulator shown in FIG.

  In the conventional regulator shown in FIG. 6, when the input voltage VDD gradually decreases and reaches the specification value of the output voltage Vout (timing t1) as shown in FIG. The output voltage Vout also decreases according to the input voltage VDD. Therefore, as shown in FIG. 4B, the feedback voltage VFB also gradually decreases. However, the reference voltage Vref remains a constant voltage value. Therefore, when VFB <Vref, the error amplifier 11 fully drives the gate terminal of the control transistor Tr1 so that VFB = Vref. As a result, the gate-source voltage Vgs1 of the control transistor Tr1 suddenly increases at the timing t1, as shown in FIG. 4C.

  In the conventional regulator shown in FIG. 6, the gate-source voltage Vgs1 of the control transistor Tr1 and the gate-source voltage Vgs2 of the boost transistor Tr2 are the same, that is, Vgs1 = Vgs2. For this reason, after timing t1 when VDD = Vout, the gate-source Vgs2 (= Vgs1) of the boost transistor Tr2 changes to a voltage sufficiently higher than the threshold voltage Vth2, which is one point in FIG. As indicated by the chain line, the drain current of Tr2, that is, the boost current I3, suddenly increases. The increase in the current I3 is amplified by the mirror ratio of the current mirror circuit 13, and becomes an increase in the operating current of the error amplifier 11. According to the simulations of the present inventors, the increase in the operating current of the error amplifier 11 at this time is several tens to several hundred times the normal current consumption, and the output current is close to zero in the no-load state. It became clear that a lot of wasted current flowed, which was a very big problem.

  On the other hand, in the regulator of the present embodiment, as shown in FIG. 3A, until the input voltage VDD gradually decreases and reaches the specification value of the output voltage Vout (timing t1), FIG. As shown in b), the gate-source voltage Vgs3 of the transistor Tr3 gradually decreases as the input voltage VDD decreases, but the gate-source voltage Vgs4 of the transistor Tr4 is constant. That is, since a drain current larger than that of the transistor Tr4 can flow through the transistor Tr3, the boost current I3 that the boost transistor Tr2 attempts to flow is not limited.

Then, after the timing t1 when the input voltage VDD reaches the specification value of the output voltage Vout, as shown in FIG. 3B, the gate-source voltage Vgs3 of the transistor Tr3 and the transistor Tr4 even if the input voltage VDD decreases. The gate-source voltage Vgs4 is constant. Here, the drain current Id in the saturation region of the MOS transistor is expressed by the following equation: Id = μ (Cox / 2) (W / L) (Vgs−Vth) ²
It is represented by Here, μ is the carrier mobility, Cox is the capacitance of the gate insulating film, W / L is the ratio of the gate width to the gate length, Vth is the threshold voltage, and transistors Tr3 and Tr4 formed simultaneously in the same process. Are the same except for the W / L value.

Therefore, from the above equation, drain currents Id3 and Id4 corresponding to the respective W / L flow in the transistors Tr3 and Tr4 under the condition of VDD <Vout. That is, it can be seen that the transistors Tr3 and Tr4 operate as a current mirror.
As a result, when VDD <Vout, the drain current Id3 of the transistor Tr3 is regulated by the drain current Id4 of the transistor Tr4, and the current I3 flowing through the boost transistor Tr2 in series with the transistor Tr3 is also regulated by the drain current Id4 of the transistor Tr4. Therefore, as indicated by the alternate long and short dash line in FIG. 3C, the boost current I3 remains low. Therefore, in the regulator of this embodiment, when VDD <Vout, the increase in the boost current I3 is suppressed, and a wasteful current at no load can be reduced.

FIG. 2 shows a second example of the above embodiment. In this embodiment, only the boost current regulating transistor Tr3 connected in series with the boost transistor Tr2 is provided, and the transistor Tr4 and the constant current source CI3 of FIG. 1 constituting the current mirror circuit with the transistor Tr3 are omitted. is there. Further, the output terminal Vout is connected to the gate terminal of the transistor Tr3.
The current boost circuit 14 of this embodiment is turned on when the gate-source voltage Vgs3 of the transistor Tr3 is larger than the threshold voltage Vth3, and turned off when Vgs3 is smaller than Vth3. That is, when the input voltage VDD is higher than the output voltage Vout by the threshold voltage Vth3 or more of the transistor Tr3 (VDD−Vout> Vth3), the Vgs3 (= VDD−Vout) is smaller than Vth3. It is turned off at (VDD-Vout <Vth3).

Therefore, in the regulator IC of the embodiment of FIG. 2, as shown in FIG. 5A, until the input voltage VDD gradually decreases and reaches the specification value of the output voltage Vout (timing t1), As shown in FIG. 5B, the gate-source voltage Vgs3 of the transistor Tr3 gradually decreases as the input voltage VDD decreases.
After the timing t1 when the input voltage VDD reaches the specification value of the output voltage Vout, as shown in FIG. 5B, the gate-source voltage Vgs3 of the transistor Tr3 is constant even when the input voltage VDD decreases. Become. Prior to timing t0 when VDD-Vout = Vth3, the transistor Tr3 is in an on state, and the boost transistor Tr3 is turned on when the output voltage Vout increases and the boost transistor Tr3 is turned on. be able to.

On the other hand, since the transistor Tr3 is turned off after the timing t0 when VDD-Vout = Vth3, the gate-source Vgs2 (= Vgs1) of the boost transistor Tr2 becomes the threshold at the timing t1 when VDD = Vout. Even if the voltage is sufficiently higher than the value voltage Vth2, the drain current, that is, the boost current I3 of the transistor Tr2 does not increase as shown by the one-dot chain line in FIG.
In this embodiment, by adjusting the threshold voltage Vth3 of the transistor Tr3, the voltage for starting regulation of the boost current I3 can be adjusted. That is, it is possible to adjust to what extent the input voltage VDD approaches the output voltage Vout before the regulation of the boost current I3 is started.

Although the invention made by the present inventor has been specifically described based on the embodiment, the present invention is not limited to the embodiment. For example, in the above-described embodiment, a regulator composed of a MOS transistor is shown, but a bipolar transistor may be used instead of a MOS transistor.
Further, the bleeder resistors R1 and R2 that generate the feedback voltage VFB may be configured by external elements instead of on-chip elements.

10 Series Regulator IC
11 Error amplifier (control circuit)
12 Reference voltage circuit 13 Current mirror circuit (Operating current generation circuit)
14 Current boost circuit (Operating current generator)
CI2 constant current source (operating current generator)
M1 Voltage control transistor M2 Boost current transistor M3 Boost current regulation transistor

Claims (5)

A voltage control transistor connected between the voltage input terminal and the output terminal;
A control circuit for controlling the control transistor so that the output voltage is constant by inputting a feedback voltage proportional to the output voltage and a predetermined reference voltage; and
A regulator semiconductor integrated circuit comprising: an operating current generating circuit for supplying an operating current to the control circuit;
The operating current generation circuit includes:
A function of increasing the operating current when the output current output from the output terminal increases;
A function for limiting the function of increasing the operating current when the voltage input to the voltage input terminal is equal to or lower than the target value of the output voltage output from the output terminal or a predetermined voltage close to the target value. And a regulator semiconductor integrated circuit characterized by comprising: The operating current generation circuit includes:
A constant current source for generating a current serving as a reference for the operating current;
A current mirror circuit that generates a current proportional to the current passed by the constant current source and flows the current as the operating current to the control circuit;
A current boost circuit that generates a boost current that is added to a current that is a reference of the operating current when an output current that is output from the output terminal increases, and that flows to the current mirror circuit;
The boost current is limited when the voltage input to the voltage input terminal is equal to or lower than the target value of the output voltage output from the output terminal or a predetermined voltage close to the target value. A semiconductor integrated circuit for a regulator, characterized in that it is configured. The current boost circuit includes:
The voltage control transistor and the current mirror circuit are configured to be configurable, and a voltage identical to the output voltage of the control circuit applied to the control terminal of the voltage control transistor is applied to the control terminal of the voltage control transistor. A boost current transistor that flows a current proportional to a current flowing through the transistor as a boost current as the boost current, and a voltage input to the voltage input terminal is a target value or target of an output voltage output from the output terminal 3. The regulator semiconductor integrated circuit according to claim 2, wherein a current flowing through the boost current transistor is limited when the voltage becomes equal to or lower than a predetermined voltage close to a value. 4. The current boost circuit includes: a first transistor connected in series with the boost current transistor;
A second transistor and a constant current source connected in series between the output terminal and a reference potential point;
The control terminals of the first transistor and the second transistor are coupled to each other, the control terminal of the second transistor is connected to the drain terminal of the second transistor, and is input to the voltage input terminal The first transistor and the second transistor operate as a current mirror circuit to the boost current transistor when the voltage of the output transistor is equal to or lower than the target value of the output voltage output from the output terminal. 4. The regulator semiconductor integrated circuit according to claim 3, wherein a flowing current is limited. The current boost circuit comprises a transistor connected in series with the boost current transistor,
The transistor has a control terminal connected to the output terminal, and when the voltage input to the voltage input terminal is equal to or lower than a predetermined voltage close to a target value of the output voltage output from the output terminal. 4. The regulator semiconductor integrated circuit according to claim 3, wherein the regulator integrated circuit operates so as to be in a current limiting state.

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