JP2013081349A - Abnormality determination device of power supply system - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an abnormality determination device of a power supply system capable of determining presence of abnormality in the power supply system appropriately.SOLUTION: The power supply system supplies power to a low voltage battery 24, an in-vehicle load 28, and the like, through a master DCDC 12a and a slave DCDC 12b connected in parallel. During a period when the processing related to preparation of vehicle control or the processing related to termination of vehicle control is carried out, the master DCDC 12a and the slave DCDC 12b are instructed sequentially to supply power to the in-vehicle load 28, and the like, by any one of them. Presence of abnormality in the power supply system is determined based on the output voltage from the master DCDC 12a or the slave DCDC 12b in this case.

Description

  The present invention relates to an abnormality determination device for a power supply system applied to a power supply system that supplies power to a predetermined power supply target by a plurality of DCDC converters connected in parallel.

  Conventionally, as can be seen, for example, in Patent Documents 1 and 2 below, there is known a power supply system that supplies power to a load by a plurality of DC power supply devices connected in parallel. With such a configuration, the reliability of the power supply system is improved.

  By the way, as can be seen in Patent Document 3 below, a technique for determining whether or not an abnormality has occurred in any of a plurality of DC power supply devices is disclosed. Specifically, this technique determines whether or not there is an abnormality in the DC power supply device based on a comparison between the output voltage of the DC power supply device and a preset reference voltage during the operation of the DC power supply device.

JP-A-10-108362 JP 2007-318949 A JP 11-136944 A

  Incidentally, in addition to improving the reliability of the power supply system, a configuration in which a plurality of DC power supply devices are connected in parallel may be employed for the purpose of increasing the maximum value of the supply current to the load. Here, in a configuration in which a plurality of DC power supply devices are connected in parallel, a situation in which the operation frequency of a specific DC power supply device increases may continue. In this case, with the technique described in Patent Document 3, there is a concern that the abnormality determination of the power supply system cannot be performed appropriately, such as a decrease in the opportunity to determine whether there is an abnormality in the DC power supply device that operates less frequently. is there.

  The present invention has been made to solve the above problems, and an object of the present invention is to provide an abnormality determination device for a power supply system that can appropriately determine whether there is an abnormality in the power supply system.

  Hereinafter, means for solving the above-described problems and the operation and effects thereof will be described.

  The invention according to claim 1 is applied to a power supply system that supplies power to a predetermined power supply target by a plurality of DCDC converters connected in parallel, and at least one of the plurality of DCDC converters in a specific period. An operation instructing unit for instructing an operation, and an abnormality determining unit for determining whether the power supply system is abnormal based on an operation state of the DCDC converter instructed by the operation instructing unit.

  In the above invention, an operation instruction is given to at least one of the plurality of DCDC converters in a specific period. Then, based on the operation state of the DCDC converter for which the operation instruction has been given, it is determined whether there is an abnormality in the power supply system. Here, the abnormality in the power supply system includes at least one of an abnormality in the DCDC converter, an abnormality in the electrical path connecting the DCDC converters, and an abnormality in the electrical path connecting the DCDC converter and the power supply target.

  According to such an invention, the DCDC converter can be actively operated for abnormality determination by the operation instruction in the specific period, and the frequency of abnormality determination of the power supply system can be avoided from decreasing. . That is, it is possible to appropriately determine whether there is an abnormality in the power supply system.

  According to a second aspect of the present invention, in the first aspect of the invention, it is determined whether or not the required current of the power supply target can be supplied to the power supply target by any one of the plurality of DCDC converters. The operation instruction means supplies power to the power supply target by a single DCDC converter during a period in which the operation determination means determines that the supply can be supplied by the supply determination means as the specific period. Supply instruction means for instructing supply to at least one of the plurality of DCDC converters, wherein the abnormality determination means is based on an operating state of the DCDC converter instructed to supply power by the supply instruction means. And determining whether the power supply system is abnormal.

  In the above invention, in a period (single supply possible period) in which it is determined that any one of a plurality of DC / DC converters can supply the required current to a power supply target (single supply possible period), An instruction to supply power is given to at least one of the plurality of DCDC converters. Then, based on the instructed operating state of the DCDC converter, it is determined whether there is an abnormality in the power supply system. Here, the abnormality of the power supply system includes an abnormality of the DCDC converter and an abnormality of the electrical path connecting the DCDC converter and the power supply target (for example, disconnection of the electrical path or disconnection of the electrical path from the DCDC converter). Is included.

  According to the above-described invention, it is possible to actively operate the DCDC converter alone for abnormality determination during the single supply possible period, and it is possible to avoid a decrease in the frequency of abnormality determination of the power supply system. That is, it is possible to appropriately determine whether there is an abnormality in the power supply system.

  Furthermore, in the above invention, in order to determine the presence or absence of an abnormality in the power supply system based on the operation state of the DCDC converter when the DCDC converter is operated alone, the abnormal part of the power supply system is identified such as which DCDC converter has an abnormality. It can also be specified.

  The supply instruction means may sequentially issue an instruction to supply power to the power supply target using a single DCDC converter to each of the plurality of DCDC converters during the single supply possible period. According to such a configuration, for example, before the power supply system is started, it is possible to determine whether there is an abnormality related to each of the plurality of DCDC converters.

  According to a third aspect of the present invention, in the second aspect of the present invention, the voltage control means for operating the DCDC converter to control the output voltage of the DCDC converter to a target voltage, and the output current of the DCDC converter has a specified value. A current limiting means for operating the DCDC converter in preference to the operation of the DCDC converter by the voltage control means to limit the output current by the specified value, the target voltage is a plurality of the target voltages Each of the DCDC converters is different from each other.

  In order to improve the reliability of the DCDC converter, it is desirable that the required current of the power supply target is equally borne by each of the plurality of DCDC converters. From such a viewpoint, for example, a configuration in which target voltages of a plurality of DCDC converters are set to be equal is also conceivable. However, in this case, current is preferentially output to the power supply target from the DCDC converter having a high output voltage among the plurality of DCDC converters connected in parallel, and the output voltage varies due to individual differences of the DCDC converter. Due to this, there is a concern that one of these DCDC converters may be operated more frequently or it may not be possible to grasp which one operates. In this case, when designing the DCDC converter, the current that can guarantee the reliability of the DCDC converter must be increased, which may increase the size and cost of the DCDC converter.

  Here, in the above invention, the voltage control means and the current limiting means are provided, and the target voltages of the plurality of DCDC converters are made different from each other. According to such a configuration, current is sequentially output from the DCDC converter having a high target voltage to the power supply target, and the operation state of each of the plurality of DCDC converters corresponding to the required current of the power supply target is grasped. Can do. For this reason, in designing the DCDC converter, it is possible to avoid increasing the current that can guarantee the reliability of the DCDC converter, and thus it is possible to avoid an increase in the size and cost of the DCDC converter.

  Here, according to the configuration including the voltage control means and the current limiting means and making the target voltages of the plurality of DCDC converters different from each other, an increase in the size and cost of the DCDC converter can be avoided. When the situation where the requested current to be supplied is small continues, the operation frequency of some DCDC converters tends to be low. For this reason, the above-mentioned invention in which the operation frequency of some DCDC converters tends to be low has a great merit with the invention-specific matters of the invention according to claim 2.

  In the above invention, there is provided means for increasing the specified value corresponding to at least one of the plurality of DCDC converters when at least one output current of the plurality of DCDC converters exceeds the specified value. Good.

  According to such a configuration, when the current to be supplied to the power supply target is small, the output current of each of the plurality of DCDC converters is suppressed to a specified value or less, and the reliability of each of the DCDC converters is improved. When the current to be supplied to the power supply target is large, the current that can be supplied to the power supply target can be increased by increasing the specified value in the above mode. That is, according to the said invention, the reliability of a power supply system can be improved suitably with the effect provided with the said abnormality determination means.

  According to a fourth aspect of the present invention, in the second or third aspect of the invention, the power supply system and the power supply target are mounted on a vehicle, and the power supply target is determined to be permitted to travel by the user. If it is determined that the vehicle control processing is performed, and if it is determined by the user that traveling of the vehicle is prohibited, a processing unit that performs processing related to the end of the vehicle control is included, and the supply determination unit includes: It is determined that the supply is possible when the process related to the preparation of the vehicle control or the process related to the end of the vehicle control is executed.

  During the execution of the process related to the preparation for vehicle control or the process related to the end of the vehicle control, the power consumed by the processing means tends to be small. In view of this point, in the above-described invention, it is determined that the supply is possible when processing related to preparation for vehicle control or processing related to termination of vehicle control is being executed.

  The invention according to claim 5 is the invention according to any one of claims 2 to 4, wherein the power supply system and the power supply target are mounted on a vehicle, and the power supply target is an electronically controlled type. An in-vehicle load is included, and the supply determining unit determines whether the supply is possible based on an operating state of the in-vehicle load.

  According to the operating state of the in-vehicle load, the required current can be grasped. In view of this point, in the above invention, it is determined whether or not the supply is possible based on the operating state of the in-vehicle load.

  According to a sixth aspect of the present invention, in the fifth aspect of the present invention, the vehicle further includes a current detection unit that detects a current output from the parallel connection body of the DCDC converter, and the supply determination unit includes: It is determined whether or not the supply is possible based on the current detected by the current detection means.

  In the said invention, it can be grasped | ascertained accurately whether it is an independent supply possible period by performing the said determination using the detection value of an electric current detection means. Thereby, for example, abnormality determination of the power supply system can be performed while the vehicle is traveling, and the frequency of abnormality determination can be increased.

  The invention according to claim 7 is the invention according to any one of claims 2 to 6, wherein the abnormality determining means determines the presence or absence of the abnormality based on an output voltage of the DCDC converter. To do.

  The invention according to claim 8 is the invention according to any one of claims 2 to 6, wherein the abnormality determination means determines presence or absence of the abnormality based on an output current of the DCDC converter. To do.

  The invention according to claim 9 is the invention according to any one of claims 2 to 8, wherein the power supply system and the power supply target are mounted on a vehicle, and the supply instruction means includes a plurality of the DCDC converters. Each of which is provided with an instruction to supply electric power to the DCDC converter provided therein, and the vehicle has a control higher than the supply instruction means and controls the control of the vehicle. And the abnormality determining means is provided in the control device.

  The control device normally collects information used for vehicle control. In view of this point, in the above invention, the abnormality determination unit of the power supply system can be appropriately determined by providing the control device with the abnormality determination means. In the above invention, the term “upper” means, for example, the upstream side of the supply instruction means when the user request input from the user interface is the most upstream.

  According to a tenth aspect of the present invention, in the invention according to any one of the first to ninth aspects, voltage control means for operating the DCDC converter to control an output voltage of the DCDC converter to a target voltage, and the DCDC A current limiting means for operating the DCDC converter in preference to the operation of the DCDC converter by the voltage control means to limit the output current by the specified value when the output current of the converter exceeds a specified value; When at least one output current of the DCDC converters exceeds the specified value, at least one of the plurality of DCDC converters whose output current exceeds the specified value is at least one of the other DCDC converters. Signal output means for outputting an overcurrent limiting signal to a signal output target; In the signal output target to which the overcurrent limit signal is input, the signal output target further includes an increase unit that increases the specified value corresponding to the signal, and the operation instruction unit includes a plurality of the DCDC converters in the specific period. A forced output instruction means for instructing a forced output of the overcurrent limit signal from a part of the signal output target, wherein the abnormality determination means is configured to output the overcurrent in the specific period for the signal output target. Based on the input result of the limit signal, it is determined whether or not there is an abnormal transmission of the overcurrent limit signal.

  In the above invention, the signal output means and the increase means are provided, an overcurrent limit signal is output to the signal output target, and a specified value corresponding to itself is increased in the signal output target to which the overcurrent limit signal is input. According to such a configuration, when the current to be supplied to the power supply target is small, the output current of each of the plurality of DCDC converters is suppressed to a specified value or less, and the reliability of each of the DCDC converters is improved. When the current to be supplied to the power supply target is large, the current that can be supplied to the power supply target can be increased by increasing the specified value in the above mode. That is, according to the said invention, the reliability of a power supply system can be improved, increasing the maximum value of the electric current which can be supplied to electric power supply object.

  By the way, when an abnormal transmission of the overcurrent limiting signal between the DCDC converters occurs, such as disconnection of a signal line connecting the DCDC converters, various problems may occur. Specifically, for example, if an abnormality that disables transmission of the overcurrent limit signal occurs between the DCDC converters, the specified value cannot be increased in the DCDC converter that is the output target of the overcurrent limit signal. For this reason, when the electric current which should be supplied to an electric power supply object becomes large, there exists a possibility that the electric current supply with respect to an electric power supply object may be insufficient. On the other hand, when an abnormality occurs in which the overcurrent limit signal is always transmitted between the DCDC converters, the specified value is always increased in the DCDC converter that is the output target of the overcurrent limit signal. In this case, the state in which the current load of the DCDC converter in which the specified value is constantly increased among the plurality of DCDC converters continues to increase, and the reliability of the DCDC converter in which the current load increases may be greatly reduced.

  In this regard, in the above invention, by providing the forced output instruction means, a part of the plurality of DCDC converters is instructed to forcibly output the overcurrent limiting signal to the signal output target in a specific period. Then, based on the input result of the overcurrent limit signal in the specific period with respect to the signal output target, it is determined whether there is an abnormal transmission of the overcurrent limit signal. That is, during the specific period, the presence / absence of an abnormal transmission of the overcurrent limit signal is determined based on a comparison between the overcurrent limit signals recognized by the DCDC converters on the input / output side of the overcurrent limit signal. According to the above invention, it is possible to appropriately determine whether or not there is an abnormal transmission of the overcurrent limiting signal between the DCDC converters.

  According to an eleventh aspect of the present invention, in the tenth aspect of the present invention, the forcible output instructing unit instructs to forcibly output the overcurrent limiting signal and stop the output, and at least a pair of the plurality of DCDC converters. The DCDC converter is determined as the transmission abnormality determination target by the abnormality determination unit, and the specific period is a total output current of the DCDC converter as the determination target corresponding to the DCDC converter as the determination target and The period is equal to or shorter than the addition value of the prescribed value before the increase by the increasing means.

  When the current to be supplied to the power supply target increases, the specified value corresponding to at least one of the plurality of DCDC converters is increased by using the overcurrent limiting signal output by the signal output means as an input, and is supplied to the power supply target. A situation may occur in which the power current exceeds the sum of the specified values before increase corresponding to each of the plurality of DCDC converters. Under these circumstances, when the output of the overcurrent limit signal is forcibly stopped by the forced output instruction means for determining whether there is a transmission abnormality, the maximum value of the current that can be supplied by the plurality of DCDC converters is supplied to the power supply target. There is a risk that the current should be lower.

  In this regard, in the above invention, the specific period is determined in the above manner. For this reason, even when the total output current of the DCDC converter subject to the determination of the transmission abnormality by the abnormality determination means decreases due to the forced output stop of the overcurrent limiting signal, a plurality of DCDCs included in the power supply system It can be avoided that the total output current of the converter falls below the current to be supplied to the power supply target.

  According to a twelfth aspect of the present invention, in the invention according to the eleventh aspect, when the power supply system and the power supply target are mounted on a vehicle and it is determined that the user is permitted to travel the vehicle, the vehicle control preparation is performed. When it is determined that the vehicle has been prohibited from traveling by the user, processing means that performs processing related to the end of the vehicle control, processing related to the preparation for the vehicle control, and processing related to the end of the vehicle control are executed. And a supply limiting means for limiting a current to be supplied to the power supply target, wherein the specific period is at least one of a process related to the preparation of the vehicle control and a process related to the end of the vehicle control. One is a period during which one is executed.

  In the above invention, by providing the supply restriction means, the overcurrent restriction signal output by the signal output means is input during the period when the process related to the preparation for vehicle control and the process related to the end of the vehicle control are executed, and the above determination is made. None of the specified values corresponding to each of the targeted DCDC converters is increased. For this reason, in the said invention, the said specific period is defined in the said aspect.

  The invention according to claim 13 is the invention according to claim 11 or 12, wherein the power supply system and the power supply target are mounted on a vehicle, and the vehicle outputs a total output current of the DCDC converter to be the determination target. Current calculating means for calculating is further provided, and the specific period means that a total output current calculated by the current calculating means during travel control of the vehicle corresponds to the DCDC converter to be determined and The period is equal to or shorter than the addition value of the prescribed value before the increase by the increasing means.

  In the above invention, in order to determine whether or not there is an abnormal transmission of the overcurrent limiting signal during vehicle travel control, the specific period is determined in the above manner using the total output current calculated by the current calculation means.

  The invention according to claim 14 is the invention according to any one of claims 10 to 13, wherein the required current of the power supply target is supplied to the power supply target by any one of the plurality of DCDC converters. Supply judgment means for judging whether or not it is possible, the specific period is a period in which it is judged that supply is possible by the supply judgment means, and the forced output instruction means is the overcurrent Instructing to forcibly output a limit signal and stopping the output, the operation instructing means provides an instruction to supply power to the power supply target by the single DCDC converter in the specific period. Supply instruction means for performing at least one of the above, and the abnormality determination means is configured to supply power by the supply instruction means during the specific period. A process for determining whether or not there is an abnormality that prevents current from being output from the DCDC converter based on the operating state of the DCDC converter instructed to supply, and a transmission abnormality of the overcurrent limit signal based on an input result of the overcurrent limit signal It is characterized in that both processes for determining presence / absence are performed.

  In the said invention, the said specific period is made into the period (single supply possible period) judged that the said request | requirement electric current can be supplied to an electric power supply object by any one among several DCDC converters. Then, during the single supply possible period, an instruction to supply power to the power supply target by a single DCDC converter is given to at least one of the plurality of DCDC converters. Then, based on the instructed operating state of the DCDC converter, it is determined whether there is an abnormality in the power supply system.

  According to the above-described invention, it is possible to actively operate the DCDC converter alone for abnormality determination during the single supply possible period, and it is possible to avoid a decrease in the frequency of abnormality determination of the power supply system. In addition, in order to determine the presence or absence of abnormality in the power supply system based on the operating state of the DCDC converter when operating the DCDC converter alone, it is also possible to identify the abnormal part of the power supply system, such as which DCDC converter has an abnormality. it can.

  And in addition to such a structure, in the said invention, the presence or absence of transmission abnormality of an overcurrent limitation signal is also judged in the said independent supply possible period. Even if the output of the overcurrent limit signal is forcibly stopped by the forced output instructing means for determining whether there is a transmission abnormality, the currents that can be supplied by a plurality of DCDC converters are determined. The possibility that the maximum value is lower than the current to be supplied to the power supply target is small. For this reason, in the said invention, it can avoid that the electric current supply to an electric power supply object runs short due to execution of the determination process of the said transmission abnormality.

  The invention according to claim 15 is the invention according to any one of claims 10 to 14, wherein the target voltages are different from each other in the plurality of DCDC converters, and the target among the plurality of DCDC converters. The signal having the highest voltage is set as the master and the remainder is set as the slave. The signal output means outputs the output current of the slave having the lowest target voltage among the slaves exceeding the specified value corresponding to the slave having the lowest target voltage. In this case, the overcurrent limiting signal is output from at least one DCDC converter other than the slave having the lowest target voltage among the plurality of DCDC converters from the slave having the lowest target voltage.

  In the above invention, first, a current is output from the DCDC converter (master) having the highest target voltage to the power supply target. When the output current of the master exceeds a specified value corresponding to the master, the output current of the master is limited by the specified value, so that the output voltage of the master is lowered. Thereafter, current is output to the power supply target in order from the slave having the higher target voltage among the DCDC converters other than the master.

  In such a configuration, unless the current to be supplied to the power supply target is increased, the overcurrent limit signal is not output from the slave with the lowest target voltage, and the frequency of determining whether there is an abnormal transmission of the overcurrent limit signal decreases. Is concerned. For this reason, the above-mentioned invention which tends to reduce the frequency of output of the overcurrent limiting signal is capable of determining whether the transmission abnormality is present by positively outputting the overcurrent limiting signal. The benefits of having

1 is a system configuration diagram according to a first embodiment. FIG. The figure which shows the control aspect of the DCDC converter concerning the embodiment. 5 is a flowchart showing a procedure of control processing of the master DCDC according to the embodiment. 6 is an exemplary flowchart showing the procedure of a slave DCDC control process according to the embodiment; The flowchart which shows the procedure of the abnormality determination process of vehicle ECU concerning the embodiment. The time chart which shows an example of the abnormality determination process concerning the embodiment. The system block diagram concerning 2nd Embodiment. The flowchart which shows the procedure of the abnormality determination process of vehicle ECU concerning the embodiment. The flowchart which shows the procedure of the abnormality determination process of vehicle ECU concerning the embodiment. The time chart which shows an example of the abnormality determination process concerning the embodiment. The system block diagram concerning 3rd Embodiment. 6 is an exemplary flowchart illustrating a procedure of a transmission abnormality determination process on the slave DCDC side according to the embodiment; 6 is an exemplary flowchart illustrating a procedure of transmission abnormality determination processing on the master DCDC side according to the embodiment; The time chart which shows an example of the transmission abnormality judgment process concerning the embodiment. The time chart which shows an example of the transmission abnormality judgment process concerning the embodiment. The time chart which shows an example of the transmission abnormality judgment process concerning the embodiment. The system block diagram concerning 4th Embodiment. The time chart which shows an example of the abnormality determination process concerning the embodiment. The time chart which shows an example of the abnormality determination process concerning the embodiment. The time chart which shows an example of the abnormality determination process concerning the embodiment. The time chart which shows an example of the abnormality determination process concerning the embodiment. The time chart which shows an example of the abnormality determination process concerning the embodiment.

(First embodiment)
A first embodiment in which an abnormality determination device according to the present invention is applied to a power supply system of a large hybrid vehicle (bus) including a rotating machine and an engine as an in-vehicle main machine will be described with reference to the drawings.

  FIG. 1 shows the overall configuration of the power supply system according to the present embodiment.

  The illustrated high-voltage battery 10 is a power supply source of a rotating machine (motor generator) (not shown) as an in-vehicle main machine, and is a storage battery having a predetermined high voltage of, for example, several hundred volts or more. Incidentally, as the high voltage battery 10, for example, a lithium ion storage battery or a nickel metal hydride storage battery can be employed.

  The high-voltage battery 10 can be connected to each of a plurality (two) of DCDC converters 12a and 12b connected in parallel. In addition, between the high voltage battery 10 and these DCDC converters, there is provided a relay (not shown) for conducting or blocking between them. In the present embodiment, hereinafter, of these DCDC converters 12a and 12b, 12a is referred to as a master DCDC, and 12b is referred to as a slave DCDC.

  The master DCDC 12a includes a series connection body of a pair of switching elements SW1 and SW3, a parallel connection body (full bridge circuit) of a series connection body of a pair of switching elements SW2 and SW4, and a transformer 14. The high-voltage battery 10 This is an isolated converter that steps down the voltage of the output and outputs it. In this embodiment, N-channel MOS transistors are assumed as the switching elements SW1 to SW4.

  The input terminals (drains) of the switching elements SW1 and SW2 on the high potential side are connected to the positive electrode side of the high voltage battery 10, and the output terminals (sources) of the switching elements SW3 and SW4 on the low potential side are the negative electrode side of the high voltage battery 10. It is connected to the. A free wheel diode (not shown) is connected between the input / output terminals of the switching elements SW1 to SW4.

  Both ends of the primary side coil 14a of the transformer 14 are connected to a connection point between the pair of switching elements SW1 and SW3 and a connection point between the pair of switching elements SW2 and SW4, respectively.

  Both ends of the secondary coil 14b of the transformer 14 are connected to the anode sides of the diodes RD1 and RD2, and the cathode sides of the diodes RD1 and RD2 are short-circuited. The diodes RD1 and RD2 are connected to a smoothing circuit 16 (LC filter) including a reactor 16a and a capacitor 16b.

  The primary sides of the high-voltage battery 10 and the master DCDC 12a constitute an in-vehicle high-voltage system and are insulated from a ground line GL connected to a case (not shown) of the master DCDC 12a. On the other hand, the secondary side of the master DCDC 12a constitutes a vehicle-mounted low-pressure system that operates with the ground line GL as a reference.

  For this reason, in this embodiment, the midpoint tap mt of the secondary side coil 14b of the transformer 14 is connected to the ground line GL. According to such a configuration, the diodes RD1 and RD2 include the switching element SW1 on the high potential side and the switching element SW4 on the low potential side turned on, or the switching element SW2 on the high potential side and the switching element SW3 on the low potential side. Depending on whether is turned on, the voltage of “½” of the voltage across the secondary coil 14b is alternately output. The midpoint tap mt is a terminal connected to the center of the secondary side coil 14b of the transformer 14 (a midpoint that is a point equidistant from both terminals).

  On the primary side of the master DCDC 12a, an input side voltage sensor 18 that detects the input voltage of the full bridge circuit and an input side current sensor 20 that detects the current flowing through the primary side coil 14a of the transformer 14 are provided. . Further, an output-side voltage sensor 22 that detects an output voltage of the master DCDC 12a (an output voltage from the smoothing circuit 16) is provided on the secondary side of the master DCDC 12a.

  In the present embodiment, the master DCDC 12a and the slave DCDC 12b are assumed to be the same in terms of structure and performance. For this reason, in FIG. 1, illustration of the internal structure of the slave DCDC 12b is omitted.

  In the present embodiment, the configuration in which the master DCDC 12a and the slave DCDC 12b are connected in parallel is to increase the maximum value of the total output current of the master DCDC 12a and the slave DCDC 12b. That is, the application target of the power supply system according to the present embodiment is a large vehicle, and the current to be supplied to the vehicle-mounted load 28 described later tends to increase.

  A pair of output sides of the parallel connection body of the master DCDC 12a and the slave DCDC 12b are connected to the parallel connection body of the low voltage battery 24, the vehicle ECU 26, and the vehicle load 28 (excluding the vehicle ECU 26). The low voltage battery 24 is a storage battery that constitutes a part of the low voltage system and outputs a predetermined low voltage (for example, 24 V). In the present embodiment, a lead-acid battery is used as the low-voltage battery 24, and more specifically, a series connection body of a pair of lead-acid batteries having a terminal voltage of 12V is used.

  The on-vehicle load 28 includes an air conditioner for air conditioning in the vehicle interior (more specifically, a fan for blowing air and a heater for heating provided in the air conditioner), a headlight, illumination in the vehicle interior, and an actuator for driving the engine ( Fuel injection valve etc.).

  The vehicle ECU 26 includes a control circuit that is higher than the control circuit 30 provided in each of the master DCDC 12a and the slave DCDC 12b (upstream when a user request input from a user interface such as an accelerator pedal is the most upstream). It is a device and has a function to control the vehicle while using the low-voltage battery 24 as a power supply source.

  The vehicle ECU 26 is supplied with electric power from the low-voltage battery 24 when it is determined that the vehicle is permitted to travel by the user, and outputs a common start signal to the master DCDC 12a, the slave DCDC 12b, and the in-vehicle load 28. Here, in the present embodiment, whether or not the vehicle is permitted to travel is determined by whether or not the ignition switch 32 is turned on by the user. The vehicle ECU 26 includes a voltage sensor 26a that detects output voltages of the master DCDC 12a and the slave DCDC 12b.

  Incidentally, when it is determined that the vehicle is permitted to travel by the user, the vehicle ECU 26 performs processing related to preparation for vehicle control prior to the vehicle traveling. Here, the process related to preparation for vehicle control is a process including a process of electrically connecting the high-pressure system side and the low-pressure system side by a relay closing operation. On the other hand, when the vehicle ECU 26 determines that traveling of the vehicle is prohibited by the user, the vehicle ECU 26 performs processing related to the end of vehicle control. Here, the process related to the end of the vehicle control is a process including a process of electrically disconnecting the high-pressure system side and the low-pressure system side by opening the relay. Note that whether or not the vehicle is prohibited from traveling by the user may be determined by whether or not the ignition switch 32 is turned off by the user.

  The control circuit 30 operates the switching elements SW <b> 1 to SW <b> 4 via the switching circuit 34 in order to supply power to the battery, the vehicle ECU 26, and the in-vehicle load 28 while using the low-voltage battery 24 as a power supply source.

  Specifically, the control circuit 30 controls the operation amount (Duty) for feedback control (voltage feedback control) of the output voltage of the master DCDC 12 a detected by the output side voltage sensor 22 to the target voltage, and the output value of the input side current sensor 20. The amount of operation for feedback control (current feedback control) of the output current of the master DCDC 12a calculated from the control value to the specified value (master limit value) and the voltage detected by the input side voltage sensor 18 are used as the target voltage. Calculate the amount of operation. Then, the switching elements SW1 to SW4 are operated based on the smaller of the calculated operation amounts. Here, the master limit value Ia is set from the viewpoint of maintaining the reliability of the DCDC converter, and specifically, for example, the reliability of the DCDC converter until the integration operation time of the DCDC converter reaches a specified time (for example, 80,000 hours). May be set to a current value (average current) capable of maintaining the characteristics.

  According to such a configuration, voltage feedback control is performed until the output current of the master DCDC 12a exceeds the master limit value Ia. On the other hand, if the output current of the master DCDC 12a exceeds the master limit value Ia, the output current of the master DCDC 12a is controlled to the master limit value Ia by the current feedback control, so that the output voltage of the master DCDC 12a is lowered. That is, the master DCDC 12a has a constant current drooping characteristic.

  Incidentally, the control circuit 30 of the slave DCDC 12b performs the same process as the process described above of the control circuit 30 of the master DCDC 12a. Further, in the above process, instead of the detection value of the output side voltage sensor 22, a sensor for detecting the voltage across the low voltage battery 24 and the vehicle load 28 may be provided, and the detection value of this sensor may be used.

  Further, the high-voltage system and the low-pressure system are insulated by an insulating element 36 (not shown) (for example, a photocoupler as an optical insulating element or a pulse transformer as a magnetic insulating element), and operation signals of the switching elements SW1 to SW4. Is input to the switching circuit 34 of the high voltage system via the insulating element 36. The detection values of the input side voltage sensor 18 and the input side current sensor 20 are input to the control circuit 30 of the low voltage system via the insulating element 36.

  Next, setting of the target voltage and the like in the control of the DCDC converter according to the present embodiment will be described.

  In the present embodiment, the target voltage Va (for example, 28V) of the master DCDC 12a is set higher than the target voltage Vb (for example, 27V) of the slave DCDC 12b. Here, the target voltage Vb of the slave DCDC 12b may be a value that is slightly higher than the upper limit value of the working voltage range of the low-voltage battery 24, for example.

  Here, the reason why the target voltage Va of the master DCDC 12a is different from the target voltage Vb of the slave DCDC 12b is to avoid an increase in the size and cost of the DCDC converter. That is, in order to improve the reliability of the DCDC converter, for example, the current to be supplied to the in-vehicle load 28, the vehicle ECU 26, and the low-voltage battery 24 in each of the master DCDC 12a and the slave DCDC 12b (hereinafter referred to as a vehicle-side requested current). It is desirable to operate these DCDC converters so that the load is evenly distributed. From such a viewpoint, for example, it is also conceivable to set the target voltages of the master DCDC 12a and the slave DCDC 12b to be equal.

  However, in this case, the output voltage varies due to individual differences of the DCDC converter caused by the difference in signal transmission speed from the switching circuit 34 to each of the switching elements SW1 to SW4, and a pair of DCDC converters connected in parallel. Which of the master DCDC 12a and the slave DCDC 12b is operated more frequently or which one operates due to the current being preferentially output from the DCDC converter having a higher output voltage to the in-vehicle load 28 or the like? There is a concern that it may not be possible to grasp. In this case, when designing the DCDC converter, the current value (eg, rated current) that guarantees the reliability of the DCDC converter is increased. In this case, there is a demand for the transformer 14 in the DCDC converter, the switching elements SW1 to SW4, and the like to cope with a large current, and the element is newly developed. As a result, the cost and the size of the DCDC converter may increase. There is.

  In order to avoid such a problem, the target voltages of the master DCDC 12a and the slave DCDC 12b are made different from each other, thereby clarifying which one outputs current to the vehicle side according to the required current on the vehicle side. Thereby, the increase in the physique and cost of the DCDC converter can be avoided, or the power supply system can be designed by diverting the conventional DCDC converter.

  Here, in the present embodiment, the specified value (hereinafter referred to as the slave limit value Ib) corresponding to the slave DCDC 12b is set to the maximum current (for example, 80A) that can be output from the slave DCDC 12b, and the master limit value Ia is set to the slave limit value Ib. A smaller value (for example, 35 A) is set. This setting is a setting for improving the reliability of the power supply system. That is, when the required current on the vehicle side becomes large, the slave DCDC 12b is also burdened with a part of the required current at an early stage together with the master DCDC 12a, so that the required current on the vehicle side is applied to each of the master DCDC 12a and the slave DCDC 12b as much as possible. Make it even.

  By the way, as the master limit value Ia is smaller than the slave limit value Ib, the current flowing through the master DCDC 12a decreases, and when the vehicle-side required current increases, the slave DCDC 12b receives a part of the request current earlier. Since the burden can be imposed, it is possible to avoid shortening the life of the master DCDC 12a.

  Furthermore, in this embodiment, when it is determined in the control circuit 30 of the slave DCDC 12b that the output current of the slave DCDC 12b exceeds the slave limit value Ib, an overcurrent limit signal is output to the control circuit 30 of the master DCDC 12a via the vehicle ECU 26. To do. When the control circuit 30 of the master DCDC 12a determines that an overcurrent limit signal has been input, a process for increasing the master limit value Ia is performed. In the present embodiment, a process is performed in which the master limit value Ia is set to the maximum current (for example, 80 A) Ic that can be output from the master DCDC 12a. This is a process for increasing the maximum value of the current that can be supplied to the in-vehicle load 28 by the power supply system when the required current on the vehicle side increases.

  The overcurrent limiting signal may be transmitted from slave DCDC 12b to master DCDC 12a via vehicle ECU 26, or may be directly transmitted from slave DCDC 12b to master DCDC 12a.

  Next, an example of the above-described processing mode of the control circuit 30 will be described with reference to FIG. Specifically, FIG. 2A shows the transition of the output voltage of the parallel connection body of the master DCDC 12a and the slave DCDC 12b, and FIG. 2B shows the transition of the total output current of the master DCDC 12a and the slave DCDC 12b. (C) shows the transition of the output current of the master DCDC 12a alone, FIG. 2 (d) shows the transition of the output current of the slave DCDC 12b alone, and FIG. 2 (e) shows the overcurrent from the slave DCDC 12b to the master DCDC 12a. The transition of the output state of the limit signal is shown. FIG. 2 shows a situation in which the vehicle-side required current gradually increases with time.

  As shown in the figure, until time t1 when the total output current (vehicle-side requested current) reaches the master limit value Ia, current is output only from the master DCDC 12a. At time t1, the output current of the master DCDC 12a exceeds the master limit value Ia, so that the output current of the master DCDC 12a is fixed at the master limit value Ia.

  After that, at time t2 when the output voltage of the master DCDC 12a is lowered to the target voltage Vb, output of current is started from the slave DCDC 12b. At time t3 when the output current of the slave DCDC 12b exceeds the slave limit value Ib (the total output current exceeds the total value 115A of the master limit value Ia and the slave limit value Ib), the output voltage of the slave DCDC 12b is decreased, An overcurrent limiting signal is output from the slave DCDC 12b.

  When the overcurrent limit signal is input to the master DCDC 12a, the master DCDC 12a increases the master limit value Ia to Ic (80A). As a result, due to switching from current feedback control to voltage feedback control for the master DCDC 12a, the master limit value Ic of the vehicle-side requested current is borne by the master DCDC 12a at time t4, and the rest is borne by the slave DCDC 12b. The That is, the output current of the master DCDC 12a and the output current of the slave DCDC 12b are inverted.

  After that, when the requested current on the vehicle side gradually increases and the total output current exceeds the total value (160A) of the master limit value Ic and the slave limit value Ib, the output currents of the master DCDC 12a and the slave DCDC 12b become the respective limit values. Therefore, the output voltages of the master DCDC 12a and the slave DCDC 12b are lowered.

  Next, an abnormality determination process for determining whether there is an abnormality in the power supply system according to the present embodiment will be described with reference to FIGS. In the present embodiment, the abnormality determination process is performed in a period in which a process related to preparation for vehicle control is executed (travel preparation period) and a period in which a process related to the end of vehicle control is executed (standby preparation period). Here, the abnormality of the power supply system is an abnormality that occurs in the DCDC converter itself due to a failure of a DCDC converter component such as the control circuit 30 or the switching circuit 34, or an electrical path that connects the DCDC converter to the low-voltage battery 24, the in-vehicle load 28, etc. An abnormality (for example, disconnection) and an abnormality in which the electric path is disconnected from the DCDC converter are included.

  First, FIG. 3 shows a control processing procedure of the master DCDC 12a in the abnormality determination processing according to the present embodiment. This process is executed by the control circuit 30 of the master DCDC 12a.

  In this series of processing, the value of the master permission flag Fm is set to “0” in step S10. Here, the master permission flag Fm indicates that the operation of the master DCDC 12a is prohibited by “0”, and indicates that the operation is permitted by “1”. In this step, initialization processing of data used for control processing of the master DCDC 12a is also performed.

  In subsequent steps S12 and S14, the process waits until an activation signal is input from the vehicle ECU 26 (step S12: NO, step S14: YES). This process is a process for grasping a reference timing for performing the control process of the master DCDC 12a.

  If it is determined that the activation signal has been input, the process proceeds to step S16 to determine whether or not the value of the master permission flag Fm is “0”.

  If an affirmative determination is made in step S <b> 16, timing is started by the timer in the control circuit 30. In step S18, the process waits until the elapsed time Tcm from the start of timing reaches the first slave-side specified time Tsa. This process is a process for waiting until the abnormality determination process (detailed later) when the slave DCDC 12b performed by the vehicle ECU 26 is operated is completed.

  In the subsequent step S20, the value of the master permission flag Fm is set to “1”, and the operation of the master DCDC 12a is started for determining the abnormality of the master DCDC 12a. Thereby, the output of the current from the master DCDC 12a is started. Then, the process returns to step S12.

  If it is determined in step S12 that the input of the activation signal has been stopped, a negative determination is made in subsequent step S14, the timer is initialized, and time measurement is started by the timer.

  In the subsequent step S22, the process waits until the elapsed time Tcm from the start of timing reaches the second master-side specified time Tmb. This process is a process for waiting until the abnormality determination process (detailed later) when the master DCDC 12a performed by the vehicle ECU 26 is operated is completed.

  In the subsequent step S24, the value of the master permission flag Fm is set to “0”. As a result, the operation of the master DCDC 12a is stopped, and the output of current from the master DCDC 12a is stopped.

  In addition, when the process of step S24 is completed, this series of processes is once complete | finished.

  Next, FIG. 4 shows a control process procedure of the slave DCDC 12b in the abnormality determination process according to the present embodiment. This process is executed by the control circuit 30 of the slave DCDC 12b.

  In this series of processing, the value of the slave permission flag Fs is set to “0” in step S30. Here, the slave permission flag Fs indicates that the operation of the slave DCDC 12b is prohibited by “0”, and indicates that the operation is permitted by “1”. In this step, initialization processing of data used for control processing of the slave DCDC 12b is also performed.

  In subsequent steps S32 and S34, the process waits until an activation signal is input from the vehicle ECU 26 (step S32: NO, step S34: YES). This process is a process for grasping a reference timing for performing the control process of the slave DCDC 12b.

  If it is determined that the activation signal has been input, the process proceeds to step S36 to determine whether or not the value of the slave permission flag Fs is “0”.

  When an affirmative determination is made in step S36, the process proceeds to step S38, the value of the slave permission flag Fs is set to “1”, and the operation of the slave DCDC 12b is started for determining abnormality of the slave DCDC 12b. Thereby, the output of the current from the slave DCDC 12b is started. In this step, a process for starting time measurement by a timer is also performed.

  In the subsequent step S40, the process waits until the elapsed time Tcs from the start of time measurement reaches the first slave-side specified time Tsa. This process is a process for waiting until the abnormality determination process when the slave DCDC 12b performed by the vehicle ECU 26 is operated is completed.

  In a succeeding step S42, the operation of the slave DCDC 12b is stopped. Thereby, the output of the current from the slave DCDC 12b is stopped. In this step, a process for starting the time measurement by the timer is performed together with the initialization process of the timer. Further, after the operation of the slave DCDC 12b is stopped, the value of the slave permission flag Fs is set to “0”.

  In the subsequent step S44, the process waits until the elapsed time Tcs from when the value of the slave permission flag Fs is set to “0” becomes the first master-side specified time Tma based on the timer. This process is a process for waiting until the abnormality determination process when the master DCDC 12a performed by the vehicle ECU 26 is operated is completed.

  In the subsequent step S46, the value of the slave permission flag Fs is set to “1” in order to prepare for the operation of the slave DCDC 12b in the subsequent vehicle control. Then, the process returns to step S32.

  If it is determined in step S32 that the input of the activation signal has been stopped, a negative determination is made in subsequent step S34, the timer initialization process is performed, and the timer starts timing.

  In step S48, the value of the slave permission flag Fs is set to “0”. In the subsequent step S50, the process waits until the elapsed time Tcs from the start of the time measurement reaches the second master-side specified time Tmb. This process is a process for waiting until the abnormality determination process when the master DCDC 12a performed by the vehicle ECU 26 is operated is completed.

  In the subsequent step S52, the value of the slave permission flag Fs is set to “1”. In this step, a process for starting the time measurement by the timer is performed together with the initialization process of the timer. Further, after the value of the slave permission flag Fs is set to “1”, the operation of the slave DCDC 12b is started. As a result, output of current from the slave DCDC 12b is started for determining the abnormality of the slave DCDC 12b.

  In the subsequent step S54, the process waits until the elapsed time Tcs from the start of the operation of the slave DCDC 12b becomes the second specified time Tsb on the slave side, based on the timing of the timer. This process is a process for waiting until the abnormality determination process when the slave DCDC 12b performed by the vehicle ECU 26 is operated is completed.

  In the subsequent step S56, the value of the slave permission flag Fs is set to “0”. As a result, the operation of the slave DCDC 12b is stopped, and the output of current from the slave DCDC 12b is stopped.

  In addition, when the process of step S56 is completed, this series of processes is once complete | finished.

  Next, FIG. 5 shows a procedure of processing executed by the vehicle ECU 26 in the abnormality determination processing according to the present embodiment. This process is executed by the vehicle ECU 26 triggered by the ignition switch 32 being turned on.

  In this series of processing, in step S60, the value of the master abnormality flag F1 and the value of the slave abnormality flag F2 are set to “1”. Here, the master abnormality flag F1 indicates that no abnormality has occurred in the master DCDC 12a by “0”, and indicates that an abnormality has occurred by “1”. The slave abnormality flag F2 indicates that no abnormality has occurred in the slave DCDC 12b by “0”, and indicates that an abnormality has occurred by “1”. In this step, data initialization processing used for processing performed by the vehicle ECU 26 is also performed.

  In the subsequent step S62, an activation signal is output to the master DCDC 12a and the slave DCDC 12b. In addition, what is necessary is just to output an activation signal after completion of the process which electrically connects the high voltage | pressure system side and the low voltage | pressure system side among the processes regarding the preparation of vehicle control. Further, in this step, processing for starting time measurement by a timer is also performed.

  In subsequent steps S64 to S78, abnormality determination processing of the power supply system is performed in the travel preparation period (for example, several hundred msec).

  Specifically, first, in steps S64 to S68, a period until the elapsed time Tp from the start of timing reaches the first slave side specified time Tsa (the slave DCDC 12b operates in step S40 of FIG. 4). During the period, it is determined whether or not the output voltage Vs of the slave DCDC 12b is equal to or higher than the first specified value α. Here, the first specified value α is set to a value that can determine whether or not the output voltage Vs of the slave DCDC 12b is normal. In the present embodiment, the first specified value α is higher than the upper limit value of the voltage of the low-voltage battery 24. In addition, the value is set near the target voltage Vb of the slave DCDC 12b. This process is a process for determining whether or not an abnormality has occurred in the slave DCDC 12b.

  If it is determined that the output voltage Vs of the slave DCDC 12b is equal to or higher than the first specified value α in the period until the elapsed time Tp reaches the first slave-side specified time Tsa, an abnormality has occurred in the slave DCDC 12b. In step S66, the slave abnormality flag F2 is set to “0”.

  If an affirmative determination is made in step S68, timer initialization processing is performed and timing is started by the timer.

  In subsequent steps S70 to S74, the master DCDC 12a performs a period until the elapsed time Tp from when the value of the slave permission flag Fs is set to “0” to the first master side specified time Tma based on the timing of the timer. It is determined whether or not the output voltage Vm is equal to or higher than the second specified value β. Here, the second specified value β is set to a value that can determine whether or not the output voltage Vm of the master DCDC 12a is normal. In the present embodiment, the second specified value β is higher than the upper limit value of the voltage of the low-voltage battery 24. In addition, the value is set near the target voltage Va of the master DCDC 12a. This process is a process for determining whether or not an abnormality has occurred in the master DCDC 12a.

  In a succeeding step S76, it is determined whether or not both the value of the master abnormality flag F1 and the value of the slave abnormality flag F2 are “0”.

  If a negative determination is made in step S76, the process proceeds to step S78 to perform DC abnormality processing. In the present embodiment, a notification process and a travel prohibition process are performed as the DC abnormality process.

  Specifically, the notification process is a process of notifying the user that an abnormality has occurred regarding at least one of the master DCDC 12a and the slave DCDC 12b. Specifically, for example, the notification process may be a process of turning on the MIL.

  Further, the travel prohibition process is a process for avoiding that the vehicle cannot travel appropriately, and specifically, for example, when it is determined that an abnormality has occurred regarding both the master DCDC 12a and the slave DCDC 12b. In addition, a process for prohibiting the start of the motor generator or the engine may be performed.

  On the other hand, if an affirmative determination is made in step S76, it is determined that no abnormality has occurred in the power supply system, and a process for permitting vehicle travel control is performed in step S80.

  In the subsequent step S82, the process waits until it is determined that the ignition switch 32 is turned off. In step S84, the start signal output to the master DCDC 12a and the slave DCDC 12b is stopped. In addition, before completion of the process of electrically shutting off the high-pressure system side and the low-pressure system side among the processes related to the end of vehicle control, the output of the start signal is stopped and the abnormality determination process in the standby preparation period is completed. . Further, in this step, a process for starting the time measurement by the timer is performed together with the initialization process of the timer.

  In the subsequent step S86, the value of the master abnormality flag F1 and the value of the slave abnormality flag F2 are set to “1”.

  In subsequent steps S88 to S100, an abnormality determination process of the power supply system is performed in a standby preparation period (for example, several hundred msec) prior to parking.

  Specifically, first, in steps S88 to S92, a period until the elapsed time Tp from the start of timing reaches the second master-side specified time Tmb (the master DCDC 12a operates in step S22 of the previous FIG. 3). During the period), it is determined whether or not the output voltage Vm of the master DCDC 12a is equal to or higher than the second specified value β.

  If it is determined that the output voltage Vm of the master DCDC 12a becomes equal to or higher than the second specified value β in the period until the elapsed time Tp reaches the second specified master side time Tmb, the master abnormality flag F1 in step S90. Is “0”. If an affirmative determination is made in step S92, timer initialization processing is performed and timing is started by the timer.

  In subsequent steps S94 to S98, based on the timing of the timer, a period until the elapsed time Tp from the start of the operation of the slave DCDC 12b reaches the second slave-side specified time Tsb (in step S54 of FIG. It is determined whether or not the output voltage Vs of the slave DCDC 12b is equal to or higher than the first specified value α during the period when the DCDC 12b is operating.

  If it is determined that the output voltage Vs of the slave DCDC 12b is equal to or higher than the first specified value α in the period until the elapsed time Tp reaches the second slave side specified time Tsb, the slave abnormality flag F2 in step S96. Is “0”.

  In the subsequent step S100, it is determined whether or not both the value of the master abnormality flag F1 and the value of the slave abnormality flag F2 are “0”. When an affirmative determination is made in step S100, the process proceeds to step S102, and a vehicle standby process for finally ending the control of the vehicle is performed.

  On the other hand, if a negative determination is made in step S100, the process proceeds to step S78 to perform DC abnormality processing. When it is determined that an abnormality relating to both the master DCDC 12a and the slave DCDC 12b has occurred, the travel prohibition process may be performed without performing the abnormality determination process at the next startup of the vehicle ECU 26.

  When the processes in steps S78 and S102 are completed, this series of processes is temporarily terminated.

  Next, FIG. 6 shows an example of the abnormality determination process according to the present embodiment. Specifically, FIG. 6 (a) shows the transition of the vehicle state, FIG. 6 (b) shows the transition of the output state of the start signal from the vehicle ECU 26, and FIG. 6 (c) shows the master permission flag Fm. FIG. 6D shows the transition of the operation state of the master DCDC 12a, FIG. 6E shows the transition of the value of the slave permission flag Fs, and FIG. 6F shows the transition of the slave DCDC 12b. The transition of the operating state of is shown. FIG. 6 (g) shows the transition of the total output current of the master DCDC 12a and the slave DCDC 12b, FIG. 6 (h) shows the transition of the output voltage of these DCDC parallel connections, and FIG. 6 (i). FIG. 6J shows the transition of the execution state of the abnormality determination process of the master DCDC 12a by the vehicle ECU 26. FIG. 6J shows the transition of the execution state of the abnormality determination process of the slave DCDC 12b by the vehicle ECU 26.

  As shown in the figure, the vehicle ECU 26 is activated by turning on the ignition switch 32 at time t1. Then, at time t2, an activation signal is output from the vehicle ECU 26. Thereby, the abnormality determination process in the traveling preparation period is started. Specifically, first, abnormality determination processing is performed when the slave DCDC 12b is operated at times t2 to t3 that are the first slave-side specified time Tsa. Thereafter, abnormality determination processing is performed when the master DCDC 12a is operated at time t4 to t5, which is the first master-side specified time Tma.

  Thereafter, the vehicle travel control is permitted, and the vehicle travel control is performed at times t5 to t6. During this period, the value of the master permission flag Fm is “1”, and the value of the slave permission flag Fs is “1” only when it is determined that the requested current on the vehicle side exceeds the master limit value Ia. Is done.

  Thereafter, the ignition switch 32 is turned off at time t6, and the output of the start signal from the vehicle ECU 26 is stopped at time t7. Thereby, the abnormality determination process in the standby preparation period is started. Specifically, first, abnormality determination processing is performed when the master DCDC 12a is operated at time t7 to t8, which is the second master-side specified time Tmb. Thereafter, abnormality determination processing is performed when the slave DCDC 12b is operated at time t9 to t10, which is the second slave-side specified time Tsb. Thereafter, the start of the vehicle ECU 26 is stopped at time t11.

  As described above, in the present embodiment, it is possible to appropriately determine whether there is an abnormality in the master DCDC 12a and the slave DCDC 12b by performing the abnormality determination process of the above aspect in the travel preparation period and the standby preparation period.

  According to the embodiment described in detail above, the following effects can be obtained.

  (1) In the travel preparation period and the standby preparation period, each of the master DCDC 12a and the slave DCDC 12b is operated independently. If the output voltage Vm of the master DCDC 12a is not determined to be equal to or higher than the second specified value β during the period, it is determined that an abnormality related to the master DCDC 12a has occurred, and the output voltage Vs of the slave DCDC 12b is set to the first specified value. When it was not determined that the value was greater than α, it was determined that an abnormality related to the slave DCDC 12b occurred. As a result, it is possible to identify an abnormal part of the power supply system, such as which of the master DCDC 12a and the slave DCDC 12b is abnormal. That is, it is possible to appropriately determine whether there is an abnormality in the power supply system.

  Further, during the execution of the process related to vehicle control preparation and the process related to the end of vehicle control, the abnormality determination process is performed in the travel preparation period or the standby preparation period in view of the small vehicle-side required current. Therefore, the abnormality determination process can be performed by appropriately selecting a period in which the master DCDC 12a and the slave DCDC 12b can operate independently.

  (2) When the output current of the master DCDC 12a (slave DCDC 12b) exceeds the master limit value Ia (slave limit value Ib), the output current is fixed at the master limit value Ia (slave limit value Ib). Further, the target voltage Va of the master DCDC 12a is set higher than the target voltage Vb of the slave DCDC 12b. According to such a configuration, for example, when the situation where the requested current on the vehicle side is small continues, the operation frequency of the slave DCDC 12b tends to be low. For this reason, this embodiment in which the operation frequency of the slave DCDC 12b tends to be low has a great merit of performing the abnormality determination process.

  (3) When it is determined that an abnormality has occurred in the power supply system, a DC abnormality process was performed. As a result, the user can appropriately take the subsequent action.

  (4) When the output current of the slave DCDC 12b exceeds the slave limit value Ib, the master limit value Ia is increased. Thereby, the reliability of a power supply system can be improved, increasing the maximum value of the electric current which can be supplied to the vehicle-mounted load 28 grade | etc.,.

(Second Embodiment)
Hereinafter, the second embodiment will be described with reference to the drawings with a focus on differences from the first embodiment.

  FIG. 7 shows the overall configuration of the power supply system according to the present embodiment.

  As shown in the figure, the vehicle ECU 26 outputs a separate activation signal to each of the master DCDC 12a and the slave DCDC 12b. In the present embodiment, the activation signal for the master DCDC 12a is hereinafter referred to as a master activation signal, and the activation signal for the slave DCDC 12b is referred to as a slave activation signal.

  Incidentally, in the present embodiment, the control process of the master DCDC 12a during the travel preparation period and the vehicle standby period is performed by operating the master DCDC 12a using the input of the master activation signal output from the vehicle ECU 26 or the stop of the input as a reference timing. This is a process of stopping the operation of the DCDC 12a. In addition, the control process of the slave DCDC 12b during the travel preparation period and the vehicle standby period operates the slave DCDC 12b or stops the operation of the slave DCDC 12b with reference to the input of the slave activation signal output from the vehicle ECU 26 or the stop of the input. Process.

  Next, the abnormality determination process according to the present embodiment will be described. In the present embodiment, in addition to the travel preparation period and the standby preparation period, the abnormality determination process is also performed during the travel control of the vehicle.

  FIG. 8 and FIG. 9 show the procedure of processing executed by the vehicle ECU 26 in the abnormality determination processing according to the present embodiment. This process is executed with the vehicle ECU 26 as a trigger when the ignition switch 32 is turned on. In FIG. 8 and FIG. 9, the same processing as the processing shown in FIG. 5 is given the same step number for convenience.

  First, the abnormality determination process in the travel preparation period and the standby preparation period will be described with reference to FIG.

  In this series of processing, a slave activation signal is output in step S62a. In addition, the process which starts time measurement with a timer is also performed.

  Thereafter, in steps S64 to S68, after performing abnormality determination processing when the slave DCDC 12b is operated during the travel preparation period, a master activation signal is output in step S104. In step S106, output of the slave activation signal is stopped. Then, abnormality determination processing is performed when the master DCDC 12a is operated in steps S70 to S74.

  Thereafter, if an affirmative determination is made in step S76, a slave activation signal is output in step S108, and the process proceeds to step S80.

  If an affirmative determination is made in the subsequent step S82, the process proceeds to step S84a to stop outputting the slave activation signal. Then, the process proceeds to step S86.

  In subsequent steps S88 to S92, abnormality determination processing is performed when the master DCDC 12a is operated during the standby preparation period.

  In subsequent step S110, a slave activation signal is output, and then in step S112, output of the master activation signal is stopped.

  In the subsequent steps S94 to S98, after performing the abnormality determination process when the slave DCDC 12b is operated, the output of the slave activation signal is stopped in step S114. Then, the process proceeds to step S100.

  Next, the abnormality determination process during vehicle travel control will be described with reference to FIG.

  If it is determined that the vehicle is under running control, the process proceeds to step S116 and waits until it is determined that the requested current I on the vehicle side is equal to or less than the master limit value Ia. This process is a process for determining whether either the master DCDC 12a or the slave DCDC 12b can supply the vehicle-side requested current to the in-vehicle load 28 or the like.

  In the subsequent step S118, the value of the master abnormality flag F1 and the value of the slave abnormality flag F2 are set to “1”. In step S120, the output of the master activation signal is stopped. In addition, the process which starts time measurement with a timer is also performed.

  In subsequent steps S122 to S128, abnormality determination processing is performed when the slave DCDC 12b is operated. Specifically, it is determined whether or not the output voltage Vs of the slave DCDC 12b is equal to or higher than the first specified value α during the period from the start of timing until the elapsed time Tp reaches the third specified slave time Tsc. To do.

  If it is determined that the output voltage Vs of the slave DCDC 12b is equal to or higher than the first specified value α in the period until the elapsed time Tp reaches the third slave-side specified time Tsc, the slave abnormality flag F2 is determined in step S124. Is “0”.

  Here, in the present embodiment, when it is determined that the vehicle-side required current I exceeds the master limit value Ia during the period until the elapsed time Tp reaches the third slave-side specified time Tsc (step S1). (S126: NO), a master activation signal is output in step S130. As a result, the master DCDC 12a is quickly operated together with the slave DCDC 12b, and the normal control process of the master DCDC 12a and the slave DCDC 12b during the traveling control of the vehicle is returned.

  When the abnormality determination process is performed in steps S122 to S128, a process of outputting an operation stop command for the master DCDC 12a from the vehicle ECU 26 to the master DCDC 12a and outputting an operation command for the slave DCDC 12b from the vehicle ECU 26 to the slave DCDC 12b is performed. Just do it. Here, the operation stop command and the operation command may be output from the timing at which an affirmative determination is made in step S116, or these commands may be output at a timing shifted from the timing at which an affirmative determination is made at step S116. If an affirmative determination is made in step S128, timer initialization processing is performed and timing is started by the timer.

  In the following step S132, the master activation signal is output, and then in step S134, the output of the slave activation signal is stopped.

  In subsequent steps S136 to S142, abnormality determination processing is performed when the master DCDC 12a is operated. Specifically, in steps S136 to S142, the output voltage Vm of the master DCDC 12a is greater than or equal to the second specified value β during a period until the elapsed time Tp from the start of timing reaches the third master side specified time Tmc. Judge whether or not.

  If it is determined that the output voltage Vm of the master DCDC 12a is equal to or higher than the second specified value β in the period until the elapsed time Tp reaches the third master-side specified time Tmc, the master abnormality flag F1 is determined in step S138. Is “0”.

  Here, in the present embodiment, when it is determined that the vehicle-side required current I exceeds the master limit value Ia during the period until the elapsed time Tp reaches the third master-side specified time Tmc (step S1). (S140: NO), a slave activation signal is output in step S144. As a result, the slave DCDC 12b is promptly operated together with the master DCDC 12a, and the normal control processing of the master DCDC 12a and the slave DCDC 12b during the traveling control of the vehicle is returned.

  When the abnormality determination process is performed in steps S136 to S142, a process of outputting an operation command of the master DCDC 12a from the vehicle ECU 26 to the master DCDC 12a and outputting an operation stop command of the slave DCDC 12b from the vehicle ECU 26 to the slave DCDC 12b is performed. Just do it.

  If an affirmative determination is made in step S142, the process proceeds to step S146, and it is determined whether or not both the value of the master abnormality flag F1 and the value of the slave abnormality flag F2 are “0”.

  If an affirmative determination is made in step S146, it is determined that no abnormality has occurred in the power supply system, and the control returns to the normal control processing of the master DCDC 12a and the slave DCDC 12b during vehicle travel control.

  On the other hand, if a negative determination is made in step S146, a DC abnormality process is performed. If it is determined that abnormality has occurred in both the master DCDC 12a and the slave DCDC 12b during travel control of the vehicle, the travel prohibition process may not be performed.

  When the processes in steps S78 and S102 are completed, this series of processes is temporarily terminated.

  Next, FIG. 10 shows an example of the abnormality determination process according to the present embodiment. Specifically, FIG. 10B shows the transition of the output state of the master activation signal from the vehicle ECU 26, and FIG. 10D shows the transition of the output state of the slave activation signal from the vehicle ECU 26. FIGS. 10 (a), 10 (c) and 10 (e) to 10 (i) are the same as FIGS. 6 (a), 6 (d), 6 (f) to 6 (f). j).

  As shown in the drawing, when the ignition switch 32 is turned on at time t1, a slave activation signal is output from the vehicle ECU 26 at time t2, thereby starting abnormality determination processing in the travel preparation period. Thereafter, a master activation signal is output at time t3.

  Thereafter, the vehicle is permitted to travel, and abnormality determination processing during vehicle travel control is started at time t4 in a period in which it is determined that the requested current I on the vehicle side is equal to or less than the master limit value Ia. Specifically, abnormality determination processing is performed when the slave DCDC 12b is operated at times t4 to t5, which is the third slave-side specified time Tsc.

  Although the abnormality determination process is started when the master DCDC 12a is operated at time t6, the request on the vehicle side is requested before the third master-side specified time Tmc elapses after this process is started at time t7. Since it is determined that the current I exceeds the master limit value Ia, the abnormality determination process is stopped.

  In addition, after the ignition switch 32 is turned off at time t8, abnormality determination processing in the standby preparation period is performed.

  As described above, in the present embodiment, the abnormality determination process of the power supply system can be performed during the traveling control of the vehicle, so that the frequency of the abnormality determination of the power supply system can be preferably improved.

(Third embodiment)
Hereinafter, the third embodiment will be described with reference to the drawings with a focus on differences from the first embodiment.

  FIG. 11 shows the overall configuration of the power supply system according to the present embodiment.

  As illustrated, the vehicle ECU 26 outputs separate operation permission signals (master operation permission signal NODM, slave operation permission signal NODS) for each of the master DCDC 12a and the slave DCDC 12b, in addition to the start signal. Specifically, these operation permission signals indicate that the operation of the DCDC converter is prohibited by a logic “L”, and indicate that the operation of the DCDC converter is permitted by a logic “H”.

  The control circuit of the slave DCDC 12b directly outputs an overcurrent limiting signal to the control circuit 30 of the master DCDC 12a via the signal line 38.

  The control circuit 30 of the master DCDC 12a outputs a determination signal to the vehicle ECU 26 when it is determined that a transmission abnormality of the overcurrent limiting signal from the slave DCDC 12b to the master DCDC 12a has occurred due to a transmission abnormality determination process described later. Specifically, the determination signal indicates that an overcurrent limit signal transmission abnormality has occurred due to a logic “H” and that the above transmission abnormality has not occurred due to a logic “L”.

  Next, the abnormality determination process of the power supply system according to the present embodiment will be described. In the present embodiment, as the abnormality determination process, the transmission abnormality determination process is performed instead of the abnormality determination process described in the first embodiment. Here, as an abnormal transmission of the overcurrent limit signal, the signal line 38 is disconnected, the signal line 38 and the low-voltage battery 24 are short-circuited on the negative side (GND short), the signal line from at least one of the master DCDC 12a and the slave DCDC 12b. L side sticking abnormality such as 38 coming off. When the L side fixing abnormality occurs, the logic of the overcurrent limiting signal recognized by the master DCDC 12a is always “L”. For this reason, even if the slave DCDC 12b performs the output process of the logic “H” overcurrent limit signal, the master limit value Ia cannot be increased. Under such circumstances, when the requested current on the vehicle side exceeds the added value of the master limit value Ia and the slave limit value Ib, the supply current to the in-vehicle load 28 and the like is insufficient.

  In addition, the abnormal transmission of the overcurrent limiting signal includes an H-side fixing abnormality such as a short circuit (B short) on the positive electrode side of the signal line 38 and the low-voltage battery 24. When the H-side fixing abnormality occurs, the logic of the overcurrent limit signal recognized by the master DCDC 12a is always “H”, so that the master limit value is always increased (Ia = 35A → Ic = 80A). In this case, since the current is preferentially output from the master DCDC 12a until the requested current on the vehicle side exceeds the increased master limit value Ic, the operation frequency of the master DCDC 12a is higher than that of the slave DCDC 12b. Therefore, the reliability of the master DCDC 12a may be greatly reduced.

  In addition, as the transmission abnormality, an abnormality in the control circuit of the slave DCDC 12b related to the output function of the overcurrent limiting signal can be considered.

  FIG. 12 shows a procedure of processing executed on the slave DCDC 12b side in the transmission abnormality determination processing according to the present embodiment. This process is executed in the slave DCDC 12b triggered by the input of an activation signal after the ignition switch 32 is turned on. In the present embodiment, the transmission abnormality determination process is performed during the travel preparation period.

  In this series of processing, first, in step S150, initialization processing of data used for processing on the slave DCDC 12b side is performed.

  In subsequent step S152, the logic of the overcurrent limiting signal output from the slave DCDC 12b to the master DCDC 12a is forcibly set to “L”.

  In the subsequent step S154, the process waits until it is determined that the logic of the slave operation permission signal NODS input from the vehicle ECU 26 is inverted from “L” to “H”. This process is a process for determining whether or not it is the end timing of the period in which the logic of the overcurrent limit signal output from the slave DCDC 12b is forcibly set to “L”.

  In a succeeding step S156, a process of initializing the counter value CNTS of the timer in the control circuit and starting the time measurement by the timer to forcibly invert the logic of the overcurrent limit signal from “L” to “H”. I do.

  In the subsequent step S158, it is determined whether or not the counter value CNTS (elapsed time) from the start of time measurement in the processing of step S156 becomes the threshold time TH. This process is a process for determining whether or not it is the end timing of the period in which the logic of the overcurrent limit signal is forcibly set to “H”.

  If the determination in step S158 is negative, it is determined that the transmission abnormality determination process has not ended yet, and the process proceeds to step S160. In step S160, normal control processing of the slave DCDC 12b (the above-described voltage feedback control and current feedback control as constant current control) is performed.

  On the other hand, if an affirmative determination is made in step S158, it is determined that the transmission abnormality determination process has ended, and the process proceeds to step S162. In step S162, a process of inverting the logic of the overcurrent limiting signal from “H” to “L” is performed. This process is a process for preparing for a normal control process of the slave DCDC 12b under a situation where the vehicle travel control is performed thereafter. When the process of step S162 is completed, the process proceeds to step S160.

  After the process of step S160, in subsequent step S164, it is determined whether or not the ignition switch 32 is turned off. If a negative determination is made in this step, the process returns to step S158.

  If an affirmative determination is made in step S164, the series of processes is terminated on condition that input of the activation signal is stopped thereafter.

  Subsequently, FIG. 13 shows a procedure of processing executed on the master DCDC 12a side in the transmission abnormality determination processing according to the present embodiment. This process is executed by the master DCDC 12a triggered by the input of an activation signal after the ignition switch 32 is turned on.

  In this series of processing, first, in step S164, initialization processing of data used for processing on the master DCDC 12a side is performed. Further, the value of the L-side abnormality determination flag FL and the value of the H-side abnormality determination flag FH are set to “1”. Here, the L-side abnormality determination flag FL indicates that an L-side sticking abnormality has occurred by “1”, and that an L-side sticking abnormality has not occurred by “0”. The H-side abnormality determination flag FH indicates that an H-side sticking abnormality has occurred by “1”, and that an H-side sticking abnormality has not occurred by “0”.

  In the subsequent step S166, the logic of the determination signal output to the vehicle ECU 26 is set to “H”.

  In subsequent steps S168 to S172, a period from the completion of the processing in step S166 until it is determined that the logic of the master operation permission signal NODM is inverted to “H” (the overcurrent limiting signal output from the slave DCDC 12b). In the period during which the logic is maintained at “L”), it is determined whether or not the logic of the overcurrent limit signal becomes “L”. If it is determined that the logic of the overcurrent limit signal becomes “L” during this period, it is determined that no H-side fixing abnormality has occurred, and the value of the H-side abnormality determination flag FH is set to “0”.

  In the subsequent step S174, initialization processing of the counter value CNTM of the timer in the control circuit 30 is performed and time measurement by the timer is started.

  In a succeeding step S176, it is determined whether or not the counter value CNTM (elapsed time) from the start of the time measurement in the process of step S174 becomes the threshold time TH. This process is a process for determining whether or not it is the end timing of the period in which the logic of the overcurrent limit signal is forcibly set to “H”, similarly to the process in step S158 of FIG.

  If it is determined in step S176 that the elapsed time CNTS has not reached the threshold time TH, the process proceeds to step S178, and whether or not the logic of the overcurrent limit signal is inverted from “L” to “H”. to decide.

  Before the elapsed time CNTS reaches the threshold time TH (steps S176, S178: NO, step S180, step S182: NO), when it is determined that the logic of the overcurrent limiting signal is inverted to “H” (step In S178: YES), it is determined that no L-side sticking abnormality has occurred, and the process proceeds to step S184. In step S184, the value of the L-side abnormality determination flag FL is set to “0”. As a result, it is determined that an overcurrent limit signal transmission abnormality has not occurred, and the logic of the determination signal is inverted from “H” to “L” in step S186.

  On the other hand, when the elapsed time CNTS has passed the threshold time TH (step S176: YES), the process proceeds to step S188, where both the value of the L-side abnormality determination flag FL and the value of the H-side abnormality determination flag FH are “0”. Is determined. This process is a process for determining whether or not an overcurrent limit signal transmission abnormality has occurred.

  If a negative determination is made in step S188, the process proceeds to step S190, and the DC abnormality process is performed. In the present embodiment, as this processing, processing for setting the logic of the determination signal to “H” is performed. When the vehicle ECU 26 determines that the logic of the determination signal is “H”, the vehicle ECU 26 executes the above-described notification process and travel prohibition process.

  When an affirmative determination is made in step S182 or when the process of step S190 is completed, the series of processes is terminated on condition that the input of the activation signal is stopped thereafter.

  Next, an example of a transmission abnormality determination process according to the present embodiment will be described with reference to FIGS.

  First, FIG. 14 illustrates an example of a transmission abnormality determination process in the case where there is no transmission abnormality of the overcurrent limit signal. Specifically, FIGS. 14C and 14E show the transition of the output state of the master operation permission signal NODM and the slave operation permission signal NODS output from the vehicle ECU 26, and FIG. 14G shows the slave DCDC 12b. FIG. 14 (h) shows the transition of the requested current on the vehicle side, and FIG. 14 (j) shows the presence / absence of execution of the transmission abnormality determination process. FIG. 14 (k) shows the transition of the output state of the determination signal from the master DCDC 12a. 14 (a), 14 (b), 14 (d), 14 (f), and 14 (i) are the same as FIGS. 6 (a), 6 (b), and 6 (i). d) corresponds to FIG. 6 (f) and FIG. 6 (h). In FIG. 14 (i), “Vlb” indicates the voltage of the low-voltage battery 24.

  In the illustrated example, after the ignition switch 32 is turned on at time t1, the transmission abnormality determination process is started by inputting an activation signal at time t2.

  Then, during the period from time t2 to time t3 when the logic of the slave operation permission signal NODS is set to “H”, the output processing of the logic “L” overcurrent limiting signal is performed from the slave DCDC 12b. During the period from time t2 to t3, the master DCDC 12a recognizes that the logic of the overcurrent limit signal is “L”, so that it is determined that no H-side fixing abnormality has occurred, and the value of the H-side abnormality determination flag FH is It is set to “0”.

  Thereafter, in a period from time t3 to time t4 when the threshold time TH elapses, output processing of the logic “H” overcurrent limiting signal is performed from the slave DCDC 12b. During the period from time t3 to t4, the master DCDC 12a recognizes that the logic of the overcurrent limit signal is “H”, so that it is determined that no L-side fixing abnormality has occurred, and the value of the L-side abnormality determination flag FL is It is set to “0”. As a result, a determination signal of logic “L” is output from the master DCDC 12 a to the vehicle ECU 26.

  Thereafter, normal control processing of the master DCDC 12a and the slave DCDC 12b is performed in a period up to time t5 when the ignition switch 32 is turned off. Thereafter, at time t6, the input of the activation signal is stopped, and the series of processes in the master DCDC 12a and the slave DCDC 12b is ended.

  Here, in the present embodiment, the transmission abnormality determination process is executed in the travel preparation period in order to avoid a shortage of current supply from the master DCDC 12a and the slave DCDC 12b to the in-vehicle load 28 and the like.

  That is, for example, under the situation where the master limit value is increased from Ia to Ic during the vehicle travel control, the sum (115A) of the master limit value Ia and the slave limit value Ib before the vehicle-side required current increases is calculated. It shall be exceeded. Under such circumstances, when the logic of the overcurrent limit signal is set to “L” by the transmission abnormality determination process described above, the requested current on the vehicle side exceeds the maximum value of the current that can be supplied by the master DCDC 12a and the slave DCDC 12b. As a result, the supply of current to the in-vehicle load 28 and the like is insufficient. Here, in the present embodiment, in the travel preparation period, the vehicle ECU 26 performs a supply restriction process in which the requested current on the vehicle side is less than the sum of the master limit value Ia and the slave limit value Ib. For this reason, the request | requirement electric current by the side of a vehicle in a driving preparation period will be less than the addition value of the master limiting value Ia and the slave limiting value Ib. This avoids a situation where the supply of current to the in-vehicle load 28 and the like is insufficient due to the execution of the transmission abnormality determination process.

  Next, FIG. 15 illustrates an example of a transmission abnormality determination process in the case where an L-side fixing abnormality (GND short or disconnection of the signal line 38) occurs as an overcurrent limiting signal transmission abnormality. Specifically, FIGS. 15A to 15K correspond to the previous FIGS. 14A to 14K. In addition, the waveform shown with a broken line in FIG.15 (g) is transition of the output state of the overcurrent limitation signal in the normal time when the L side sticking abnormality does not occur.

  In the illustrated example, in the period from the time t1 when the transmission abnormality determination process is started by the input of the activation signal to the time t2 when the logic of the slave operation permission signal NODS is “H”, the logic from the slave DCDC 12b is “L”. The overcurrent limiting signal is output. Since the logic of the overcurrent limiting signal is recognized as “L” by the master DCDC 12a during the period from time t1 to time t2, the value of the H-side abnormality determination flag FH is set to “0”.

  Thereafter, in the period from time t2 to time t3 when the threshold time TH elapses, the output process of the logic “H” overcurrent limiting signal is performed from the slave DCDC 12b. During the period from time t2 to t3, the master DCDC 12a recognizes that the logic of the overcurrent limit signal is “L”, so it is determined that an L-side fixing abnormality has occurred, and the value of the L-side abnormality determination flag FL is “1”. As a result, it is determined that an overcurrent limiting signal transmission abnormality has occurred, and the output of the logic “H” determination signal from the master DCDC 12a to the vehicle ECU 26 is continued.

  An example in which the vehicle travel control is started in a state where the L-side sticking abnormality occurs will be described. When the L-side fixation abnormality occurs, the master limit value Ia cannot be increased when the total output current of the master DCDC 12a and the slave DCDC 12b exceeds the added value of the master limit value Ia and the slave limit value Ib after time t3. Therefore, the total output current of the master DCDC 12a and the slave DCDC 12b can be used as the required current until the vehicle-side required current exceeds the added value of the master limit value Ia and the slave limit value Ib. In the period exceeding the time (time t4 to t5, t6 to t7), the current supply to the in-vehicle load 28 is insufficient.

  Incidentally, in this embodiment, when the logic of the determination signal is “H” due to an abnormal transmission of the overcurrent limit signal, the travel prohibition process is executed as the DC abnormality process as described above. The vehicle travel control is not performed after time t3.

  Next, FIG. 16 illustrates an example of a transmission abnormality determination process performed when an H-side fixing abnormality (B short of the signal line 38) occurs as an overcurrent limiting signal transmission abnormality. Specifically, FIGS. 16A to 16K correspond to the previous FIGS. 15A to 15K.

  In the illustrated example, an output process of a logic “L” overcurrent limiting signal is performed from the slave DCDC 12b during the period from time t1 to time t2. During this period, the master DCDC 12a recognizes that the logic of the overcurrent limit signal is “H”, so that it is determined that an H-side fixing abnormality has occurred, and the value of the H-side abnormality determination flag FH is “1”. Is done.

  Thereafter, in the period from time t2 to time t3 when the threshold time TH elapses, the output process of the logic “H” overcurrent limiting signal is performed from the slave DCDC 12b. In the period from time t2 to time t3, the master DCDC 12a recognizes the logic of the overcurrent limit signal as “H”, so the value of the L-side abnormality determination flag FL is set to “0”. Since the value of the H-side abnormality determination flag FH is set to “1”, it is determined that an overcurrent limit signal transmission abnormality has occurred, and an output of a determination signal of logic “H” is output from the master DCDC 12a to the vehicle ECU 26. Will continue.

  An example in which the vehicle travel control is started in a state where the H-side sticking abnormality occurs will be described. When the H-side sticking abnormality occurs, the master limit value is always increased after time t3 (Ia = 35A → Ic = 80A). Therefore, until the vehicle-side required current exceeds the increased master limit value Ic, current is preferentially output from the master DCDC 12a, and the operation frequency of the master DCDC 12a is compared with the operation frequency of the slave DCDC 12b. Get higher. As a result, the reliability of the master DCDC 12a may be greatly reduced.

  Incidentally, in this embodiment, when the logic of the determination signal is “H” due to an abnormal transmission of the overcurrent limit signal, the travel prohibition process is executed as the DC abnormality process as described above. The vehicle travel control is not performed after time t3.

  As described above, in the present embodiment, when the overcurrent limit signal transmission abnormality determination process is performed, when an overcurrent limit signal transmission abnormality occurs, the abnormality is appropriately detected and the DC abnormality time process is performed. be able to. For this reason, it can be avoided as much as possible that this system is continuously used in a state where the reliability of the power supply system is lowered.

  Furthermore, since the transmission abnormality determination process is performed during the travel preparation period, it is possible to avoid a shortage of current supply from the power supply system to the in-vehicle load 28 and the like due to the execution of the transmission abnormality determination process.

(Fourth embodiment)
Hereinafter, the fourth embodiment will be described with reference to the drawings with a focus on differences from the third embodiment.

  FIG. 17 shows the overall configuration of the power supply system according to the present embodiment.

  As illustrated, in the present embodiment, the vehicle ECU 26 outputs the master operation permission signal NODM and the slave operation permission signal NODS as activation signals for the master DCDC 12a and the slave DCDC 12b, respectively.

  Next, the abnormality determination process of the power supply system according to the present embodiment will be described.

  In this embodiment, in addition to the transmission abnormality determination process, the abnormality determination process described in the second embodiment is also performed. In this abnormality determination process, an abnormality in which the value of the master abnormality flag F1 described in FIG. 8 of the third embodiment is set to “1” (an abnormality in which current cannot be output from the master DCDC 12a), An abnormality in which the value of the slave abnormality flag F2 described with reference to FIG. 8 is set to “1” (an abnormality in which current cannot be output from the slave DCDC 12b) described with reference to FIG. 8 is referred to as a slave output abnormality.

  Further, in the present embodiment, as shown in the second embodiment, the abnormality determination process of the power supply system is performed during the standby preparation period and the vehicle traveling control in addition to the traveling preparation period. Here, the control process of the master DCDC 12a in the travel preparation period and the vehicle standby period is a process similar to the process shown in the second embodiment. Specifically, the master DCDC 12a is operated or the operation of the master DCDC 12a is stopped using the input of the master operation permission signal NODM output from the vehicle ECU 26 or the stop of the input as a reference timing. The control process of the slave DCDC 12b during the travel preparation period and the vehicle standby period is similar to the process related to the master DCDC 12a, with the slave operation permission signal NODS output from the vehicle ECU 26 being input or stopped as a reference timing. Or to stop the operation of the slave DCDC 12b. Hereinafter, the abnormality determination process will be described with reference to FIGS.

  First, FIG. 18 illustrates an example of an abnormality determination process of the power supply system when none of the master output abnormality, slave output abnormality, and overcurrent limit signal transmission abnormality occurs. Specifically, FIG. 18A to FIG. 18I correspond to FIG. 14A, FIG. 14C to FIG. 14I, and FIG. In the figure, the period indicated by “S” is a period during which the process for determining the presence or absence of slave output abnormality is executed as shown in FIGS. 8 and 9, and the period indicated by “M” As shown in FIG. 8 and FIG. 9, this is a period during which the process for determining whether there is an abnormality in the master output is executed. In the figure, a period indicated by “C” is a period during which the transmission abnormality determination process is executed.

  In the illustrated example, after the ignition switch 32 is turned on, the abnormality determination process of the power supply system is started at time t1 when the logic of the slave operation permission signal NODS is set to “H”. Specifically, during the period from time t1 to time t2 when the first slave side specified time Tsa elapses and the operation of the slave DCDC 12b is stopped, as shown in steps S64 to S68 of FIG. Processing for determining slave output abnormality during the period is performed, and it is determined that no slave output abnormality has occurred.

  Then, during the period from the time t3 to the time t4 when the first master-side specified time Tma elapses after the operation of the slave DCDC 12b is stopped, as shown in steps S70 to S74 of FIG. The master output abnormality determination process is performed to determine that no master output abnormality has occurred. Note that the determination processing for the master output abnormality and the slave output abnormality is performed by the vehicle ECU 26 as described in the second embodiment.

  On the other hand, during the period from time t1 to time t4, a transmission abnormality determination process is performed together with a master output abnormality or slave output abnormality determination process, and it is determined that an overcurrent limit signal transmission abnormality has not occurred.

  Then, after that, vehicle travel control is started, and abnormality determination processing of the power supply system is performed under a situation where it is determined that the requested current on the vehicle side is equal to or less than the master limit value Ia. Specifically, in the period from the time t5 when the logic of the master operation permission signal NODM is set to “L” to the time t6 when the third slave side specified time Tsc elapses, it is shown in steps S122 to S128 of FIG. As described above, the slave output abnormality determination process is performed, and it is determined that no slave output abnormality has occurred.

  Then, from the time t7 after the operation of the slave DCDC 12b is stopped and the logic of the master operation permission signal NODM is set to “H”, as shown in steps S136 to S142 of FIG. Processing is performed and it is determined that no master output abnormality has occurred. In this embodiment, since the vehicle-side required current exceeds the master limit value Ia at time t8 before the third master-side specified time Tmc elapses from time t7, the slave DCDC 12b operates at this time. The normal control processing of the master DCDC 12a and the slave DCDC 12b is performed.

  On the other hand, in this embodiment, from time t5, a transmission abnormality determination process is performed together with a master output abnormality or slave output abnormality determination process. Then, it is determined that no abnormal transmission of the overcurrent limit signal has occurred. Note that, when the vehicle-side requested current exceeds the master limit value Ia during vehicle travel control, the transmission abnormality determination process is stopped in the same manner as the master output abnormality determination process. As described in the third embodiment, this is because the overcurrent limit signal is generated by the transmission abnormality determination process in a state where the total output current of the master DCDC 12a and the slave DCDC 12b exceeds the added value of the master limit value Ia and the slave limit value Ib. This is to prevent the current supply to the in-vehicle load 28 and the like from being insufficient due to the logic of the output signal of “L” being “L”.

  Thereafter, in the vehicle standby period after the ignition switch 32 is turned off at time t9, the abnormality determination process of the power supply system is performed together with the supply restriction process described in the third embodiment. Specifically, a master output abnormality determination process is performed during a period from time t10 when the logic of the slave operation permission signal NODS is set to “L” to time t11 when the second master-side specified time Tmb elapses. It is determined that no abnormality has occurred.

  In the period from time t12 when the logic of the master operation permission signal NODM is set to “L” and the operation of the slave DCDC 12b is started to time t13 when the second slave side specified time Tsb elapses, the slave output abnormality is detected. Determination processing is performed, and it is determined that no slave output abnormality has occurred.

  On the other hand, in the present embodiment, during the period from time t10 to t13, a transmission abnormality determination process is performed together with a master output abnormality or slave output abnormality determination process, and it is determined that an overcurrent limit signal transmission abnormality has not occurred. .

  Note that the transmission abnormality determination process is performed during the standby preparation period in order to avoid the occurrence of insufficient current supply to the in-vehicle load 28, as in the case of performing the transmission abnormality determination process during the vehicle preparation period of the third embodiment. It is.

  Next, FIG. 19 illustrates an example of an abnormality determination process of the power supply system when a master output abnormality occurs. Specifically, FIGS. 19A to 19I correspond to FIGS. 18A to 18I described above. In addition, the waveform shown with a broken line in FIG.19 (h) is transition of the output voltage when the master output abnormality has not arisen.

  In the illustrated example, the abnormality determination process of the power supply system in the travel preparation period is performed from time t1 to time t4. Specifically, a slave output abnormality determination process is performed during a period from time t1 to time t2, and it is determined that no slave output abnormality has occurred.

  Thereafter, a master output abnormality determination process is performed during the period from time t3 to t4. Here, since it is determined that the output voltage of the master DCDC 12a is significantly lower than the second specified value β, it is determined that a master output abnormality has occurred.

  After that, it is determined that the master output abnormality has occurred during the period from time t5 to t6 during vehicle travel control and during the period from time t7 to t8 in the standby preparation period.

  When a master output abnormality occurs, the output current of slave DCDC 12b can be used as the required current until the vehicle-side required current exceeds slave limit value Ib.

  Next, FIG. 20 illustrates an example of an abnormality determination process of the power supply system when a slave output abnormality occurs. Specifically, FIGS. 20A to 20I correspond to FIGS. 19A to 19I.

  In the illustrated example, the abnormality determination process of the power supply system in the travel preparation period is performed from time t1 to time t4. Specifically, a slave output abnormality determination process is performed during the period from time t1 to time t2. In the present embodiment, since it is determined that the output voltage of the slave DCDC 12b is significantly below the first specified value α, it is determined that a slave output abnormality has occurred.

  Thereafter, in the period from time t3 to t4, a master output abnormality determination process is performed, and it is determined that no master output abnormality has occurred. After that, it is determined that a slave output abnormality has occurred during the period from time t5 to t6 during vehicle travel control and during the period from time t7 to t8 in the standby preparation period.

  Incidentally, when a slave output abnormality occurs, the output current of the master DCDC 12a can be used as the required current until the vehicle-side required current exceeds the master limit value Ia.

  Next, FIG. 21 illustrates an example of an abnormality determination process of the power supply system in the case where an L side fixing abnormality (GND short or disconnection of the signal line 38) occurs. Specifically, FIGS. 21A to 21I correspond to FIGS. 18A to 18I. In addition, the waveform shown with a broken line in FIG.21 (f) is transition of the output state of the overcurrent limitation signal when the L side fixation abnormality has not arisen, and the waveform shown with a broken line in FIG.21 (h) is It is a transition of the output voltage when the L side fixing abnormality does not occur.

  In the illustrated example, the transmission abnormality determination process is performed during the period from time t1 to time t3. In the present embodiment, the logic DC of the overcurrent limit signal is recognized as “L” in the master DCDC 12a although the output process of the logic “H” overcurrent limit signal is performed from the slave DCDC 12b in the period of time t2 to t3. For this reason, it is determined that an L-side sticking abnormality has occurred.

  Thereafter, it is determined that the L-side sticking abnormality has occurred in the transmission abnormality determination process also during the period from time t4 to t5 during vehicle travel control and during the period from time t6 to t7 in the standby preparation period.

  Incidentally, as described in the third embodiment, the vehicle is actually prohibited from traveling by the DC abnormality process after time t3.

  Next, FIG. 22 illustrates an example of an abnormality determination process of the power supply system when an H-side fixing abnormality (B short of the signal line 38) occurs. Specifically, FIGS. 22A to 22I correspond to FIGS. 21A to 21I described above.

  In the example shown in the figure, transmission abnormality determination processing in the travel preparation period is performed from time t1 to time t3. In this embodiment, although the output process of the logic “L” overcurrent limit signal is performed from the slave DCDC 12b during the period of time t1 to t2, the logic of the overcurrent limit signal is recognized as “H” in the master DCDC 12a. For this reason, it is determined that an H-side fixing abnormality has occurred.

  Thereafter, it is determined that the H-side sticking abnormality has occurred in the transmission abnormality determination process also during the period from time t4 to t5 during vehicle travel control and during the period from time t6 to t7 in the standby preparation period.

  Incidentally, as described in the third embodiment, the vehicle is actually prohibited from traveling by the DC abnormality process after time t3.

  Thus, in this embodiment, the abnormality determination process of the power supply system including the transmission abnormality determination process is performed during the vehicle traveling control and the standby preparation period in addition to the traveling preparation period. Thereby, the presence or absence of abnormality of the power supply system including abnormality of transmission of the overcurrent limit signal can be appropriately determined.

(Other embodiments)
Each of the above embodiments may be modified as follows.

  In each of the above embodiments, the vehicle ECU 26 determines whether an abnormality (master output abnormality, slave output abnormality) has occurred in the power supply system, but this is not a limitation. For example, the control circuit 30 of the master DCDC 12a may determine whether an abnormality related to the master DCDC 12a has occurred, and the control circuit 30 of the slave DCDC 12b may determine whether an abnormality related to the slave DCDC 12b has occurred. In this case, an abnormality determination may be made using the detection value of the output side voltage sensor 22 in the master DCDC 12a and the slave DCDC 12b. When it is determined that an abnormality relating to the master DCDC 12a or the slave DCDC 12b has occurred, it is desirable to perform a process of notifying the vehicle ECU 26 to that effect.

  In the above embodiments, the target voltages of the master DCDC 12a and the slave DCDC 12b are different from each other, but the present invention is not limited to this. For example, when both the master DCDC 12a and the slave DCDC 12b are operated simultaneously, the target voltages of the master DCDC 12a and the slave DCDC 12b may be the same as long as these output voltages can be exactly matched to the target voltage. In this case, a configuration in which the required current on the vehicle side is equally shared by the master DCDC 12a and the slave DCDC 12b may be employed.

  If the target voltages of the master DCDC 12a and the slave DCDC 12b are the same, and the output voltages of these DCDC converters cannot be made to exactly match the target voltage, any output current of the master DCDC 12a and the slave DCDC 12b is the limit value first. It is not possible to know whether or not it will reach. Therefore, in such a configuration, both the master DCDC 12a and the slave DCDC 12b may have a function of outputting the overcurrent limit signal and a function of increasing the limit value by inputting the overcurrent limit signal. That is, in this case, each of the master DCDC 12a and the slave DCDC 12b has an input / output function of an overcurrent limiting signal. For this reason, the determination of the presence or absence of an overcurrent limit signal transmission abnormality described in the third embodiment may be performed not only on the master DCDC 12a side but also on the slave DCDC 12b side.

  In the first embodiment, the abnormality determination process may be performed during either the travel preparation period or the standby preparation period. However, when the user uses the vehicle, it is desirable to promptly notify the user that an abnormality has occurred in the power supply system. Therefore, it is desirable to execute the abnormality determination process during the travel preparation period.

  As a method for determining whether or not the vehicle-side requested current can be supplied to the low-voltage battery 24, the vehicle-mounted load 28, etc. by any one of the master DCDC 12a and the slave DCDC 12b, those exemplified in the above embodiments Not limited to. For example, it may be determined whether the supply is possible based on the operating state of the in-vehicle load 28. Specifically, for example, it may be determined whether the supply is possible by grasping which of the in-vehicle loads 28 is operating. This is a method in view of the fact that the power consumption during the operation of each on-vehicle load 28 can be grasped in advance.

  In each of the above embodiments, the presence / absence of abnormality of the power supply system is determined based on the output voltage of the DCDC converter. However, the present invention is not limited to this. For example, the determination may be based on the output current of the DCDC converter. In this case, for example, in FIG. 1 (or FIG. 7), a signal line for outputting the detection value of the input side current sensor 20 from the control circuit 30 of each of the master DCDC 12a and the slave DCDC 12b to the vehicle ECU 26 is provided. Based on the detection value of the input side current sensor 20, the output current of each DCDC converter is calculated. Then, when it is determined that the output current of each DCDC converter does not exceed the specified current in steps S64, S70, S88, and S94 in FIG. 5 during the travel preparation period, an abnormality has occurred in the power supply system. Just judge. Here, the specified current is set as a value by which it can be determined whether or not the DCDC converter is operating normally. For example, the specified current may be a value slightly smaller than the required current on the vehicle side.

  In addition to the input-side current sensor 20, an output-side current sensor (current sensor provided on the low-voltage system side) that detects the output current from the DCDC converter and directly inputs the detected value to the vehicle ECU 26 is further provided. Based on the detection value of the output side current sensor, it is also possible to determine whether or not an abnormality has occurred in the power supply system by a method similar to the above method.

  The method for determining whether or not the vehicle-side requested current can be supplied to the in-vehicle load 28 or the like by any one of the master DCDC 12a and the slave DCDC 12b is not limited to those exemplified in the above embodiments. For example, when the present invention is applied to a plug-in hybrid vehicle (PHV), it is determined that the high voltage battery 10 can be supplied when it is determined that the high voltage battery 10 is being charged from an external power source (for example, a commercial power source) when the vehicle is stopped. May be. This is because the required current on the vehicle side is small during charging from the external power source.

  As a method for determining whether or not vehicle travel is permitted by the user and whether or not vehicle travel is prohibited by the user, those exemplified in the first embodiment (a method performed by a user's manual operation) Is not limited to. For example, when it is determined that the distance between the portable wireless device possessed by the user and the vehicle is less than a predetermined distance, it is determined that the vehicle is allowed to travel by the user, or the distance between the portable wireless device and the vehicle. It may be determined that traveling of the vehicle is prohibited by the user by determining that the vehicle distance exceeds a specified distance.

  -The number of DCDC converters connected in parallel is not limited to two, and may be three or more. In this case, one of the plurality of DCDC converters may be a master DCDC and the other may be a slave DCDC. In this case, in the traveling preparation period or the like, these DCDC converters are sequentially operated independently to perform the abnormality determination process.

  In the power supply system having three or more DCDC converters connected in parallel, the method for increasing the specified value will be described. For example, the output current of the slave DCDC having the lowest target voltage among the slave DCDCs corresponds to the slave DCDC. When exceeding the value, the specified value of the slave DCDC other than the slave DCDC having the lowest target voltage among all the slave DCDCs may be sequentially increased, and then the specified value corresponding to the master DCDC may be increased.

  More specifically, for example, when the output current of the slave DCDC having the lowest target voltage among the slave DCDCs exceeds a specified value corresponding to the slave DCDC, thereafter, the target DCDC other than the slave DCDC having the lowest target voltage is targeted. In order from the lowest voltage, the specified value is increased when the output current exceeds the specified value. Then, after all the specified values corresponding to the slave DCDC other than the slave DCDC having the lowest target voltage are increased, the specified value corresponding to the master DCDC is increased. In the above configuration, when the output current of the DCDC converter exceeds a specified value corresponding to the DCDC converter, an overcurrent limit signal is output to the DCDC converter having the next higher target voltage than the target voltage of the DCDC converter. The Rukoto.

  In the first embodiment, the master limit value Ia is set smaller than the slave limit value Ib. However, the present invention is not limited to this. For example, the master limit value Ia may be set larger than the slave limit value Ib. This is, for example, a configuration that can be employed when the average current of the master DCDC 12a is larger than the average current of the slave DCDC 12b in a power supply system including DCDC converters in which the master DCDC 12a and the slave DCDC 12b are different from each other.

  In the first embodiment, the abnormality determination process is performed by sequentially operating all the DCDC converters (master DCDC 12a and slave DCDC 12b) included in the power supply system in the travel preparation period, but the present invention is not limited thereto. For example, abnormality determination processing may be performed when only the slave DCDC 12b is operated during the travel preparation period. This method is intended to ensure an opportunity for determining the abnormality of the slave DCDC 12b because the operation frequency of the master DCDC 12a tends to be high and the operation frequency of the slave DCDC 12b tends to be low while the vehicle is running. is there. Thereby, for example, shortening of the traveling preparation period can be expected.

  In the third embodiment, for example, the following method can be considered when performing the transmission abnormality determination process for the overcurrent limit signal during vehicle travel control. First, the total output current of these DCDC converters is calculated based on the detection value of the input side current sensor provided in each of the master DCDC 12a and the slave DCDC 12b. Then, the transmission abnormality determination process is performed in a period in which the calculated total output current is determined to be equal to or less than the added value of the master limit value Ia and the slave limit value Ib before the increase and the vehicle travel control is performed. It should be noted that the total output current used for determining whether or not there is an abnormality determination status is not limited to that calculated from the detection values of the current sensors provided in each of the master DCDC 12a and the slave DCDC 12b. For example, the power supply system may include a single output-side current sensor that detects the output current of the parallel connection body of the master DCDC 12a and the slave DCDC 12b, and the detection value of the output-side current sensor may be the total output current.

  In the third and fourth embodiments, the transmission abnormality determination process is performed in a period in which the master limit value Ia is not increased to Ic (such as a travel preparation period). However, the present invention is not limited to this, and the master limit value is increased. The transmission abnormality determination process may be performed during the period. In this case, as described above, the logic of the overcurrent limit signal is set to “L” by the transmission abnormality determination process in a situation where the requested current on the vehicle side exceeds the added value of the master limit value Ia and the slave limit value Ib before the increase. Thus, although the maximum value of the current that can be supplied by the master DCDC 12a and the slave DCDC 12b is lower than the required current, it is possible to determine whether there is an abnormal transmission of the overcurrent limit signal.

  In the third and fourth embodiments, the overcurrent limiting signal is directly transmitted from the slave DCDC 12b to the master DCDC 12a through the signal line 38. However, the present invention is not limited to this. For example, an overcurrent limiting signal may be transmitted from the slave DCDC 12b to the slave DCDC 12b via the vehicle ECU 26. In this case, the transmission abnormality determination process may be performed in the vehicle ECU 26. Specifically, for example, first, in the traveling preparation period, the vehicle ECU 26 acquires an overcurrent limiting signal from the slave DCDC 12b and acquires a recognition result of the overcurrent limiting signal output from the slave DCDC 12b in the master DCDC 12a. Then, the presence / absence of transmission abnormality of the overcurrent limit signal may be determined by comparing the logics of the acquired overcurrent limit signals.

  In the third and fourth embodiments, there are two DCDC converters connected in parallel. However, the number is not limited to this, and three or more DCDC converters may be used. In this case, the target voltages of the plurality of DCDC converters may be made different from each other, and the DCDC converter having the highest target voltage among the plurality of DCDC converters may be the master DCDC, and the others may be the slave DCDCs.

  When the output method of the slave DCDC having the lowest target voltage exceeds the specified value corresponding to the slave DCDC, the method for increasing the specified value in such a configuration will be described. An overcurrent limiting signal may be output from the slave DCDC having the lowest target voltage to the DCDC converter. In this case, the overcurrent limiting signal transmission abnormality determination process is performed between the slave DCDC having the lowest target voltage and each of the DCDC converters other than the slave DCDC having the lowest target voltage among the plurality of DCDC converters. It will be.

  In the third and fourth embodiments, all of the DCDC converters provided in the power supply system are set as the determination targets for the presence / absence of transmission abnormality of the overcurrent limit signal, but the present invention is not limited to this. For example, when there are three or more DCDC converters provided in the power supply system and two or more pairs of DCDC converters in which signal lines for transmitting an overcurrent limiting signal are connected to each other, some of these sets In addition, at least one set may be the target of the overcurrent limit signal transmission abnormality determination process. In this case, from the viewpoint of avoiding a shortage of current supply to the vehicle-mounted load or the like due to the abnormality determination of the overcurrent limit signal, a DCDC converter whose specified value is not increased is selected as a pair of DCDC converters to be determined. Is desirable.

  In the fourth embodiment, a travel preparation period or the like is set as a specific period for determining the presence or absence of an overcurrent limit signal transmission abnormality, and an L-side sticking abnormality and an H-side sticking abnormality are performed in a single traveling preparation period or the like. However, the present invention is not limited to this. For example, the following method may be employed.

  First, as a specific period, a first period (including a travel preparation period) in which the vehicle-side required current is equal to or less than the sum of the master limit value Ia and the slave limit value Ib before the increase, and the vehicle side The second period is a period in which the requested current exceeds the added value. At least one of the master DCDC 12a and the slave DCDC 12b has a function of grasping the requested current on the vehicle side, and a function of notifying the counterpart DCDC converter that the transmission abnormality determination process is performed based on the requested current. Make it.

  In such a configuration, only the process of outputting the logic “L” overcurrent limiting signal from the slave DCDC 12b during the predetermined period of the first period and whether or not the H-side fixing abnormality has occurred in the master DCDC 12a. to decide. On the other hand, during a predetermined period of the second period, the output process of the logic “H” overcurrent limiting signal is performed from the slave DCDC 12b, and only whether or not the L-side fixing abnormality has occurred in the master DCDC 12a is determined. From the viewpoint of avoiding a situation where the power supply system is continuously used in a state where a transmission abnormality has occurred, it is desirable that the transmission abnormality determination process be performed as quickly as possible after the start of the travel preparation period.

  The switching element provided in the DCDC converter is not limited to a MOS transistor, and may be, for example, an insulated gate bipolar transistor. Further, the DCDC converter is not limited to the step-down converter but may be a step-up converter.

  DESCRIPTION OF SYMBOLS 10 ... High voltage battery, 12a ... Master DCDC, 12b ... Slave DCDC, 20 ... Input side current sensor, 22 ... Output side voltage sensor, 24 ... Low voltage battery, 26 ... Vehicle ECU, 28 ... In-vehicle load, 30 ... Control circuit.

Claims (15)

Applied to a power supply system that supplies power to a predetermined power supply target by a plurality of DCDC converters connected in parallel,
An operation instruction means for instructing at least one of the plurality of DCDC converters in a specific period;
An abnormality determination device for a power supply system, comprising: abnormality determination means for determining whether or not the power supply system is abnormal based on an operation state of the DCDC converter that has been instructed by the operation instruction means. A supply determination means for determining whether or not the required current of the power supply target can be supplied to the power supply target by any one of the plurality of DCDC converters;
The operation instruction means provides an instruction to supply power to the power supply target by a single DCDC converter in a period determined to be supplied by the supply determination means as the specific period. Supply instruction means for at least one of the converters;
2. The power system according to claim 1, wherein the abnormality determination unit determines whether there is an abnormality in the power system based on an operating state of the DCDC converter instructed to supply power by the supply instruction unit. Abnormality judgment device. Voltage control means for operating the DCDC converter to control the output voltage of the DCDC converter to a target voltage;
Current limiting means for operating the DCDC converter in preference to operation of the DCDC converter by the voltage control means to limit the output current by the specified value when the output current of the DCDC converter exceeds a specified value; Prepared,
3. The abnormality determination device for a power supply system according to claim 2, wherein the target voltage is different from each other in each of the plurality of DCDC converters. The power supply system and the power supply target are mounted on a vehicle,
When it is determined that the vehicle is allowed to travel by the user, the power supply target is subjected to processing related to the preparation for the vehicle control. When the user determines that the vehicle is prohibited from traveling, Includes processing means for processing related to termination,
4. The power supply system according to claim 2, wherein the supply determination unit determines that the supply is possible when processing related to preparation for vehicle control or processing related to termination of vehicle control is being executed. 5. Abnormality judgment device. The power supply system and the power supply target are mounted on a vehicle,
The power supply targets include electronically controlled in-vehicle loads,
The power supply system abnormality determination device according to any one of claims 2 to 4, wherein the supply determination unit determines whether the supply is possible based on an operating state of the in-vehicle load. The vehicle further includes current detection means for detecting a current output from the parallel connection body of the DCDC converter,
6. The abnormality determination device for a power supply system according to claim 5, wherein the supply determination unit determines whether the supply is possible based on a current detected by the current detection unit.   The abnormality determination device for a power supply system according to any one of claims 2 to 6, wherein the abnormality determination unit determines the presence or absence of the abnormality based on an output voltage of the DCDC converter.   The abnormality determination device for a power supply system according to any one of claims 2 to 6, wherein the abnormality determination means determines the presence or absence of the abnormality based on an output current of the DCDC converter. The power supply system and the power supply target are mounted on a vehicle,
The supply instructing unit is provided in each of the plurality of DCDC converters and performs an instruction to supply power to the DCDC converter provided in itself.
The vehicle is provided with a control device that is higher than the supply instruction means and controls the vehicle.
The abnormality determination device for a power supply system according to any one of claims 2 to 8, wherein the abnormality determination means is provided in the control device. Voltage control means for operating the DCDC converter to control the output voltage of the DCDC converter to a target voltage;
Current limiting means for operating the DCDC converter in preference to operation of the DCDC converter by the voltage control means to limit the output current by the specified value when the output current of the DCDC converter exceeds a specified value;
When at least one output current of the plurality of DCDC converters exceeds the specified value, at least one of the DCDC converters whose output current exceeds the specified value among the plurality of DCDC converters and at least one of the other DCDC converters Signal output means for outputting an overcurrent limiting signal to a signal output target that is one;
In the signal output target to which the overcurrent limit signal is input, further comprises an increasing means for increasing the specified value corresponding to itself.
The operation instruction means is a forced output instruction means for instructing the signal output target to be forcibly output the overcurrent limit signal from a part of the plurality of DCDC converters in the specific period.
The abnormality determination unit determines whether or not there is an abnormality in transmission of the overcurrent limit signal based on an input result of the overcurrent limit signal in the specific period with respect to the signal output target. The abnormality determination device for a power supply system according to any one of the above. The forced output instruction means instructs to forcibly output the overcurrent limit signal and stop the output,
Among the plurality of DCDC converters, at least a pair of DCDC converters are subject to determination of the transmission abnormality by the abnormality determination means,
The specific period is a period in which the total output current of the DCDC converter to be determined corresponds to the DCDC converter to be determined and is equal to or less than the addition value of the specified value before increase by the increasing means. The power system abnormality determination device according to claim 10, wherein the power system abnormality determination device is provided. The power supply system and the power supply target are mounted on a vehicle,
Processing means for performing processing related to the preparation of the vehicle control when it is determined by the user that traveling of the vehicle is permitted, and performing processing regarding termination of the vehicle control when it is determined by the user that traveling of the vehicle is prohibited When,
A supply restriction unit for restricting a current to be supplied to the power supply target in a period in which the process related to the preparation for the vehicle control and the process related to the end of the vehicle control are performed;
12. The abnormality determination device for a power supply system according to claim 11, wherein the specific period is a period in which at least one of processing related to preparation for vehicle control and processing related to termination of vehicle control is executed. The power supply system and the power supply target are mounted on a vehicle,
The vehicle further includes a current calculation means for calculating a total output current of the DCDC converter to be determined,
The specific period means that the total output current calculated by the current calculation means during the travel control of the vehicle corresponds to the DCDC converter to be determined and is the predetermined value before increase by the increase means. 13. The abnormality determination apparatus for a power supply system according to claim 11 or 12, wherein the period is equal to or shorter than the addition value. A supply determination means for determining whether or not the required current of the power supply target can be supplied to the power supply target by any one of the plurality of DCDC converters;
The specific period is a period in which it is determined that the supply can be supplied by the supply determination unit.
The forced output instruction means instructs to forcibly output the overcurrent limit signal and stop the output,
The operation instruction means further includes a supply instruction means for instructing at least one of the plurality of DCDC converters to supply power to the power supply target by the single DCDC converter during the specific period. ,
The abnormality determination means determines whether there is an abnormality in which no current can be output from the DCDC converter based on the operating state of the DCDC converter instructed to supply power by the supply instruction means in the specific period; and The abnormality of the power supply system according to any one of claims 10 to 13, wherein both processing for determining whether or not there is a transmission abnormality of the overcurrent restriction signal based on an input result of the overcurrent restriction signal is performed. Judgment device. The target voltage is different from each other in each of the plurality of DCDC converters,
Among the plurality of DCDC converters, the one having the highest target voltage is set as a master, and the remainder is set as a slave.
When the output current of the slave having the lowest target voltage among the slaves exceeds the specified value corresponding to the slave having the lowest target voltage, the signal output means outputs a plurality of DCDCs from the slave having the lowest target voltage. 15. The power system according to claim 10, wherein the overcurrent limiting signal is output to at least one DCDC converter other than the slave having the lowest target voltage among the converters. Abnormality judgment device.

Images