JP2013077807A5 - SUBSTRATE MANUFACTURING METHOD, WIRING BOARD MANUFACTURING METHOD, SUBSTRATE, AND WIRING BOARD - Google Patents
SUBSTRATE MANUFACTURING METHOD, WIRING BOARD MANUFACTURING METHOD, SUBSTRATE, AND WIRING BOARD Download PDFInfo
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- JP2013077807A5 JP2013077807A5 JP2012178893A JP2012178893A JP2013077807A5 JP 2013077807 A5 JP2013077807 A5 JP 2013077807A5 JP 2012178893 A JP2012178893 A JP 2012178893A JP 2012178893 A JP2012178893 A JP 2012178893A JP 2013077807 A5 JP2013077807 A5 JP 2013077807A5
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- Prior art keywords
- hole
- glass substrate
- substrate
- plating
- layer
- Prior art date
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- 239000000758 substrate Substances 0.000 title claims 34
- 238000004519 manufacturing process Methods 0.000 title claims 11
- 239000011521 glass Substances 0.000 claims 20
- 239000010410 layer Substances 0.000 claims 20
- 238000007747 plating Methods 0.000 claims 18
- 229910052751 metal Inorganic materials 0.000 claims 7
- 239000002184 metal Substances 0.000 claims 7
- 239000007769 metal material Substances 0.000 claims 4
- 238000003754 machining Methods 0.000 claims 3
- 238000009713 electroplating Methods 0.000 claims 2
- PXHVJJICTQNCMI-UHFFFAOYSA-N nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims 2
- KDLHZDBZIXYQEI-UHFFFAOYSA-N palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 claims 2
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 claims 2
- 239000002344 surface layer Substances 0.000 claims 2
- 239000000956 alloy Substances 0.000 claims 1
- 229910045601 alloy Inorganic materials 0.000 claims 1
- 229910052782 aluminium Inorganic materials 0.000 claims 1
- REDXJYDRNCIFBQ-UHFFFAOYSA-N aluminium(3+) Chemical class [Al+3] REDXJYDRNCIFBQ-UHFFFAOYSA-N 0.000 claims 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminum Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims 1
- 229910052804 chromium Inorganic materials 0.000 claims 1
- 239000011651 chromium Substances 0.000 claims 1
- VYZAMTAEIAYCRO-UHFFFAOYSA-N chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 claims 1
- 229910052802 copper Inorganic materials 0.000 claims 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims 1
- 239000010949 copper Substances 0.000 claims 1
- 238000000151 deposition Methods 0.000 claims 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims 1
- 229910052737 gold Inorganic materials 0.000 claims 1
- 239000010931 gold Substances 0.000 claims 1
- 239000000463 material Substances 0.000 claims 1
- 229910052759 nickel Inorganic materials 0.000 claims 1
- 229910052763 palladium Inorganic materials 0.000 claims 1
- 229910052697 platinum Inorganic materials 0.000 claims 1
- MHOVAHRLVXNVSD-UHFFFAOYSA-N rhodium Chemical compound [Rh] MHOVAHRLVXNVSD-UHFFFAOYSA-N 0.000 claims 1
- 229910052703 rhodium Inorganic materials 0.000 claims 1
- 239000010948 rhodium Substances 0.000 claims 1
- 229910052709 silver Inorganic materials 0.000 claims 1
- 239000004332 silver Substances 0.000 claims 1
- BQCADISMDOOEFD-UHFFFAOYSA-N silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims 1
- 238000004544 sputter deposition Methods 0.000 claims 1
Claims (12)
前記ガラス基板の第1面側に金属のメッキ下地層を形成する第2工程と、
前記ガラス基板の第1面側に電解メッキによって金属の第1メッキ層を形成することにより、前記貫通孔の第1開口部を前記第1メッキ層によって閉塞する第3工程と、
前記ガラス基板の第2面側からの電解メッキによって前記貫通孔内に金属の第2メッキ層を堆積することにより、前記貫通孔を金属で充填する第4工程と、を含み、
前記第2工程においては、前記貫通孔の第1開口部の縁から当該貫通孔の側壁面の一部にかけて前記メッキ下地層を形成し、
前記第3工程においては、前記貫通孔の内部で前記メッキ下地層の表面から前記第1メッキ層を成長させることにより、前記貫通孔の第1開口部を前記第1メッキ層によって閉塞し、
前記第4工程においては、前記貫通孔の内部で前記第1メッキ層の表面から前記貫通孔の第2開口部に向かって前記第2メッキ層を成長させることにより、前記貫通孔を金属で充填する
ことを特徴とする基板製造方法。 A plate-like glass substrate having a first surface and a second surface in a front-back relationship has a through hole having the first surface side as a first opening and the second surface side as a second opening. A first step of preparing a formed glass substrate;
A second step of forming a metal plating underlayer on the first surface side of the glass substrate;
A third step of closing the first opening of the through hole with the first plating layer by forming a metal first plating layer on the first surface side of the glass substrate by electrolytic plating;
A fourth step of filling the through hole with metal by depositing a second plating layer of metal in the through hole by electrolytic plating from the second surface side of the glass substrate;
In the second step, the plating base layer is formed from the edge of the first opening of the through hole to a part of the side wall surface of the through hole,
In the third step, by growing the first plating layer from the surface of the plating base layer inside the through hole, the first opening of the through hole is closed by the first plating layer,
In the fourth step, the through hole is filled with metal by growing the second plated layer from the surface of the first plated layer toward the second opening of the through hole inside the through hole. A substrate manufacturing method characterized by:
前記第2工程においては、前記第5工程で前記ガラス基板の第1面側の表層部を前記機械加工により除去した後でも前記貫通孔の第1開口部が前記メッキ下地層および前記第1メッキ層によって閉塞された状態となるように、前記第5工程で前記機械加工により除去を予定している前記ガラス基板の除去予定領域よりも貫通孔の奥側に入り込んだ位置まで前記メッキ下地層を形成しておく
ことを特徴とする請求項1に記載の基板製造方法。 After the fourth step, there is a fifth step of flattening at least the first surface of the first surface and the second surface of the glass substrate by machining,
In the second step, even after the surface layer portion on the first surface side of the glass substrate is removed by the machining in the fifth step, the first opening portion of the through hole is formed by the plating base layer and the first plating. In order to be in a state of being blocked by the layer, the plating base layer is moved to a position that is located deeper into the through hole than the planned removal region of the glass substrate that is scheduled to be removed by the machining in the fifth step. It forms, The board | substrate manufacturing method of Claim 1 characterized by the above-mentioned.
ことを特徴とする請求項2に記載の基板製造方法。 After the fourth step and before the fifth step, a step of removing the first plating layer and the plating base layer from the first surface of the glass substrate to expose the first surface of the glass substrate. The substrate manufacturing method according to claim 2, further comprising:
ことを特徴とする請求項1〜3のいずれかに記載の基板製造方法。 In the first step, a glass substrate is prepared in which the through hole having a cross-sectional shape on the side of the first opening of the through hole is formed in a flared shape. The manufacturing method of a board | substrate of description.
ことを特徴とする請求項1〜4のいずれかに記載の基板製造方法。 5. The substrate manufacturing method according to claim 1, wherein, in the second step, the plating base layer is formed by sputtering on the first surface side of the glass substrate.
ことを特徴とする請求項1〜5のいずれかに記載の基板製造方法。The substrate manufacturing method according to claim 1, wherein:
ことを特徴とする配線基板の製造方法。 After manufacturing the board | substrate formed by filling the through-hole of the said glass substrate with the metal by the board | substrate manufacturing method in any one of Claims 1-6 , at least one of the 1st surface and the 2nd surface of the said glass substrate. A method of manufacturing a wiring board, comprising: forming a wiring pattern on the wiring board.
前記貫通孔の第1面側の縁から当該貫通孔の側壁面の一部にかけて形成されるメッキ下地層と、A plating base layer formed from the edge on the first surface side of the through hole to a part of the side wall surface of the through hole;
前記貫通孔の内部を充填する金属材と、を備え、A metal material filling the inside of the through hole,
前記貫通孔の第1面側が前記メッキ下地層および前記金属材により閉塞されており、The first surface side of the through hole is closed by the plating base layer and the metal material,
前記金属材の露出する表面が前記ガラス基板の第1面および第2面のそれぞれと面一となるように構成されるThe exposed surface of the metal material is configured to be flush with each of the first surface and the second surface of the glass substrate.
ことを特徴とする基板。A substrate characterized by that.
ことを特徴とする請求項8に記載の基板。The substrate according to claim 8.
ことを特徴とする請求項8または9に記載の基板。The substrate according to claim 8 or 9, wherein
ことを特徴とする請求項8〜10のいずれかに記載の基板。The board | substrate in any one of Claims 8-10 characterized by the above-mentioned.
ことを特徴とする配線基板。A wiring board characterized by that.
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2012178893A JP2013077807A (en) | 2011-09-13 | 2012-08-10 | Method for manufacturing substrate and method for manufacturing wiring board |
US13/610,359 US20130062210A1 (en) | 2011-09-13 | 2012-09-11 | Manufacturing method of substrate and manufacturing method of wiring substrate |
KR1020120100956A KR20130029021A (en) | 2011-09-13 | 2012-09-12 | Manufacturing method of substrate and manufacturing method of wiring substrate |
TW101133234A TW201322313A (en) | 2011-09-13 | 2012-09-12 | Manufacturing method of substrate and manufacturing method of wiring substrate |
CN2012103378728A CN103002675A (en) | 2011-09-13 | 2012-09-12 | Manufacturing method of substrate and manufacturing method of wiring substrate |
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2011199614 | 2011-09-13 | ||
JP2011199614 | 2011-09-13 | ||
JP2012178893A JP2013077807A (en) | 2011-09-13 | 2012-08-10 | Method for manufacturing substrate and method for manufacturing wiring board |
Publications (2)
Publication Number | Publication Date |
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JP2013077807A JP2013077807A (en) | 2013-04-25 |
JP2013077807A5 true JP2013077807A5 (en) | 2015-07-30 |
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ID=48481038
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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JP2012178893A Pending JP2013077807A (en) | 2011-09-13 | 2012-08-10 | Method for manufacturing substrate and method for manufacturing wiring board |
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Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP6286169B2 (en) * | 2013-09-26 | 2018-02-28 | 新光電気工業株式会社 | Wiring board and manufacturing method thereof |
JP6350063B2 (en) | 2013-10-09 | 2018-07-04 | 日立化成株式会社 | Multilayer wiring board |
JP6327463B2 (en) * | 2013-10-09 | 2018-05-23 | 日立化成株式会社 | Manufacturing method of multilayer wiring board |
WO2015053082A1 (en) * | 2013-10-09 | 2015-04-16 | 日立化成株式会社 | Multilayer wiring board and method for manufacturing same |
JP6350064B2 (en) | 2013-10-09 | 2018-07-04 | 日立化成株式会社 | Manufacturing method of multilayer wiring board |
JP6251629B2 (en) * | 2014-04-24 | 2017-12-20 | 新光電気工業株式会社 | Wiring board and method of manufacturing wiring board |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4526747B2 (en) * | 2001-08-17 | 2010-08-18 | 株式会社アドバンテスト | Wiring board manufacturing method |
EP1667510B1 (en) * | 2003-09-09 | 2013-11-06 | Hoya Corporation | Method for manufacturing double-sided printed glass board |
JP4298601B2 (en) * | 2004-07-06 | 2009-07-22 | 東京エレクトロン株式会社 | Interposer and manufacturing method of interposer |
JP4552770B2 (en) * | 2005-06-21 | 2010-09-29 | パナソニック電工株式会社 | Method for forming through wiring on semiconductor substrate |
JP4581915B2 (en) * | 2005-08-26 | 2010-11-17 | パナソニック電工株式会社 | Manufacturing method of through-hole wiring |
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2012
- 2012-08-10 JP JP2012178893A patent/JP2013077807A/en active Pending
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