JP2013066100A - Power circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a power circuit that implements improved power conversion efficiency within a transmitter adapted for broadband wireless communication.SOLUTION: The power circuit includes: a push-pull amplification section for amplifying an input signal in a push-pull amplification mode; a variable power supply section implementing a variable voltage level of a supply voltage supplied to the push-pull amplification section by selective connection of a plurality of power supplies 112-115, 116-119 based on control signals; a switch control section 138 for outputting as the control signals selection signals C1-C8 for selecting the plurality of power supplies to control the voltage level of the supply voltage on the basis of the input signal; and a switch control signal conversion section 139 for changing the power supplies selected by the selection signals such that loads to the plurality of power supplies 112-115, 116-119 of the variable power supply section are constant.

Description

  The present invention relates to a power supply circuit used in a power amplifier of a transmitter that performs wireless communication with a broadband high-frequency signal, and more particularly to a power supply circuit that can improve power conversion efficiency.

[Description of Prior Art]
As a requirement for a power amplifier of a transmitter, there is a strong demand for reduction in size and weight in order to limit installation locations and reduce installation costs. Most of the equipment's volume and weight are radiating fins for radiating the heat generated by power loss, but improving the power efficiency makes it possible to make the radiating fins smaller, contributing to a reduction in size and weight. To do.

[EER power amplifier: Fig. 9]
As a method for improving the power efficiency, there is an EER (Envelop Elimination and Restoration) method for changing the power supply voltage of a saturation type power amplifier.
An EER power amplifier will be described with reference to FIG. FIG. 9 is a schematic configuration diagram of an EER type power amplifier.
As shown in FIG. 9, the EER type power amplifier includes an input terminal 1, a distributor 2, an envelope detector 3, a power supply circuit 4, an RF limit amplifier 5, a main amplifier 6, and an output terminal 7. And.

  Specifically, an input terminal 1, a distributor 2, an RF limit amplifier 5, a main amplifier 6, and an output terminal 7 are connected in series, and an envelope detector 3 is connected to the distributor 2. The envelope detector 3 is connected to a power supply circuit 4, and the power supply circuit 4 is connected to a main amplifier 6 to supply power.

In the EER power amplifier having the above configuration, the RF signal input from the input terminal 1 is distributed by the distributor 2, one of which is detected by the envelope detector 3, and the envelope signal is input to the power supply circuit 4. . Then, the power supply circuit 4 varies the power supply voltage of the main amplifier 6 according to the envelope signal.
The other RF signal distributed by the distributor 2 is amplified by the main amplifier 6 while the amplitude variation is removed by the RF limit amplifier 5 and only the phase information is maintained.
Since the power supply voltage of the main amplifier 6 varies according to the amplitude information from the envelope detector 3, the amplitude information is restored, and the main amplifier 6 always operates in a saturated state, so that the efficiency becomes high.

[Power supply circuit capable of high-speed operation: FIG. 10]
By the way, when considering the efficiency of the entire EER type power amplifier, the efficiency of the power supply circuit 4 as well as the main amplifier 6 becomes important.
The bandwidth of an envelope signal of a wideband signal such as a W-CDMA (Wideband-Code Division Multiple Access) signal or an OFDM (Orthogonal Frequency Division Multiplexing) signal is wide, and the power supply circuit 4 needs to operate at high speed.

For example, Non-Patent Document 1 and Non-Patent Document 2 describe power supply circuits that operate at high speed (see Non-Patent Documents 1 and 2).
A configuration example of a power supply circuit that operates at high speed will be described with reference to FIG. FIG. 10 is a configuration diagram illustrating an example of a power supply circuit that operates at high speed.
As shown in FIG. 10, the power supply circuit (high-speed operation power supply circuit) that operates at high speed mainly includes an input terminal 8, a push-pull amplifier 9 that is a broadband voltage source, a current detector 10 that is a control circuit, and The hysteresis comparator 11, a highly efficient DC / DC converter 12, and an output terminal 13 are included.
The push-pull amplifier 9 corresponds to a push-pull amplifier described in the claims.

The input terminal 8 is connected to the output stage of the envelope detector 3 shown in FIG. 9, and the output terminal 13 is connected to the power supply terminal of the main amplifier 6 shown in FIG.
The current detector 10 is composed of a resistor, for example.
The DC / DC converter 12 includes a voltage power supply 31, a switch element 32, a diode 33, and an inductance 34.
The push-pull amplifier 9 will be described later.

  In the power supply circuit shown in FIG. 10, the direct current component and the low frequency component are supplied from the DC / DC converter 12 having high efficiency, and the high frequency component is supplied from the push-pull amplifier 9 capable of high speed operation. This enables high-efficiency and high-speed operation.

[Operation mode of DC / DC converter]
Here, the operation mode of the DC / DC converter 12 will be described.
The operation mode of the DC / DC converter 12 includes a follow mode and a non-follow mode.

[Follow-up mode]
First, the following mode will be described. The follow-up mode is an operation of the DC / DC converter 12 when the output of the envelope detector 3 is a DC component and a low frequency component.
The signal detected by the envelope detector 3 in FIG. 9 is input to the input terminal 8 in FIG. 10 and converted into a voltage source by the push-pull amplifier 9.
When the output of the envelope detector 3 is a DC component, the voltage at the node P1 of the current detector 10 rises and the hysteresis comparator 11 moves so as to turn on the switch element 32.
As a result, the power supply voltage 31 is applied to the node P at the connection point between the switch element 32 and the inductance 34, and the voltage at the output terminal 13 gradually increases via the inductance 34.

When the voltage at the output terminal 13 becomes higher than the output voltage of the push-pull amplifier 9, the voltage at the node P2 increases, and the hysteresis comparator 11 turns off the switch element 32.
As a result, the current flowing through the inductance 34 flows via the diode 33, and the voltage at the output terminal 13 gradually decreases. Then, again, the hysteresis comparator 11 turns on the switch element 32 and performs the same repeated operation. That is, the DC / DC converter 12 oscillates and controls itself.

  This self-excited frequency is determined by a hysteresis width having flexibility, an inductance 34, a power supply voltage 31, and a resistance value of the current detector 10. However, if the frequency is set high, the switching loss increases or the limit value of the switch element 24 is reached. There are limits.

  When the output of the envelope detector 3 is a DC component and a low-frequency AC component, the DC / DC converter 12 follows as in the case of the DC input, and the output power is supplied from the efficient DC / DC converter 12. Is done.

[Non-following mode]
Next, the non-following mode will be described.
When the output of the envelope detector 3 becomes a CD component and a high frequency AC component, the high frequency AC component is removed by the inductance 34, and therefore the output from the DC / DC converter 12 is only the DC component.
At this time, a DC component and an AC high frequency component are generated at both ends of the nodes P1 and P2 of the current detector 10, and the output of the hysteresis comparator 11 moves the switch element 32 at a frequency based on the AC high frequency component.
A high frequency AC component is supplied from the push-pull amplifier 9.

[Power circuit efficiency]
In the power supply circuit for high speed operation shown in FIG. 10, by increasing the AC component that can be followed by increasing the self-excited frequency, that is, by increasing the proportion of energy output from the high-efficiency DC / DC converter 12, It may be possible to try to increase the efficiency of the circuit.
However, in wide-band communication systems such as WiMAX (Worldwide Interoperability for Microwave Access) and LTE (Long Term Evolution), the envelope is also wide-banded, so increasing the switching frequency of the DC / DC converter 12 increases the switching loss. The efficiency of the power supply circuit is reduced.

  Therefore, by setting an appropriate circuit constant, in a broadband communication system such as WiMAX or LTE, an AC component having a low frequency is supplied from the DC / DC converter 12 having a high efficiency, and an AC component having a high frequency is pushed. The signal is supplied from the pull amplifier 9.

[Responding to large currents in power supply circuits]
By the way, when the output power of the main amplifier 6 is large, it is necessary to supply a large amount of current also from the power supply circuit 4.
In the high-speed power supply circuit of FIG. 10, in the DC / DC converter 12, it is only necessary to select components that can pass a necessary current as the switch element 32, the diode 33, and the inductance 34.
However, as for the operational amplifier used for the push-pull amplifier 9, there is generally no component capable of flowing a large current. Therefore, the capacity of the current that can be output is increased by connecting an NPN transistor and a PNP transistor to the output of the operational amplifier.

[Configuration of Push-Pull Amplifier: FIG. 10]
Next, the configuration of a push-pull amplifier (conventional push-pull amplifier) in a conventional high-speed operation power supply circuit will be described with reference to FIG.
As shown in FIG. 10, a conventional push-pull amplifier 9 includes an operational amplifier 103, a resistor 104, a diode 105, a diode 106, and a resistor 107 that constitute a bias circuit, and an NPN transistor 108 and a PNP transistor 109 in the push-pull circuit. And a DC voltage source 110 and a DC voltage source 111.

In the push-pull amplifier 9 configured as described above, the input signal passes through the input terminal 8 and is input to the positive terminal of the operational amplifier 103, and the output signal is fed back to the negative terminal of the operational amplifier.
The diode 105 compensates the voltage drop between the base and the emitter of the NPN transistor 108, and the diode 106 compensates the voltage drop between the base and the emitter of the PNP transistor 109. A bias circuit is provided together with the resistors 104 and 107. Configure.

An NPN transistor 108 connected to a DC voltage source 110 set to a voltage value higher than the DC voltage source 111 and a PNP transistor 109 connected to a DC voltage source 111 set to a voltage value lower than the DC voltage source 110. Constitutes a push-pull circuit.
The NPN transistor 108 outputs a voltage higher than the reference voltage, and the PNP transistor 109 outputs a voltage lower than the reference voltage.

[Push-pull amplifier output waveform: Fig. 11]
Next, the output waveform of the push-pull amplifier will be described with reference to FIG. 11A and 11B are explanatory diagrams showing the output waveforms of the push-pull amplifier. FIG. 11A shows the output waveforms of the NPN transistor 108 and the PNP transistor 109. FIG. 11B shows the waveform of the output terminal of the push-pull amplifier 9. Indicates.
As shown in FIG. 11A, as indicated by a solid line, the output waveform of the NPN transistor 108 (solid line) and the output waveform of the PNP transistor 109 (broken line) are waveforms obtained by half-wave rectifying a sine wave. This corresponds to an amplifier biased to class B.
As shown in FIG. 11B, a waveform obtained by combining the outputs of the NPN transistor 108 and the PNP transistor 109 is output from the output terminal of the push-pull amplifier 9.

[Power conversion efficiency of class B amplifier: Fig. 12]
Here, the power conversion efficiency of the class B amplifier will be described.
It is known that the power conversion efficiency η when the class B amplifier outputs a sine wave is expressed by Equation 1.
η = π / 4 × Vomax / Vdd (Formula 1)
Explaining Equation 1 for the NPN transistor 108, Vdd is the power supply voltage of the DC voltage source 110, and Vomax is the maximum value of the output voltage of the NPN transistor 108.

  In Equation 1, when Vomax is the same voltage as Vdd, that is, the voltage conversion efficiency η at the time of saturation output is 78.5%, the power conversion efficiency η also decreases as the maximum output voltage Vomax decreases.

FIG. 12 is an explanatory diagram showing the power conversion efficiency characteristics of the class B amplifier.
In FIG. 12, the power conversion efficiency η with respect to the output voltage is represented, and the back-off on the horizontal axis represents Vomax / Vdd in logarithm.
The point where the back-off is 0 indicates a saturated output, and the power conversion efficiency η at this time is 78.5% as described above, and when the back-off increases (when the maximum output voltage Vomax decreases), the power conversion efficiency η decreases, and the power conversion efficiency η when the back-off is −8 is 30%.

[Power conversion efficiency of push-pull amplifier: Fig. 12]
Although Expression 1 and FIG. 12 have been described for the NPN transistor 108, the same can be said for the PNP transistor 109, so that the characteristics of the entire push-pull amplifier 9 can also be expressed by Expression 1 and FIG. 12.
In the push-pull amplifier 9, the operational amplifier 103 and the bias circuit also consume power, but the current amplification factor hfe of the NPN transistor 108 and the PNP transistor 109 is large, and the power consumption of the operational amplifier 103 is slightly smaller than that of the push-pull amplifier 9. Therefore, the power conversion efficiency of the push-pull amplifier 9 substantially matches the characteristics shown in FIG.

[Example of cumulative probability density distribution of envelope signal spectrum in OFDM signal: FIG. 13]
Here, the cumulative probability density distribution of the envelope signal in the OFDM signal will be described with reference to FIG. FIG. 13 is an explanatory diagram showing an example of the cumulative probability density distribution of the envelope signal in the OFDM signal.
In FIG. 13, an envelope of an OFDM modulated signal having a bandwidth of 10 MHz and a PAPR (Peak to Average Power Ratio): 8 dB is obtained, and the cumulative probability density distribution of power is plotted from DC to 10 MHz.

  As described above, the power supply circuit 4 supplies the DC component and the low frequency component from the DC / DC converter 12 and supplies the high frequency component from the push-pull amplifier 9, but temporarily less than 3 MHz is supplied from the DC / DC converter 12. When the push-pull amplifier 9 supplies 3 MHz or higher, 90% of the power supplied from the power supply circuit 4 is supplied from the DC / DC converter 12 and 10% of 3 MHz or higher from the push-pull amplifier 9 as shown in FIG. Will be supplied.

[Power conversion efficiency of power supply circuit with OFDM signal: FIG. 12]
The power conversion efficiency of the power supply circuit 4 in the OFDM signal will be described.
The power conversion efficiency of the DC / DC converter 12 that supplies the DC component and the low frequency component is determined by the ON resistance of the switch element 32, the switching loss, the forward voltage of the diode, the loss of the inductance 34, and the like, and is ηd.

  On the other hand, since the PAPR of the OFDM signal is 8 dB, the power conversion efficiency of the push-pull amplifier 9 is the power conversion efficiency when backoff is -8 dB, as can be seen from FIG. Here, the power conversion efficiency at this time is ηb.

That is, 10% of the power supplied from the power supply circuit 4 to the main amplifier 6 is supplied from the push-pull amplifier 9 having the power conversion efficiency ηb, and 90% is supplied from the DC / DC converter 12 having the power conversion efficiency ηd. Therefore, the power conversion efficiency ηs of the power supply circuit 4 can be calculated by Equation 2.
ηs = 1 / (10% / ηb + 90% / ηd) (Formula 2)
Assuming that ηb = 30% and ηd = 90%, ηs = 75%.
In order to improve the power conversion efficiency of the power supply circuit 4 as a whole, it is necessary to increase the efficiency of the push-pull amplifier 9 having a low power conversion efficiency.

  In the conventional push-pull amplifier 9, the voltages of the DC voltage source 110 and the DC voltage source 111 connected to the collector terminal of the NPN transistor 108 and the collector terminal of the PNP transistor 109 are constant regardless of the output level. As the value decreases, the power conversion efficiency also decreases.

"An Improved Power-Added Efficiency 19-dBm Hybrid Envelope Elimination and Restoration Power Amplifier for 802.11g WLAN Applications", Feipeng Wang et al., IEEE TRANSACTIOINS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 54, NO. 12, DECEMBER 2006, P . 4086-4099 "A Class B Switch- Mode Assisted Linear Amplifier", Geoffrey R. Walker, IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 18. No. 6, NOVEMBER 2003, p.1278-1285

  However, in the conventional push-pull amplifier, the voltage of the DC voltage source connected to the collector terminals of the NPN transistor and the PNP transistor is a constant level regardless of the output level, so that the power conversion efficiency decreases when the output level decreases. There was a problem that it was.

  Non-Patent Documents 1 and 2 do not describe adjusting the voltage of the DC voltage source connected to the collector terminals of the NPN transistor and the PNP transistor of the push-pull amplifier according to the output level.

  The present invention has been made in view of the above circumstances, and adjusts the voltage of the DC voltage source connected to the collector terminals of the NPN transistor and the PNP transistor of the push-pull amplifier according to the output level so that the output level is An object of the present invention is to provide a power supply circuit in which the power conversion efficiency does not decrease even if the power consumption decreases.

  The present invention for solving the problems of the above-described conventional example is a power supply circuit used in a power amplifier, wherein a push-pull amplification unit that amplifies an input signal by a push-pull amplification method and a push-pull amplification unit by a control signal A variable power supply unit that makes the voltage level of the power supply voltage to be provided variable by selecting and connecting a plurality of power supplies, and a selection signal for selecting a plurality of power supplies to control the voltage level of the power supply voltage based on an input signal as a control signal And a power source selection destination conversion unit that changes a power source selection destination based on a selection signal so that loads of a plurality of power sources in the variable power source unit are constant.

  According to the present invention, there is provided a power supply circuit used for a power amplifier, wherein a plurality of voltage levels of a power supply voltage provided to a push-pull amplification unit that amplifies an input signal by a push-pull amplification method and a push-pull amplification unit by a control signal are provided. A variable power supply section that is variable by selecting and connecting power supplies, a control section that outputs a selection signal for selecting a plurality of power supplies to control the voltage level of the power supply voltage based on an input signal as a control signal, and a variable power supply Since the power supply circuit includes a power source selection destination conversion unit that changes the power source selection destination based on the selection signal so that the loads of the plurality of power sources in the unit are constant, output to the push-pull amplification unit based on the input signal Power supply voltage that follows the level can be supplied to enable operation close to saturation even when the output level is small, improving the power conversion efficiency of the push-pull amplifier. , The load of the plurality of power source was fixed, by designing the circuit so that the highest efficiency is improved in the load, there is an effect that it is possible to further improve the power conversion efficiency of the entire power supply circuit.

It is a block diagram of the push-pull amplifier used for the power supply circuit which concerns on the 1st Embodiment of this invention. It is explanatory drawing which shows an example of the switch control signal in a 1st push pull amplifier, and the collector voltage and output waveform of a transistor accompanying it. It is explanatory drawing which shows the power conversion efficiency characteristic of a 1st push pull amplifier. 3 is a block diagram illustrating a configuration example of a DC voltage source circuit that supplies a DC voltage to a collector terminal of an NPN transistor 108. FIG. It is explanatory drawing which shows the example of the load efficiency characteristic of a DC voltage source. It is a block diagram of the push pull amplifier used for the power supply circuit which concerns on the 2nd Embodiment of this invention. It is explanatory drawing which shows the connection state of the switch control signal in the switch control signal conversion part 139. It is explanatory drawing which shows the power conversion efficiency of a 2nd push pull amplifier. It is a schematic block diagram of an EER type power amplifier. It is a block diagram which shows the example of the power supply circuit which operate | moves at high speed. It is explanatory drawing which shows the output waveform of a push pull amplifier. It is explanatory drawing which shows the power conversion efficiency characteristic of a class B amplifier. It is explanatory drawing which shows the example of the cumulative probability density distribution of the envelope signal in an OFDM signal.

Embodiments of the present invention will be described with reference to the drawings.
[Outline of the embodiment]
A power supply circuit according to an embodiment of the present invention includes a circuit unit in which a switch and a DC voltage source are connected in series to a push-pull amplifier, and a diode is connected in parallel to them, as a single circuit block. The block includes first and second power supply voltage generation circuits connected in series, and the first and second power supply voltage generation circuits are connected to the collector terminal of the NPN transistor and the collector terminal of the PNP transistor, respectively. The control unit controls the ON / OFF of the switch that connects the DC voltage sources of a plurality of blocks to the collector terminals of the NPN transistor or the PNP transistor according to the input signal level, thereby adjusting the collector voltage of the NPN transistor and the PNP transistor. Control according to the input signal level so that the collector voltage follows the output level. It can be, and allows operation close to saturation, even if the output level is low, is capable of improving the power conversion efficiency of the entire power supply circuit.

  The power supply circuit according to the embodiment of the present invention further includes a switch control signal converter in the power supply circuit, so that the loads of the DC voltage sources of a plurality of blocks constituting the power supply voltage generation circuit are substantially constant. In this way, the output destination of the switch control signal from the power supply voltage control means is converted and output, and the power conversion efficiency of the power supply circuit can be further improved.

[First Embodiment: FIG. 1]
The power supply circuit according to the first embodiment of the present invention includes a push-pull amplifier and a DC / DC converter, similarly to the conventional power supply circuit shown in FIG.
A power supply circuit according to a first embodiment of the present invention will be described with reference to FIG. FIG. 1 is a configuration diagram of a push-pull amplifier used in the power supply circuit according to the first embodiment of the present invention.
As shown in FIG. 1, the push-pull amplifier (first push-pull amplifier) used in the power supply circuit (first power supply circuit) according to the first embodiment of the present invention is the same as the conventional push-pull amplifier shown in FIG. As a portion similar to the push-pull amplifier, an input terminal 1, an output terminal 13, an operational amplifier 103, a resistor 104 constituting a bias circuit, a diode 105, a diode 106, a resistor 107, and a push-pull circuit are provided. An NPN transistor 108, a PNP transistor 109, a DC voltage source 110, and a DC voltage source 111 are provided.

As a characteristic part of the first push-pull amplifier, the switch control unit 138, the DC voltage source 136 connected to the collector of the NPN transistor 108 and the plurality of circuit blocks B1 to B4, and the DC connected to the collector of the PNP transistor 109 are used. A voltage source 137 and a plurality of circuit blocks B5 to B8 are provided.
The voltages of the DC voltage sources 136 and 137 are set to V0.

[Circuit Blocks B1 to B4]
The configuration of the circuit blocks B1 to B4 on the NPN transistor 108 side will be described.
Each of the circuit blocks B1 to B4 includes a DC voltage source (112 to 115), a switch (120 to 123), and a diode (128 to 131). In each block, the anode of the DC voltage source is connected to the anode of the diode. The negative side is connected to the negative side, and the positive side of the DC voltage source is connected to the cathode via a switch.

Furthermore, the anode of the diode 128 of the circuit block B1 is grounded, and the cathode is connected to the anode of the diode 129 of the circuit block B2. Similarly, the diodes 130 and 131 of the circuit blocks B3 and B4 are connected in series, and the cathode of the circuit block B4 is connected to the negative side of the series voltage source 136.
A circuit composed of circuit blocks B1 to B4 connected in series is referred to as a first power supply voltage generation circuit.

The switches 120 to 123 are controlled to be turned on / off by switch control signals C1 to C4 from a switch control unit 138, which will be described later, and the voltage of the DC voltage source of the circuit block in which the switch is turned on and the DC voltage source 136 are switched. The voltages are added, and a positive voltage with respect to the reference voltage is applied to the collector terminal of the NPN transistor 108.
That is, the DC voltage source selected by the switch and the DC voltage source 136 are connected in series.
The voltages of the DC voltage sources 112, 113, 114, and 115 of the circuit blocks B1 to B4 are V1, V2, V3, and V4.

[Circuit blocks B5 to B8]
Similarly, each of the circuit blocks B5 to B8 on the PNP transistor 109 side includes a DC voltage source (116 to 119), a switch (124 to 127), and a diode (132 to 135). The negative side of the DC voltage source is connected to the anode, and the positive side of the DC voltage source is connected to the cathode via a switch.

The cathode of the diode 132 of the circuit block B5 is grounded, and the anode is connected to the cathode of the diode 133 of the circuit block B6. Similarly, the diodes 134 and 135 of the circuit blocks B7 and B8 are connected in series, and the anode of the circuit block B8 is connected to the + side of the series voltage source 137.
A circuit composed of the circuit blocks B5 to B8 connected in series is defined as a second power supply voltage generation circuit.
The first power supply voltage generation circuit and the second power supply voltage generation circuit correspond to the variable power supply unit recited in the claims.

The switches 124 to 127 are controlled to be turned on / off by switch control signals C5 to C8 from a switch control unit 138, which will be described later, and the voltage of the DC voltage source of the circuit block in which the switch is turned on and the DC voltage source 137 The voltages are added, and a negative voltage with respect to the reference voltage is applied to the collector terminal of the NPN transistor 108.
That is, the DC voltage source selected by the switch and the DC voltage source 137 are connected in series.
The voltages of the DC voltage sources 116, 117, 118, and 119 of the circuit blocks B5 to B8 are V1, V2, V3, and V4.
The switch control signals C1 to C4 and C5 to C8 correspond to selection signals recited in the claims.

[Switch control unit 138]
Next, the switch control unit 138 that is a characteristic part of the first push-pull amplifier will be described.
Based on the signal (envelope signal) input from the input terminal 8, the switch control unit 138 sets the voltage applied to the collector terminal of the NPN transistor 108 to an appropriate value, and switches 120 of the circuit blocks B1 to B4. , 121, 122, 123 switch control signals C1, C2, C3, C4 for controlling on / off.

  Similarly, the switch control unit 138 sets the voltage applied to the collector terminal of the PNP transistor 109 to an appropriate value based on the envelope signal, so that the switches 124, 125, 126, and 127 of the circuit blocks B5 to B8. Switch control signals C5, C6, C7 and C8 for controlling on / off are output.

Specifically, the switch control unit 138 includes a control signal generation circuit that outputs each of the eight types of switch control signals as a high level (H level, on) or a low level (L level, off). Based on the input envelope signal, each switch control signal of H level or L level is output.
Each control signal generation circuit of the switch control unit 138 is configured by a comparator circuit, for example.

  As a result, in the first push-pull amplifier, a collector voltage corresponding to the power level of the input signal can be applied to the NPN transistor 108 and the PNP transistor 109, improving the power conversion efficiency of the push-pull amplifier and the entire power supply circuit. It is possible to improve the efficiency.

[Operation of First Push-Pull Amplifier: FIG. 1]
First, the operation of the circuit blocks B1 to B4 and B5 to B8 will be briefly described.
In each of the circuit blocks B1 to B4 and B5 to B8, the anode terminal of the diode is connected to the negative side of the DC voltage source, and the cathode terminal is connected to the positive side of the DC voltage source. By connecting such circuit blocks B1 to B4 and B5 to B8 in series and controlling on / off of each switch, the voltages can be added and applied to the collector terminals of the NPN transistor 108 and the PNP transistor 109. It becomes possible.

When the switch is ON, the voltage of the DC voltage source of the circuit block is added, the current flows through the DC voltage source, and the circuit operates. At this time, no current flows because the diode has a reverse voltage in the forward direction.
When the switch is off, the circuit of the DC voltage source of the circuit block is open, so that no voltage is added, but current flows through the diode and the circuit operates.

In the first push-pull amplifier, the switch control unit 138 switches the switch control signals C1 to C8 to the H level or the L level according to the envelope signal input from the input terminal 8 and outputs the corresponding signal. Controls on / off of the switch of the circuit block.
Thus, a collector voltage that is positive with respect to the reference voltage is applied to the NPN transistor 108 and a collector voltage that is negative with respect to the reference voltage is applied to the PNP transistor 109 according to the input power level.

[Switch control signal and collector voltage of transistor: Fig. 2]
Next, the relationship between the switch control signal and the transistor collector voltage in the first push-pull amplifier will be described with reference to FIG. FIG. 2 is an explanatory diagram showing an example of the switch control signal in the first push-pull amplifier, and the accompanying collector voltage and output waveform of the transistor.
FIG. 2A shows an example of the switch control signals C1 to C8. For each of the switch control signals C1 to C8, whether each control signal is in a state of turning on the switch (H level), Alternatively, it indicates whether the switch is turned off (L level).

In the example of FIG. 2A, the switch control signal C1 is at the L level until the time T1, is at the H level during the time T1 to T8, and is at the L level again after the time T8.
The switch control signal C8 is at the L level until the time T12, is at the H level during the time T12 to T13, and is at the L level after the time T13.

  In FIG. 2B, the collector voltage (node A voltage) of the NPN transistor 108, the collector voltage (node B voltage) of the PNP transistor 109, and the output when the switch control signals C1 to C8 of FIG. The voltage waveform is shown. For example, zero (0) is used as the reference voltage.

As described above, in the first push-pull amplifier, when the switch control signals C1 to C8 are at the H level, the corresponding switches 120 to 127 are turned on.
In FIG. 2, first, the description will be given focusing on the node A voltage.
Since the switch control signals C1 to C4 are all at L level during the time from 0 to T1, all the switches 120 to 123 are off.
Therefore, the current does not flow through the DC voltage sources 112 to 115 but flows through the diodes 128 to 131, and the voltage V 0 of the DC voltage source 136 is applied to the node A.
In this embodiment, the forward voltage of the diodes 128 to 135 is assumed to be zero.

Subsequently, only the switch control signal C1 is at the H level and the other switch control signals C2 to C4 are at the L level during the period from the time T1 to the time T2, so that only the switch 120 is turned on.
Since the DC voltage source 112 and the DC voltage source 136 corresponding to the switch 120 are connected in series, the voltage at the node A is V0 + V1.
That is, the voltage of the DC voltage source of the circuit block in which the switch is turned on is added to the voltage V0 of the DC voltage source 136, and the added voltage is applied to the node A.

  Similarly, when the switch control signals C2, C3, and C4 become H level at times T2, T3, and T4, respectively, the switches 121, 122, and 123 are turned on accordingly. Voltages V2, V3, and V4 are added.

  Further, at time T5, T6, T7, T8, when the switch control signals C4, C3, C2, C1 become L level and the switches 123, 122, 121, 120 are turned off, the voltage at the node A is as shown in FIG. Thus, the voltages V4, V3, V2, and V1 are subtracted.

  Similarly to the node A, the voltage at the node B changes as shown in FIG. 2 when the switches 124 to 127 controlled by the switch control signals C5 to C8 are turned on or off. The voltage of the node B that changes during the period of time T9 to T16 is opposite to the voltage of the node A during the time T1 to T8.

[Operation of Switch Control Unit 138: FIGS. 1 and 2]
Next, the operation of the switch control unit 138 will be described with reference to FIGS.
As described above, the switch control unit 138 outputs the switch control signals C1 to C8 as the H level or the L level based on the envelope signal detected from the input signal.
As a result, the switch control signals C1 to C4 for controlling the switches 120 to 123 for controlling the voltage at the node A change when the output waveform is positive.

The switch control unit 138 sets the switch control signal C1 to the H level when the voltage of the output waveform is higher than V0 based on the input envelope signal.
The switch control unit 138 sets the switch control signal C2 to H level when the voltage of the output waveform is larger than V0 + V1, and sets the switch control signal C3 to H level when the voltage of the output waveform is larger than V0 + V1 + V2. The signal C4 is set to H level when the voltage of the output waveform is higher than V0 + V1 + V2 + V3.
Under other conditions, the switch control unit 138 sets the switch control signals C1 to C4 to the L level.

Similarly, switch control signals C5 to C8 for controlling switches 124 to 127 for controlling the voltage at node B change when the output waveform is negative.
Based on the input envelope signal, the switch control unit 138 sets the switch control signal C5 to the H level when the voltage of the output waveform is smaller than −V0, and the switch control signal C6 has the voltage of the output waveform of −V0. When the voltage is lower than −V1, the switch control signal C7 is set to H level when the output waveform voltage is lower than −V0−V1−V2, and the switch control signal C8 is set to the output waveform voltage −V0−V1. Set to H level when smaller than -V2-V3.
Under other conditions, the switch control unit 138 sets the switch control signals C5 to C8 to the L level.

  The switch control unit 138 is configured such that the switch control signals C1 to C8 operate under such conditions, and can be easily realized using a comparator circuit. This comparator circuit may have hysteresis characteristics.

  As shown in FIG. 1, in the first push-pull amplifier, the switch control unit 138 generates the switch control signals C1 to C8 from the envelope signal input from the input terminal 8, and therefore the output level relative to the input level. Designed for gain.

Further, the voltages V0, V1, V2, V3, and V4 may have the same voltage value or different voltage values.
Furthermore, although the voltage of the node A and the voltage of the node B are each configured to change in five stages here, any number of stages may be used.
Furthermore, in the first push-pull amplifier, the level (H or L) of each switch control signal is compared by comparing the output waveform with the threshold value obtained by adding or subtracting V0, V1, V2, V3, and V4. It is not necessary to do so.

[Efficiency of first push-pull amplifier: FIG. 3]
Next, the efficiency of the first push-pull amplifier will be described with reference to FIG. FIG. 3 is an explanatory diagram showing power conversion efficiency characteristics of the first push-pull amplifier.
As described above, in the first push-pull amplifier, the NPN transistor 108 collector terminal (node A voltage) and the collector terminal (node B) voltage of the PNP transistor 109 change according to the output waveform.

  In other words, when the output waveform is small, the first push-pull amplifier always operates in a state close to the saturation output by controlling the voltages of the node A and the node B so that the absolute value of the collector terminal voltage is also small.

Therefore, as shown in FIG. 3, the power conversion efficiency of the first push-pull amplifier is improved as compared with the conventional method shown in FIG. In particular, the efficiency improvement is significant at an output lower than the saturated output.
For example, the power conversion efficiency at the backoff of −8 dB corresponding to the OFDM signal is 30% in the conventional push-pull amplifier of FIG. 12, but is improved to 55% in the first push-pull amplifier. .

[Configuration of DC voltage source circuit: FIG. 4]
Next, the configuration of a DC voltage source circuit that supplies a DC voltage to the collector terminal of the NPN transistor 108 or PNP transistor 109 will be described with reference to FIG. FIG. 4 is a block diagram illustrating a configuration example of a DC voltage source circuit that supplies a DC voltage to the collector terminal of the NPN transistor 108. Note that portions corresponding to the direct currents 112 to 115 shown in FIG.
Although only the DC voltage source circuit on the NPN transistor 108 side will be described here, the DC voltage source circuit on the PNP transistor 109 side has the same configuration.

  As shown in FIG. 1, the DC voltage sources 112 to 115 and the DC voltage source 136, and the DC voltage sources 119 to 123 and the DC voltage source 137 are connected in series when the switches 120 to 123 and the switches 124 to 127 are turned on. Since it is connected, it is necessary to use an insulated power supply.

  As shown in FIG. 4, the DC voltage source circuit of the first push-pull amplifier includes an input terminal 201 that supplies power, a smoothing circuit 202 that smoothes the power supply voltage supplied from the input terminal 201, and a switch circuit 203. A transformer 204 for insulating the input from the plurality of outputs, rectifying / smoothing circuits 205 to 208 for rectifying and smoothing the output voltage, an error amplifier 209 for detecting an error between the target output voltage, and error information A photocoupler 210 that insulates when passing to the control circuit, a control circuit 211 for controlling the target output voltage by minimizing error information, and a driver circuit 212 for driving the switch circuit 203 I have.

The operation of the DC voltage source circuit having the above configuration will be described.
When the voltage Vin is input from the input terminal 201, the voltage Vin is smoothed by the smoothing circuit 202 and input to the input side of the transformer 204 via the switch circuit 203.
On the output side of the transformer 204, a coil having a number of turns corresponding to the voltage value of each of the DC voltage sources 112 to 115 is provided, and the voltage converted according to the number of turns is passed through the rectifying and smoothing circuits 205 to 208, respectively. It becomes the output voltage of the DC voltage sources 112-115.

The voltages of the DC voltage sources 112 to 115 are V1 to V4, and control is performed so that the DC voltage source 115 becomes the target voltage V4.
Specifically, the DC voltage source 115 is monitored, and an error signal, which is a difference between the voltage of the DC voltage source 115 detected by the error amplifier 209 and the target voltage, is input to the control circuit 211 via the photocoupler 210, and control is performed. The circuit 211 controls the target voltage V4 by changing the duty ratio of the signal for turning on / off the switch circuit 203 so that the error signal becomes small.

  The DC voltage sources 112, 113, and 114 are not monitored, but when the voltage of the DC voltage source 115 becomes V4, the transformer is set so that the voltages of the DC voltage sources 112, 113, and 114 become V1, V2, and V3. The number of windings of 204 may be designed.

[Effect of the first embodiment]
According to the power supply circuit of the first embodiment of the present invention, a circuit unit in which a switch and a DC voltage source are connected in series to a push-pull amplifier, and a diode is connected in parallel to the switch is provided as one circuit block. A first power supply voltage generation circuit in which a plurality of circuit blocks B1 to B4 are connected in series, and a second power supply voltage generation circuit in which a plurality of circuit blocks B5 to B8 are connected in series. Is connected to the collector terminal of the NPN transistor 108, the second power supply voltage generating circuit is connected to the collector terminal of the PNP transistor 109, and the switch control unit receives an input signal from the envelope detector 3. The switch control signals C1 to C8 for controlling on / off of the switches 120 to 127 of the plurality of circuit blocks B1 to B8 are output according to the envelope signal of Therefore, the collector voltages of the NPN transistor 108 and the PNP transistor 109 are controlled so as to follow the output signal level according to the input signal level, and an operation close to saturation is always possible, and the output level of the push-pull amplifier is When the power conversion efficiency is low, the power conversion efficiency can be improved and the power conversion efficiency of the entire power supply circuit can be improved.

  Furthermore, by using the first power supply circuit in, for example, an EER amplifier, the efficiency of the entire amplifier can be improved, power consumption can be reduced, and the radiating fins can be made smaller, so that the size and weight can be reduced. effective.

  In the above example, the DC voltage sources 136 and 137 are configured to be constantly applied to the nodes A and B. However, a switch and a diode are added to form a circuit block, which is the same as other DC voltage sources. May be switched on / off.

[Second Embodiment]
Next, a second embodiment of the present invention will be described.
[Load of each DC voltage source]
Here, consider each load of the DC voltage sources 112 to 115 shown in FIG.
In FIG. 1, when the switches 120 to 123 are on, power is supplied from the DC voltage sources 112 to 115. The probability that the switches 120 to 123 are turned on depends on the frequency distribution of the amplitude detected by the signal input to the input terminal 8 of the power supply circuit shown in FIG. 10, that is, the envelope detector 3 shown in FIG.

The probability density function of W-CDMA and OFDM signals is known to be close to the Rayleigh distribution, which means that there is a difference in the probability that the switches 120 to 123 are turned on.
That is, there is a difference in the loads of the DC voltage sources 112 to 115.

[Load efficiency characteristics of DC voltage source: Fig. 5]
Next, load efficiency characteristics of the DC voltage source will be described with reference to FIG. FIG. 5 is an explanatory diagram illustrating an example of load efficiency characteristics of a DC voltage source.
In FIG. 5, the horizontal axis represents the load factor (%), and the vertical axis represents the efficiency (%).
In a DC voltage source, it is ideal that the efficiency does not change even if the load changes, and is constant, but in reality, there is a load where the efficiency is maximum, and the efficiency is lowered at a load lower or higher.

In the example of FIG. 5, a, b, c, and d indicate the load factors of different DC voltage sources (1), (2), (3), and (4), respectively, and the power conversion efficiency (efficiency) at this time Are A, B, C, and D, respectively.
In other words, the DC voltage source (3) has a high efficiency C with a load factor c, and it can be said that the DC voltage source (3) is an appropriate load, but the DC voltage source (1) Has a load factor a and the efficiency is A, which is out of the optimum load.
If the DC voltage source having such characteristics is used with different loads, the efficiency is lowered.

[Configuration of Second Embodiment: FIG. 6]
Therefore, in the power supply circuit according to the second embodiment of the present invention, the plurality of DC voltage reduction loads of the push-pull amplifier are controlled to be as constant as possible, and the maximum efficiency can be obtained at the load. A DC voltage source is designed.
Similar to the first power supply circuit, the power supply circuit according to the second embodiment of the present invention includes a push-pull amplifier and a DC / DC converter.
FIG. 6 is a configuration diagram of a push-pull amplifier used in the power supply circuit according to the second embodiment of the present invention.
As shown in FIG. 6, the basic configuration of the push-pull amplifier (second push-pull amplifier) used in the power circuit (second power circuit) according to the second embodiment of the present invention is as shown in FIG. 1 is the same as the first push-pull amplifier shown in FIG.

The second push-pull amplifier is characterized in that a switch control signal converter 139 is newly provided at the output stage of the switch controller 138 of the first push-pull amplifier.
The switch control signal conversion unit 139 does not output the switch control signals C1 to C8 output from the switch control unit 138 to a specific switch, but the loads of the DC voltage sources 112 to 119 become constant. In this way, the switch at the connection destination is converted and output.
In the second push-pull amplifier, the control signal input terminals of the switches 112 to 119 are CC1 to CC8.
The switch control signal conversion unit 139 corresponds to the power source selection destination conversion unit recited in the claims.

Before describing the configuration and operation of the switch control signal converter 139, a control method in the switch control signal converter 139 of the second push-pull amplifier will be briefly described.
In the example of FIG. 2, the switch control signals C1, C2, C3, and C4 are turned on (H level) in order as the voltage of the output waveform increases, and conversely in the order of C4, C3, C2, and C1 as the voltage decreases. Turns off (L level). In this control method, the period in which C1 is on is long, but the period in which C4 is on is short. Therefore, although the load of the DC voltage source 112 is large, the load of the DC voltage source 115 is small, and the load varies.

  By the way, in the first and second push-pull amplifiers, how many of the switches 120 to 123 of the circuit blocks B1 to B4 connected in series or the switches 124 to 127 of the circuit blocks B5 to B8 are turned on. Can control the voltages of the node A and the node B, and does not necessarily need to be controlled in the order of the switch control signals C1, C2, C3, and C4 as shown in FIG.

For example, when the voltage of the node A is set to V0 + V1, any one of the DC voltage sources 112 to 115 of the circuit blocks B1 to B4 may be connected to the DC voltage source 136, so that the switch control signals C1 to C4 Any one of them may be on.
Therefore, in the switch control signal conversion unit 139 of the second push-pull amplifier, the switch control signal C1 is set so that the loads of the DC voltage sources 112 to 115 and 116 to 119, that is, the power supplied from the DC voltage sources are constant. The connection destination (output destination) of .about.C8 is converted.

[Configuration of Switch Control Signal Conversion Unit 139]
The configuration of the switch control signal conversion unit 139 will be described.
The switch control signal conversion unit 139 mainly includes a switch circuit and a control unit that controls the switch circuit.
The switch circuit connects the switch control signals C1 to C4 output from the switch control unit 138 to any of the switches 120 to 123 (CC1 to CC4) of the circuit blocks B1 to B4, respectively, and the switch control signals C5 to C8. Are connected to any of the switches 124 to 127 (CC5 to C8) of the circuit blocks B5 to B8, respectively, and are connected in accordance with instructions from the control unit.

The control unit is configured by a microcomputer or the like, converts the connection destination of the switch control signal by a set conversion method, switches the switch circuit, and connects to the switches 120 to 127 of a predetermined circuit block.
The control unit includes a storage unit and a timer.

[Switch control signal connection state: FIG. 7]
Next, the connection state of the switch control signal in the switch control signal conversion unit 139 will be described with reference to FIG. FIG. 7 is an explanatory diagram showing a connection state of the switch control signal in the switch control signal conversion unit 139.
FIG. 7A shows a state in which C1 and CC1, C2 and CC2, C3 and CC3, and C4 and CC4 are connected. This is the same as the case where the switch control signal conversion unit 139 is not provided.
(B) is a state where the connection destinations are shifted one by one from the state of (a), (c) is a state where the connection destinations are shifted one by one from (b), and (d) is one by one from (c). The state where the connection destination is shifted is shown.

The switch control signal converter 139 selects the states (a), (b), (c), and (d) according to the control method as shown below so that the loads of the DC voltage sources 112 to 115 are constant. Then, the switch to which the switch control signal is connected is converted.
Although only the NPN transistor 108 side is shown here, the same applies to the PNP transistor 109 side, and the switch control signals C5 to C8 and the connection destinations CC5 to CC8 are set so that the loads of the DC voltage sources 116 to 119 are constant. Are switched by appropriately switching the association.

[Control Method in Switch Control Signal Conversion Unit 139]
Next, a first control method to a third control method will be described as control examples in the switch control signal converter.
[First control method]
The first control method includes a timer for the control unit to measure a fixed time, determines the order of switching the connection states in FIGS. 6A to 6D, and starts the timer when switching to a certain connection state. When the time is up, the connection destination is switched so that the next connection state is established.

For example, control is performed so that each connection state has a fixed time in the order of (a) → (b) → (c) → (d). After the last state (state (d)), the process returns to the first state (state (a)).
The order of connection states can be arbitrarily set.
In this way, the first control method is performed.

[Second control method]
The second control method includes a timer as in the first control method, and switches the connection normal state at regular intervals. However, instead of setting the order of the connection states in advance, it is time to switch. In addition, the connection state is switched to a connection state randomly selected from the states (a) to (d).
That is, the control unit includes a selection unit that randomly selects one from the states (a) to (d), and when the predetermined time elapses from the initial connection state, the selection unit is selected from (a) to (d). One state is randomly selected from the inside, and the switch circuit is switched so as to be in the state.
In this way, the second control method is performed.

[Third control method]
In the third control method, the control unit monitors where the switch control signals C1 to C4 are connected, and the switches 120 (CC1) to 123 (CC4) on the circuit block side are turned on at regular intervals. The monitoring part which measures and memorize | stores the time when it became is provided.
The monitoring unit measures and stores the connection destination of each switch control signal and the time when CC1 to CC4 are turned on from the initial state.

Then, when the timer expires and the switching timing is reached, the control unit rearranges the switches in the order of the long ON time, and assigns the switch control signal with the shortest ON state to the switch with the longest ON state. The switch with the second longest ON state is assigned to the switch with the second longest ON state, and the switch control signal with the third shortest ON state is assigned to the switch with the third long ON state. The switch control signal having the longest ON state is assigned to the switch having the shortest ON state.
Thereby, the time when each DC voltage source is turned on can be averaged.
In this way, the third control method is performed.

Then, the switch control signal conversion unit 139 switches the connection destination of the switch control signals C1 to C4 from the switch control unit 138 by any one of the first to third control methods, whereby the load of the DC voltage sources 112 to 115 is changed. The power conversion efficiency of the push-pull amplifier can be improved.
Further, by switching the connection destinations of the switch control signals C5 to C8 in the same manner, the average value of the loads of the DC voltage sources 116 to 119 can be made substantially constant, and the power conversion efficiency of the push-pull amplifier can be improved. is there.

[Power conversion efficiency of second push-pull amplifier: FIG. 8]
Next, the power conversion efficiency of the second push-pull amplifier will be described with reference to FIG. FIG. 8 is an explanatory diagram showing the power conversion efficiency of the second push-pull amplifier.
As shown in FIG. 8, in the second push-pull amplifier, the load factors of the DC voltage sources 112 to 115 and 116 to 119 are controlled to be constant at x (%), and the power at the load factor x (%) is controlled. A high power conversion efficiency X (%) can be obtained by designing the circuit of the DC voltage source so as to maximize the conversion efficiency.

[Effect of the second embodiment]
According to the power supply circuit according to the second embodiment of the present invention, the switch control signal conversion unit 139 is provided at the output stage of the switch control unit 138 of the first power supply circuit, and the switch control signal conversion unit 139 includes the switch control. The switch control signals C1 to C4 output from the unit 138 are distributed and connected to any of the switches 120 to 123 so that the loads of the DC voltage sources 112 to 115 of the circuit blocks B1 to B4 are equal, and switch control is performed. Since the signals C5 to C8 are distributed and connected to any one of the switches 124 to 127 so that the loads of the DC voltage sources 116 to 119 of the circuit blocks B5 to B8 are equal, the DC voltage sources 112 to 115 are connected. , 116 to 119 are almost constant, suppressing variations in the load of the DC voltage source and reducing the power of the push-pull amplifier. Can improve the conversion efficiency further, there is an effect that it is possible to improve the power conversion efficiency of the entire power supply circuit.

  INDUSTRIAL APPLICABILITY The present invention is used in a power amplifier of a transmitter that performs wireless communication with a broadband high-frequency signal, and is suitable for a power supply circuit that can improve power conversion efficiency.

  8 ... Input terminal, 2 ... Distributor, 3 ... Envelope detector, 4 ... Power supply circuit, 5 ... RF limit amplifier, 6 ... Main amplifier, 7,13 .. Output terminal 9 ... Push-pull amplifier 10 ... Current detector 11 ... Hysteresis comparator 12 ... DC / DC converter 31 ... Voltage power supply 32 ... Switch element 33, 105, 106 ... diode, 34 ... inductance, 103 ... operational amplifier, 104, 107 ... resistor, 108 ... NPN transistor, 109 ... PNP transistor, 110, 111, 136 , 137, 112, 113, 114, 115, 116, 117, 118, 119 ... DC voltage source, 120, 121, 122, 123, 124, 125, 126, 127 ... switch, 128, 129, 130 , 131, 132, 133 134 and 135 ... diode, 138 ... switch control unit, 139 ... switch control signal converting unit

Claims (1)

A power supply circuit used for a power amplifier,
A push-pull amplifier for amplifying an input signal by a push-pull amplification method;
A variable power supply unit that varies a voltage level of a power supply voltage provided to the push-pull amplification unit by a control signal by selecting and connecting a plurality of power supplies;
As the control signal, a control unit that outputs a selection signal for selecting the plurality of power supplies in order to control a voltage level of a power supply voltage based on the input signal;
A power supply circuit comprising: a power source selection destination conversion unit that changes a power source selection destination according to the selection signal so that loads of a plurality of power sources in the variable power source unit are constant.

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