JP2013055405A - Class f amplification circuit and transmission device using the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To implement high frequency processing depending on each base frequency even if a plurality of input signals of different fundamental frequencies are input.SOLUTION: A class F amplification circuit includes: a class F amplifier for class-F-amplifying a plurality of signals of different base angular frequencies to output a signal containing signal components of the base angular frequencies and signal components of harmonics; a harmonic processing section disposed downstream of the class F amplifier, and capturing and circuit-setting an impedance of a parasitic circuit parasitic on the class F amplifier to provide a short circuit state for DC components of the signal and signal components of even order harmonics and an open circuit state for signal components of odd order harmonics; and a short-circuiting section disposed downstream of the harmonic processing section to provide a short circuit state for signal components of harmonics.

Description

  The present invention relates to a class F amplifier circuit that amplifies a plurality of input signals having different fundamental wave frequencies, and a transmitter using the same.

  In a mobile base station, there is a case where a microwave is amplified by power and transmitted. As types of power amplifiers used for microwave power amplification, class A amplifiers, class AB amplifiers, and the like are known depending on the difference in the DC gate bias to the amplification elements. However, since a large power is consumed in the class AB amplifier circuit using this class AB amplifier, improvement is desired from the viewpoint of practical use and energy saving. As amplifier circuits with high power conversion efficiency, class F amplifiers, inverse class F amplifiers, and the like are known.

  In order to reduce power consumption in the class F amplifier circuit, it is necessary to perform impedance matching so that the even harmonic signal is short-circuited and the odd harmonic signal is open. It is. Hereinafter, such impedance matching is referred to as a class F impedance condition.

Thus, for example, Patent Document 1 discloses an output transistor having a fundamental angular frequency ω ₀ and its harmonic component, and a first reactance two-terminal circuit interposed between an input node and an output node of a load circuit. , A class F amplifier circuit including a second reactance two-terminal circuit interposed between an output node and a ground terminal is disclosed. The first terminal reactance circuit, the angular frequency 3 [omega] _0, 5 [omega] _0, ~, will open at (2m + 1) ω _{0, and, 2ω 0, 4ω 0, ~} , shorted at 2nω _0. Note that n is a natural number of 1 or more, and m is 1 when n is 1 and 1 is n or n-1 when n is 2 or more. The second reactance two-terminal circuit is short-circuited at the angular frequencies 2ω ₀ , 4ω ₀ ,..., 2nω ₀ . As a result, power consumption is reduced.

  However, in the class F amplifier circuit according to Patent Document 1, an ideal circuit is assumed in which there is no parasitic shunt capacitance or parasitic series inductance at the output terminal of the output transistor that is an amplifier. However, in an actual amplifier, a parasitic shunt capacitance (hereinafter simply referred to as a parasitic capacitance) and a parasitic series inductance (hereinafter simply referred to as a parasitic inductance) are present at the output terminal. There was a problem that the power consumption could not be sufficiently reduced due to the deviation.

  On the other hand, in Patent Document 2, a harmonic processing circuit having an n-stage (n = 1, 2, 3,...) Ladder type circuit is provided at a subsequent stage of a transistor as an amplifier, and a subsequent stage of the harmonic processing circuit. 1 discloses an amplifying circuit provided with a resonance circuit unit having 2n + 1 resonators having different resonance frequencies. The resonance frequency of 2n + 1 resonators is the frequency of n + 1 poles and n zeros formed between the drain output part of the transistor and the ground plane when the output part of the harmonic processing circuit is short-circuited. To match each. Among the 2n + 1 resonators, the resonance frequency of the 2n resonators is matched with the frequency of the 2nd to 2n + 1 order harmonics. As a result, even when a transistor having parasitic capacitance or parasitic inductance is used, the F-class impedance condition is satisfied.

JP 2005-117200 A JP 2011-055152 A

  However, since the high-frequency processing techniques disclosed in Patent Document 1 and Patent Document 2 are intended only for signals of a single frequency, the F-class impedance condition is applied to signals of a plurality of frequencies (multiband). There was a problem that could not be met. For example, in order to be able to use for different frequency bands depending on the communication standard in which LTE / IMT-2000 and the like required for recent mobile communication are mixed, each class F signal High-frequency processing that satisfies the impedance condition is required.

  Therefore, the configuration according to Patent Document 1 and Patent Document 2 in which high-frequency processing is performed only on a single frequency cannot meet this requirement.

  Therefore, a main object of the present invention is to provide a class F amplifier circuit capable of performing high frequency processing corresponding to each fundamental frequency even when a plurality of input signals having different fundamental frequency are input, and a transmitter using the same. is there.

  In order to solve the above-described problem, an invention relating to a class F amplifier circuit performs class F amplification on a plurality of signals having different fundamental angular frequencies, and obtains a signal including a signal component of the fundamental angular frequency and a harmonic signal component thereof. An output class F amplifier, and a circuit component that is provided after the class F amplifier and takes in impedance in a parasitic circuit parasitic to the class F amplifier, thereby setting the DC component of the signal and the signal component of the even-order harmonics Is placed in a short-circuited state, and the harmonic processing unit is opened for the odd-order harmonic signal component, and the harmonic processing unit is provided in the subsequent stage, and is short-circuited for the harmonic signal component. And a short-circuit portion to be put into a state.

  The invention according to the transmission device includes the class F amplifier circuit and an antenna unit that outputs a signal from the class F amplifier circuit.

  According to the present invention, even when a plurality of input signals having different fundamental wave frequencies are input, harmonic processing can be performed on signal components of those harmonics.

It is a block diagram of the transmitter concerning the 1st Embodiment of the present invention. It is a block diagram of the class F load circuit concerning a 1st embodiment. It is the figure which showed the specific circuit example of the class F load circuit concerning 1st Embodiment. It is a figure which shows the specific circuit example of the class F load circuit which took out and showed the parasitic circuit and harmonic processing part of the class F amplifier concerning 1st Embodiment. It is a figure which shows the frequency characteristic of the impedance of the class F load circuit shown in FIG. It is a circuit diagram at the time of forming the harmonic processing part concerning 1st Embodiment with LC ladder, and forming the termination | terminus part with (lambda) / 4 open line corresponding to each harmonic. It is a figure which shows the frequency characteristic of the impedance of the class F load circuit shown in FIG. It is a block diagram at the time of forming the short circuit part concerning 2nd Embodiment of this invention by the CRLH short circuit line.

<First Embodiment>
Next, embodiments of the present invention will be described in detail with reference to the drawings. FIG. 1 is a block diagram of a transmission apparatus 2 according to the first embodiment of the present invention.

  The transmission apparatus 2 includes a signal generation circuit 11 including signal generators 11a to 11n, a matching circuit 12 including matching units 12a to 12n, a switch circuit 13 including switches 13a to 13n, a control circuit 14, a class F amplifier 15, and a class F. An antenna unit 17 including a load circuit 20 and antennas 17a to 17n is included. Note that n is a positive integer equal to or greater than 2, and corresponds to the number of frequencies that the transmission device 2 performs high-frequency processing. The class F amplifier 15 and the class F load circuit 20 form a class F amplifier circuit 10.

The signal generators 11a to 11n generate and output signals having frequencies f ₀ , f ₁ ,..., F _n , respectively. Hereinafter, this frequency is referred to as a fundamental frequency, and an angular frequency corresponding to this fundamental frequency is referred to as a fundamental angular frequency. As such a basic frequency, in a frequency used for a mobile phone of LTE (Long Term Evolution) standard, 791 to 821 MHz used in a frequency band used in Europe, and 2.11 GHz used in a frequency band used in Japan. Examples include a frequency of 2.17 GHz.

  The matching units 12a to 12n are provided corresponding to the number of input signals having different fundamental frequencies output from the signal generation circuit 11, and perform impedance matching corresponding to the input signals.

  The switches 13a to 13n are provided corresponding to the number of signals having different fundamental frequencies output from the matching units 12a to 12n, and operate based on a selection signal from the control circuit 14 described later.

  The control circuit 14 outputs a selection signal to the switch circuit 13 so as to select one signal among a plurality of signals having different fundamental frequencies based on the frequency information. This selection signal is a signal that turns on one of the plurality of switches 13a to 13n and turns off the other switches. The frequency information is preset frequency information or information instructed from the outside. Examples of the preset frequency information include registration information in a case where the fundamental frequency in the environment transmitted by the transmission device according to the present invention is registered when the transmission device is installed. Further, the information instructed from the outside can be exemplified by a case in which a fundamental frequency to be transmitted is instructed from a higher-level control device. Thereby, the switch circuit 13 selects and outputs the signals from the matching units 12a to 12n designated by the selection signal.

  The present invention is to provide a class F amplifier circuit that satisfies a class F impedance condition for input signals having a plurality of fundamental frequencies and a transmission device using the class F amplifier circuit. I will add that I am not restricted by the circuit provided before the class amplifier circuit.

  The class F amplifier 15 amplifies the input signal by class F and outputs it. Examples of the class F amplifier 15 include a field effect transistor (FET) such as a HEMT (High Electron Mobility Transistor), an HBT (Heterojunction Bipolar Transistor), and the like. At this time, the signal output from the class F amplifier 15 includes a signal component of the fundamental frequency and a signal component of its harmonics.

  The class F load circuit 20 performs matching processing (harmonic processing) such as impedance including parasitic components in the class F amplifier 15 according to the fundamental frequency of the signal from the class F amplifier 15. That is, at least the second and third harmonic signals of the input signal are obtained by the combined impedance of the impedance of the class F load circuit 20 and the impedance including the parasitic drain-source shunt capacitance of the class F amplifier 15 and the parasitic drain series inductor. The component is configured so that the F-class impedance condition is satisfied.

  In the class F amplifier circuit 10, the condition that the short circuit state is provided for even-order harmonics and the open state is provided for odd-order harmonics is the class F impedance condition defined above.

The antennas 17a to 17n are provided corresponding to each fundamental frequency. Thus, for example, the signal of the fundamental frequency _{f 0} is output from the antenna 17a, the signal of the fundamental frequency _{f 1} is outputted from the antenna 17b.

  Next, the detailed configuration of the class F amplifier circuit 10 will be described with reference to FIG. FIG. 2 is a block diagram of the class F load circuit 20. In FIG. 2, an equivalent circuit of the class F amplifier 15 and an equivalent circuit of the antenna unit 17 are also illustrated.

  The equivalent circuit of the class F amplifier 15 includes an equivalent output current source 15a, a drain-source parasitic capacitance 15b generated between the drain output terminal and the source terminal of the class F amplifier 15, and a parasitic inductor 15c generated at the drain output terminal. Contains. The parasitic capacitance 15b and the parasitic inductor 15c constitute a parasitic circuit 15d.

  The class F load circuit 20 includes a harmonic processing unit 21 connected to the output terminal of the class F amplifier 15, a short circuit unit 22A shunt connected to the output terminal of the harmonic processing unit 21, and an impedance with respect to an input signal having a fundamental frequency. A fundamental wave matching unit 23 for matching is provided.

  The signal from the class F amplifier 15 includes a fundamental frequency signal component and a harmonic signal component thereof. The parasitic circuit 15d causes a phase shift in the signal at the drain output terminal node. At this time, the phase at the drain output terminal of a large number of harmonic signal components is shifted by the parasitic circuit.

  Therefore, in the harmonic processing unit 21 that sets the impedance condition of the harmonic when the antenna (load) 17 side is viewed from the equivalent output current source 15a to the open state or the short-circuit state, the presence of these parasitic circuits is taken into consideration. It is necessary to form a circuit so as to satisfy the impedance condition of the class. Hereinafter, the antenna 17 is referred to as a load 17 as appropriate.

  FIG. 3 is a diagram illustrating a specific circuit configuration example of the class F load circuit 20. In FIG. 3, an equivalent circuit of the class F amplifier 15 and an equivalent circuit of the antenna unit 17 are also shown. The class F load circuit 20 receives two fundamental frequency signals and harmonic signal components thereof, and performs harmonic processing on these signals.

The harmonic processing unit 21 includes a first inductor 21a, a second inductor 21b, and a third inductor 21c having inductances L ₀ , L ₁ , and L ₂ , respectively, and first capacitors having capacitances C ₁ and C ₂ , respectively. A capacitor 21d and a second capacitor 21e are provided.

  Accordingly, the parasitic circuit 15d formed by the parasitic capacitance 15b and the parasitic inductor 15c in the class F amplifier 15, the first to third inductors 21a to 21c of the harmonic processing unit 21, the first and second capacitors 21d and 21e. Thus, a three-stage LC ladder type circuit is formed.

  Further, the short-circuit portion 22A includes λ / 4-length open stubs (open lines) 22a to 22d for the signal components of the second and third harmonics of the two fundamental frequency signals. Note that λ is the wavelength of the signal having the fundamental frequency. Therefore, two wavelengths such as λ1 and λ2 are defined for signals of two fundamental frequencies. For example, the open stub 22a functions as a short-circuited end for the signal component of the second harmonic of the signal of wavelength λ1, and the open stub 22b functions as a short-circuited end for the signal component of the third harmonic. . Similarly, the open stub 22c functions as a short-circuited end for the signal component of the second harmonic of the signal of wavelength λ2, and the open stub 22d functions as a short-circuited end for the signal component of the third harmonic.

  The fundamental wave matching unit 23 includes matching units 23a and 23b provided corresponding to signals of two fundamental frequencies. Each of the matching units 23a and 23b is an LC parallel circuit formed so that a fundamental frequency signal resonates, and outputs only one signal. As a result, two types of fundamental frequency signals are input to the matching units 23a and 23b of the fundamental wave matching unit 23, but only one fundamental frequency signal can pass through each matching unit 23a and 23b. . For this reason, each matching unit 23a, 23b outputs only a signal having a fundamental frequency corresponding to the circuit constant (resonance constant) of the matching unit 23a, 23b. From this, the fundamental wave matching unit 23 forms a 2-port output. By using two ports in this way, as shown in FIG. 1, the antenna unit 17 of the transmitting apparatus can be used when two signals having different fundamental frequencies are selectively output by including two antennas.

  In FIG. 3, for simplicity of explanation, the fundamental wave matching unit 23 is composed of only an LC resonance circuit corresponding to the fundamental frequency of the input signal, and corresponds to an optimum efficiency load impedance corresponding to each input frequency. A load 17 (17a, 17b) is used. The load 17 is usually set to a value of about 50Ω. For this reason, impedance matching is performed by adding a transmission line, a lumped constant element, or the like to the fundamental wave matching unit 23 as necessary.

  Hereinafter, the principle of impedance matching (the principle of harmonic processing) according to the present invention will be described starting from an ideal case (configuration shown in FIG. 4) in which the harmonic processing unit 21 is short-circuited for all frequencies. .

FIG. 4 is a diagram showing an ideal case where the parasitic circuit 15d of the class F amplifier 15 and the harmonic processing unit 21 are taken out and the output terminal of the harmonic processing unit 21 is short-circuited. In FIG. 4, let the fundamental frequencies of two input signals be ω ₀ and ω ₁ (ω ₀ <ω ₁ ). The class F amplifier 15 amplifies and outputs signals of two different fundamental frequencies ω ₀ and ω ₁ . At that time, the output signal includes a harmonic signal component.

At this time, it is assumed that the relationship of 2ω ₀ <3ω ₀ <2ω ₁ <3ω1 is established between the frequencies 2ω ₀ and 2ω ₁ of the second harmonic and the frequencies 3ω ₀ and 3ω _{1 of} the third harmonic. At this time, the input admittance YFin (s) is given by Equation 1.

Here, j is a complex number, and s is defined as s = jω. L _p is the combined inductance L _p = L _d + L ₀ .

On the other hand, FIG. 4 can be viewed as a pure reactance one-terminal pair network. The admittance characteristics of a pure reactance one-terminal pair network can be expressed by Equation 2.

In this way, the admittance of the same circuit can be expressed in two ways: Equation 1 and Equation 2. In Equation 2, Ω ₁ , Ω ₃ , and Ω ₅ are angular frequencies at which the numerator of the admittance function becomes zero, and indicate angular frequencies that represent the poles of the impedance function. Similarly, in Expression 2, Ω ₂ and Ω ₄ are angular frequencies at which the denominator of the admittance function becomes zero, and indicate angular frequencies at which the impedance function becomes zero. In Equation 2, M = a ₆ / b ₅ is satisfied. Further, a ₀ , a ₂ , a ₄ , a ₆ , b ₁ , b ₃ , and b ₅ are coefficients of respective orders when the admittance of the circuit shown in FIG.

  Therefore, the impedance for each harmonic signal component of the equivalent output current source 15a from the equivalent output current source 15a is set to zero or infinite (pole) according to Equation 2. That is, the admittance is set to infinity (corresponding to the impedance zero) or zero (corresponding to the impedance pole), and the F-class impedance condition is set. In addition, a pole unrelated to the class F operation is generated by the parasitic circuit 15 d of the class F amplifier 15.

  As a result, the frequency characteristic of the load side viewed from the equivalent output current source 15a in the state in which the parasitic circuit 15d of the class F amplifier 15 is taken in operates in class F for signals of a plurality of fundamental frequencies.

For example, ω ₀ and ω ₁ are fundamental wave angular frequencies, and in Equation 2, Ω ₂ = 2ω ₀ and Ω ₄ = 2ω ₁ are zero points. Further, Ω ₃ = 3ω ₀ and Ω ₅ = 3ω ₁ are poles. At this time, Ω ₁ is a quasi-resonant angular frequency for the parasitic circuit 15 d in the class F amplifier 15.

As described above, the circuit parameters can be set as shown in Equations 3 to 5 by setting the fundamental frequency and the harmonics of the order of harmonic processing.

Next, verification simulation results performed under the following model of class F operation will be described. As a model, the fundamental frequency of the two input signals is f ₀ = ω ₀ /2π=0.8 GHz, f ₁ = ω ₁ /2π=2.14 GHz, the parasitic capacitance is C _ds = 0.262 pF, and the parasitic inductance is L _d = 0.013 nH.

At this time, when L _d + L ₀ = 3.5 nH is set, Ω ₁ /2π=1.23 GHz (Ω ₀ / 2π <2ω ₀ /2π=1.6 GHz). Further, C ₁ = 0.63 pF, L ₁ = 6.11 nH, C ₂ = 4.32 pF, and L ₂ = 2.91 nH, and practically available capacitance and inductance values can be obtained.

In FIG. 5, the capacitances C _ds , C ₁ , C ₂ and the inductances L _d , L ₀ , L ₁ , L ₂ in the pure reactance one-terminal pair network shown in FIG. 4 are set to the above-described values. The frequency characteristic of the impedance is shown. The horizontal axis in FIG. 5 indicates the frequency, and the vertical axis indicates the impedance.

In the figure, frequencies 2f ₀ and 2f ₁ are the frequencies of the second harmonics of the fundamental frequencies f ₀ and f ₁ , and the frequencies 3f ₀ and 3f ₁ are the frequencies of the third harmonic. As can be seen from FIG. 5, the impedance viewed from the equivalent output current source 15a side is short-circuited with respect to the signal components of the even-order harmonic frequencies 2f ₀ and 2f ₁ and the frequencies of the odd-order harmonic frequencies 3f ₀ and 3f ₁ . Open to signal components. That is, class F impedance conditions are satisfied for two input signals having different fundamental frequencies.

In this way, in the ideal case where the harmonic processing unit 21 is in a short-circuited state for all frequencies, the capacitance C ₁ that satisfies the class F impedance condition for two input signals having different fundamental frequencies, C ₂ , L ₁ and L ₂ can be set.

In reality, however, the output terminal of the harmonic processing unit 21 is not grounded as shown in FIG. That is, in reality, the ideal state shown in FIG. 4 is not realized. Therefore, as shown in FIG. 6, a short circuit portion 22 </ b> A is provided and adjusted so as to be in a short circuit state at a frequency to be used or a frequency in the vicinity thereof. In the short-circuit portion 22A shown in FIG. 6, the λ / 4 open stubs 22a to 22d for the signal components of the respective harmonics are used to set a specific frequency (here, the signal components of the even-order harmonic frequencies 2f ₀ and 2f ₁ ). On the other hand, a short-circuit state is realized. FIG. 6 is a circuit diagram when the harmonic processing unit 21 is formed of an LC ladder and the terminal unit is formed of a λ / 4 open line corresponding to each harmonic.

  After satisfying the class F impedance condition for the harmonics in this way, the fundamental wave matching unit 23 is made to function so that the optimum load impedance of the class F amplifier 15 is obtained.

FIG. 7 shows frequency characteristics of impedance in the class F load circuit 20 when the value of the load 17 shown in FIG. Although there are behaviors that deviate from Equation 2 at frequencies other than even-order and odd-order harmonic frequencies (2f ₀ , 3f ₀ , 2f ₁ , 3f ₁ ), for even-order harmonic signals, It is in a short-circuit state and is in an open state with respect to odd harmonic signals.

  As described above, harmonic processing that satisfies the class F impedance condition can be performed for a plurality of input signals having different fundamental frequencies. Accordingly, it is possible to provide a class F amplifier circuit and a transmission apparatus that can efficiently suppress power consumption even for signals having different fundamental frequencies.

In addition, since one class F amplifier circuit can perform harmonic processing satisfying the class F impedance condition for a plurality of signals having different fundamental frequencies, the mounting area for mounting the class F amplifier circuit is reduced.
<Second Embodiment>
Next, a second embodiment of the present invention will be described. In addition, about the same structure as 1st Embodiment, description is abbreviate | omitted suitably using the same code | symbol.

  In 1st Embodiment, the short circuit part was comprised by the open stubs 22a-22d set to 1/4 length of wavelength (lambda) of the signal of each harmonic. In contrast, in the present embodiment, an LC parallel resonance circuit or a CRLH (Composite Light and Left Hand) short circuit line circuit is configured so as to be in a short circuit state with respect to all or some of the harmonic signal components.

FIG. 8 is a block diagram of the short-circuit portion 22B formed by the CRLH short-circuit line. Short unit 22B, first, second inductor 27a of the inductance _{L L} having the same inductance, 27b and includes first to third capacitors 26a~26c capacitance _{C L.} In addition, the first and second transmission lines 25a and 25b, in which the electrical length and the characteristic impedance are adjusted to perform a predetermined operation, are provided.

  A first capacitor to a third capacitor are connected in series between the first transmission line and the second transmission line. The first inductor is shunt-connected between the connection point between the first capacitor and the second capacitor and the ground point, and the second inductor is connected between the connection point between the second capacitor and the third capacitor and the ground point. Shunt connected. The terminal end of the second transmission line 25b is grounded.

In this way, the short-circuit portion 22B is formed using the CRLH short-circuit line, and the value of each element is set so as to satisfy the short-circuit condition for a plurality of harmonic signals. However, for example, when satisfying the F-class impedance condition for the harmonic signal components having four angular frequencies of 2ω ₀ · 2ω ₁ · 3ω ₀ · 3ω ₁ , two pairs of CRLH open lines It is necessary to provide. This makes it possible to satisfy the class F impedance condition for a plurality of harmonic signal components.

  In each of the above-described embodiments, the matching units 23a and 23b are configured by LC parallel resonance circuits, and two fundamental frequency signals are separated for each frequency. And the load 17a, 17b was provided for each fundamental wave frequency, and it was set as 2 port output structure. However, when the antenna unit 17 that transmits a signal supports two fundamental wave frequencies, the fundamental wave matching unit 23 can perform impedance matching corresponding to the signals of the two fundamental wave frequencies. Therefore, in such a case, the port can be set to one port output.

  In each of the above embodiments, two input signals having different fundamental frequencies are considered, and the harmonic processing for the second and third harmonics has been described as an example. However, the present invention is not limited to such a number.

  However, when setting the F-class impedance condition considering the impedance of the parasitic circuit of the F-class amplifier, the LC ladder type element value is obtained by continuous fraction expansion on the condition that the frequency of the pole and the zero appears alternately. Set.

  When the harmonic frequency of the input signal to be used does not satisfy this condition, an appropriate frequency is determined and a pole or zero is added to the impedance so that the frequency of the pole and zero appears alternately. That is, by adding a shunt capacitance or series inductance, it is possible to cope with the added pole or zero.

  Furthermore, in the above embodiment, the harmonic processing unit is configured by a lumped constant circuit using an LC ladder, but can be converted to a distributed constant circuit such as a step type microstrip transmission line or a coplanar transmission line.

  The class F amplifier circuit according to the present invention can also be applied to a frequency band exceeding the self-resonant frequency of the lumped constant element.

2 Transmitter 11 Signal generator circuit 11a to 11n Signal generator 12 Matching circuit 12a to 12n Matching device 13 Switch circuit 13a to 13n Switch 14 Control circuit 15a Equivalent output current source 15b Parasitic capacitance 15c Parasitic inductor 15d Parasitic circuit 17 Antenna unit 17a to 17n antenna (load)
21 harmonic processing unit 21a first inductor 21b second inductor 21c third inductor 21d first capacitor 21e second capacitor 22a to 22d open stub (open line)
22A, 22B Short-circuit part 23 Fundamental wave matching part 23a, 23b Matching device 25a, 25b Second transmission line 27a, 27b Second inductor

Claims (10)

A class F amplifier circuit that amplifies a signal and outputs it,
A class F amplifier that amplifies a plurality of signals having different fundamental angular frequencies and outputs a signal including a signal component of the fundamental angular frequency and a harmonic signal component thereof;
A short circuit is provided for the DC component of the signal and the signal component of the even-order harmonics by providing the impedance of the parasitic circuit parasitic to the class F amplifier and setting the circuit by being provided in the subsequent stage of the class F amplifier. A harmonic processing unit that is in an open state for signal components of odd harmonics,
A class F amplifier circuit, comprising: a short circuit provided in a subsequent stage of the harmonic processing unit and configured to short circuit a harmonic signal component. The class F amplifier circuit according to claim 1,
A fundamental wave matching unit that is provided in a subsequent stage of the short-circuit unit and performs impedance matching of the signal component of the fundamental angular frequency;
A class F amplifier circuit comprising: a load connecting an output terminal of the fundamental wave matching unit and a ground terminal. The class F amplifier circuit according to claim 1 or 2,
The class F amplifier circuit, wherein the parasitic circuit includes a shunt capacitance between a parasitic drain and a source of the class F amplifier and a parasitic drain series inductance. The class F amplifier circuit according to any one of claims 1 to 3,
The fundamental wave matching section is formed of a single line or a multi-line that branches into at least two for each angular fundamental frequency. The class F amplifier circuit according to any one of claims 1 to 4,
The harmonic processing section is formed of an LC ladder type circuit. The class F amplifier circuit according to any one of claims 1 to 4,
The class F amplifier circuit, wherein the harmonic processing unit is formed of a microstrip transmission line having a step or a coplanar transmission line. The class F amplifier circuit according to any one of claims 1 to 6,
The class F amplifier circuit, wherein the short-circuit portion is formed by connecting in parallel an open-ended line having a length of λ / 4, where λ is the wavelength of the harmonic. A class F amplifier circuit according to any one of claims 1 to 7,
The short circuit section is a circuit in which LC series resonance circuits are connected in parallel. A class F amplifier circuit according to any one of claims 1 to 8,
The short circuit section is formed by connecting CRLH short circuit circuits in parallel. A class F amplifier circuit according to any one of claims 1 to 9,
An antenna unit that outputs a signal from the class F amplifier circuit.

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