JP2013045993A - Semiconductor integrated circuit device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enable confirmation of overvoltage application on an LSI supply terminal.SOLUTION: A semiconductor integrated circuit device (10) comprises an internal circuit (11) and supply terminals (15, 16) for supplying power supply voltages to the internal circuit. In this case, the semiconductor integrated circuit device comprises an overvoltage application information record circuit (12) for recording a fact that a voltage (overvoltage) exceeding a possible level of a power supply voltage of the internal circuit is applied to the supply terminals. Since the fact that the overvoltage is applied to the supply terminals is recorded in the overvoltage application information record circuit, application of an overvoltage to the LSI supply terminals can be confirmed based on the recorded fact.

Description

  The present invention relates to a semiconductor integrated circuit device and a technique for recording the fact when an overvoltage is applied to a power supply terminal in the semiconductor integrated circuit device.

  Patent Document 1 describes a protection circuit that protects a semiconductor integrated circuit from a surge voltage or the like.

  Patent Document 2 describes an overvoltage protection circuit capable of protecting not only a circuit connected to an external terminal but also a circuit connected to another external terminal when an overvoltage is applied to the external terminal. Has been.

JP 2010-153444 A JP 2009-254067 A

  With the miniaturization and power saving of semiconductor processes, the power used by LSI (semiconductor integrated circuit) is decreasing. As a result, the voltage value used in the LSI is also reduced. When the voltage value to be used is reduced, the margin of the voltage value input to the LSI is also reduced, and the case where the LSI does not operate normally tends to occur.

  The inventors of the present invention have examined the cause of the case where the LSI does not operate normally. In addition to the logical malfunction of the internal circuit, a voltage exceeding the level assumed as the power supply voltage of the internal circuit (referred to as “overvoltage”) is present. It has also been clarified that this occurs even when applied to the power supply terminal of the LSI due to human error. That is, if an internal circuit (internal logic) is destroyed due to an overvoltage applied to the power supply terminal of the LSI, the LSI does not operate normally.

  However, according to the prior art, even though the semiconductor integrated circuit can be protected from a surge voltage or the like, the fact that the overvoltage is applied to the power supply terminal of the LSI cannot be recorded, so the overvoltage is applied to the power supply terminal of the LSI. It is difficult to confirm that it has been applied.

  An object of the present invention is to provide a technique for confirming that an overvoltage is applied to a power supply terminal of an LSI.

  The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

  The following is a brief description of an outline of typical inventions disclosed in the present application.

  That is, the semiconductor integrated circuit device includes an internal circuit and a power supply terminal for supplying a power supply voltage to the internal circuit. At this time, an overvoltage application information recording circuit is provided for recording the fact that a voltage exceeding the level assumed as the power supply voltage of the internal circuit is applied to the power supply terminal.

  The effects obtained by the representative ones of the inventions disclosed in the present application will be briefly described as follows.

  That is, it can be confirmed that an overvoltage is applied to the power supply terminal of the LSI.

1 is a block diagram illustrating a configuration example of a semiconductor integrated circuit device according to the present invention. It is another example block diagram of a semiconductor integrated circuit device according to the present invention. It is another example block diagram of a semiconductor integrated circuit device according to the present invention. It is another example block diagram of a semiconductor integrated circuit device according to the present invention. It is another example block diagram of a semiconductor integrated circuit device according to the present invention. It is another example block diagram of a semiconductor integrated circuit device according to the present invention. It is another example block diagram of a semiconductor integrated circuit device according to the present invention. FIG. 8 is a block diagram illustrating a configuration example of a protection circuit in FIG. 7. FIG. 8 is a block diagram illustrating another configuration example of the protection circuit in FIG. 7.

1. First, an outline of a typical embodiment of the invention disclosed in the present application will be described. Reference numerals in the drawings referred to in parentheses in the outline description of the representative embodiments merely exemplify what are included in the concept of the components to which the reference numerals are attached.

  [1] A semiconductor integrated circuit device (10) according to a typical embodiment of the present invention includes an internal circuit (11) and power supply terminals (15, 16) for supplying a power supply voltage to the internal circuit. Including. At this time, an overvoltage application information recording circuit (12) is provided for recording the fact that a voltage exceeding the level assumed as the power supply voltage of the internal circuit is applied to the power supply terminal.

  According to said structure, an overvoltage application information recording circuit records the fact that the voltage exceeding the level assumed as a power supply voltage of the said internal circuit was applied to the said power supply terminal. Therefore, it can be confirmed that the overvoltage is applied to the power supply terminal of the LSI based on the recorded contents of the overvoltage application information recording circuit.

  [2] In the above [1], an output terminal (17) capable of outputting the information recorded in the overvoltage application information recording circuit to the outside can be provided.

  [3] In the above [2], the overvoltage application information recording circuit includes a semiconductor element (14) capable of conducting when a voltage exceeding a level assumed as a power supply voltage of the internal circuit is applied to the power supply terminal. A fuse (13) that can be blown by a current flowing when the semiconductor element is conducted can be connected in series.

  [4] In the above [2], the overvoltage application information recording circuit is a nonvolatile memory capable of retaining the fact when a voltage exceeding a level assumed as a power supply voltage of the internal circuit is applied to the power supply terminal. A memory (18) can be included.

2. Details of Embodiments Embodiments will be further described in detail.

Embodiment 1
FIG. 1 shows a configuration example of a semiconductor integrated circuit device according to the present invention.

  A semiconductor integrated circuit device 10 shown in FIG. 1 includes an LSI internal circuit 11 and an overvoltage application information recording circuit 12. The LSI internal circuit 11 is formed on one semiconductor substrate such as a single crystal silicon substrate by a known semiconductor integrated circuit manufacturing technique. The power supply voltage for operation of the LSI internal circuit 11 is a voltage of a predetermined level with reference to the ground GND, and this voltage is applied from the outside of the semiconductor integrated circuit device 10 through the power supply terminals 15 and 16 on the positive electrode side. . In FIG. 1, the negative power supply terminal (ground terminal) for supplying the potential of the ground GND is omitted.

  The overvoltage application information recording circuit 12 is provided for recording the fact that a voltage (overvoltage) exceeding the level assumed as the power supply voltage of the LSI internal circuit 11 is applied to the power supply terminals 15 and 16. The overvoltage application information recording circuit 12 includes a semiconductor element 14 that can conduct when a voltage exceeding a level assumed as a power supply voltage of the LSI internal circuit 11 is applied to the power supply terminals 15 and 16, and the semiconductor element 14 Are connected in series with a fuse 13 that can be blown by a current that flows when the current is conducted. A reverse diode can be applied as the semiconductor element 14. The diode basically does not flow in the reverse direction, but when the reverse voltage exceeds the breakdown voltage, the current suddenly flows. In this example, when a voltage exceeding the level assumed as the power supply voltage of the LSI internal circuit 11 is applied to the power supply terminals 15 and 16, the diode is rendered conductive.

  In the above configuration, when a voltage of a level assumed as the power supply voltage of the LSI internal circuit 11 is applied between the power supply terminals 15 and 16 and the ground GND, the semiconductor element (diode) 14 is reversed. Directional current does not flow. However, when a voltage exceeding the level assumed as the power supply voltage of the LSI internal circuit 11 (the breakdown voltage of the diode) is applied between the power supply terminals 15 and 16 and the ground GND, the diode becomes conductive. When the reverse current flows, the fuse 13 is blown. Whether or not the fuse 13 is blown can be determined by probing after the collected package of the semiconductor integrated circuit device 10 is opened. If the fuse 13 is blown, it means that a voltage exceeding the level assumed as the power supply voltage of the LSI internal circuit 11 is applied between the power supply terminals 15 and 16 and the ground GND. means. For example, when the semiconductor integrated circuit device 10 is recovered as an operation failure after shipment, the fact that overvoltage application has been performed at the customer is recorded in the overvoltage application information recording circuit 12, and therefore at the customer. It can be confirmed that overvoltage application has been performed.

  FIG. 2 shows another configuration example of the semiconductor integrated circuit device according to the present invention.

  The semiconductor integrated circuit device 10 shown in FIG. 2 is greatly different from that shown in FIG. 1 in that an output terminal 17 is drawn from a series connection node of a fuse 13 and a semiconductor element (diode) 14. It is. The output terminal 17 is one of external terminals of the semiconductor integrated circuit device 10. In the state where the fuse 13 is not blown, the voltage applied to the power supply terminals 15 and 16 is transmitted to the output terminal 17 as it is, so that by observing it, it can be confirmed that the fuse 13 is not blown. . Further, in the state where the fuse 13 is blown, the voltage applied to the power supply terminals 15 and 16 is not transmitted to the output terminal 17, so that it can be confirmed that the fuse 13 is blown.

  As described above, in the configuration shown in FIG. 2, it is possible to confirm whether or not the fuse 13 is blown without opening the package of the semiconductor integrated circuit device 10.

<< Embodiment 2 >>
FIG. 3 shows another configuration example of the semiconductor integrated circuit device according to the present invention.

  In the semiconductor integrated circuit device 10 shown in FIG. 3, a flash ROM (read only memory) 18 as an example of a nonvolatile memory is applied as the overvoltage application information recording circuit 12.

  The memory element of the flash ROM 18 is a kind of MOS transistor and has a floating gate. When a high voltage equal to or higher than the threshold Vth is applied to the control gate of the flash ROM 18, current flows from the source to the drain, but electrons that have obtained high energy near the drain become hot electrons and some of them float through the oxide film.・ It is transmitted to the gate. When the floating gate is charged in this way, the control gate is an enhancement type in which no current flows when zero bias is applied, and in the case where the control gate is not charged, a depletion type in which current flows even with zero bias. By utilizing such properties, the flash ROM 18 can function as the overvoltage application information recording circuit 12. That is, when an overvoltage is applied to the power supply terminals 15 and 16, a high voltage higher than the threshold value Vth is applied to the control gate of the flash ROM 18, and electrons having high energy near the drain become hot electrons. , A part of which is transmitted to the floating gate through the oxide film. Thereby, overvoltage application information is recorded. When the floating gate is charged, the control gate is an enhancement type in which current does not flow when the bias is zero bias. Therefore, it is necessary to apply a predetermined voltage for reading. The value of the predetermined voltage is equal to the overvoltage applied to the power supply terminals 15 and 16. For this reason, the level of the overvoltage applied to the power supply terminals 15 and 16 can be grasped by the value of the voltage applied for reading information from the flash ROM 18.

  Even if a voltage exceeding the withstand voltage of the flash ROM 18 is input and the flash ROM 18 itself is broken, the package of the semiconductor integrated circuit device 10 can be opened to confirm that an overvoltage has been applied to the flash ROM 18. .

  FIG. 4 shows another configuration example of the semiconductor integrated circuit device according to the present invention.

  The semiconductor integrated circuit device 10 shown in FIG. 4 is greatly different from that shown in FIG. 3 in the overvoltage application information recording circuit 12 in the stage preceding the flash ROM 18 in the voltage divider circuit of resistors R1, R2. The measurement unit 19 and the voltage value threshold determination unit 20 are arranged. The voltage applied to the power supply terminals 15 and 16 is divided by the voltage dividing circuit of the resistors R1 and R2, and then transmitted to the voltage value measuring unit 19. The voltage value measuring unit 19 measures the voltage applied to the power supply terminals 15 and 16 based on the voltage of the series connection node of the resistors R1 and R2. The voltage value threshold determination unit 20 performs voltage determination by comparing the output voltage of the voltage value measurement unit 19 with a predetermined threshold. When the output voltage of the voltage value measuring unit 19 exceeds a predetermined threshold value, the voltage over flag (for example, logical value “1”), the voltage value at that time, or both are written in the flash ROM 18. The over flag and voltage value in the flash ROM 18 can be read out via the output terminal 17. Even with this configuration, it is possible to record overvoltage application information. In addition, the voltage applied to the power supply terminals 15 and 16 is divided by the voltage dividing circuit of the resistors R1 and R2, and then transmitted to the voltage value measuring unit 19, so that the voltage is supplied to the power supply terminals 15 and 16. The voltage value measuring unit 19 is prevented from being destroyed by the applied overvoltage.

  The overvoltage application information recording circuit 12 can be operated with a power supply voltage different from that of the LSI internal circuit 11.

  FIG. 5 shows another configuration example of the semiconductor integrated circuit device according to the present invention.

  The semiconductor integrated circuit device 10 shown in FIG. 5 is significantly different from that shown in FIG. 4 in the overvoltage application information recording circuit 12 in which the operational amplifier 12 is not replaced with the voltage dividing circuit of the resistors R1 and R2. An inverting amplifier circuit is provided, and the level of the overvoltage is lowered by the non-inverting amplifier circuit and then transmitted to the voltage value measuring unit 19. A resistor R3 is provided between the inverting input terminal of the operational amplifier 12 and the ground GND, and a resistor R4 is provided between the inverting input terminal and the output terminal of the operational amplifier 12. The voltage applied to the power supply terminals 15 and 16 is transmitted to the non-inverting input terminal of the operational amplifier 12. Since the non-inverting amplifier circuit by the operational amplifier 12 is provided, it is possible to prevent the voltage value measuring unit 19 from being destroyed by the overvoltage applied to the power supply terminals 15 and 16.

  As in the case shown in FIG. 4, the overvoltage application information recording circuit 12 can be operated with a power supply voltage different from that of the LSI internal circuit 11.

  FIG. 6 shows another configuration example of the semiconductor integrated circuit device according to the present invention.

  The semiconductor integrated circuit device 10 shown in FIG. 6 is a combination of the configuration shown in FIG. 2 and the configuration shown in FIG. That is, a voltage dividing circuit of resistors R5 and R6 is provided at a series connection node of the fuse 13 and the semiconductor element 14, and an output of this voltage dividing circuit is input to the voltage value threshold value determination unit 20. The voltage value threshold determination unit 20 recognizes that the fuse has been blown by determining the output voltage of the voltage dividing circuit of the resistors R5 and R6. By inputting the voltage divided by the resistors R5 and R6, the voltage value threshold determination unit 20 is prevented from being destroyed by an overvoltage. The voltage value when the fuse is blown is determined from the output value of the measuring unit 19, and the voltage when the fuse is blown, the voltage over flag, or both are written in the flash ROM. The output terminal 17A is pulled out from the flash ROM 18, and the voltage at the time of the voltage over flag or blown fuse can be confirmed. Further, since the output terminal 17B is drawn from the series connection node of the fuse 13 and the semiconductor element 14, and the voltage applied to the power supply terminals 15 and 16 is not transmitted to the output terminal 17, the fuse 13 is thereby blown. Can be confirmed.

  Similar to the case shown in FIGS. 4 and 5, the overvoltage application information recording circuit 12 can be operated with a power supply voltage different from that of the LSI internal circuit 11.

<< Embodiment 3 >>
As shown in FIG. 7, when a protection circuit 25 for protecting the LSI internal circuit 11 from a surge voltage or the like input via the power supply terminals 15 and 16 is provided in the semiconductor integrated circuit device 10, FIG. As shown in FIG. 9, the overvoltage application information recording circuit 12 can be built in the protection circuit 25.

  For example, the overvoltage application information recording circuit 12 is provided in the protection circuit 25 shown in FIG. A Zener diode or a varistor is applied to the protection circuit body 22. The overvoltage application information recording circuit 12 is formed by the flash ROM 18 as in the case shown in FIG. Reference numeral 27 in FIG. 8 denotes an output terminal of the flash ROM 18. Further, the protection circuit 25 shown in FIG. 9 is provided with an overvoltage application information recording circuit 12 in addition to the protection circuit main body 22, and the overvoltage application information recording circuit 12 is a fuse as in the case shown in FIG. 13 and a semiconductor element (diode) 14 are connected in series to output terminal 27.

  Although the invention made by the present inventor has been specifically described based on the embodiments, it is needless to say that the present invention is not limited thereto and can be variously modified without departing from the gist thereof.

  For example, the number of power supply terminals on the positive electrode side may be one or three or more.

DESCRIPTION OF SYMBOLS 10 Semiconductor integrated circuit device 11 LSI internal circuit 12 Overvoltage application information recording circuit 13 Fuse 14 Semiconductor element 15, 16 Power supply terminal 17 Output terminal 18 Flash ROM
19 Voltage Value Measuring Unit 20 Voltage Value Threshold Determination Unit

Claims (4)

A semiconductor integrated circuit device including an internal circuit and a power supply terminal for supplying a power supply voltage to the internal circuit,
A semiconductor integrated circuit device comprising an overvoltage application information recording circuit for recording a fact that a voltage exceeding a level assumed as a power supply voltage of the internal circuit is applied to the power supply terminal.   2. The semiconductor integrated circuit device according to claim 1, further comprising an output terminal capable of externally outputting information recorded in the overvoltage application information recording circuit. The overvoltage application information recording circuit includes a semiconductor element capable of conducting when a voltage exceeding a level assumed as a power supply voltage of the internal circuit is applied to the power supply terminal;
3. The semiconductor integrated circuit device according to claim 2, wherein a fuse that can be blown by a current that flows when the semiconductor element is conducted is connected in series with each other.   3. The semiconductor according to claim 2, wherein the overvoltage application information recording circuit includes a nonvolatile memory capable of holding the fact that a voltage exceeding a level assumed as a power supply voltage of the internal circuit is applied to the power supply terminal. Integrated circuit device.

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