JP2013044941A - Liquid crystal display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a liquid crystal display device with high reliability.SOLUTION: The liquid crystal display device comprises: a first substrate AR including a plurality of pixel electrodes PE arranged in a matrix shape, gate wiring G extending along a row in which the pixel electrodes PE are arrayed, source wiring S extending along a column, and an electrode EB which is arranged on the same layer as the pixel electrode PE and is supplied with potential applied to the gage wiring G in the surrounding region of a region ACT where the plurality of pixel electrodes PE are arranged; a second substrate CT which includes a common electrode CE facing the region ACT where the plurality of pixel electrodes PE are arranged and the surrounding region and is arranged facing the first substrate AR; and a liquid crystal layer LQ held between the first substrate AR and the second substrate CT. The common electrode CE includes an electrode removal section CEA in a portion facing an end of at least the electrode EB.

Description

  Embodiments described herein relate generally to a liquid crystal display device.

  2. Description of the Related Art In recent years, flat display devices have been actively developed. In particular, liquid crystal display devices have attracted particular attention because of their advantages such as light weight, thinness, and low power consumption. In particular, an active matrix liquid crystal display device in which a switching element is incorporated in each pixel has a structure using a lateral electric field (including a fringe electric field) such as an IPS (In-Plane Switching) mode or an FFS (Fringe Field Switching) mode. Attention has been paid. Such a horizontal electric field mode liquid crystal display device includes a pixel electrode and a common electrode formed on an array substrate, and switches liquid crystal molecules with a horizontal electric field substantially parallel to the main surface of the array substrate.

  On the other hand, a technique for switching liquid crystal molecules by forming a lateral electric field or an oblique electric field between a pixel electrode formed on an array substrate and a common electrode formed on a counter substrate has been proposed.

JP 2009-104133 A JP 2009-192822 A

  When the liquid crystal display device is used continuously for a long time in a high-temperature and high-humidity environment, corrosion of electrodes and wirings in the area around the active area may occur. If the electrodes and wiring arranged around the active area corrode, the function of the circuit including the electrode and wiring deteriorates and the reliability deteriorates.If corrosion further progresses to the drive circuit and the active area, the display quality deteriorates. There was a possibility of connection.

  The problem to be solved by the present invention is to provide a highly reliable liquid crystal display device.

  According to the embodiment, a plurality of pixel electrodes arranged in a matrix, a gate wiring extending along a row in which the pixel electrodes are arranged, a source wiring extending along a column, and the plurality of pixel electrodes are arranged. A region in which a plurality of pixel electrodes are disposed, and a first substrate including an electrode disposed in the same layer as the pixel electrode and supplied with a potential applied to the gate wiring in a region around the region And a second substrate provided with a common electrode facing the surrounding region, and disposed opposite to the first substrate, and a liquid crystal layer sandwiched between the first substrate and the second substrate. In the liquid crystal display device, the common electrode includes an electrode removal portion at least in a portion facing an end portion of the electrode.

FIG. 1 is a diagram schematically showing a configuration and an equivalent circuit of a liquid crystal display device according to the present embodiment. FIG. 2 is a plan view schematically showing a structure example of one pixel when the liquid crystal display panel shown in FIG. 1 is viewed from the counter substrate side. 3 is a cross-sectional view schematically showing an example of a cross-sectional structure when the liquid crystal display panel shown in FIG. 2 is cut along line III-III. FIG. 4 is a diagram schematically showing a configuration example of an antistatic circuit arranged around the active area of the liquid crystal display panel shown in FIG. FIG. 5 is a diagram schematically showing a comparative example of the cross-sectional structure of the liquid crystal display panel when cut at the position where the contact electrode of the antistatic circuit shown in FIG. 4 is arranged. FIG. 6 is a diagram schematically showing a comparative example of the cross-sectional structure of the liquid crystal display panel when cut at the position where the contact electrode of the antistatic circuit shown in FIG. 4 is arranged. FIG. 7 is a diagram schematically showing an embodiment of a cross-sectional structure of the liquid crystal display panel when cut at a position where the contact electrode of the antistatic circuit shown in FIG. 4 is arranged. FIG. 8 is a diagram for explaining a configuration example of the common electrode of the liquid crystal display device according to the embodiment. FIG. 9 is a diagram schematically showing an embodiment of a cross-sectional structure of the liquid crystal display panel when cut at a position where the contact electrode of the antistatic circuit shown in FIG. 4 is arranged. FIG. 10 is a diagram for explaining another configuration example of the common electrode of the liquid crystal display device of the embodiment. FIG. 11 is a diagram for explaining another configuration example of the common electrode of the liquid crystal display device of the embodiment.

  Hereinafter, the present embodiment will be described in detail with reference to the drawings. In each figure, the same reference numerals are given to components that exhibit the same or similar functions, and duplicate descriptions are omitted.

  FIG. 1 is a diagram schematically showing a configuration and an equivalent circuit of a liquid crystal display device according to the present embodiment.

  That is, the liquid crystal display device includes an active matrix type liquid crystal display panel LPN. The liquid crystal display panel LPN is held between the array substrate AR, which is the first substrate, the counter substrate CT, which is the second substrate disposed to face the array substrate AR, and the array substrate AR and the counter substrate CT. Liquid crystal layer LQ. Such a liquid crystal display panel LPN includes an active area ACT for displaying an image. This active area ACT is composed of a plurality of pixels PX arranged in an m × n matrix (where m and n are positive integers).

  In the active area ACT, the liquid crystal display panel LPN includes n gate lines G (G1 to Gn), n auxiliary capacitance lines C (C1 to Cn), m source lines S (S1 to Sm), and the like. ing. For example, the gate line G and the auxiliary capacitance line C extend substantially linearly along the first direction X. These gate lines G and storage capacitor lines C are alternately arranged in parallel along a second direction Y that intersects the first direction X. Here, the first direction X and the second direction Y are substantially orthogonal to each other. The source line S intersects with the gate line G and the auxiliary capacitance line C. The source line S extends substantially linearly along the second direction Y. Note that the gate wiring G, the auxiliary capacitance line C, and the source wiring S do not necessarily extend linearly, and some of them may be bent.

  Each gate line G is drawn outside the active area ACT and connected to the gate driver GD. Each source line S is drawn outside the active area ACT and connected to the source driver SD. At least a part of the gate driver GD and the source driver SD is formed on, for example, the array substrate AR, and is connected to the driving IC chip 2 with a built-in controller.

  Each pixel PX includes a switching element SW, a pixel electrode PE, a common electrode CE, and the like. The storage capacitor Cs is formed, for example, between the storage capacitor line C and the pixel electrode PE. The auxiliary capacitance line C is electrically connected to a voltage application unit VCS to which an auxiliary capacitance voltage is applied.

  In the present embodiment, the liquid crystal display panel LPN has a configuration in which the pixel electrode PE is formed on the array substrate AR while at least a part of the common electrode CE is formed on the counter substrate CT. The liquid crystal molecules in the liquid crystal layer LQ are switched mainly using an electric field formed between the PE and the common electrode CE. The electric field formed between the pixel electrode PE and the common electrode CE is an oblique electric field (or slightly inclined with respect to the XY plane or the substrate main surface defined by the first direction X and the second direction Y) (or , A transverse electric field substantially parallel to the main surface of the substrate).

  The switching element SW is constituted by, for example, an n-channel thin film transistor (TFT). The switching element SW is electrically connected to the gate line G and the source line S. Such a switching element SW may be either a top gate type or a bottom gate type. In addition, the semiconductor layer of the switching element SW is formed of, for example, amorphous silicon, but may be formed of polysilicon.

  The pixel electrode PE is disposed in each pixel PX and is electrically connected to the switching element SW. The common electrode CE is disposed in common to the pixel electrodes PE of the plurality of pixels PX via the liquid crystal layer LQ. The pixel electrode PE and the common electrode CE are formed of a light-transmitting conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO). , Molybdenum, aluminum, tungsten, titanium, and other metal materials and alloys thereof.

  In the array substrate AR, in a region around the active area ACT, an antistatic circuit 100 described later is arranged in a region A between the gate driver GD and the source driver SD and the active area ACT. The antistatic circuit 100 is disposed inside the sealing material SB.

  In addition, the array substrate AR includes a common wiring COM arranged so as to surround the active area ACT in a region around the active area ACT. Both ends of the common wiring COM are connected to connection pads. A common voltage is supplied to the common wiring line COM from the outside via a connection pad.

  The common electrode CE extends substantially uniformly so as to face the array substrate AR in the active area ACT, and is electrically connected to the common wiring COM of the array substrate AR via the conductive member TR.

  FIG. 2 is a plan view schematically showing a structural example of one pixel PX when the liquid crystal display panel LPN shown in FIG. 1 is viewed from the counter substrate side. Here, a plan view in the XY plane is shown. In FIG. 2, configurations other than the common electrode CE and the pixel electrode PE are omitted, and an example of the positional relationship between the common electrode CE and the pixel electrode PE is shown.

  The illustrated pixel PX has a rectangular shape whose length along the first direction X is shorter than the length along the second direction Y, as indicated by a broken line. The common electrode CE extends in the second direction. The pixel electrode PE is disposed between the adjacent common electrodes CE.

  The pixel electrode PE includes a main pixel electrode PA and a contact portion PC that are electrically connected to each other. The main pixel electrode PA extends linearly along the second direction Y from the contact portion PC to the vicinity of the upper end portion and the vicinity of the lower end portion of the pixel PX. Such a main pixel electrode PA is formed in a strip shape having substantially the same width along the first direction X. The contact portion PC is electrically connected to the switching element SW through the contact hole CH. The contact portion PC is formed wider than the main pixel electrode PA.

  The common electrode CE includes a main common electrode CA linearly extending along a second direction Y substantially parallel to the main pixel electrode PA on both sides of the main pixel electrode PA in the XY plane. . Alternatively, the main common electrode CA may be opposed to the source line S and may extend substantially parallel to the main pixel electrode PA. The main common electrode CA is formed in a strip shape having substantially the same width along the first direction X.

  In the illustrated example, two main common electrodes CA are arranged in parallel along the first direction X, and are disposed at both left and right ends of the pixel PX, respectively. These main common electrodes CA are electrically connected to each other in the active area ACT or outside the active area ACT. That is, the common electrode CE has a stripe shape in which the main common electrodes CA extending in the second direction Y in the active area ACT are arranged in the first direction X at a predetermined interval.

  Focusing on the positional relationship between the pixel electrode PE and the main common electrode CA, the pixel electrode PE and the main common electrode CA are alternately arranged along the first direction X. The pixel electrode PE and the main common electrode CA are arranged substantially parallel to each other. At this time, none of the main common electrodes CA overlaps the pixel electrode PE in the XY plane.

  That is, one pixel electrode PE is located between adjacent main common electrodes CA. In other words, the adjacent main common electrodes CA are arranged on both sides of the position immediately above the pixel electrode PE. Alternatively, the pixel electrode PE is disposed between the main common electrodes CA. The spacing along the first direction X between the pixel electrode PE and the common electrode CE is substantially constant.

  FIG. 3 is a cross-sectional view schematically showing an example of a cross-sectional structure when the liquid crystal display panel LPN shown in FIG. 2 is cut along line III-III. Here, only parts necessary for the description are shown. In this example, the main common electrode CA is disposed so as to face the signal line S.

  A backlight 4 is disposed on the back side of the array substrate AR constituting the liquid crystal display panel LPN. As the backlight 4, various forms are applicable, and any of those using a light emitting diode (LED) or a cold cathode tube (CCFL) as a light source can be applied. The description of the structure is omitted.

  The array substrate AR is formed using a first insulating substrate 10 having light transparency. The source wiring S is formed on the first interlayer insulating film 11 and is covered with the second interlayer insulating film 12 and the planarizing film 13. Note that gate wirings and auxiliary capacitance lines (not shown) are disposed between the first insulating substrate 10 and the first interlayer insulating film 11, for example. The pixel electrode PE is formed on the planarization film 13. The pixel electrode PE is located inside the adjacent source line S rather than the position immediately above each of the adjacent source lines S. The planarizing film 13 is disposed in the active area ACT, and is removed in the region around the active area ACT.

  The first alignment film AL1 is disposed on the surface of the array substrate AR that faces the counter substrate CT, and extends over substantially the entire active area ACT and the outside of the active area ACT. The first alignment film AL1 covers the pixel electrode PE and the like, and is also disposed on the second interlayer insulating film 12. Such a first alignment film AL1 is formed of a material exhibiting horizontal alignment.

  The array substrate AR may further include a part of the common electrode CE.

  The counter substrate CT is formed by using a second insulating substrate 20 having optical transparency. The counter substrate CT includes a black matrix BM, a color filter CF, an overcoat layer OC, a common electrode CE, a second alignment film AL2, and the like.

  The black matrix BM partitions each pixel PX and forms an opening AP that faces the pixel electrode PE. That is, the black matrix BM is disposed so as to face wiring portions such as the source wiring S, the gate wiring G, the auxiliary capacitance line C, and the switching element SW. Here, only the portion extending along the second direction Y is illustrated, but the black matrix BM may include a portion extending along the first direction X. The black matrix BM is disposed on the inner surface 20A of the second insulating substrate 20 facing the array substrate AR.

  The color filter CF is arranged corresponding to each pixel PX. That is, the color filter CF is disposed in the opening AP in the inner surface 20A of the second insulating substrate 20, and a part of the color filter CF runs on the black matrix BM. The color filters CF arranged in the pixels PX adjacent to each other in the first direction X have different colors. For example, the color filter CF is formed of resin materials colored in three primary colors such as red, blue, and green. The red color filter CFR made of a resin material colored in red is arranged corresponding to the red pixel. The blue color filter CFB made of a resin material colored in blue is arranged corresponding to the blue pixel. The green color filter CFG made of a resin material colored in green is arranged corresponding to the green pixel. The boundary between these color filters CF is at a position overlapping the black matrix BM.

  The overcoat layer OC covers the color filter CF. This overcoat layer OC alleviates the influence of irregularities on the surface of the color filter CF.

  The common electrode CE is formed on the side of the overcoat layer OC that faces the array substrate AR. In the present embodiment, the distance along the third direction Z between the common electrode CE and the pixel electrode PE is substantially constant. The third direction Z is a direction orthogonal to the first direction X and the second direction Y, or a normal direction of the liquid crystal display panel LPN.

  The second alignment film AL2 is disposed on the surface of the counter substrate CT facing the array substrate AR, and extends over substantially the entire active area ACT. The second alignment film AL2 covers the common electrode CE, the overcoat layer OC, and the like. Such a second alignment film AL2 is formed of a material exhibiting horizontal alignment.

  The array substrate AR and the counter substrate CT as described above are arranged so that the first alignment film AL1 and the second alignment film AL2 face each other. At this time, between the first alignment film AL1 of the array substrate AR and the second alignment film AL2 of the counter substrate CT, for example, a columnar spacer (not shown) integrally formed on one substrate with a resin material. As a result, a predetermined cell gap is formed. The array substrate AR and the counter substrate CT are bonded to each other by a sealing material SB outside the active area ACT in a state where a predetermined cell gap is formed.

  The liquid crystal layer LQ is held in a cell gap formed between the array substrate AR and the counter substrate CT, and is disposed between the first alignment film AL1 and the second alignment film AL2. Such a liquid crystal layer LQ is made of, for example, a liquid crystal material having a positive dielectric anisotropy (positive type).

  The first optical element OD1 is attached to the outer surface of the array substrate AR, that is, the outer surface 10B of the first insulating substrate 10 constituting the array substrate AR with an adhesive or the like. The first optical element OD1 is located on the side facing the backlight 4 of the liquid crystal display panel LPN, and controls the polarization state of incident light incident on the liquid crystal display panel LPN from the backlight 4.

  The second optical element OD2 is attached to the outer surface of the counter substrate CT, that is, the outer surface 20B of the second insulating substrate 20 constituting the counter substrate CT with an adhesive or the like. The second optical element OD2 is located on the display surface side of the liquid crystal display panel LPN, and controls the polarization state of the outgoing light emitted from the liquid crystal display panel LPN.

  Next, the operation of the liquid crystal display panel LPN configured as described above will be described with reference to FIGS.

  That is, in a state where no voltage is applied to the liquid crystal layer LQ, that is, in a state where no potential difference (or electric field) is formed between the pixel electrode PE and the common electrode CE (when OFF), the liquid crystal of the liquid crystal layer LQ The molecules LM are aligned such that their major axes are directed to the first alignment treatment direction of the first alignment film AL1 and the second alignment treatment direction of the second alignment film AL2. Such OFF time corresponds to the initial alignment state, and the alignment direction of the liquid crystal molecules LM at the OFF time corresponds to the initial alignment direction.

  Strictly speaking, the liquid crystal molecules LM are not always aligned parallel to the XY plane, and are often pretilted. For this reason, the initial alignment direction of the liquid crystal molecules LM here is a direction obtained by orthogonally projecting the major axis of the liquid crystal molecules LM at the time of OFF to the XY plane. Hereinafter, in order to simplify the description, it is assumed that the liquid crystal molecules LM are aligned in parallel to the XY plane and rotate in a plane parallel to the XY plane.

  Here, both the first alignment treatment direction and the second alignment treatment direction are substantially parallel to the second direction Y. At the OFF time, the liquid crystal molecules LM are initially aligned in the direction in which the major axis is substantially parallel to the second direction Y, as indicated by a broken line in FIG. That is, the initial alignment direction of the liquid crystal molecules LM is parallel to the second direction Y (or 0 ° with respect to the second direction Y).

  When the first alignment treatment direction and the second alignment treatment direction are parallel and in the same direction, in the cross section of the liquid crystal layer LQ, the liquid crystal molecules LM are substantially horizontal (the pretilt angle is substantially zero) near the middle portion of the liquid crystal layer LQ. Alignment is performed with a pretilt angle that is symmetrical in the vicinity of the first alignment film AL1 and in the vicinity of the second alignment film AL2 (spray alignment).

  When the first alignment treatment direction and the second alignment treatment direction are parallel and opposite to each other, in the cross section of the liquid crystal layer LQ, the liquid crystal molecules LM are in the vicinity of the first alignment film AL1, in the vicinity of the second alignment film AL2, and Then, the liquid crystal layer LQ is aligned with a substantially uniform pretilt angle in the intermediate portion (homogeneous alignment).

  In the example shown in FIG. 2, the liquid crystal molecules LM in the region between the pixel electrode PE and the left main common electrode CA rotate clockwise with respect to the second direction Y so as to face the lower left in the figure. Oriented to The liquid crystal molecules LM in the region between the pixel electrode PE and the right main common electrode CA rotate counterclockwise with respect to the second direction Y and are aligned so as to face the lower right in the drawing.

  Thus, in each pixel PX, in a state where an electric field is formed between the pixel electrode PE and the common electrode CE, the alignment direction of the liquid crystal molecules LM is divided into a plurality of directions with the position overlapping the pixel electrode PE as a boundary. The domains are formed in the respective orientation directions. That is, a plurality of domains are formed in one pixel PX.

  FIG. 4 is an equivalent circuit diagram corresponding to an example of the configuration of the antistatic circuit 100 shown in FIG. That is, the antistatic circuit 100 includes a thin film transistor. In the illustrated example, the antistatic circuit 100 includes four thin film transistors Tr1 to Tr4. On one end side of the static electricity prevention circuit 100, the gate electrode and the source electrode of the thin film transistor Tr1 and the source electrode of the thin film transistor Tr2 are connected to each other. The drain electrode of the thin film transistor Tr1 is connected to the gate electrode of the thin film transistor Tr2, the gate electrode of the thin film transistor Tr3, and the source electrode of the thin film transistor Tr4. The drain electrode of the thin film transistor Tr2 is connected to the source electrode of the thin film transistor Tr3. On the other end side of the antistatic circuit 100, the drain electrode of the thin film transistor Tr3 and the gate electrode and drain electrode of the thin film transistor Tr4 are connected to each other.

  In the static electricity prevention circuit 100, for example, the gate electrode and the source electrode of the thin film transistor Tr1 are electrically connected by a contact electrode arranged in the same layer as the pixel electrode PE. That is, the gate electrode of the thin film transistor Tr1 is disposed in the same layer as the gate wiring G and is formed of, for example, AlNd. The source electrode of the thin film transistor Tr1 is disposed in the same layer as the source wiring and is formed of, for example, Cr. The contact electrode is electrically connected to the gate electrode in a contact hole provided in the interlayer insulating films 11 and 12 disposed on the gate electrode of the thin film transistor Tr1, and is provided on the interlayer insulating film 12 disposed on the source electrode. The contact electrode is electrically connected to the source electrode. The contact electrode is disposed in the same layer as the pixel electrode PE, and is formed of a light-transmitting conductive material such as ITO.

  The antistatic circuit 100 is electrically connected to the common wiring COM. This is because the common wiring COM has a wider wiring width and a larger capacity than other wirings.

  FIG. 5 shows a configuration example (comparative example) of the cross section of the liquid crystal display panel LPN at the position where the contact electrode EB provided in the antistatic circuit 100 is disposed. The contact electrode EB electrically connects the gate electrode EG and the source electrode of the thin film transistor, and is disposed in the same layer as the pixel electrode PE. A gate potential is supplied to the contact electrode EB from the gate electrode EG of the thin film transistor. The gate electrode EG of the thin film transistor is electrically connected to the gate line G (or formed integrally).

  When the liquid crystal display panel LPN of this comparative example was operated continuously for 1000 hours in a high-temperature and high-humidity environment (for example, the temperature was 65 ° C. and the humidity was 93%), Corrosion was sometimes observed. Further, this corrosion is remarkable in the vicinity of the contact electrode EB to which the gate potential is supplied.

  This is presumably because the potential difference between the contact electrode EB supplied with the gate potential and the common electrode CE opposed to the contact electrode EB is increased, resulting in an electrical melting phenomenon. In the present embodiment, the potential difference between the contact electrode EB to which the gate potential is supplied and the common electrode CE is, for example, 11.5V.

  The electrical melting phenomenon is a phenomenon in which the specific resistance of the liquid crystal is lowered and a current flows between the array substrate AR and the counter substrate CT. Due to this electrical melting phenomenon, the conductive material ITO melts, the liquid crystal layer LQ is contaminated by moisture absorption from the outside of the sealing material SB, and the AlNd electro-corrosion or the black matrix BM disposed under the melted portion of the ITO It is thought that it spread to corrosion.

  FIG. 6 shows a configuration example (comparative example) of the cross section of the liquid crystal display panel LPN at the position where the contact electrode EA arranged in the antistatic circuit 100 is arranged. The contact electrode EA electrically connects the gate electrode EG and the source electrode of the thin film transistor, and is disposed in the same layer as the pixel electrode PE.

  Furthermore, there was a difference in the degree of corrosion of the contact electrode depending on the thickness of the alignment film AL1 disposed on the contact electrode. Under the contact electrode EB shown in FIG. 5, a gate electrode EG extends across the end of the contact electrode EB.

  On the other hand, under the contact electrode EA, the gate electrode EG does not extend to the end of the contact electrode EA, and the end of the gate electrode EG is located inside the end of the contact electrode EA.

  Therefore, the end portion of the contact electrode EA is disposed along the inclination of the interlayer insulating films 11 and 12 disposed on the end portion of the gate electrode EG, and the thickness of the contact electrode EA is near the end portion of the contact electrode EA. In addition, a step corresponding to the thickness of the gate electrode EG is generated. Therefore, on the end portion of the contact electrode EA, the alignment film AL1 that is accumulated thicker than the other portions in the inclined portions of the interlayer insulating films 11 and 12 is disposed.

  On the other hand, the end portion of the contact electrode EB is disposed on a substantially flat portion of the interlayer insulating films 11 and 12, and only a step corresponding to the thickness of the contact electrode EB is generated at the end portion of the contact electrode EB. . Therefore, the alignment film AL1 on the end portion of the contact electrode EB is thinner than the alignment film AL1 on the contact electrode EA. Furthermore, when the end portion of the contact electrode EB has a reverse taper shape, the cover state by the alignment film AL1 becomes worse.

  The inventors of the present application have found that corrosion is further remarkable in a portion where the alignment film AL1 disposed in the upper layer is thin like the end portion of the contact electrode EB.

  Therefore, in this embodiment, at least the portion of the common electrode CE that faces the end of the contact electrode EB to which the gate potential is supplied is removed, and a high potential is generated between the end of the contact electrode EB and the common electrode CE. To avoid that.

  FIG. 7 shows a configuration example of a cross section of the liquid crystal display panel LPN taken along line BB in the liquid crystal display device of the present embodiment.

  In this example, an electrode removal portion CEA is formed in which the electrode is removed at the portion of the common electrode CE facing the end portion of the contact electrode EB of the antistatic circuit 100.

  FIG. 8 shows a configuration example of the common electrode CE of the liquid crystal display device of the present embodiment. The common electrode CE has a stripe pattern in which electrodes extending in the second direction Y in the active area ACT are arranged in the first direction X at a predetermined interval. The common electrode CE is provided with an electrode removal portion CEA from which an electrode facing the end of the contact electrode EB is removed at a portion facing the region A where the antistatic circuit 100 is disposed around the active area ACT. Yes. The common electrode CE is fed by a conductive member TR arranged around the active area ACT.

  As described above, when the common electrode CE in the portion facing the end portion of the contact electrode EB is removed, the potential difference between the end portion of the contact electrode RB and the common electrode CE is avoided, and therefore the electric melting phenomenon is avoided. Is also avoided. As a result, according to the present embodiment, it is possible to provide a highly reliable liquid crystal display device without causing deterioration such as circuit corrosion even when used for a long time in a harsh environment such as high temperature and humidity. Can do.

  In the example shown in FIGS. 7 and 8, the common electrode CE is removed only in the portion facing the end portion of the contact electrode EB of the antistatic circuit 100, but at least the gate potential is supplied to the electrode removal portion CEA. As long as it is provided so as to face the end portion of the electrode arranged in the same layer as the pixel electrode PE, the present invention can be applied to electrodes other than the antistatic circuit 100. Even in this case, the above effect can be obtained. Furthermore, it is more effective to dispose the electrode removal portion CEA in a portion facing the end portion of the electrode disposed on the substantially flat layer.

  FIG. 9 shows another configuration example of the cross section of the liquid crystal display panel LPN along the line BB in the liquid crystal display device of the present embodiment.

  In this example, an electrode removal portion CEA is formed in which the electrode is removed at the portion of the common electrode CE facing the entire contact electrode EB of the antistatic circuit 100.

  FIG. 10 shows another configuration example of the common electrode CE of the liquid crystal display device of the present embodiment. In this example, the common electrode CE is provided with an electrode removal portion CEA in which the electrode facing the entire contact electrode EB is removed at a portion facing the region A where the antistatic circuit 100 is arranged around the active area ACT. It has been. Except for this point, the example is the same as the example shown in FIGS.

  As described above, even when the common electrode CE in a portion facing the entire contact electrode EB is removed or when it is used for a long time in a harsh environment such as high temperature and high humidity, deterioration such as circuit corrosion occurs. In addition, a highly reliable liquid crystal display device can be provided.

  In the example shown in FIGS. 9 and 10, the common electrode CE in the portion facing all the contact electrodes EB of the antistatic circuit 100 has been removed, but at least the gate potential is supplied to the electrode removal unit CEA. The electrode may be provided so as to face the entire electrode disposed in the same layer as the pixel electrode PE, and can be applied to electrodes other than the antistatic circuit 100. Even in this case, the above effect can be obtained. Furthermore, it is more effective to dispose the electrode removal portion CEA in a portion facing the entire electrode disposed on the substantially flat layer.

  FIG. 11 shows another configuration example of the common electrode CE of the liquid crystal display device of the present embodiment. In this example, the common electrode CE is provided with an electrode removal portion CEA in which a portion of the electrode facing the region A where the antistatic circuit 100 is disposed is removed around the active area ACT. Except this point, it is the same as the example shown in FIGS.

  In this way, even when the common electrode CE in the portion facing the region A is removed, even when used for a long time in a harsh environment such as high temperature and high humidity, the circuit is not deteriorated such as corrosion, and the reliability is improved. A liquid crystal display device with high performance can be provided.

  Further, as shown in FIG. 11, when the area where the common electrode CE is removed is enlarged, for example, when a conductive member is mixed in the liquid crystal layer LQ in the manufacturing stage or the use stage, the contact electrode and the common electrode CE of the antistatic circuit 100 are used. Is prevented from being conducted by the conductive member, and deterioration of display quality can be avoided.

  In addition, since the electrical resistance of the common electrode CE increases when the electrode removal part CEA from which the common electrode CE is removed is increased, the size of the electrode removal part CEA is preferably designed in consideration of the value of the electrical resistance.

  In the example shown in FIG. 11, the common electrode CE that is opposite to the region A is removed, but at least the gate potential is supplied to the electrode removal portion CEA and is arranged in the same layer as the pixel electrode PE. As long as it is provided so as to face a plurality of electrodes including the formed electrodes, it may be provided outside the region A where the antistatic circuit 100 is disposed. Even in this case, the above effect can be obtained.

  According to the present embodiment, the main common electrode CA is opposed to the source line S. In particular, when the main common electrode CA is disposed immediately above the source line S, the opening AP is formed as compared with the case where the main common electrode CA is disposed on the pixel electrode PE side with respect to the source line S. Thus, the transmittance of the pixel PX can be improved.

  Further, by disposing the main common electrode CA immediately above the source line S, it is possible to increase the inter-electrode distance between the pixel electrode PE and the main common electrode CA, thereby forming a horizontal electric field closer to the horizontal. It becomes possible to do. For this reason, it is possible to maintain the wide viewing angle, which is an advantage of the IPS mode, which is a conventional configuration.

  Further, according to the present embodiment, a plurality of domains can be formed in one pixel. Therefore, the viewing angle can be optically compensated in a plurality of directions, and a wide viewing angle can be achieved.

  In the above example, the case where the liquid crystal layer LQ is made of a liquid crystal material having positive (positive type) dielectric anisotropy has been described. However, the liquid crystal layer LQ has a negative dielectric anisotropy (negative). Type) liquid crystal material.

  In the present embodiment, the structure of the pixel PX is not limited to the example shown in FIG.

  The common electrode CE may include a sub-common electrode (not shown) extending along the first direction X in addition to the main common electrode CA described above. The main common electrode CA and the sub-common electrode are formed integrally or continuously. The sub-common electrode faces each of the gate lines G. Therefore, in this case, the pattern of the common electrode CE in the active area ACT has a lattice shape. When the pattern of the common electrode CE in the active area ACT is a lattice pattern, the electric resistance of the common electrode CE can be further reduced.

  In the present embodiment, the common electrode CE is opposed to the main common electrode CA provided on the array substrate AR (or opposed to the source wiring S) in addition to the main common electrode CA provided on the counter substrate CT. A second main common electrode may be provided. The second main common electrode extends substantially parallel to the main common electrode CA and has the same potential as the main common electrode CA. By providing such a second main common electrode, an undesired electric field from the source line S can be shielded.

  In addition to the main common electrode CA provided on the counter substrate CT, the common electrode CE may include a second sub-common electrode provided on the array substrate AR and facing the gate wiring G and the auxiliary capacitance line C. . The second sub-common electrode extends in a direction intersecting with the main common electrode CA and has the same potential as the main common electrode CA. By providing such a second sub-common electrode, it is possible to shield an undesired electric field from the gate line G and the auxiliary capacitance line C. According to such a configuration including the second main common electrode and the second sub-common electrode, it is possible to suppress further deterioration in display quality.

  As described above, according to the present embodiment, a highly reliable liquid crystal display device can be provided.

  Although several embodiments of the present invention have been described, these embodiments are presented by way of example and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the scope of the invention. These embodiments and modifications thereof are included in the scope and gist of the invention, and are included in the invention described in the claims and the equivalents thereof.

  LPN ... liquid crystal display panel, AR ... array substrate (first substrate), CT ... counter substrate (second substrate), LQ ... liquid crystal layer, ACT ... active area, PX ... pixel, G ... gate wiring, S ... source wiring, PE ... pixel electrode, CE ... common electrode, CA ... main common electrode, SB ... sealing material, LM ... liquid crystal molecule, CNT ... contact part, EA, EB ... contact electrode, CEA ... electrode removal part, AL1 ... first is hereinafter Film, AL2 ... second alignment film, 10, 20 ... insulating substrate, 11, 12 ... interlayer insulating film, 13 ... flattening film, 100 ... antistatic circuit.

Claims (15)

A plurality of pixel electrodes arranged in a matrix, a gate wiring extending along a row in which the pixel electrodes are arranged, a source wiring extending along a column, and a region around the region where the plurality of pixel electrodes are arranged A first substrate comprising: an electrode disposed in the same layer as the pixel electrode and supplied with a gate potential applied to the gate wiring;
A second substrate disposed opposite to the first substrate, comprising a common electrode facing the region where the plurality of pixel electrodes are disposed and the surrounding region;
A liquid crystal layer sandwiched between the first substrate and the second substrate,
The common electrode is a liquid crystal display device including an electrode removing portion at least in a portion facing an end portion of the electrode.   The liquid crystal display device according to claim 1, wherein the electrode removal portion is provided to face the entire electrode.   The liquid crystal display device according to claim 1, wherein the electrode removing unit is provided to face the plurality of electrodes.   4. The liquid crystal display device according to claim 1, wherein the electrode is disposed on an insulating layer, and the insulating layer is flat under an end portion of the electrode.   The liquid crystal display device according to claim 1, wherein the electrode is formed of a light-transmitting conductive material. The first substrate and the second substrate are fixed by a sealing agent disposed so as to surround a region where the plurality of pixel electrodes are disposed,
The liquid crystal layer is filled in a region surrounded by the first substrate, the second substrate, and the sealing agent,
The liquid crystal display device according to claim 1, wherein the electrode is disposed inside the sealant.   The common electrode has a stripe shape in which electrodes extending substantially parallel to the source wiring are arranged side by side in the extending direction of the gate wiring at a portion facing the region where the plurality of pixel electrodes are disposed. The liquid crystal display device according to claim 1, wherein the liquid crystal display device is a liquid crystal display device.   7. The liquid crystal display device according to claim 1, wherein the common electrode is arranged in a lattice shape in a portion facing a region where the plurality of pixel electrodes are arranged. The first substrate further includes a first alignment film covering the pixel electrode and the electrode,
The second substrate further includes a second alignment film covering the common electrode,
In the first alignment film, the liquid crystal molecules are initially aligned in the first alignment treatment direction, and in the second alignment film, the liquid crystal molecules are initially aligned in the second alignment treatment direction, and the first alignment treatment direction and the second alignment treatment direction. The liquid crystal display device according to claim 1, wherein the alignment treatment directions are parallel to each other and the same direction. A plurality of pixel electrodes arranged in a matrix, a gate wiring extending along a row in which the pixel electrodes are arranged, a source wiring extending along a column, and a region around the region where the plurality of pixel electrodes are arranged A first substrate comprising an antistatic circuit disposed on the substrate,
A second substrate disposed opposite to the first substrate, comprising a common electrode facing the region where the plurality of pixel electrodes are disposed and the surrounding region;
A liquid crystal layer sandwiched between the first substrate and the second substrate,
The antistatic circuit includes a thin film transistor, and an electrode that is electrically connected to the gate electrode of the thin film transistor and supplied with a potential applied to the gate wiring, and is disposed in the same layer as the pixel electrode.
The common electrode is a liquid crystal display device including an electrode removing portion at least in a portion facing an end portion of the electrode.   The liquid crystal display device according to claim 10, wherein the electrode removal portion is provided to face the entire electrode.   The liquid crystal display device according to claim 10, wherein the electrode removal portion is provided to face the plurality of electrodes.   The liquid crystal display device according to claim 10, wherein the electrode is disposed on an insulating layer, and the insulating layer is flat under an end portion of the electrode.   The liquid crystal display device according to claim 10, wherein the electrode is formed of a light-transmitting conductive material. The first substrate and the second substrate are fixed by a sealing agent disposed so as to surround a region where the plurality of pixel electrodes are disposed,
The liquid crystal layer is filled in a region surrounded by the first substrate, the second substrate, and the sealing agent,
The liquid crystal display device according to claim 11, wherein the static electricity prevention circuit is disposed inside the sealant.

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