JP2013035038A - Semiconductor chip and method for manufacturing the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To suppress a crack from developing along a grinding mark that is formed on the back surface of a semiconductor chip.SOLUTION: The semiconductor chip 1 includes a groove 4 that is formed along at least each of two sides facing each other one by one so as to pass across the grinding mark 2.

Description

  The present invention relates to a semiconductor chip and a manufacturing method thereof.

In recent years, semiconductor packages have been improved in function, size, and thickness, and further reduction in the thickness of semiconductor chips has been demanded. The semiconductor chip is thinned by grinding the back surface of the semiconductor chip.
As the semiconductor chip becomes thinner, the mechanical strength of the semiconductor chip, that is, the chip bending strength is lowered. For this reason, in order to increase the mechanical strength of the semiconductor chip, after grinding the back surface of the semiconductor wafer, that is, the back surface of the semiconductor chip contained in the semiconductor wafer, the grinding marks (saw marks) and the like are removed to provide a mirror surface (flattening) ) Stress relief processing may be performed.

  The stress relief treatment includes dry polishing, wet polishing, etching method, and the like. For example, in stress relief processing by dry polishing, after grinding the back surface of the wafer, as shown in FIG. 14A, a tape 103 is attached to the front surface, and the back surface of the wafer 100 held on the table 102 is Polishing is performed by bringing the stress relief wheel 101 provided with the stress relief grindstone 101 </ b> A into contact with the wheel. As a result, as shown in FIG. 14B, grinding marks and the like on the back surface of the wafer 100 are removed, and the back surface of the wafer 100 is mirror-finished.

  Thus, the semiconductor chip 104 manufactured by performing the back surface grinding process and then performing the stress relief process has a circuit 105 on the surface as shown in FIG. 15C, and FIG. As shown in FIG. 4, the back surface is mirror-finished. On the other hand, the semiconductor chip 104 manufactured without performing the stress relief process after the back surface grinding process has a circuit 105 on the surface as shown in FIG. As shown in FIG. 3, the back surface has grinding marks 106.

  In addition to the above method, there is a method for performing stress relief processing. For example, there is stress relief processing by laser processing.

Japanese Patent No. 3789802

Annette Teng Cheung, "Dicing die attach films for high volume stacked die application", Electronic Components and Technology Conference, 2006. Proceedings. 56th

By the way, as the semiconductor chip becomes thinner, it becomes important to reduce the size of chipping that is known to occur, for example, in the dicing process. One of the factors that increase the size of chipping is the growth of cracks along grinding marks formed on the back surface of the semiconductor chip.
When the back surface of the semiconductor wafer, that is, the back surface of the semiconductor chip included in the semiconductor wafer is ground in order to reduce the thickness of the semiconductor chip, a grinding mark is formed on the back surface of the semiconductor wafer. In this case, as shown in FIGS. 16A and 16B, cracks may grow along the grinding striation 106 due to chipping generated in the semiconductor chip 104 in a dicing process, for example.

In addition, when stress relief processing is performed, cracks are likely to be prevented because grinding streaks are removed, but in reality, when cracks are larger than when stress relief processing is not performed There is.
This is considered to be due to the following reason.
That is, if the back surface of the substrate is mirror-finished, the adhesion between the dicing tape and the semiconductor chip is lowered, and vibration and impact during dicing are more transmitted to the semiconductor chip.
In addition, when dicing a wafer having a mirror back surface, the required energy is different from that of a wafer having grinding marks, which may lead to the generation of large cracks.

  Therefore, it is desired to suppress the growth of cracks along the grinding striations formed on the back surface of the semiconductor chip.

This semiconductor chip is provided with a groove that is provided along each of at least two opposing sides and that crosses the grinding striations.
The method for manufacturing a semiconductor chip includes a step of grinding a back surface of a semiconductor chip, and a groove formation for forming a groove crossing a grinding mark formed on the back surface of the semiconductor chip one by one along at least two opposing sides. And having a process.

  Therefore, according to the present semiconductor chip and the manufacturing method thereof, there is an advantage that it is possible to suppress the growth of cracks along the grinding marks formed on the back surface of the semiconductor chip.

It is a schematic diagram which shows the structure of the semiconductor chip of this embodiment, Comprising: (A) has shown the surface, (B) has shown the back surface. (A)-(D) are the schematic diagrams for demonstrating the back surface grinding process included in the manufacturing method of the semiconductor chip of this embodiment, (A) has shown the surface of the wafer, (B ), (C) shows a cross section, and (D) shows the back surface of the wafer. It is typical sectional drawing for demonstrating the groove | channel formation process included in the manufacturing method of the semiconductor chip of this embodiment. (A)-(D) are the schematic diagrams for demonstrating the groove | channel formation process included in the manufacturing method of the semiconductor chip of this embodiment, (A) has shown the back surface of the wafer, (B) Shows an enlarged back surface of a chip included in the wafer, (C) shows a cross section of the chip, and (D) shows an enlarged cross section of the chip. It is a typical perspective view which shows the structure of the laser irradiation apparatus used in the laser processing process of the manufacturing method of the semiconductor chip of this embodiment. It is a schematic diagram for demonstrating the scanning method of the laser spot in the laser processing process of the manufacturing method of the semiconductor chip of this embodiment. (A)-(D) are typical sectional drawings for demonstrating the dicing process and the pick-up process which are included in the manufacturing method of the semiconductor chip of this embodiment. It is a schematic diagram for demonstrating the structure of the semiconductor chip of the modification of this embodiment, and its manufacturing method, Comprising: (A) has shown the back surface of the wafer, (B) is one chip | tip contained in a wafer. The rear surface is shown in an enlarged manner, and (C) shows the rear surface of another chip included in the wafer in an enlarged manner. (A), (B) is a schematic diagram for explaining the growth direction of cracks, (A) shows the back surface of the chip, and (B) shows an enlarged part thereof. (A), (B) is a schematic diagram for explaining the growth direction of cracks, (A) shows the back surface of the chip, and (B) shows an enlarged part thereof. BRIEF DESCRIPTION OF THE DRAWINGS It is a schematic diagram for demonstrating the structure of the semiconductor chip of this embodiment, and its manufacturing method, Comprising: (A) has shown the back surface of the chip | tip, (B) has expanded and shown the one part. It is a schematic diagram for demonstrating the structure of the semiconductor chip of the other modification of this embodiment, and its manufacturing method, Comprising: (A) has shown the back surface of a chip | tip, (B) expanded the part. It shows. (A)-(D) are the schematic diagrams for demonstrating the groove | channel formation process included in the manufacturing method of the semiconductor chip of the other modification of this embodiment, (A) shows the back surface of a wafer. (B) shows an enlarged back surface of a chip included in the wafer, (C) shows a cross section of the chip, and (D) shows an enlarged cross section of the chip. (A) is typical sectional drawing for demonstrating a general stress relief process, (B) has shown the back surface of the wafer after performing a stress relief process. (A), (B) is a schematic view showing a chip manufactured by performing a general back surface grinding process and then performing no stress relief process, and (A) shows the surface of the chip; (B) shows the back surface of the chip. (C) and (D) are schematic views showing a chip manufactured by performing a general back grinding process and then performing a stress relief process, and (C) shows the surface of the chip. , (D) shows the back side of the chip. It is a schematic diagram for demonstrating the chipping (crack) which arises along a grinding mark (saw mark) at a dicing process, Comprising: (A) has shown the cross section of the chip | tip, (B) has shown the back surface of the chip | tip. Yes.

Hereinafter, a semiconductor chip and a manufacturing method thereof according to an embodiment of the present invention will be described with reference to FIGS.
As shown in FIG. 1, the semiconductor chip according to the present embodiment has a grinding mark 2 and a crushed layer 3 [see FIG. 4D] formed on the back surface, that is, the back surface (back surface) 1 </ b> B of the semiconductor substrate. The semiconductor chip 1 includes a groove 4 that cuts the grinding striation 2 and the crushing layer 3 across the grinding striation 2. In the portion where the groove 4 is formed, the grinding striations 2 and the crushing layer 3 are removed and the surface is flattened (ground surface flattening; mirror surface). A circuit 5 (circuit pattern; pattern layer) including a semiconductor element or the like is formed on the surface 1A of the semiconductor chip 1. For this reason, the surface of the semiconductor chip 1 is also referred to as a circuit surface, a circuit formation surface, or an element formation surface.

  In FIG. 1, a rectangular semiconductor chip (chip) 1 in which a plurality of grinding striations 2 extending in parallel to the diagonal direction is formed on the back surface is shown as an example. That is, in FIG. 1, an example in which the direction in which the grinding streak 2 formed on the back surface of the semiconductor chip 1 extends (saw mark direction) is about 45 degrees with respect to each side of the semiconductor chip 1 is taken as an example. Show. Moreover, the crushing layer 3 is formed in the whole lower surface of these grinding stripes 2 [refer FIG.4 (D)].

  In the present embodiment, the grinding striations 2 and the crushing layer 3 [see FIG. 4D] are cut in the vicinity (near the outer periphery) of each of the four sides (edges) of the rectangular semiconductor chip 1. As described above, the grooves 4 are formed inside the four sides of the semiconductor chip 1 in a quadrangular shape (rectangular shape) along these four sides. That is, the groove 4 is formed in a line shape along each of the four sides of the semiconductor chip 1.

  In the present embodiment, a plurality of rectangular grooves 4A and 4B are formed. Inside the grooves 4A formed in a rectangular shape along the four sides of the semiconductor chip 1, along the grooves 4A. Another groove 4B is formed in a square shape. That is, in this embodiment, two grooves 4A and 4B are provided along the four sides of the semiconductor chip 1. In this case, from the outer side to the inner side of the back surface 1B of the semiconductor chip 1, regions with the grinding striations 2 and the crushed layer 3 and flattened regions are alternately present [FIG. 4 (D). reference].

Here, although two grooves are provided, the present invention is not limited to this, and only one groove may be provided, or a plurality of (multiple) grooves may be provided.
Further, as will be described later, the grinding striations 2 are generated by back-grind polishing, and are simply referred to as polishing marks. Moreover, since the groove | channel 4 is formed by irradiating a laser and melt | dissolving and removing the grinding mark 2 and the crushing layer 3 so that it may mention later, it is also called a fusion | melting trace or a laser processing trace. Moreover, the crushing layer 3 is also called a microcrack or a damage layer.

Hereinafter, the semiconductor chip manufacturing method according to the present embodiment will be specifically described with reference to FIGS.
First, as shown in FIG. 2A, a surface 10A of a semiconductor wafer (wafer) 10 before being separated into semiconductor chips 1 is defined by streets 11, which are planned separation lines, and is arranged in a matrix. A chip 1 is provided. Each chip 1 is formed with a circuit 5 (circuit pattern; pattern layer) including semiconductor elements and the like. Therefore, the surface 10A of the wafer 10 is also referred to as a circuit formation surface or an element formation surface. The chip 1 is also referred to as a chip area, a circuit formation area, an element formation area, or an effective area. The street 11 is also referred to as a scribe area.

First, as shown in FIGS. 2B to 2D, a back surface grinding process is performed on the wafer 10 on which the circuit 5 is formed on the front surface 10A through the wafer process in order to make the wafer 10 thinner. This process is referred to as a back grinding process.
That is, first, as shown in FIG. 2B, the surface protective tape 6 is attached to the surface 10A side of the wafer 10, that is, the circuit 5 side formed by the wafer process using the roller 8. Thereby, the circuit forming surface 10A of the wafer 1 is protected by the surface protection tape 6 during back grinding. That is, at the time of back surface grinding, the wafer 10 is held on the suction table 7 in order to process the back surface 10B side of the wafer 10. At this time, the circuit forming surface 10A of the wafer 10 does not contact the suction table 7. In this way, the surface protection tape 6 is used for protection. The surface protective tape 6 is also referred to as a BG tape. Further, the intermediate table 7 is also referred to as a chuck table (C / T).

  Next, as shown in FIG. 2 (C), the wafer 10 is turned upside down and held on the suction table 7 of the back grinding apparatus with the back surface 10B of the wafer 10 facing up. Then, the back surface of the semiconductor chip 1 included in the wafer 10 is ground to make the thickness of the wafer 10 a desired thickness. Here, the wafer 10 is turned upside down and held on the suction table 7 of the back grinding apparatus, and a grinding wheel (back grinding wheel; BG grinding wheel) 9A provided on a back grinding wheel (BG wheel) 9 on the back surface 10B of the wafer 10 is provided. Are brought into contact with each other, and the back surface 10B of the wafer 10 is back-grinded to make the wafer 10 have a desired thickness. For example, the back surface 10B of the wafer 10 can be ground by friction by bringing the BG grindstone 9A into contact with the back surface 10B of the wafer 10 while rotating both the BG wheel 9 and the suction table 7. This process is called a back grinding process. Further, back grinding is also referred to as mechanical back surface polishing or back surface grinding.

  In the back grinding apparatus, the thickness of the wafer 10 can be monitored during back grinding. For example, it is possible to monitor the thickness of the wafer 10 based on the difference between the contact cores on the surfaces of the suction table 7 and the wafer 10. Further, in the back grinding apparatus, the conditions during the back grinding process can be switched depending on the set conditions, and the motor rotation speed, the descending speed of the BG wheel 9 and the like can be changed.

When such a back surface grinding process is performed, as shown in FIG. 2 (D), the windmill-like grinding streaks 2 and the crushed layer 3 [FIG. 4 (D)] are formed on the back surface 10B of the wafer 10, that is, the ground surface. Reference] is formed. Here, the height (unevenness) of the grinding striations 2 is about 0.1 μm. Further, the depth of the crushing layer 3, that is, the maximum depth of the crushing layer 3 from the top of the convex portion of the grinding streak 2 is about 1 μm.
Next, as shown in FIGS. 3 and 4, the wafer 10 is held on the table 12 of the laser irradiation device 14 (see FIG. 5) with the back surface 10B of the wafer 10 facing up and the front surface 10A facing the table 12 side. A groove 4 is formed across the grinding mark 2 formed on the back surface 10B of the wafer 10, that is, the back surface of the semiconductor chip 1 included in the wafer 10, and cutting the grinding mark 2 and the crushed layer 3 (see FIG. 4). . This process is called a groove forming process. The table 12 is also referred to as a chuck table.

  In FIG. 4, a rectangular chip 1 having a plurality of grinding striations 2 extending in parallel to the diagonal direction on the back surface is shown as an example. That is, FIG. 4 shows an example in which the direction in which the grinding striations 2 formed on the back surface of the chip 1 extend (saw mark direction) is about 45 degrees with respect to each side of the chip 1. Yes. Further, the crushing layer 3 is formed on the entire lower surface of the grinding striations 2.

  Here, in order to form the groove 4 that cuts the grinding striation 2 and the crushing layer 3 across the grinding striation 2, the back surface 10B of the wafer 10 on which the grinding striation 2 and the crushing layer 3 are formed, that is, each Laser processing (laser processing) is performed on the back surface 1B of the chip 1 by irradiating a laser so as to cross the grinding mark 2 and melting and removing the grinding mark 2 and the crushed layer 3. That is, by irradiating a laser so as to cross the grinding striation 2, the grinding striation 2 and the crushing layer 3 are removed and flattened (mirrored), so that the grinding striation 2 and the grinding striation 2 and crushing are crossed. A groove 4 for cutting the layer 3 is formed. For this reason, the groove 4 is defined by a laser processing region (laser irradiation region; laser melting region), that is, a laser cut line. That is, the portion where the groove 4 is formed is determined by the laser processing layout. This process is referred to as a laser processing process, a laser irradiation process, or a grinding streak and a crush layer removal process.

  In the present embodiment, as shown in FIG. 4, the grinding striations 2 are traversed near each of the four sides of the back surface 10 </ b> B of the wafer 10, that is, the back surface 1 </ b> B of each quadrilateral chip 1. The grooves 4 are formed inside the four sides of the chip 1 in a rectangular shape (rectangular shape) along these four sides so that the grinding striations 2 and the crushing layer 3 are cut. That is, the groove 4 is formed in a line shape along each of the four sides of the chip 1. In this case, the laser cut line is a line along each of the four sides of the chip 1, that is, a square cut line along the four sides. Thus, since the grinding striations 2 and the crushing layer 3 are cut by the grooves 4, chipping occurs at the outer peripheral portion of the chip 1 in a dicing process described later, and along the grinding striations 2 (particularly the roots of the convex portions). It is possible to suppress the growth of cracks along the portion (that is, along the convex portion in the thin and weak concave portion). That is, the growth of cracks generated along the grinding striations 2 can be stopped by the grooves 4. Thereby, the magnitude | size of a crack can be made small.

  Furthermore, in this embodiment, a plurality of rectangular grooves 4A and 4B are formed. That is, another groove 4 </ b> B is formed in a square shape along the groove 4 </ b> A inside the groove 4 </ b> A formed in a square shape along the four sides of the chip 1. Thus, in the present embodiment, the two grooves 4A and 4B are formed along the four sides of the chip 1. In this case, the laser cut lines are two cut lines along the four sides of the chip 1. In addition, from the outer side to the inner side of the back surface 1B of the chip 1, there are alternately regions (grinding unprocessed regions) where the grinding striations 2 and the crushing layer 3 are present, and flattened regions (laser processing regions). It will be. Thereby, chipping occurs in the outer peripheral portion of the chip 1 in the dicing process described later, and when the crack grows along the grinding stripe 2, even if the growth of the crack cannot be stopped in the outer groove 4A, It is possible to stop the growth of cracks by the inner groove 4B. Thus, the effect of suppressing the growth of cracks is increased by increasing the number of grooves 4.

Here, although two grooves are provided, the present invention is not limited to this, and only one groove may be provided, or a plurality of (multiple) grooves may be provided.
Thus, in this embodiment, in order to suppress the crack growth along the grinding striations 2 without performing the stress relief process, the grinding striations 2 and the crushing layer are crossed over the grinding striations 2. A groove 4 for cutting 3 is formed, and the grinding streak 2 and the crushing layer 3 are left in a region other than the portion where the groove 4 of each chip 1 is formed. For this reason, possibility that a big crack will generate | occur | produce in a dicing process like the case where stress relief processing is implemented can be reduced. Since it is not necessary to use chemicals or abrasives as in the case of performing stress relief processing, it is possible to reduce costs.

  In particular, the outer periphery of each chip 1 is not subjected to laser treatment, and the grinding streaks 2 and the crushing layer 3 remain. That is, the grinding striations 2 and the crushed layer 3 in the vicinity of the dicing line to be diced in the dicing process described later remain. Thereby, in the dicing process described later, since the adhesion between each chip 1 and the dicing tape 13 does not deteriorate in the vicinity of the dicing line, stable dicing can be performed. Thus, even if the grooves 4 are formed on the back surface 1B of each chip 1 as described above, the quality of dicing does not deteriorate. In addition, compared with the case where stress relief is performed, the adhesion between the dicing tape 13 and each chip 1 does not decrease, and therefore, the chip 1 is peeled off from the dicing tape 13 due to an impact during dicing, and the yield decreases. Nor. For example, when a small-sized chip 1 is manufactured, there is a problem that the chip 1 is peeled off from the dicing tape 13 due to the impact of dicing and the yield is lowered. In such a case, the yield is not lowered. Can be.

Further, the portion where the groove 4 is formed is flattened by removing the grinding striations 2 and the crushing layer 3, and a portion with reduced back surface roughness (surface roughness) is formed. The mechanical strength, that is, the chip bending strength can be improved.
In such a laser processing step, for example, by using a laser irradiation device 14 as shown in FIG. 5, the back surface 10 </ b> B of the wafer 10 on which the grinding striations 2 and the crushed layer 3 are formed, that is, the semiconductor chip included in the wafer 10. What is necessary is just to irradiate the back surface 1B of 1 with a laser. In the present embodiment, the laser irradiation device 14 has a mechanism for scanning the laser spot LS, and can irradiate a desired portion of the back surface 10B of the wafer 10 with a laser. The laser irradiation device 14 is also referred to as a laser irradiation machine or a laser processing device.

  The laser irradiation device 14 including this scanning mechanism includes a laser oscillator (laser generation device) 15, a shutter 16, an X-direction galvanometer mirror 17, a Y-direction galvanometer mirror 18, and a lens 19. Then, the laser (laser light) emitted from the laser oscillator 15 passes through the shutter 16, is reflected by the X direction galvano mirror 17 and the Y direction galvano mirror 18, passes through the lens 19, and is applied to the back surface 10 </ b> B of the wafer 10. It comes to be irradiated.

Here, it is preferable to use a laser having a wavelength (for example, 532 nm) that does not transmit the silicon constituting the wafer 10, such as a second harmonic of a semiconductor-pumped YVO4 laser.
In particular, in the laser irradiation apparatus 14 of the present embodiment, the X-direction galvanometer mirror 17 that scans the laser spot LS in the X direction on the back surface 10B of the wafer 10 and the laser spot LS in the Y direction on the back surface 10B of the wafer 10 are scanned. The laser irradiation position on the back surface 10B of the wafer 10 can be controlled using the Y-direction galvanometer mirror 18 to be operated. Here, the laser spot LS can be scanned in the X and Y directions on the back surface 10B of the wafer 10 by independently rotating the X direction galvanometer mirror 17 and the Y direction galvanometer mirror 18. . Further, in the laser irradiation apparatus 14, the presence / absence of laser irradiation on the back surface 10 </ b> B of the wafer 10 can be controlled by opening / closing the shutter 16.

  Then, using the laser irradiation device 14 having such a configuration, as shown in FIG. 6, the back surface 10 </ b> B of the wafer 10, that is, the rectangular groove 4 on the back surface 1 </ b> B of the semiconductor chip 1 included in the wafer 10 is formed. The laser spot LS is scanned so that the portion to be irradiated is irradiated with the laser. As a result, the back surface 10B of the wafer 10, that is, the region where the groove 4 of the back surface 1B of the semiconductor chip 1 included in the wafer 10 is formed is irradiated with the laser, and the other region is not irradiated with the laser. And the crushing layer 3 can be left. In FIG. 6, solid arrows indicate the laser scanning direction.

Here, the spot diameter φ of the laser spot LS is preferably about 5 to about 100 μm, for example, and the laser spots LS are preferably irradiated so as to overlap each other.
Further, in the present embodiment, as described above, the grinding striations 2 and the crushing layer 3 are removed to form the grooves 4, so that the unevenness of the grinding streaks 2 is about 0.1 μm, Considering that the depth is about 1 μm, the laser irradiation conditions are set so that the depth of the groove 4, that is, the depth from the top of the convex portion of the grinding streak 2 is about 1 μm. Yes. Here, the laser irradiation conditions are set so that the depth of the groove 4 is about 1 μm in order to remove the entire crushing layer 3 and form the groove 4, but the crushing layer 3 is partially removed. When the groove 4 is formed, the laser irradiation conditions may be set so that the depth of the groove 4 is in the range of about 0.1 μm to about 1 μm. However, the depth of the crush layer 3 varies depending on the processing conditions of the back grind. For this reason, what is necessary is just to determine the depth of the groove | channel 4 according to the depth of the crushing layer 3. FIG. That is, the depth of the groove 4 varies depending on the backgrinding processing conditions.

  In this way, the laser irradiation apparatus 7 that scans the laser spot LS and irradiates the laser does not need a mask. However, since the processing time is longer than that using a mask, a small quantity of various types of chips are manufactured. Suitable for In addition, since only good chips can be selected and irradiated with laser, after dicing, it is possible to select good / bad only by looking at the back surface 1B of the chip 1.

  Here, the case where the X-direction galvanometer mirror 17 and the Y-direction galvanometer mirror 18 are used as the scanning mechanism is described as an example. However, the present invention is not limited to this, and for example, in the X-direction and the Y-direction. An XY table to be scanned may be used. As the scanning mechanism, an X-direction galvanometer mirror and a Y-direction table that scans in the Y direction may be used, or a Y-direction galvanometer mirror and an X-direction table that scans in the X direction may be used. .

  Next, as shown in FIG. 7A, the wafer 10 is mounted on the dicing tape 13 held on the table 23 of the dicing apparatus with the back surface 10B of the wafer 10 facing down (wafer mounting step). The surface protective tape 6 is peeled off (surface protective tape peeling step). This process is called a mount removal process. The table 23 is also referred to as a chuck table.

  In some cases, the surface protective tape 6 is peeled off and then mounted on the dicing tape 13. However, since the wafer diameter is increased to about 200 mm or more, the wafer is likely to be damaged during peeling. The former method is common. Further, when manufacturing a wafer having a wafer diameter of about 200 mm or more, generally, an apparatus for continuously performing a wafer mounting process and a surface protection tape peeling process is used. In this apparatus, a frame ring for holding a dicing tape 13 is used. 20 is also attached at the same time. Moreover, when manufacturing a wafer of about 300 mm or more, it is common to use an in-line apparatus integrated with a back grinding apparatus.

Next, as shown in FIGS. 7B and 7C, the wafer 10 is diced by the dicing blade 21. As a result, the wafer 10 is separated into a plurality of chips 1. This process is called a dicing process.
Next, as shown in FIG. 7C, the plurality of diced chips 1 are conveyed to a mounting apparatus (die mounting apparatus) while being held by the frame ring 20 and the dicing tape 13.

  Then, UV irradiation is performed from the back side of the dicing tape 13 with a mounting device (this process is referred to as a UV irradiation process), and the adhesive strength of the dicing tape 13 is reduced. As shown in FIG. Is removed from the dicing tape 13 by the push-up pins 22 and picked up by being adsorbed by a pick-up tool (not shown). This process is called a pickup process. Then, each picked up chip 1 is transported to the mounting board and mounted on the mounting board. This process is called a chip mounting process.

Therefore, according to the semiconductor chip and the manufacturing method thereof according to the present embodiment, there is an advantage that cracks can be prevented from growing along the grinding striations 2 formed on the back surface 1B of the semiconductor chip 1. Thereby, the quality of the semiconductor chip 1 can be improved, and the yield can be improved.
In addition, this invention is not limited to the structure described in embodiment mentioned above, A various deformation | transformation is possible in the range which does not deviate from the meaning of this invention.

For example, in the above-described embodiment, a case where the square groove 4 is formed in the square chip 1 having a plurality of grinding marks 2 extending in parallel to the diagonal direction on the back surface will be described as an example. Yes. In other words, the description is given by taking as an example the direction in which the grinding striations 2 formed on the back surface 1 </ b> B of the chip 1 extend (saw mark direction) is about 45 degrees with respect to each side of the chip 1.
However, as shown in FIGS. 8A to 8C, since the grinding striations 2 are formed in a windmill shape on the back surface 10 </ b> B of the wafer 10, the back surface of the chip 1 depends on the position of the chip 1 on the wafer 10. The direction of the grinding striations 2 formed on 1B is different.

For example, as shown in FIGS. 8B and 8C, a plurality of grinding striations 2 extending in parallel in a direction from one side surface to another side surface opposite to the one side surface are formed on the back surface. There is also a rectangular chip 1.
For example, as shown in FIG. 8B, the saw mark direction in which the grinding striations 2 formed on the back surface 1B of the chip 1 extend is on a pair of sides of the chip 1 (left and right sides in the figure; left and right side surfaces). In some cases, they are parallel to each other.

In this case, the rectangular groove 4 may be formed as in the above-described embodiment, but is not limited thereto, and is, for example, orthogonal to a pair of sides (left and right sides in the figure) of the chip 1. The linear grooves 4 (4A and 4B) may be formed inside each of the other pair of sides (upper and lower sides in the figure; upper and lower side surfaces) in parallel with the other pair of sides.
That is, as shown in FIGS. 9A and 9B, cracks that occur near the pair of sides (left and right sides in the figure) of the chip 1 and grow along the grinding stripes 2 Since the trace 2 extends in parallel with the pair of sides, it grows along the pair of sides and does not grow toward the inside of the chip 1. For this reason, the line-shaped groove | channel 4 extended in parallel along each of a pair of edge | side of the chip | tip 1 does not need to be formed.

  On the other hand, as shown in FIGS. 10A and 10B, cracks are generated near the other pair of sides (upper and lower sides in the figure) of the chip 1 and grow along the grinding striations 2. Since the grinding striations 2 extend in a direction perpendicular to the other pair of sides, the grinding striations 2 grow along the direction perpendicular to the other pair of sides and grow toward the inside of the chip 1. For this reason, the groove | channel 4 is formed in the inside of each of a pair of other edge | side of the chip | tip 1 in the shape of a line in parallel with another pair of edge | side.

Further, for example, as shown in FIG. 8C, the saw mark direction in which the grinding marks 2 formed on the back surface 1B of the chip 1 extend is a pair of sides of the chip 1 (upper and lower sides in the figure; upper and lower side surfaces). ) In some cases.
In this case, the rectangular groove 4 may be formed as in the above-described embodiment, but the present invention is not limited to this. For example, it is orthogonal to a pair of sides (upper and lower sides in the figure) of the chip 1. Alternatively, the linear grooves 4 (4A, 4B) may be formed inside each of the other pair of sides (left and right sides in the figure; left and right side surfaces) in parallel to the other pair of sides.

That is, cracks that occur near the pair of sides of the chip 1 (upper and lower sides in the figure) and grow along the grinding stripes 2 extend in parallel to the pair of sides. It grows along a pair of sides and does not grow toward the inside of the chip 1. For this reason, the line-shaped groove | channel 4 extended in parallel along each of a pair of edge | side of the chip | tip 1 does not need to be formed.
On the other hand, cracks that occur near the other pair of sides (left and right sides in the figure) of the chip 1 and grow along the grinding stripes 2 are perpendicular to the other pair of sides. Therefore, it grows along the direction orthogonal to the other pair of sides and grows toward the inside of the chip 1. For this reason, the groove | channel 4 is formed in the inside of each of a pair of other edge | side of the chip | tip 1 in the shape of a line in parallel with another pair of edge | side.

  Thus, in all the chips 1, it is not necessary to form the line-shaped grooves 4 along the four sides to form a square shape, and the grinding striations formed on the back surface 1 </ b> B of the chip 1. The position where the line-shaped groove 4 is formed, that is, the laser cut line may be determined according to the direction in which 2 extends. That is, when the saw mark direction has an angle with respect to the side of the chip 1, the linear groove 4 may be formed along that side. For example, based on the shape of the grinding streak 2, a laser processing recipe is created, and only the laser cut line having an angle with respect to the saw mark direction is selected and set to perform laser processing, that is, in the saw mark direction. On the other hand, the line-shaped groove 4 may be formed by setting so as not to perform laser processing based on the laser cut line in which the laser cut line is parallel. In addition, although the shape of the grinding trace 2 changes with grinding conditions, confirmation of the shape of the grinding trace 2 is possible by magic mirror observation, for example. In this case, the position where the line-shaped groove 4 is formed differs depending on the position of the chip 1 on the wafer 10.

In short, it is only necessary to provide grooves on the back surface of the semiconductor chip, which are each provided at least along two opposing sides and cross the grinding striations. In this case, in the groove forming step of the semiconductor chip manufacturing method described above, a groove crossing the grinding striation formed on the back surface of the semiconductor chip is formed one by one along at least two opposing sides. good.
Moreover, in the above-mentioned embodiment and modification, since the crushing layer 3 may become a factor of crack generation, as shown to FIG. 11 (A) and (B), the groove | channel 4 (4A, 4B) is ground. Although not only the streak 2 but also the crushing layer 3 is a groove for cutting, it is not limited to this. In FIGS. 11A and 11B, the saw mark direction in which the grinding marks 2 formed on the back surface 1B of the chip 1 extend is a pair of sides of the chip 1 (left and right sides in the figure; left and right side surfaces). However, as in the above-described embodiment, the saw mark direction in which the grinding striations 2 formed on the back surface 1B of the chip 1 extend corresponds to each of the chips 1. The same applies when the angle is about 45 degrees with respect to the side.

  For example, as shown in FIGS. 12A and 12B, the groove 4 (4A, 4B) may be a groove 4 that cuts the grinding streak 2. That is, the grooves 4 may be formed by removing only the grinding striations 2 and flattening by irradiating with a laser. Thus, even if it is a case where the groove | channel 4 is formed by removing only the grinding mark 2 and planarizing, without removing the crushing layer 3 in the depth direction, the grinding mark 2 is cut | disconnected, Since the directionality is interrupted, it is possible to stop the growth of cracks along the grinding striations 2 at the groove 4 (laser processing location). Further, since the grinding striations 2 are flattened, the mechanical strength of the chip 1 can be improved. In this case, considering that the unevenness of the grinding streak 2 is about 0.1 μm, the depth of the groove 4, that is, the depth from the top of the convex portion of the grinding streak 2 is about 0.1 μm. The laser irradiation conditions may be set so that

However, the effect of stopping the growth of cracks is enhanced by removing even the crushing layer 3 that can be a cause of occurrence of cracks as in the above-described embodiment, compared with the case of removing only the grinding striations 2.
In the above-described embodiment, the rectangular grooves 4 are separately formed in each of the plurality of chips 1, but the present invention is not limited to this. That is, the laser processing layout (laser cut line) as shown in FIGS. 4A to 4D is used, but the present invention is not limited to this.

  For example, as shown in FIGS. 13 (A) to (D), a linear groove 4 (4A, 4B) is continuously formed on a plurality of chips 1 so that each of the plurality of chips 1 has a well shape. The groove 4 may be formed. That is, a laser processing layout (laser cut line) as shown in FIGS. As a result, the grooves 4 can be formed in the plurality of chips 1 by one laser scanning, and the manufacturing tact time can be increased.

  Further, for example, in the above-described embodiment, the laser irradiation device 14 that scans the laser spot LS is used in the laser processing step. However, the present invention is not limited to this. For example, you may use the laser irradiation apparatus which irradiates a laser using a mask. In this case, the mask may be such that the groove pattern allows the laser to pass therethrough and the other areas block the laser. Using the laser irradiation apparatus having such a configuration, the laser is not irradiated on the back surface of the wafer, that is, the portion other than the portion where the groove on the back surface of the semiconductor chip included in the wafer is formed. The laser is irradiated through a mask so that the laser is irradiated. In this case, since the laser is irradiated to the back surface of the wafer, that is, the back surface of the semiconductor chip included in the wafer, through the mask, the groove pattern formed on the mask is transferred to the back surface of the wafer to form a groove. It will be. As a result, a portion where the groove is formed without irradiating the laser on the back surface of the wafer, that is, the region other than the portion where the groove on the back surface of the semiconductor chip included in the wafer is formed, that is, the region where the grinding mark and the crush layer are left Can be irradiated with a laser. In such a laser irradiation apparatus that irradiates a laser using a mask, a mask is necessary. However, since the laser can be irradiated to the back surface of the wafer at a time, the processing time can be shortened.

DESCRIPTION OF SYMBOLS 1 Semiconductor chip 1A The surface of a semiconductor chip 1B The back surface of a semiconductor chip 2 Grinding mark 3 Shatter layer 4, 4A, 4B Groove 5 Circuit 6 Surface protection tape 7 Table 8 Roller 9 Back grind wheel 9A Back grindstone 10 Wafer 10A Wafer surface 10B Backside of Wafer 11 Street 12 Table 13 Dicing Tape 14 Laser Irradiation Device 15 Laser Oscillator 16 Shutter 17 X Direction Galvano Mirror 18 Y Direction Galvano Mirror 19 Lens 20 Frame Ring 21 Dicing Blade 22 Push Pin 23 Table LS Laser Spot

Claims (6)

  A semiconductor chip, comprising a groove that traverses a grinding striation, each provided at least along two opposing sides.   The semiconductor chip according to claim 1, wherein the groove is a groove for cutting a fractured layer formed on a back surface of the semiconductor chip. Grinding the backside of the semiconductor chip;
A method of manufacturing a semiconductor chip, comprising: forming a groove crossing a grinding striation formed on the back surface of the semiconductor chip, one by one along at least two opposing sides.   The method for manufacturing a semiconductor device according to claim 3, wherein in the groove forming step, a groove for cutting a fractured layer formed on the back surface of the semiconductor chip is further formed.   The said groove | channel formation process WHEREIN: The said groove | channel is formed by irradiating a laser so that the said grinding striation may be crossed and removing the said grinding striation, The manufacturing method of the semiconductor chip of Claim 3 characterized by the above-mentioned. .   6. The method of manufacturing a semiconductor chip according to claim 5, wherein, in the groove forming step, the groove is formed by removing a crushed layer formed on the back surface of the semiconductor chip by the laser irradiation.

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