JP2013008925A - Method of manufacturing semiconductor device, and semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a manufacturing technology of a semiconductor device for a longer emission wavelength from a quantum dot while suppressing occurrence of a misfit dislocation.SOLUTION: A single crystal substrate is mounted in a chamber, and a quantum dot containing In and As is formed on the single crystal substrate by molecular beam epitaxy. A first annealing is performed in the chamber by radiating at least Asmolecular beam to the quantum dot.

Description

  The present invention relates to a method for manufacturing a semiconductor device including quantum dots and the semiconductor device.

  When a compound semiconductor that is not lattice-matched is heteroepitaxially grown on a compound semiconductor substrate, SK (Stranceki / Kanonov) mode growth appears in the early stage of growth. By utilizing SK mode growth, fine crystals (quantum dots) distributed discretely on the underlying surface can be formed. For example, when InGaAs having an InAs composition of about 50% is grown on a GaAs substrate by several molecular layers and molecular beam epitaxy (MBE), InGaAs quantum dots with a diameter of about 30 to 40 nm are formed.

  By utilizing SK mode growth, quantum dots can be easily formed as compared with the case where a processing process such as lithography is used. Furthermore, when SK mode growth is used, since it is not necessary to execute a processing process, it is possible to obtain high-quality quantum dots free from defects that can be introduced during processing.

  The emission wavelength of an optical element in which InAs quantum dots are formed on a GaAs substrate by ordinary MBE is about 1.1 to 1.2 μm. When a quantum dot device is applied to a communication optical device having a wavelength of 1.3 μm, the emission wavelength must be increased. It is known that the emission wavelength can be increased by covering the InAs quantum dots with an InGaAs layer (strain relaxation layer) having an InAs composition of about 20% and a thickness of several nanometers.

  A technique is known in which after formation of InAs quantum dots, antimony irradiation or the like is performed, thereby suppressing the generation of crystal defects such as a giant dot structure and improving the crystallinity of the quantum dots.

JP 2009-176821 A

D. Leonard et al .: Appl. Phys. Lett., Vol. 63, No. 23, pp. 3203-3205 (1993) K. Nishi et al .: Appl. Phys. Lett., Vol. 74 (1999), p. 1111

  Since the strain relaxation layer does not lattice match with the substrate, the strain accumulated in the epitaxial layer becomes larger than when the strain relaxation layer is not disposed. In particular, when the number of repetitions of stacking the quantum dots and the strain relaxation layer is increased, misfit dislocations are likely to occur. In order to suppress the occurrence of misfit dislocations, the upper limit of the number of repetitions of stacking the quantum dots and the strain relaxation layer is limited to about 10 times, for example.

  There is a demand for a technology for manufacturing a semiconductor device that can increase the emission wavelength from a quantum dot while suppressing the occurrence of misfit dislocations.

According to one aspect of the invention,
Loading a single crystal substrate into the chamber and forming quantum dots containing In and As on the single crystal substrate by molecular beam epitaxy;
In the chamber, there is provided a method for manufacturing a semiconductor device including a step of performing a first annealing while irradiating the quantum dots with at least an As ₂ molecular beam.

According to another aspect of the invention,
A plurality of quantum dots distributed on the single crystal substrate so that the in-plane distribution density is 5 × 10 ¹⁰ cm ⁻² or more, and each height is in the range of 6 nm to 8 nm;
It is formed on the single crystal substrate so as to cover the quantum dots, has a larger band gap than the quantum dots, and has an intermediate lattice constant between the lattice constant of the single crystal substrate and the lattice constant of the quantum dots. A semiconductor device having a strain relaxation layer made of a semiconductor material is provided.

  By performing the first annealing, it is possible to suppress a decrease in the size of the quantum dots. Thereby, shortening of the emission wavelength is suppressed.

1 is a schematic diagram of an MBE apparatus used in a method according to an embodiment. It is the schematic of a cracker cell. It is a timing chart which shows opening / closing of the substrate temperature applied with the manufacturing method by an Example, and the shutter of a raw material supply apparatus. FIGS. 4A to 4D are cross-sectional views of a semiconductor device manufactured by the manufacturing method according to the embodiment in the middle of manufacturing. FIGS. (4E) to (4F) are cross-sectional views of the semiconductor device manufactured by the manufacturing method according to the embodiment in the middle of manufacturing, and (4G) is a cross-sectional view of the manufactured semiconductor device. (5A) is a graph showing a PL spectrum of a sample produced by the method according to the implementation example and the comparative example, and (5B) shows the annealing conditions after forming the quantum dots by varying the composition ratio of InAs in the strain relaxation layer. It is a graph which shows PL wavelength of the sample manufactured by making it differ. (6A) is an AFM photograph after quantum dots are formed, (6B) is a cross-sectional TEM photograph after the quantum dots are covered with a GaAs layer, and (6C) is As ₂ and Sb after the quantum dots are formed. It is AM photograph after performing molecular beam irradiation annealing. (7A) is a graph showing the measurement results of the atomic concentrations of Sb and In in the vicinity of the quantum dots produced by the method according to the example, and (7B) is a schematic cross-sectional view showing the measurement location. (8A) and (8B) are cross-sectional views of laser diodes manufactured using the semiconductor manufacturing method according to the example.

  FIG. 1 shows a schematic diagram of an MBE apparatus used in a manufacturing method according to an embodiment. A stage 11 is accommodated in the chamber 10. The inside of the chamber 10 is evacuated through the exhaust pipe 14. A substrate 28 is held on the stage 11. A heater 16 is disposed in the stage 11 so that the substrate 28 can be heated. The temperature measuring device 13 measures the temperature of the substrate 28, and the measurement result is input to the control device 25. For the temperature measuring device 13, for example, a radiation thermometer (pyrometer) is used. The heater 16 is controlled by the control device 25.

A raw material supply device 20 is attached at a position facing the stage 11. The raw material supply device 20 is prepared for each of As ₂ , As ₄ , Sb, Ga, and In. For example, a Knudsen cell (K cell) is used for the As ₄ , Sb, Ga, and In raw material supply apparatus 20. A cracker cell is used for the As ₂ raw material supply apparatus 20. The supply amount control unit 21 can change the supply amount for each raw material by receiving a command from the control device 25 and controlling the temperature of each K cell and cracker cell.

  A beam intensity meter 12 is disposed behind the stage 11 when viewed from the raw material supply device 20. For the beam intensity meter 12, for example, an ionization vacuum gauge is used. The beam intensity meter 12 can measure the beam intensity of the molecular beam with the stage 11 retracted from the beam path. A measurement result by the beam intensity meter 12 is input to the control device 25. The beam intensity of the molecular beam can be converted into an equivalent pressure.

  A reflection high energy electron diffraction (RHEED) measuring instrument 15 is attached to the chamber 10. The RHEED measuring instrument 15 includes an electron gun 15A and a diffracted beam detector 15B. The RHEED electron gun 15 </ b> A causes an electron beam to enter the substrate 28. The electron beam diffracted by the substrate 28 is detected by the detector 15B. The detection result is input to the control device 25.

In FIG. 2, the schematic of the cracker cell for As ₂ is shown. A metal arsenide 31 is stored in the raw material storage unit 30. Heated by the heater 32, the metal arsenic 31 is sublimated and As ₄ molecules are generated. As ₄ molecules are transported to the cracking section 35 through the transport tube 33. A heater 34 is also arranged in the transport tube 33.

A heater 36 disposed in the cracking unit 35 heats As ₄ molecules. When As ₄ molecules are heated, they are cracked and become As ₂ molecules that are released into the chamber 10 (FIG. 1).

  With reference to FIGS. 3 and 4A to 4G, a method of manufacturing a semiconductor device according to the embodiment will be described.

  FIG. 3 shows a timing chart of the opening and closing of each shutter of the substrate temperature and the raw material supply apparatus 20. The horizontal axis in FIG. 3 represents the elapsed time t. In FIG. 3, the length in the horizontal axis direction does not correspond to the actual length of time. FIG. 3 is appropriately referred to in the following description of the manufacturing method.

The single crystal substrate 28 shown in FIG. 4A is held by the stage 11 (FIG. 1) in the chamber 10. As the single crystal substrate 28, for example, a (100) plane GaAs substrate is used. The shutter of the As ₄ raw material supply apparatus 20 (hereinafter simply referred to as “As ₄ shutter”; the same applies to the shutters of the other raw material supply apparatuses 20) is opened, and the substrate temperature is increased to T1. The intensity of the As ₄ molecular beam is, for example, 2.67 × 10 ⁻³ Pa (2 × 10 ⁻⁵ Torr) in order to suppress As desorption from the substrate surface. The temperature T1 is, for example, 580 ° C. By maintaining this state, the oxide film formed on the surface of the substrate 28 disappears, and a clean surface of GaAs appears.

  The removal of the oxide film on the surface of the substrate 28 can be detected by observing the RHEED diffraction image. In the state where the oxide film remains on the surface of the substrate 28, a broad diffraction image appears. When a clean GaAs surface appears, a sharp spot image or streak image corresponding to the (100) crystal plane appears.

  After the clean GaAs surface appears, the substrate temperature is raised by about 20 ° C., maintained for several minutes, and then lowered to the temperature T1 again.

At time t2 when the substrate temperature drops to T1, the Ga shutter is opened. The intensity of As ₄ molecular beam is maintained at 2.67 × 10 ⁻³ Pa, and the intensity of Ga molecular beam is 1.33 × 10 ⁻⁵ Pa (1 × 10 ⁻⁷ Torr). Under this condition, the growth rate of GaAs is about 0.8 μm / h. The Ga shutter is closed at time t3, 30 minutes after the Ga shutter is opened. Thereby, a GaAs buffer layer 40 having a thickness of 40 nm is formed.

Between times t3 and t4, the substrate temperature is decreased from T1 to T2. The temperature T2 is 500 ° C., for example. At this time, the shutter of As ₄ is kept open.

  As shown in FIG. 4B, InAs quantum dots 42 are formed between times t4 and t5. Hereinafter, steps from time t4 to t5 will be described.

At time t4, the intensity of the As ₄ molecular beam is lowered to 1.07 × 10 ⁻³ Pa (8 × 10 ⁻⁶ Torr), and the In shutter is opened. The intensity of the molecular beam of In is 5.33 × 10 ⁻⁶ Pa (4 × 10 ⁻⁸ Torr). Under these conditions, the growth rate of InAs is about 0.05 molecular layer / s. A streak-like RHEED diffraction image is observed until about 30 seconds elapse from time t4. This means that the substrate surface is flat and the InAs wetting layer 41 is uniformly formed.

  When the growth is further continued, the RHEED diffraction image changes in a spot shape. This means that quantum dots 42 that are discretely distributed have begun to be formed. After continuing the growth for about 20 seconds after the RHEED diffraction image changes to a spot shape, the In shutter is closed at time t5. Thereby, InAs quantum dots 42 are formed. The quantum dot 42 and the wetting layer 41 are collectively referred to as a quantum dot layer 43.

  The quantum dots 42 may be formed of other compound semiconductors containing In and As. For example, the quantum dots 42 may be formed of InGaAs.

As shown in FIG. 4C, annealing is performed at the substrate temperature T2 while irradiating the As ₂ molecular beam and the Sb molecular beam to the substrate surface (the surface of the quantum dot layer 43) from time t5 to t6. The annealing time is about 60 seconds, for example. Hereinafter, processes from time t5 to t6 will be described.

At time t5, the shutter of As _{4 and} the shutter of In are closed, and the shutter of As _{2 and} the shutter of Sb are opened. As a result, the substrate is irradiated with As ₂ molecular beam and Sb molecular beam. The intensity of the As ₂ molecular beam is in the range of 1.33 × 10 ⁻⁴ Pa to 1.07 × 10 ⁻² Pa (1 × 10 ⁻⁶ Torr to 8 × 10 ⁻⁵ Torr). The temperature of the cracking part 35 (FIG. 2) was 900 degreeC. The intensity of the Sb molecular beam is in the range of 6.67 × 10 ⁻⁶ Pa to 6.67 × 10 ⁻⁵ Pa (5 × 10 ⁻⁸ Torr to 5 × 10 ⁻⁷ Torr).

When the substrate is irradiated with an As ₂ molecular beam, As atoms are more likely to adhere to the substrate surface than when an As ₄ molecular beam is irradiated. Therefore, excessive As atoms adhere to the surface of the quantum dot layer 43. Furthermore, since Sb is more likely to adhere to the InAs surface than As, Sb remains on the surface of the quantum dot layer 43. Thereby, it is considered that an excessive adhesion layer 45 in which As and Sb are excessively adhered is formed on the surface of the quantum dot layer 43.

  As shown in FIG. 4D, a strain relaxation layer 47 made of InGaAs is formed on the quantum dot layer 43 between times t6 and t7. Hereinafter, processes from time t6 to time t7 will be described.

At time t6, the shutter of As _{2 and} the shutter of Sb are closed, and the shutters of As ₄ , Ga, and In are opened. The molecular beam intensities of As ₄ , Ga, and In are adjusted so that the growth rate of InAs is 0.05 μm / h and the growth rate of GaAs is 0.28 μm / h. As a result, InGaAs with an InAs composition of 0.15 grows. At time t7, which is about 55 seconds after time t6, the In shutter is closed. Through the steps so far, the strain relaxation layer 47 made of InGaAs and having a thickness of 5 nm is formed. The strain relaxation layer 47 has an intermediate lattice constant between the lattice constant of the single crystal substrate 28 and the lattice constant of the quantum dots 42. Further, the band gap of the strain relaxation layer 47 is larger than the band gap of the quantum dots 42.

  It is considered that As and Sb adhering excessively to the surface of the quantum dot layer 43 segregate on the surface of the strain relaxation layer 47. Thereby, the excessive adhesion layer 45 of As and Sb remains on the strain relaxation layer 47.

  As shown in FIG. 4E, the first barrier layer 50 made of GaAs is formed on the strain relaxation layer 47 between times t7 and t8. The first barrier layer 50 is lattice-matched to the single crystal substrate 28 and has a band gap larger than the band gap of the quantum dots 42. Hereinafter, processes from time t7 to t8 will be described.

  At time t7, GaAs starts to grow by closing the In shutter. At time t8, which is approximately one minute after time t7, the Ga shutter is closed. Through the steps so far, the first barrier layer 50 made of GaAs and having a thickness of about 5 nm is formed.

  As and Sb adhering excessively on the strain relaxation layer 47 are segregated on the surface of the first barrier layer 50. As a result, the excess adhesion layer 45 of As and Sb remains on the first barrier layer 50.

  As shown in FIG. 4F, annealing for removing As and Sb of the excessive adhesion layer 45 is performed between time t8 and time t10. Hereinafter, processes from time t8 to time t10 will be described.

At time t8, after closing the Ga shutter, the substrate temperature is raised from T2 to T3. The As ₄ molecular beam remains irradiated on the substrate. The temperature T3 is, for example, 560 ° C. After the substrate temperature reaches T3 at time t9, annealing is performed at temperature T3 for about one minute until time t10. As a result, As and Sb that are excessively attached to the surface of the first barrier layer 50 are removed, and the excessively attached layer 45 (FIG. 4E) disappears. In order to remove excess As and Sb, it is preferable that the substrate temperature T3 in this annealing step is higher than the substrate temperature T2 when the quantum dot layer 43 is formed.

  As shown in FIG. 4G, a second barrier layer 51 made of the same material as the first barrier layer 50, that is, GaAs, is formed on the first barrier layer 50 between time t10 and time t11. Hereinafter, steps from time t10 to t11 will be described.

  At time t10, the Ga shutter is opened. Thereby, the growth of GaAs starts. The Ga shutter is closed at time t11 when about 21 minutes have elapsed from time t10. Through the steps so far, the second barrier layer 51 made of GaAs and having a thickness of about 98 nm is formed.

  If necessary, the unit laminated structure 55 including the quantum dot layer 43, the strain relaxation layer 47, the first barrier layer 50, and the second barrier layer 51 may be stacked a plurality of times.

  Next, effects of the above embodiment will be described with reference to FIGS. 5A and 5B.

  FIG. 5A shows the measurement result of the photoluminescence (PL) spectrum from the sample prepared by the method according to the above-described example in comparison with the sample manufactured by the method according to the comparative example. In the method according to the comparative example, the annealing process shown in FIG. 4C, the formation process of the first barrier layer 50 shown in FIG. 4E, and the annealing process for removing the excessive adhesion layer 45 shown in FIG. 4F are not performed. In the sample according to the comparative example, the thickness of the second barrier layer 51 shown in FIG. 4G was set to 100 nm.

  The solid line in FIG. 5A shows the PL spectrum of the sample produced by the method according to the example, and the broken line shows the PL spectrum of the sample produced by the method according to the comparative example. The PL peak wavelength of the sample according to the comparative example was about 1.25 μm, whereas the PL peak wavelength of the sample according to the example was about 1.33 μm. By applying the method according to the example, it can be seen that the PL wavelength is increased and light emission in the 1.3 μm band is obtained.

  In order to realize a PL wavelength of about 1.33 μm by the method according to the comparative example, the InAs composition ratio of the strain relaxation layer 47 must be about 0.2. In contrast, in the method according to the example, even if the InAs composition ratio of the strain relaxation layer 47 is about 0.15, a PL wavelength of about 1.33 μm can be realized. The fact that the InAs composition ratio of the strain relaxation layer 47 is small means that its lattice constant is close to the lattice constant of the GaAs substrate. For this reason, the amount of strain in the strain relaxation layer 47 is reduced.

  As the amount of strain in the strain relaxation layer 47 increases, the upper limit of the number of stacks in which the unit stack structure 55 can be stacked decreases. In the embodiment, since the amount of strain in the strain relaxation layer 47 can be reduced, the number of stacked unit laminated structures 55 can be increased. Furthermore, generation | occurrence | production of the misfit dislocation when the unit laminated structure 55 is stacked can be suppressed.

FIG. 5B shows the measurement results of the PL wavelength of a plurality of samples having different compositions of the strain relaxation layer 47. The horizontal axis represents the InAs composition ratio of the InGaAs strain relaxation layer 47, and the vertical axis represents the PL wavelength in the unit of “μm”. In FIG. 5B, a hollow circle symbol, a hollow triangle symbol, a solid square symbol, and a solid triangle symbol indicate molecular beams irradiated in the annealing process shown in FIG. 4C, respectively, As ₂ + Sb, As ₂ , Samples prepared as As ₄ + Sb and As ₄ are shown.

When samples having the same composition of the strain relaxation layer 47 are compared, it can be seen that the PL wavelength of the sample irradiated with the As ₂ + Sb molecular beam is the longest in the annealing process. In the annealing process, the PL wavelength of the sample irradiated with As ₂ molecular beam is the second longest, the PL wavelength of the sample irradiated with As ₄ + Sb molecular beam is the third longest, and the PL wavelength of the sample irradiated with As ₄ molecular beam Is the shortest.

As can be seen from this evaluation result, the PL wavelength can be lengthened by switching the molecular beam irradiated in the annealing process shown in FIG. 4C from the As ₄ molecular beam used during film formation to the As ₂ molecular beam. it can. Furthermore, the PL wavelength can be made longer by including the Sb molecular beam in the molecular beam irradiated in the annealing step.

  Next, with reference to FIGS. 6A to 6C, the reason why the above-described effect of increasing the wavelength can be obtained will be described.

  FIG. 6A shows an atomic force microscope (AFM) photograph in a state where the quantum dot layer 43 shown in FIG. 4B is formed. A plurality of quantum dots scattered on the substrate surface are observed. The height of the quantum dots was 6 nm to 8 nm.

  FIG. 6B shows a transmission electron microscope (TEM) photograph of one quantum dot in a state where a GaAs barrier layer is formed on the InAs quantum dot layer. The GaAs buffer layer immediately below the quantum dots displayed in black and the GaAs barrier layer immediately above are also displayed slightly black due to the inherent strain. The white curved area between the upper black area and the lower black area corresponds to the surface of the quantum dot. From this TEM photograph, the height of the quantum dots is estimated to be 3 nm to 5 nm.

  It has been found that the formation of the GaAs barrier layer reduces the height of the quantum dots from 6 nm to 8 nm to 3 nm to 5 nm. This is presumably because In in the quantum dots was segregated or diffused in the barrier layer during the formation of the GaAs barrier layer. The diameter of the bottom surface of the quantum dot is about 20 nm, which is sufficiently larger than its height. For this reason, the PL wavelength greatly depends on the height of the quantum dot. When the quantum dot is lowered, the PL wavelength is shortened.

  FIG. 6C shows an AFM photograph of the surface after annealing shown in FIG. 4C. Even after annealing, it was confirmed that the height of the quantum dots was maintained at 6 nm to 8 nm. In the method according to the embodiment, As and Sb constituting the excessive adhesion layer 45 are segregated on the surface of the strain relaxation layer 47 when the strain relaxation layer 47 shown in FIG. 4D is formed. Since the segregation coefficient of As and Sb is larger than the segregation coefficient of In, As and Sb are preferentially segregated over In, and it is considered that the segregation or diffusion of In in the quantum dots is suppressed. This prevents a decrease in quantum dot height.

  If the quantum dots 42 are covered with the InGaAs strain relaxation layer 47 (FIG. 4D), the quantum dots 42 become stable. Therefore, segregation of In hardly occurs when the first barrier layer 50 (FIG. 4E) and the second barrier layer 51 (FIG. 4G) are formed.

  In the method according to the example, the height of the quantum dot can be maintained at 6 nm to 8 nm, and thus it is considered that the PL wavelength is longer than that of the comparative example shown in FIG. 5A.

  When Sb remains in the crystal, InSb and GaSb are generated. InSb and GaSb are strain sources because they have a larger lattice constant than GaAs on the substrate. Sb is an element that easily causes antisite defects. Antisite defects act as non-luminescent centers. Therefore, it is not preferable to leave Sb in the crystal.

  In the embodiment, as shown in FIG. 4F, annealing for removing Sb is performed. For this reason, it is possible to suppress deterioration of element characteristics due to Sb.

  FIG. 7A shows the result of measuring the concentration of residual Sb. The concentration measurement of residual Sb was performed on a straight line penetrating the center of the quantum dot 42 in the height direction, as shown in FIG. 7B. The horizontal axis of FIG. 7A represents the position in the height direction in the unit “nm”, and the vertical axis represents the atomic concentration in the unit “atomic%”. A hollow circle symbol in FIG. 7A indicates the Sb concentration. For comparison, the In concentration is indicated by a solid circle symbol. It can be seen that Sb does not remain in the vicinity of the quantum dots 42.

  Residual Sb is not observed because Sb excessively attached to the surface of the quantum dots 42 in the step of FIG. 4C is formed on the surfaces of the strain relaxation layer 47 and the first barrier layer 50 in the steps of FIGS. 4D and 4E, respectively. It is thought that it is because it was segregated and removed in the process of FIG. 4F.

Annealing for removing Sb is performed when the relatively thin first barrier layer 50 is formed before the relatively thick second barrier layer 51 (FIG. 4G) is formed. For this reason, Sb can be efficiently removed. In order to efficiently remove Sb, the thickness of the first barrier layer 50 is set to 10 It is preferable to make it nm or less.

  If annealing for removing Sb is performed before the first barrier layer 50 is formed, that is, immediately after the strain relaxation layer 47 (FIG. 4D) is formed, In re-evaporation occurs in the strain relaxation layer 47. As a result, In in the quantum dots 42 is easily diffused into the strain relaxation layer 47, and the height of the quantum dots 42 is lowered. In order to prevent a phenomenon in which the height of the quantum dot 42 is lowered, it is preferable that the total thickness of the strain relaxation layer 47 and the first barrier layer 50 is equal to or greater than the height of the quantum dot 42.

In the above embodiment, the As ₂ and Sb molecular beams were irradiated in the annealing step shown in FIG. 4C, but only the As ₂ molecular beam may be irradiated. Even when only the As ₂ molecular beam is irradiated, as shown in FIG. 5B, the effect of increasing the PL wavelength can be obtained.

When the As ₂ molecular beam is irradiated to the substrate between times t1 to t5 and t6 to t11 in FIG. 3, As is attached to the inner wall of the chamber 10 (FIG. 1) and various measuring instruments in the chamber 10. It becomes easy. Accordingly, the maintenance cycle such as cleaning must be shortened. For this reason, it is preferable to irradiate the substrate with As ₄ molecular beam instead of As ₂ molecular beam between times t1 to t5 and t6 to t11.

  In the above example, annealing was performed in the process of FIG. 4C to attach excess As and Sb to the surface of the quantum dot layer 43, thereby suppressing a decrease in the height of the quantum dots 42. It is also possible to increase the size of the quantum dots by slowing the growth rate of the quantum dots. However, if the growth rate is slowed, the in-plane distribution density of the quantum dots will decrease.

By applying the method according to the above embodiment, it is possible to suppress the decrease in the height of the quantum dots and also suppress the decrease in the in-plane distribution density of the quantum dots. In the method according to the embodiment, for example, a semiconductor device in which the in-plane distribution density is 5 × 10 ¹⁰ cm ⁻² or more and the height of each quantum dot is in the range of 6 nm to 8 nm can be manufactured. is there. When the height of the quantum dots is set to 6 nm to 8 nm using a conventional method, the in-plane distribution density is lower than 5 × 10 ¹⁰ cm ⁻² .

  8A and 8B are cross-sectional views of laser diodes manufactured using the method according to the above embodiment. FIG. 8A shows a cross-sectional view parallel to the propagation direction of laser light, and FIG. 8B shows a cross-sectional view perpendicular to the propagation direction of laser light.

Hereinafter, a method for manufacturing a laser diode will be described. A buffer layer 61 made of n ⁺ -type GaAs and having a thickness of 400 nm to 500 nm is formed on the n ⁺ -type GaAs substrate 60 with the (100) plane exposed. On the buffer layer 61, a lower cladding layer 62 made of n ⁺ type AlGaAs and having a thickness of about 1300 nm is formed. A lower waveguide layer 63 made of n-type GaAs and having a thickness of about 10 nm is formed on the lower cladding layer 62. An undoped GaAs layer 64 having a thickness of about 20 nm is formed on the lower waveguide layer 63. These layers are formed by MBE, for example, under the condition of a substrate temperature of 580 ° C.

  An active layer 65 is formed on the undoped GaAs layer 64. The formation of the active layer 65 is the same as the process from the formation of the quantum dot layer 43 shown in FIG. 4B to the formation of the second barrier layer 51 shown in FIG. 4G. The thickness of the second barrier layer 51 is set to 20 nm, for example. By repeating this process 10 times in total, the active layer 65 is formed. That is, the active layer 65 is formed by stacking 10 unit laminated structures 55 shown in FIG. 4G.

On the active layer 65, an undoped GaAs layer 66 having a thickness of about 20 nm is formed. On the undoped GaAs layer 66, an upper waveguide layer 67 made of p-type GaAs and having a thickness of about 20 nm is formed. On the upper waveguide layer 67, an upper cladding layer 68 made of p ⁺ type AlGaAs and having a thickness of about 1300 nm is formed. On the upper cladding layer 68, a cap layer 69 made of p ⁺ -type GaAs and having a thickness of about 50 nm is formed. These layers are formed by MBE at a substrate temperature of 580 ° C.

  As shown in FIG. 8B, mesa 72 is formed by performing mesa etching from the cap layer 69 to the lower cladding layer 62 until the buffer layer 61 is exposed. After the mesa etching, the surface of the buffer layer 61 and the surface of the mesa 72 are covered with a protective film 70 made of SiN. A plurality of openings for forming electrodes are formed in the protective film 70. A part of the buffer layer 61 and a part of the cap layer 69 are exposed in the opening. Electrodes 71 are formed on the cap layer 69 and the buffer layer 61 exposed in the openings. After the electrodes are formed, the substrate 60 is separated into individual laser diodes.

  As shown in FIG. 8A, a high reflection film 73 is formed on one end face, and a low reflection film 74 is formed on the other end face. Thereby, a 1.3 μm band laser diode is completed. Since the method according to the above embodiment is applied to the formation of the active layer 65, the occurrence of misfit dislocations in the active layer 65 is suppressed. For this reason, a high-quality laser diode can be obtained.

  A distributed feedback laser diode can also be fabricated by arranging a diffraction grating between the lower cladding layer 62 and the lower waveguide layer 63. Further, by forming a low reflection film on both of the pair of end faces shown in FIG. 8A, an optical amplifier can be obtained.

  Although the present invention has been described with reference to the embodiments, the present invention is not limited thereto. It will be apparent to those skilled in the art that various modifications, improvements, combinations, and the like can be made.

DESCRIPTION OF SYMBOLS 10 Chamber 11 Stage 12 Beam intensity meter 13 Temperature measuring device 14 Exhaust pipe 15 RHEED measuring device 15A Electron gun 15B Detector 16 Heater 20 Raw material supply device 21 Supply amount control part 25 Control device 28 Substrate 30 Raw material storage part 31 Metal arsenic 32 Heater 33 Transport tube 34 Heater 35 Cracking portion 36 Heater 40 Buffer layer 41 Wetting layer 42 Quantum dot 43 Quantum dot layer 45 Excess adhesion layer 47 Strain relaxation layer 50 First barrier layer 51 Second barrier layer 55 Unit laminated structure 60 GaAs substrate 61 Buffer Layer 62 Lower cladding layer 63 Lower waveguide layer 64 Undoped GaAs layer 65 Active layer 66 Undoped GaAs layer 67 Upper waveguide layer 68 Upper cladding layer 69 Cap layer 70 Protective film 71 Electrode 72 Mesa

Claims (5)

Loading a single crystal substrate into the chamber and forming quantum dots containing In and As on the single crystal substrate by molecular beam epitaxy;
And a first annealing step while irradiating the quantum dots with at least an As ₂ molecular beam in the chamber.   The method of manufacturing a semiconductor device according to claim 1, wherein in the step of performing the first annealing, annealing is further performed while irradiating with Sb molecular beam. 3. The method of manufacturing a semiconductor device according to claim 1, wherein in the step of forming the quantum dots, the single crystal substrate is irradiated with an As ₄ molecular beam as an As raw material. After the first annealing, a lattice constant of the single crystal substrate and a lattice constant of the quantum dots are formed on the single crystal substrate so as to cover the quantum dots by molecular beam epitaxy in the chamber. Forming a strain relaxation layer made of a semiconductor having an intermediate lattice constant;
Forming a first barrier layer made of a semiconductor lattice-matched to the single crystal substrate on the strain relaxation layer by molecular beam epitaxy;
After forming the first barrier layer, heating the single crystal substrate while irradiating the first barrier layer with an As ₄ molecular beam, and performing a second anneal;
2. The method according to claim 1, further comprising: forming a second barrier layer made of the same semiconductor material as the first barrier layer by molecular beam epitaxy on the first barrier layer after the second annealing. 4. A method for manufacturing a semiconductor device according to any one of 3 above. A plurality of quantum dots distributed on the single crystal substrate so that the in-plane distribution density is 5 × 10 ¹⁰ cm ⁻² or more, and each height is in the range of 6 nm to 8 nm;
It is formed on the single crystal substrate so as to cover the quantum dots, has a larger band gap than the quantum dots, and has an intermediate lattice constant between the lattice constant of the single crystal substrate and the lattice constant of the quantum dots. A semiconductor device having a strain relaxation layer made of a semiconductor material.