JP2013004658A - Power semiconductor device and manufacturing method therefor - Google Patents

Power semiconductor device and manufacturing method therefor Download PDF

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JP2013004658A
JP2013004658A JP2011133098A JP2011133098A JP2013004658A JP 2013004658 A JP2013004658 A JP 2013004658A JP 2011133098 A JP2011133098 A JP 2011133098A JP 2011133098 A JP2011133098 A JP 2011133098A JP 2013004658 A JP2013004658 A JP 2013004658A
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metal ribbon
power semiconductor
joint
semiconductor element
metal
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Shuzo Araya
修三 荒谷
Kenichi Hayashi
建一 林
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Mitsubishi Electric Corp
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  • Engineering & Computer Science (AREA)
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  • Power Engineering (AREA)
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Abstract

PROBLEM TO BE SOLVED: To provide a power semiconductor device in which metal ribbons are bonded while being stacked, and the bonding reliability of the metal ribbon is high when compared with the prior art.SOLUTION: In the power semiconductor device 100 where a first metal ribbon 111 and a second metal ribbon 112 each having a rectangular cross section are bonded to a power semiconductor element 114 while being stacked, the first metal ribbon extending continuously has a first joint 131, a third joint 133, and a second joint 132 being bonded to the power semiconductor element 114 at different positions in the extension direction, and the second metal ribbon has a fourth joint 134 located directly above the third joint and being bonded to the first metal ribbon.

Description

本発明は、矩形断面形状の金属リボンを用いて配線接続された電力用半導体装置及びその製造方法に関する。   The present invention relates to a power semiconductor device connected by wiring using a metal ribbon having a rectangular cross section and a method for manufacturing the same.

電力用半導体装置では、電力用半導体素子、回路基板上の配線パターン、電極端子等の間が、断面が円形の金属ワイヤではなく、断面が矩形断面(角断面)形状の金属リボンを用いて配線接続される場合がある。この金属リボンは、例えば常温で超音波接合によって接続される。   In the power semiconductor device, the wiring between the power semiconductor element, the wiring pattern on the circuit board, the electrode terminal, and the like is not a metal wire having a circular cross section but a metal ribbon having a rectangular cross section (square cross section). May be connected. The metal ribbon is connected by, for example, ultrasonic bonding at room temperature.

電力用半導体装置に使用される円形断面の金属ワイヤは、例えば断面の直径が400μmであり、一方、矩形断面形状の金属リボンは、例えば断面の幅が2000μm、厚さが200μmである。このように、金属リボンは、金属ワイヤに比べて1本あたりの断面積が大きいため、金属リボンを使用することで配線本数を削減でき、生産性が向上する。また、電力用半導体素子等との接合面積が大きいため、接合部の信頼性が向上する。また、1本あたりに流す電流も大きくできる。更に、金属リボンは、矩形断面であるため、円形断面の金属ワイヤでは困難な、複数の金属リボンを積み重ねて接合することも可能となる。特に、SiC(シリコンカーバイド)のように素子のサイズが小さく、高い電流密度を必要とする電力用半導体素子においても、上述のような金属リボンを積み重ねて接合する技術は有用である。   A circular cross-section metal wire used in a power semiconductor device has a cross-section diameter of, for example, 400 μm, while a rectangular cross-section metal ribbon has a cross-section width of, for example, 2000 μm and a thickness of 200 μm. Thus, since the cross-sectional area per metal ribbon is larger than that of the metal wire, the number of wires can be reduced by using the metal ribbon, and the productivity is improved. Further, since the junction area with the power semiconductor element or the like is large, the reliability of the junction is improved. In addition, the current flowing per line can be increased. Furthermore, since the metal ribbon has a rectangular cross section, a plurality of metal ribbons can be stacked and joined, which is difficult with a metal wire having a circular cross section. In particular, the technology of stacking and joining metal ribbons as described above is also useful for power semiconductor devices such as SiC (silicon carbide) having a small device size and requiring high current density.

図6に、電力用半導体素子上に金属リボンを積み重ねて接合した場合の従来例を示す。図6に示すように、電力用半導体素子1上の金属皮膜2と回路パターン3とが3本の金属リボン4で接続されている。電力用半導体素子1上の金属皮膜2上では、下段の金属リボン接合部上に上段の金属リボンが積み重ねられて接合されている(図中のステッチ部5)。   FIG. 6 shows a conventional example in which metal ribbons are stacked and joined on a power semiconductor element. As shown in FIG. 6, the metal film 2 on the power semiconductor element 1 and the circuit pattern 3 are connected by three metal ribbons 4. On the metal film 2 on the power semiconductor element 1, the upper metal ribbon is stacked and bonded on the lower metal ribbon bonding portion (stitch portion 5 in the figure).

また、図7Aに、電力用半導体素子上に金属リボンを積み重ねて接合した場合のもう一つの従来例を示す。図7Aに示すように、第1電力用半導体素子11、第2電力用半導体素子12は、セラミック基板15上の回路パターン14上にはんだ13で接続されている。第1電力用半導体素子11は、例えばIGBTやMOSFETであり、第2電力用半導体素子12は、例えばフリーホイールダイオードやショットキーバリアダイオードである。第1電力用半導体素子11、セラミック基板15上の回路パターン16は、ゲートワイヤ17で接続されている。第1電力用半導体素子11、第2電力用半導体素子12、セラミック基板15上の回路パターン16は、第1金属リボン18及び第2金属リボン19で接続されている。第2電力用半導体素子12上では、第2電力用半導体素子12と第1金属リボン18とが、さらに、第2電力用半導体素子12と第1金属リボン18との接合部上に第2金属リボン19が積み重ねられて接合されている。   FIG. 7A shows another conventional example where metal ribbons are stacked and joined on a power semiconductor element. As shown in FIG. 7A, the first power semiconductor element 11 and the second power semiconductor element 12 are connected to the circuit pattern 14 on the ceramic substrate 15 with solder 13. The first power semiconductor element 11 is, for example, an IGBT or a MOSFET, and the second power semiconductor element 12 is, for example, a freewheel diode or a Schottky barrier diode. The first power semiconductor element 11 and the circuit pattern 16 on the ceramic substrate 15 are connected by a gate wire 17. The first power semiconductor element 11, the second power semiconductor element 12, and the circuit pattern 16 on the ceramic substrate 15 are connected by a first metal ribbon 18 and a second metal ribbon 19. On the second power semiconductor element 12, the second power semiconductor element 12 and the first metal ribbon 18 are further formed on the junction between the second power semiconductor element 12 and the first metal ribbon 18. Ribbons 19 are stacked and joined.

特開2004−336043号公報JP 2004-336043 A

図6及び図7Aでは、一つの電力用半導体素子と回路パターンとの間を金属リボンで接続する場合、及び複数の電力用半導体素子と回路パターンとの間を金属リボンで接続する場合において、電力用半導体素子において、下段の金属リボン接合部に上段の金属リボンを積み重ねて両金属リボンを接合する従来例を挙げた。いずれの場合も、金属リボン接合部上に重なって金属リボン接合部がある。この部分について、図7Bから図7Dを用いて詳しく説明する。   6 and 7A, when one power semiconductor element and a circuit pattern are connected by a metal ribbon, and when a plurality of power semiconductor elements and a circuit pattern are connected by a metal ribbon, In the conventional semiconductor device, the upper metal ribbon is stacked on the lower metal ribbon joint and the two metal ribbons are joined. In either case, there is a metal ribbon joint overlying the metal ribbon joint. This part will be described in detail with reference to FIGS. 7B to 7D.

図7Bに示すように、第1金属リボン18は、電力用半導体素子12上にステッチボンドされており、第1接合部21が形成される。このとき、接合には、第1金属リボン18との接触面に凹凸を形成したボンディングツールが用いられる。そのため、第1接合部21上の金属リボン18の表面18aには、接合時に、ボンディングツール(図示せず)が押し当てられて形成された凹凸が存在する。   As shown in FIG. 7B, the first metal ribbon 18 is stitch-bonded on the power semiconductor element 12 to form the first joint portion 21. At this time, a bonding tool in which irregularities are formed on the contact surface with the first metal ribbon 18 is used for bonding. Therefore, the surface 18a of the metal ribbon 18 on the first joint portion 21 has irregularities formed by pressing a bonding tool (not shown) at the time of joining.

その後、図7Cに示すように、第2金属リボン19の接合のため、第2金属リボン19が第1金属リボン18の金属リボン表面18aの真上に配置される。この第2金属リボン19の配置から第2金属リボン19と第1金属リボン18との接合完了までの間、第2金属リボン19のネック部19aやループ部19bは、第1金属リボン18のネック部18bやループ部18cに干渉する。そのため、第1金属リボン18のネック部18bやループ部18cは、第2金属リボン19によって押し下げられ、第1金属リボン18のネック部18bにダメージを与え、第1金属リボン18の信頼性が低下するという問題があった。   Thereafter, as shown in FIG. 7C, the second metal ribbon 19 is disposed immediately above the metal ribbon surface 18 a of the first metal ribbon 18 for joining the second metal ribbon 19. Between the arrangement of the second metal ribbon 19 and the completion of the joining of the second metal ribbon 19 and the first metal ribbon 18, the neck portion 19a and the loop portion 19b of the second metal ribbon 19 are the neck of the first metal ribbon 18. Interfering with the part 18b and the loop part 18c. Therefore, the neck portion 18b and the loop portion 18c of the first metal ribbon 18 are pushed down by the second metal ribbon 19, and the neck portion 18b of the first metal ribbon 18 is damaged and the reliability of the first metal ribbon 18 is lowered. There was a problem to do.

その後、図7Dに示すように、第2金属リボン19が、第1接合部21上の第1金属リボン18の表面18a上にステッチボンドされる。このとき、上述のように第1金属リボン18の表面18aには凹凸が形成されていることから、第1接合部21上の第1金属リボン18の表面18aと第2金属リボン19との間には、隙間22が形成されるという問題があった。即ち、第1金属リボン18と第2金属リボン19とを接合しても、その接合間には隙間があり、実質的に接合領域の狭い、接合信頼性の低い接合部が形成されていた。   Thereafter, as shown in FIG. 7D, the second metal ribbon 19 is stitch-bonded onto the surface 18 a of the first metal ribbon 18 on the first joint 21. At this time, as described above, the surface 18a of the first metal ribbon 18 is uneven, so that the space between the surface 18a of the first metal ribbon 18 on the first joint 21 and the second metal ribbon 19 is between. Has a problem that the gap 22 is formed. That is, even when the first metal ribbon 18 and the second metal ribbon 19 are joined, there is a gap between the joints, and a joined portion having a substantially narrow joining area and a low joining reliability is formed.

また、図8に、電力用半導体素子上に金属リボンを積み重ねて接合しない構成の従来例を示す。図8に示すように、第1電力用半導体素子11及び第2電力用半導体素子12は、セラミック基板15上の回路パターン14上にはんだ13で接続されている。第1電力用半導体素子11は、例えばIGBTやMOSFETであり、第2電力用半導体素子12は、例えばフリーホイールダイオードやショットキーバリアダイオードである。第1電力用半導体素子11、及びセラミック基板15上の回路パターン16は、ゲートワイヤ17で接続されている。第1電力用半導体素子11、第2電力用半導体素子12、及びセラミック基板15上の回路パターン16は、第3金属リボン25、第4金属リボン26、及び第5金属リボン27で接続されている。第2電力用半導体素子12への各金属リボンの接合は、1番目に第3金属リボン25、2番目に第4金属リボン26、3番目に第5金属リボン27の順で行なわれる。第2電力用半導体素子12において、第3金属リボン25は第1接合部31で接合され、第4金属リボン26は第2接合部32で接合され、第5金属リボン27は第3接合部33で接合される。   FIG. 8 shows a conventional example in which metal ribbons are not stacked and joined on a power semiconductor element. As shown in FIG. 8, the first power semiconductor element 11 and the second power semiconductor element 12 are connected to the circuit pattern 14 on the ceramic substrate 15 with solder 13. The first power semiconductor element 11 is, for example, an IGBT or a MOSFET, and the second power semiconductor element 12 is, for example, a freewheel diode or a Schottky barrier diode. The first power semiconductor element 11 and the circuit pattern 16 on the ceramic substrate 15 are connected by a gate wire 17. The first power semiconductor element 11, the second power semiconductor element 12, and the circuit pattern 16 on the ceramic substrate 15 are connected by a third metal ribbon 25, a fourth metal ribbon 26, and a fifth metal ribbon 27. . The joining of each metal ribbon to the second power semiconductor element 12 is performed in the order of the third metal ribbon 25 first, the fourth metal ribbon 26 second, and the fifth metal ribbon 27 third. In the second power semiconductor element 12, the third metal ribbon 25 is joined at the first joining portion 31, the fourth metal ribbon 26 is joined at the second joining portion 32, and the fifth metal ribbon 27 is joined to the third joining portion 33. Are joined together.

ここで、第5金属リボン27を第2電力用半導体素子12に接合する際、第5金属リボン27のネック部27aが第3金属リボン25のテール部25a、及び第4金属リボン26のテール部26aにそれぞれ干渉しないように、第5金属リボン27と、第3金属リボン25及び第4金属リボン26との間にはステッチボンド用の距離が必要となる。これは、第5金属リボン27のネック部27aが第3金属リボン25のテール部25a及び第4金属リボン26のテール部26aに干渉することによる、第5金属リボン27のネック部27aへのダメージを防ぐためである。   Here, when the fifth metal ribbon 27 is joined to the second power semiconductor element 12, the neck portion 27 a of the fifth metal ribbon 27 is the tail portion 25 a of the third metal ribbon 25 and the tail portion of the fourth metal ribbon 26. A distance for stitch bonding is required between the fifth metal ribbon 27, the third metal ribbon 25, and the fourth metal ribbon 26 so as not to interfere with 26 a. This is because the neck portion 27a of the fifth metal ribbon 27 interferes with the tail portion 25a of the third metal ribbon 25 and the tail portion 26a of the fourth metal ribbon 26, and damage to the neck portion 27a of the fifth metal ribbon 27 is caused. Is to prevent.

一つのテール部の長さは、約400μmである。また、第3金属リボン25のテール部25aと第5金属リボン27のネック部27a、第4金属リボン26のテール部26aと第5金属リボン27のネック部27aが干渉しないためのそれぞれの長さは、各金属リボンの厚さ分(約200μm)である。さらに、第1接合部31、第2接合部32、及び第3接合部33が同じ幅のボンディングツールで形成される場合、第3金属リボン25、第4金属リボン26、及び第5金属リボン27の接合に必要な距離Bは、接合部3つ分の距離である約2550μm(例えば1つの接合部の距離が約850μmの場合)と、テール部2つ分の距離、約800μmと、第3金属リボン25及び第4金属リボン26のテール部25a,26aと第5金属リボン27のネック部27aとが干渉しないために必要な金属リボン厚さ2つ分の約400μmとの計約3750μmである。そのため、第2電力用半導体素子12、さらには電力用半導体装置自体が大型化するという問題があった。   The length of one tail portion is about 400 μm. The lengths of the tail portion 25a of the third metal ribbon 25 and the neck portion 27a of the fifth metal ribbon 27 and the length of the tail portion 26a of the fourth metal ribbon 26 and the neck portion 27a of the fifth metal ribbon 27 do not interfere with each other. Is the thickness (about 200 μm) of each metal ribbon. Furthermore, when the 1st junction part 31, the 2nd junction part 32, and the 3rd junction part 33 are formed with the bonding tool of the same width, the 3rd metal ribbon 25, the 4th metal ribbon 26, and the 5th metal ribbon 27 The distance B required for joining is about 2550 μm (for example, when the distance between one joint is about 850 μm), the distance for two tails, about 800 μm, The total thickness of the metal ribbon 25 and the fourth metal ribbon 26 is about 3750 μm, which is about 400 μm of the thickness of two metal ribbons necessary for the tail portions 25a and 26a of the fifth metal ribbon 27 and the neck portion 27a of the fifth metal ribbon 27 not to interfere with each other. . Therefore, there is a problem that the second power semiconductor element 12 and further the power semiconductor device itself are increased in size.

また、第1電力用半導体素子11から第2電力用半導体素子12及び回路パターン16へ電流を流す場合、第5金属リボン27では、第5金属リボン27中を矢印に示すように電流が流れる。一方、第3金属リボン25から第4金属リボン26への経路で電流が流れる場合、第1接合部31から第2接合部32の間では、第2電力用半導体素子12に形成されたごく薄い厚みの金属膜35(例えば4μm程度のAl蒸着膜)を通って電流が流れる。尚、金属膜35は、第2電力用半導体素子12の厚みに比べ十分に薄いが、説明上、図中では誇張して厚く図示している。このように、ごく薄い厚みの金属膜35を電流が流れるため、金属膜35部分での電流ロスが大きくなるという問題もあった。
電力用半導体素子がSiC(シリコンカーバイド)である場合、Si(シリコン)の場合と比べてロスが小さくなるというメリットがあるが、電力用半導体装置全体で考えた場合、このようなロスの大きくなる部分の存在がネックとなる。
Further, when a current flows from the first power semiconductor element 11 to the second power semiconductor element 12 and the circuit pattern 16, a current flows in the fifth metal ribbon 27 as indicated by an arrow in the fifth metal ribbon 27. On the other hand, when a current flows through the path from the third metal ribbon 25 to the fourth metal ribbon 26, the thin portion formed in the second power semiconductor element 12 is between the first junction 31 and the second junction 32. A current flows through the metal film 35 having a thickness (for example, an Al deposited film having a thickness of about 4 μm). The metal film 35 is sufficiently thinner than the thickness of the second power semiconductor element 12, but is exaggerated and thick in the drawing for the sake of explanation. As described above, since a current flows through a very thin metal film 35, there is a problem that a current loss in the metal film 35 increases.
When the power semiconductor element is SiC (silicon carbide), there is a merit that the loss is smaller compared to the case of Si (silicon). However, when the entire power semiconductor device is considered, such a loss is increased. The existence of the part becomes a bottleneck.

また、第3金属リボン25を流れた電流は、第4金属リボン26にそのまま流れるだけで無く、ごく薄い厚みの金属膜35を経由して、第5金属リボン27にも流れる。このため、第5金属リボン27には、多くの電流が流れ、発熱量が大きくなることによる熱応力の増大で、第5金属リボン27と第2電力用半導体素子12との接合信頼性が低下するという問題もあった。   The current flowing through the third metal ribbon 25 not only flows through the fourth metal ribbon 26 as it is, but also flows through the fifth metal ribbon 27 via the metal film 35 having a very thin thickness. For this reason, a large amount of current flows through the fifth metal ribbon 27 and the thermal stress increases due to an increase in the amount of heat generated, so that the reliability of bonding between the fifth metal ribbon 27 and the second power semiconductor element 12 decreases. There was also a problem of doing.

さらに、第3金属リボン25を第2電力用半導体素子12に接合する際、第2電力用半導体素子12上で第3金属リボン25のカッティングを行わなければならないため、第2電力用半導体素子12にダメージを与える可能性があるという問題もあった。   Furthermore, since the third metal ribbon 25 must be cut on the second power semiconductor element 12 when the third metal ribbon 25 is joined to the second power semiconductor element 12, the second power semiconductor element 12. There was also a problem that could cause damage.

今後、電力用半導体装置の大電流化が進み、電力用半導体素子の温度上昇が予想されるため、電力用半導体素子の温度上昇に対応した高い接合信頼性を有する配線技術が必要である。   In the future, since the current of power semiconductor devices will increase and the temperature of power semiconductor elements is expected to rise, a wiring technique having high junction reliability corresponding to the temperature rise of power semiconductor elements is required.

本発明は、上述したような問題点を解決するためになされたもので、従来に比べて金属リボンの接合信頼性が高い、金属リボンの積み重ねによる接合を有する電力用半導体装置及びその製造方法を提供することを目的とする。   The present invention has been made in order to solve the above-described problems, and provides a power semiconductor device having bonding by stacking metal ribbons, which has higher bonding reliability of metal ribbons than in the past, and a method for manufacturing the same. The purpose is to provide.

上記目的を達成するため、本発明は以下のように構成する。
即ち、本発明の一態様における電力用半導体装置は、それぞれが矩形断面を有する第1金属リボン及び第2金属リボンが電力用半導体素子に積み重ねて接合される電力用半導体装置であって、上記第1金属リボンは、上記電力用半導体素子に接合される導体であり、連続して延在する当該第1金属リボンの延在方向において電力用半導体素子と互いに異なる位置で接合される第1接合部、第2接合部及び第3接合部を有し、第3接合部は、上記延在方向において第1接合部と第2接合部との間に位置し、さらに、第1金属リボンは、第1接合部と第2接合部との間において、電力用半導体素子の表面と略平行に延在する平行部を有し、上記第2金属リボンは、上記第3接合部の直上に位置し第1金属リボンと接合される第4接合部を有することを特徴とする。
In order to achieve the above object, the present invention is configured as follows.
That is, a power semiconductor device according to an aspect of the present invention is a power semiconductor device in which a first metal ribbon and a second metal ribbon each having a rectangular cross section are stacked and joined to a power semiconductor element. The first metal ribbon is a conductor joined to the power semiconductor element, and is joined at a position different from the power semiconductor element in the extending direction of the first metal ribbon extending continuously. , Having a second joint portion and a third joint portion, wherein the third joint portion is located between the first joint portion and the second joint portion in the extending direction, and the first metal ribbon is Between the 1st junction part and the 2nd junction part, it has a parallel part which extends substantially in parallel with the surface of the power semiconductor element, and the second metal ribbon is located immediately above the third joint part and Having a fourth joint joined to one metal ribbon The features.

本発明の一態様における電力用半導体装置によれば、第1金属リボン及び第2金属リボンを積み重ねて接合することから、電流密度を高めることができるというメリットがある。また、第1金属リボンと電力用半導体素子とは、第1接合部、第2接合部、及び第3接合部の3箇所で接合されることから、第1金属リボンと電力用半導体素子との間の接合信頼性を従来に比べて向上させることができる。   According to the power semiconductor device of one embodiment of the present invention, since the first metal ribbon and the second metal ribbon are stacked and joined, there is an advantage that the current density can be increased. Further, since the first metal ribbon and the power semiconductor element are joined at three locations, the first joint, the second joint, and the third joint, the first metal ribbon and the power semiconductor element The reliability of the joint can be improved compared to the conventional case.

さらに、第1接合部と第2接合部との間に位置する第3接合部に対応した第4接合部にて、第1金属リボンと第2金属リボンとが接合されることから、第1接合部と第2接合部との間では、2本の金属リボンにて電流が流れる。そのため、例えば図8の従来例で示したような、電力用半導体素子上のごく薄い金属膜(4μm程度の厚さ。これに対して金属リボンは、例えば200μm程度の厚さ。)で接続される場合と比べて、電流の損失を小さくできる。さらに、2本の金属リボンに電流を流せることから、例えば図8に示した従来例の場合と比べて、局所的な発熱量の増加が生じることはない。そのため、従来に比べて熱応力を低減でき、金属リボンと電力用半導体素子との接合信頼性をさらに向上させることができる。したがって、従来に比べて高温での使用が可能となる。   Furthermore, since the first metal ribbon and the second metal ribbon are joined at the fourth joint corresponding to the third joint located between the first joint and the second joint, the first Between the junction and the second junction, current flows through two metal ribbons. Therefore, for example, as shown in the conventional example of FIG. 8, a very thin metal film on the power semiconductor element (thickness of about 4 μm. On the other hand, the metal ribbon has a thickness of about 200 μm, for example) is connected. Compared with the case where current loss is reduced, current loss can be reduced. Further, since current can flow through the two metal ribbons, for example, a local increase in the amount of heat generated does not occur as compared with the conventional example shown in FIG. Therefore, thermal stress can be reduced as compared with the conventional case, and the bonding reliability between the metal ribbon and the power semiconductor element can be further improved. Therefore, it can be used at a higher temperature than conventional.

本発明の実施の形態1における電力用半導体装置を構成するパワーモジュール部分の側面図である。It is a side view of the power module part which comprises the semiconductor device for electric power in Embodiment 1 of this invention. 図1に示す電力用半導体装置における、第1金属リボンと第2電力用半導体素子との第1接合部付近の拡大図である。FIG. 3 is an enlarged view of the vicinity of a first junction between a first metal ribbon and a second power semiconductor element in the power semiconductor device shown in FIG. 1. 図1に示す電力用半導体装置における、第1金属リボンと第2電力用半導体素子との第1接合部及び第2接合部付近の拡大図である。FIG. 3 is an enlarged view of the first metal ribbon and the second power semiconductor element in the power semiconductor device shown in FIG. 1 and in the vicinity of the second junction. 図1に示す電力用半導体装置における、第1金属リボンと第2金属リボンとの第4接合部を含む部分の拡大図である。FIG. 4 is an enlarged view of a portion including a fourth joint portion between a first metal ribbon and a second metal ribbon in the power semiconductor device illustrated in FIG. 1. 図4に示す部分において、第1金属リボン及び第2金属リボンにおける電流の流れを示す図である。In the part shown in FIG. 4, it is a figure which shows the flow of the electric current in a 1st metal ribbon and a 2nd metal ribbon. 従来の電力用半導体装置における金属リボン同士の接続方法を示す図である。It is a figure which shows the connection method of the metal ribbons in the conventional semiconductor device for electric power. 従来の電力用半導体装置における金属リボン同士の接続方法の他の例を示す図である。It is a figure which shows the other example of the connection method of the metal ribbons in the conventional power semiconductor device. 図7Aに示す第1金属リボンと第2電力用半導体素子との接合部の拡大図である。FIG. 7B is an enlarged view of a joint portion between the first metal ribbon and the second power semiconductor element shown in FIG. 7A. 図7Aに示す第1金属リボンと第2金属リボンとの接合部の拡大図である。It is an enlarged view of the junction part of the 1st metal ribbon shown in Drawing 7A, and the 2nd metal ribbon. 図7Aに示す第1金属リボンと第2金属リボンとの接合部の拡大図である。It is an enlarged view of the junction part of the 1st metal ribbon shown in Drawing 7A, and the 2nd metal ribbon. 図7Aに示す電力用半導体装置において、第1金属リボン及び第2金属リボンにおける電流の流れを説明するための図である。FIG. 7B is a diagram for explaining a current flow in the first metal ribbon and the second metal ribbon in the power semiconductor device shown in FIG. 7A.

本発明の実施形態である電力用半導体装置及びその製造方法について、図を参照しながら以下に説明する。尚、各図において、同一又は同様の構成部分については同じ符号を付している。   A power semiconductor device and a manufacturing method thereof according to an embodiment of the present invention will be described below with reference to the drawings. In each figure, the same or similar components are denoted by the same reference numerals.

実施の形態1.
図1は、本実施の形態1における電力用半導体装置100を構成するパワーモジュール101の構造を示した側面図である。電力用半導体装置100は、その基本的構成部分として、以下に説明する第1電力用半導体素子113及び第2電力用半導体素子114に相当する電力用半導体素子と、この電力用半導体素子上に積層して接合される第1金属リボン111及び第2金属リボン112とを備える。本実施形態1の電力用半導体装置100では、この基本的構成部分に加えさらに以下に説明する構成部分を有する。尚、図1では、回路基板122に実装される第1電力用半導体素子113及び第2電力用半導体素子114以外の部品や、パワーモジュール101を囲うケース等は図示していない。
Embodiment 1 FIG.
FIG. 1 is a side view showing the structure of a power module 101 constituting the power semiconductor device 100 according to the first embodiment. The power semiconductor device 100 has, as its basic components, a power semiconductor element corresponding to a first power semiconductor element 113 and a second power semiconductor element 114 described below, and a stack on the power semiconductor element. The first metal ribbon 111 and the second metal ribbon 112 are joined together. The power semiconductor device 100 according to the first embodiment further includes the components described below in addition to the basic components. In FIG. 1, components other than the first power semiconductor element 113 and the second power semiconductor element 114 mounted on the circuit board 122, a case surrounding the power module 101, and the like are not shown.

パワーモジュール101は、ベース板121と、回路基板122とを有する。回路基板122は、セラミック基板117で構成され、このセラミック基板117の主表面の一方面には銅箔126が形成され、この一方面に対向する他方面には回路パターン116が形成されている。このようなセラミック基板117は、ベース板121に対して銅箔126をはんだ123ではんだ付けして接合される。また、セラミック基板117の回路パターン116には、はんだ115にて、電力用半導体素子113、114や、その他の部品が実装されている。ここで、第1電力用半導体素子113は、例えばIGBTやMOSFETであり、第2電力用半導体素子114は、例えばフリーホイールダイオードやショットキーバリアダイオードである。   The power module 101 includes a base plate 121 and a circuit board 122. The circuit board 122 is composed of a ceramic substrate 117, and a copper foil 126 is formed on one surface of the main surface of the ceramic substrate 117, and a circuit pattern 116 is formed on the other surface facing the one surface. Such a ceramic substrate 117 is joined to the base plate 121 by soldering a copper foil 126 with solder 123. In addition, the power semiconductor elements 113 and 114 and other components are mounted on the circuit pattern 116 of the ceramic substrate 117 with solder 115. Here, the first power semiconductor element 113 is, for example, an IGBT or a MOSFET, and the second power semiconductor element 114 is, for example, a freewheel diode or a Schottky barrier diode.

また、第1電力用半導体素子113とセラミック基板117の回路パターン116とは、ゲートワイヤ129によって接続されている。第1電力用半導体素子113及び第2電力用半導体素子114と回路パターン116とは、アルミニウム材等からなり矩形断面形状を有する第1金属リボン111及び第2金属リボン112を用いて、超音波接合によって接続されている。本実施の形態1では、第1金属リボン111及び第2金属リボン112は、その断面積が同一又はほぼ同一であるものを使用する。   The first power semiconductor element 113 and the circuit pattern 116 of the ceramic substrate 117 are connected by a gate wire 129. The first power semiconductor element 113, the second power semiconductor element 114, and the circuit pattern 116 are ultrasonically bonded using a first metal ribbon 111 and a second metal ribbon 112 made of aluminum material or the like and having a rectangular cross-sectional shape. Connected by. In the first embodiment, the first metal ribbon 111 and the second metal ribbon 112 have the same or substantially the same cross-sectional area.

図1に示した金属リボン111、112における接続は、以下のように行われる。
まず第1金属リボン111について、第1金属リボン111の一端部が第1電力用半導体素子113に一箇所113aで超音波接合され、次に第1金属リボン111の中間部分が第2電力用半導体素子114に、図3に示すように、第1接合部131及び第2接合部132の二箇所で超音波接合される。尚、本実施形態1では、後述の第3接合部133が第1接合部131及び第2接合部132と一体的に連続して接合されることから、図1では、第1接合部131及び第2接合部132は、連続して図示しているが、実際には上述のように、分離した二箇所に相当する。
さらにその後、第1金属リボン111の他端部が回路パターン116に一箇所116aで超音波接合される。
Connections in the metal ribbons 111 and 112 shown in FIG. 1 are performed as follows.
First, for the first metal ribbon 111, one end of the first metal ribbon 111 is ultrasonically bonded to the first power semiconductor element 113 at one location 113a, and then the intermediate portion of the first metal ribbon 111 is the second power semiconductor. As shown in FIG. 3, the element 114 is ultrasonically bonded at two locations of the first bonding portion 131 and the second bonding portion 132. In the first embodiment, since a third joint 133 described later is integrally and continuously joined with the first joint 131 and the second joint 132, in FIG. Although the 2nd junction part 132 is shown in figure continuously, as above-mentioned, it is equivalent to two isolate | separated places in fact.
After that, the other end of the first metal ribbon 111 is ultrasonically bonded to the circuit pattern 116 at one location 116a.

このように、第1金属リボン111は、連続して延在し、第2電力用半導体素子114上では、第1金属リボン111の延在方向138(図3)において異なって位置する第1接合部131及び第2接合部132において、第2電力用半導体素子114と接合される。   As described above, the first metal ribbon 111 continuously extends, and on the second power semiconductor element 114, the first joints that are positioned differently in the extending direction 138 of the first metal ribbon 111 (FIG. 3). In the part 131 and the second joint part 132, the second power semiconductor element 114 is joined.

続いて、第2金属リボン112について、第2金属リボン112の一端部が、第1電力用半導体素子113上に一箇所113bで超音波接合され、次に、第2電力用半導体素子114上で第1金属リボン111上に積み重ねられて第1金属リボン111と一箇所(図1の第4接合部134)で超音波接合され、その次に、第2金属リボン112の一端部が回路パターン116に一箇所116bで超音波接合される。ここで、第2電力用半導体素子114上では、第2金属リボン112が第1金属リボン111と接合されると同時に、第1金属リボン111と第2金属リボン112との接合部である第4接合部134の直下において、第1金属リボン111が第2電力用半導体素子114にも接合される(図1の第3接合部133)。即ち、金属リボン111,112の接合は、第1電力用半導体素子113上では二箇所、第2電力用半導体素子114上では4箇所、回路パターン116上では二箇所で行なわれる。また、第1金属リボン111及び第2金属リボン112のカッティングは、回路パターン116で行なわれる。尚、第4接合部134は、第1金属リボン111と第2金属リボン112とのリボン間接合部と呼ぶこともできる。   Subsequently, for the second metal ribbon 112, one end of the second metal ribbon 112 is ultrasonically bonded at one location 113 b on the first power semiconductor element 113, and then on the second power semiconductor element 114. The first metal ribbon 111 is stacked and ultrasonically bonded to the first metal ribbon 111 at one location (the fourth bonding portion 134 in FIG. 1), and then one end of the second metal ribbon 112 is connected to the circuit pattern 116. Are ultrasonically bonded at one place 116b. Here, on the second power semiconductor element 114, the second metal ribbon 112 is joined to the first metal ribbon 111, and at the same time, a fourth part which is a joint between the first metal ribbon 111 and the second metal ribbon 112. The first metal ribbon 111 is also bonded to the second power semiconductor element 114 immediately below the bonding portion 134 (third bonding portion 133 in FIG. 1). That is, the metal ribbons 111 and 112 are joined at two locations on the first power semiconductor element 113, at four locations on the second power semiconductor device 114, and at two locations on the circuit pattern 116. Further, the cutting of the first metal ribbon 111 and the second metal ribbon 112 is performed with the circuit pattern 116. In addition, the 4th junction part 134 can also be called the junction part between ribbons of the 1st metal ribbon 111 and the 2nd metal ribbon 112. FIG.

以下に、第2電力用半導体素子114における金属リボン111,112の接合について、さらに詳しく説明する。
図2から図4は、図1に示した、第2電力用半導体素子114上での第1金属リボン111と第2金属リボン112とを積み重ねて接合する方法を詳細に示した図である。
図2に示すように、第1金属リボン111は、ボンディングツール80を用いて第2電力用半導体素子114の電極に超音波接合され、第1接合部131が形成される。第1接合部131の形成後、図3に示すように、第2電力用半導体素子114の表面114aと平行又はほぼ平行になるように第1金属リボン111を延在させ、第1金属リボン平行部137が形成される。この第1金属リボン平行部137は、第1金属リボン111の延在方向138において、第1接合部131の第2接合部側端131a(第1端)から、第2接合部132の第1接合部側端132a(第2端)までの間に相当する。
Hereinafter, the joining of the metal ribbons 111 and 112 in the second power semiconductor element 114 will be described in more detail.
2 to 4 are views showing in detail the method of stacking and joining the first metal ribbon 111 and the second metal ribbon 112 on the second power semiconductor element 114 shown in FIG.
As shown in FIG. 2, the first metal ribbon 111 is ultrasonically bonded to the electrode of the second power semiconductor element 114 using the bonding tool 80 to form the first bonding portion 131. After the formation of the first joint portion 131, as shown in FIG. 3, the first metal ribbon 111 is extended so as to be parallel or substantially parallel to the surface 114a of the second power semiconductor element 114, and parallel to the first metal ribbon. Part 137 is formed. The first metal ribbon parallel portion 137 extends from the second joint portion side end 131a (first end) of the first joint portion 131 in the extending direction 138 of the first metal ribbon 111. This corresponds to the interval up to the junction side end 132a (second end).

第1金属リボン平行部137が形成された後、図3に示すように、第1金属リボン111は、ボンディングツール80を用いて、第2電力用半導体素子114の電極に超音波接合され、第2接合部132が形成される。   After the first metal ribbon parallel portion 137 is formed, the first metal ribbon 111 is ultrasonically bonded to the electrode of the second power semiconductor element 114 using the bonding tool 80 as shown in FIG. Two junctions 132 are formed.

一方、第2金属リボン112は、図4に示すように、第1金属リボン平行部137における表面に、ボンディングツール80を用いて超音波接合され、第1金属リボン111との間に第4接合部134が形成される。この第4接合部134が形成されるとき、第4接合部134の直下において、第1金属リボン111と第2電力用半導体素子114とが同時に接合され、第1金属リボン111と第2電力用半導体素子114との間に第3接合部133が形成される。ここで、第1金属リボン111の延在方向138における第1金属リボン平行部137の距離は、第4接合部134の長さ以上であり、かつ、延在方向138における第4接合部134及び第3接合部133の各中央部は、第1金属リボン平行部137の中央部に対応する。また、上記延在方向138における接合部131〜134の長さは、接合に用いられるボンディングツール80の幅に等しい。   On the other hand, as shown in FIG. 4, the second metal ribbon 112 is ultrasonically bonded to the surface of the first metal ribbon parallel portion 137 using the bonding tool 80, and the fourth metal ribbon 112 is bonded to the first metal ribbon 111. A portion 134 is formed. When the fourth bonding portion 134 is formed, the first metal ribbon 111 and the second power semiconductor element 114 are simultaneously bonded immediately below the fourth bonding portion 134, and the first metal ribbon 111 and the second power ribbon 114 are bonded together. A third junction 133 is formed between the semiconductor element 114 and the semiconductor element 114. Here, the distance of the first metal ribbon parallel part 137 in the extending direction 138 of the first metal ribbon 111 is not less than the length of the fourth joint part 134, and the fourth joint part 134 in the extending direction 138 and Each central part of the third joint part 133 corresponds to the central part of the first metal ribbon parallel part 137. Further, the lengths of the joining portions 131 to 134 in the extending direction 138 are equal to the width of the bonding tool 80 used for joining.

上述のように、第1金属リボン平行部137は、第4接合部134の長さ以上にて形成されることによって、第2金属リボン112を第1金属リボン111に接合するときに、第2金属リボン112が第1金属リボン111のネック部111a及びループ部111bと干渉することはない。その結果、第2金属リボン112の接合時において、第2金属リボン112が第1金属リボン111のネック部111aにダメージを与えることはなく、ネック部111aの強度低下は発生せず、接合信頼性の高い接合部を形成することが可能となる。   As described above, the first metal ribbon parallel part 137 is formed to be longer than the length of the fourth joint part 134, so that when the second metal ribbon 112 is joined to the first metal ribbon 111, the second metal ribbon parallel part 137 is formed. The metal ribbon 112 does not interfere with the neck portion 111a and the loop portion 111b of the first metal ribbon 111. As a result, when the second metal ribbon 112 is joined, the second metal ribbon 112 does not damage the neck portion 111a of the first metal ribbon 111, the strength of the neck portion 111a does not decrease, and the joining reliability It becomes possible to form a high junction part.

尚、ネック部111aとは、図示するように、第1接合部131及び第2接合部132に隣接する部分であって、第1金属リボン111が第2電力用半導体素子114の表面114aから離れ始めて上昇を開始する部分に相当する。また、ループ部111bとは、ネック部111aに対して反接合部側に位置し、第1金属リボン111が第2電力用半導体素子114の表面114aからさらに上昇し離れていく部分に相当する。   As shown in the figure, the neck portion 111 a is a portion adjacent to the first joint portion 131 and the second joint portion 132, and the first metal ribbon 111 is separated from the surface 114 a of the second power semiconductor element 114. It corresponds to the part that starts rising for the first time. The loop portion 111b is located on the side opposite to the neck portion 111a and corresponds to a portion where the first metal ribbon 111 further rises away from the surface 114a of the second power semiconductor element 114.

ここで、第2金属リボン112の接合時に用いられるボンディングツール80の幅が、つまり上記延在方向138におけるボンディングツールの長さが、第1金属リボン111を接合する際に用いられるボンディングツールの幅よりも大きい場合でも、延在方向138における第1金属リボン平行部137の長さは、第4接合部134の長さ以上に設定していることから、第1金属リボン111と第2金属リボン112とが干渉することはない。   Here, the width of the bonding tool 80 used when the second metal ribbon 112 is bonded, that is, the length of the bonding tool in the extending direction 138 is the width of the bonding tool used when the first metal ribbon 111 is bonded. The length of the first metal ribbon parallel portion 137 in the extending direction 138 is set to be equal to or longer than the length of the fourth joint portion 134 even when the first metal ribbon 111 and the second metal ribbon are larger than the first metal ribbon. 112 does not interfere.

また、第1金属リボン111と第2金属リボン112との接合に必要な距離A(図4)は、例えば第1接合部131、第2接合部132、第4接合部134が同じ幅のボンディングツール80で形成される場合、少なくとも接合部3つ分の距離(一つの接合部の距離が850μmである場合には約2550μm)である。これに対し、図8を参照して説明した従来例では、第3金属リボン25、第4金属リボン26、及び第5金属リボン27の接合に必要な距離Bは、例えば第1接合部31、第2接合部32、及び第3接合部33が同じ幅のボンディングツールで形成される場合で、先に述べたように約3750μmとなる。このように、本実施の形態1の電力用半導体装置100では、接合に要する距離を、図8に示す従来例よりも約1200μm分、短くすることができる。したがって、本実施の形態1の電力用半導体装置100は、図8に示す従来例よりも小型化を図ることが可能となる。さらに小型化を図るためには、第1金属リボン平行部137の距離は、第4接合部134の距離と等しいことが望ましい。図1及び図4では、そのような場合を図示している。   The distance A (FIG. 4) necessary for joining the first metal ribbon 111 and the second metal ribbon 112 is, for example, that the first joint 131, the second joint 132, and the fourth joint 134 have the same width. When formed with the tool 80, the distance is at least three joints (about 2550 μm when the distance of one joint is 850 μm). In contrast, in the conventional example described with reference to FIG. 8, the distance B necessary for joining the third metal ribbon 25, the fourth metal ribbon 26, and the fifth metal ribbon 27 is, for example, the first joint portion 31, In the case where the second joint portion 32 and the third joint portion 33 are formed by the bonding tool having the same width, as described above, the thickness is about 3750 μm. Thus, in the power semiconductor device 100 according to the first embodiment, the distance required for bonding can be shortened by about 1200 μm compared to the conventional example shown in FIG. Therefore, the power semiconductor device 100 of the first embodiment can be made smaller than the conventional example shown in FIG. In order to further reduce the size, the distance of the first metal ribbon parallel part 137 is desirably equal to the distance of the fourth joint part 134. 1 and 4 illustrate such a case.

また上述のように、第2金属リボン112は、第1金属リボン111における第1金属リボン平行部137上に接合され、かつ、第4接合部134及び第3接合部133の各中央部は、第1金属リボン平行部137の中央部に対応して配置される。したがって、第1金属リボン111と第2金属リボン112との接合部である第4接合部134は、第1接合部131上、及び第2接合部132上における、ボンディングツール80によって形成された凹凸部分と干渉せず、第1金属リボン平行部137上の平らな面に接合される。このため、図7Dに示すような従来例とは異なり、隙間のない、実質的な接合領域が広く、接合信頼性の高い接合部を形成することが可能となる。   In addition, as described above, the second metal ribbon 112 is bonded onto the first metal ribbon parallel portion 137 of the first metal ribbon 111, and the central portions of the fourth bonding portion 134 and the third bonding portion 133 are It arrange | positions corresponding to the center part of the 1st metal ribbon parallel part 137. FIG. Therefore, the fourth joint 134, which is a joint between the first metal ribbon 111 and the second metal ribbon 112, is unevenness formed by the bonding tool 80 on the first joint 131 and the second joint 132. It does not interfere with the part and is joined to a flat surface on the first metal ribbon parallel part 137. For this reason, unlike the conventional example as shown in FIG. 7D, it is possible to form a bonded portion having a large bonding area with no gap and high bonding reliability.

さらに、超音波接合により第2金属リボン112を第1金属リボン111に接合すると同時に、第4接合部134の直下において、第1金属リボン111と第2電力用半導体素子114とも接合される。このため、接合工程を減らしながらも、接合部を増やすことができるというメリットがある。このとき、第1金属リボン111と第2電力用半導体素子114とは、3つの接合部131〜133で接合されていることから、第1金属リボン111と第2電力用半導体素子114との間の接合信頼性をより向上させることができるというメリットもある。   Further, the second metal ribbon 112 is joined to the first metal ribbon 111 by ultrasonic joining, and at the same time, the first metal ribbon 111 and the second power semiconductor element 114 are joined just below the fourth joining portion 134. For this reason, there is a merit that the number of joining portions can be increased while reducing the joining process. At this time, since the first metal ribbon 111 and the second power semiconductor element 114 are joined by the three joint portions 131 to 133, the first metal ribbon 111 and the second power semiconductor element 114 are connected to each other. There is also an advantage that the bonding reliability of the can be further improved.

さらにまた、第1接合部131と第2接合部132との間は、第1金属リボン111が連続して延在している。このため、第1電力用半導体素子113から第2電力用半導体素子114及び回路パターン116へ電流を流す場合、図5に示すように、断面積の同じ、又はほぼ同じ、第1金属リボン111及び第2金属リボン112に均等に電流は流れる。そのため、図8の従来例で示したように、第1接合部31と第2接合部32とが電力用半導体素子12上のごく薄い金属膜35(4μm程度の厚さ。金属リボンは、200μm程度の厚さ。)で接続されている場合と比べて、電流ロスを小さくすることができる。   Furthermore, the first metal ribbon 111 extends continuously between the first joint 131 and the second joint 132. Therefore, when a current flows from the first power semiconductor element 113 to the second power semiconductor element 114 and the circuit pattern 116, as shown in FIG. The current flows evenly through the second metal ribbon 112. Therefore, as shown in the conventional example of FIG. 8, the first junction 31 and the second junction 32 are very thin metal films 35 on the power semiconductor element 12 (thickness of about 4 μm. The metal ribbon is 200 μm). The current loss can be reduced as compared with the case of being connected with a thickness of about.

さらに、断面積がほぼ同じの2本の金属リボン111,112へ均等に電流を流せることから、図8で示した従来例の場合と比べて、一つの金属リボンに流れる電流が増えることによる局所的な発熱量の増加が生じることはない。そのため、熱応力を低減でき、第1金属リボン111と第2電力用半導体素子114との接合信頼性をさらに向上させることができるというメリットもある。   Further, since current can be evenly supplied to two metal ribbons 111 and 112 having substantially the same cross-sectional area, the current flowing in one metal ribbon is increased compared to the conventional example shown in FIG. No increase in calorific value will occur. Therefore, there is an advantage that thermal stress can be reduced and the bonding reliability between the first metal ribbon 111 and the second power semiconductor element 114 can be further improved.

さらにまた、図8に示す従来例では、第3金属リボン25が第2電力用半導体素子12に接合される際、第2電力用半導体素子12上で、第3金属リボン25のカッティングが行われるため、第2電力用半導体素子12にダメージを与える可能性があるという問題があった。
これに対し、本実施形態1の電力用半導体装置100では、カッティングは、回路パターン116で行なわれ、電力用半導体素子上で行われることがないことから、電力用半導体素子113,114にダメージを与える危険性がないというメリットもある。
Furthermore, in the conventional example shown in FIG. 8, when the third metal ribbon 25 is joined to the second power semiconductor element 12, the third metal ribbon 25 is cut on the second power semiconductor element 12. Therefore, there is a problem that the second power semiconductor element 12 may be damaged.
On the other hand, in the power semiconductor device 100 of the first embodiment, the cutting is performed by the circuit pattern 116 and is not performed on the power semiconductor element, so that the power semiconductor elements 113 and 114 are damaged. There is also a merit that there is no danger of giving.

特に、電力用半導体素子がシリコンカーバイド(SiC)の場合、従来のシリコン(Si)よりも高温かつ高電流で使用されることから、従来に比べて金属リボンネック部の強度低下の阻止及び接合信頼性の向上を図ることができる本実施形態1の電力用半導体装置100は、極めて重要であり有効となる。   In particular, when the power semiconductor element is silicon carbide (SiC), it is used at a higher temperature and higher current than conventional silicon (Si). The power semiconductor device 100 of the first embodiment capable of improving the performance is extremely important and effective.

100 電力用半導体装置、111 第1金属リボン、112 第2金属リボン、
113 第1電力用半導体素子、114 第2電力用半導体素子、
131 第1接合部、131a 第2接合部側端、132 第2接合部、
132a 第1接合部側端、133 第3接合部、134 第4接合部、
137 第1金属リボン平行部、138 延在方向。
100 power semiconductor device, 111 first metal ribbon, 112 second metal ribbon,
113 first power semiconductor element, 114 second power semiconductor element,
131 1st junction part, 131a 2nd junction part side end, 132 2nd junction part,
132a first joint side end, 133 third joint, 134 fourth joint,
137 1st metal ribbon parallel part, 138 Extension direction.

Claims (6)

それぞれが矩形断面を有する第1金属リボン及び第2金属リボンが電力用半導体素子に積み重ねて接合される電力用半導体装置であって、
上記第1金属リボンは、上記電力用半導体素子に接合される導体であり、連続して延在する当該第1金属リボンの延在方向において電力用半導体素子と互いに異なる位置で接合される第1接合部、第2接合部及び第3接合部を有し、第3接合部は、上記延在方向において第1接合部と第2接合部との間に位置し、
さらに、第1金属リボンは、第1接合部と第2接合部との間において、電力用半導体素子の表面と略平行に延在する平行部を有し、
上記第2金属リボンは、上記第3接合部の直上に位置し第1金属リボンと接合される第4接合部を有する、
ことを特徴とする電力用半導体装置。
A power semiconductor device in which a first metal ribbon and a second metal ribbon each having a rectangular cross section are stacked and joined to a power semiconductor element,
The first metal ribbon is a conductor joined to the power semiconductor element, and is joined at a position different from the power semiconductor element in the extending direction of the continuously extending first metal ribbon. Having a joint, a second joint and a third joint, the third joint is located between the first joint and the second joint in the extending direction;
Furthermore, the first metal ribbon has a parallel portion extending substantially parallel to the surface of the power semiconductor element between the first joint portion and the second joint portion,
The second metal ribbon has a fourth joint that is located immediately above the third joint and is joined to the first metal ribbon.
A power semiconductor device.
第1金属リボンの延在方向において、第1接合部の第3接合部側の第1端と第2接合部の第3接合部側の第2端との間の距離は、上記延在方向における第4接合部の長さ以上を有する、請求項1記載の電力用半導体装置。   In the extending direction of the first metal ribbon, the distance between the first end of the first bonding portion on the third bonding portion side and the second end of the second bonding portion on the third bonding portion side is equal to the extending direction. The power semiconductor device according to claim 1, wherein the power semiconductor device has a length equal to or longer than a length of the fourth junction in the first embodiment. 第1金属リボンの延在方向において、第4接合部の中央部分は、上記第1端と上記第2端との間の中央部に対応して位置する、請求項2記載の電力用半導体装置。   3. The power semiconductor device according to claim 2, wherein in the extending direction of the first metal ribbon, a central portion of the fourth joint portion is located corresponding to a central portion between the first end and the second end. . それぞれが矩形断面を有する第1金属リボン及び第2金属リボンが電力用半導体素子に積み重ねて接合される電力用半導体装置の製造方法であって、
連続して延在する上記第1金属リボンを上記電力用半導体素子に接合して、第1金属リボンの延在方向において互いに異なって位置する第1接合部及び第2接合部を形成する第1工程と、
上記延在方向において第1接合部と第2接合部との間に対応した第1金属リボン上の位置にて第1金属リボンに第2金属リボンを接合してリボン間接合部を形成すると同時に、このリボン間接合部の直下にて第1金属リボンと電力用半導体素子とをさらに接合する第2工程と、
を備えたことを特徴とする電力用半導体装置の製造方法。
A method for manufacturing a power semiconductor device in which a first metal ribbon and a second metal ribbon each having a rectangular cross section are stacked and bonded to a power semiconductor element,
The first metal ribbon that extends continuously is bonded to the power semiconductor element to form a first bonding portion and a second bonding portion that are positioned differently in the extending direction of the first metal ribbon. Process,
At the same time that the second metal ribbon is joined to the first metal ribbon at a position on the first metal ribbon corresponding to the space between the first joint and the second joint in the extending direction to form an inter-ribbon joint. A second step of further joining the first metal ribbon and the power semiconductor element immediately below the joint between the ribbons;
A method for manufacturing a power semiconductor device.
第1接合部の第2接合部側端と第2接合部の第1接合部側端との間において、電力用半導体素子の表面と略平行で、かつ第1金属リボンの延在方向において上記リボン間接合部の距離以上の長さで延在する第1金属リボン平行部を、上記第1工程にて形成する、請求項4記載の電力用半導体装置の製造方法。   Between the second joint side end of the first joint and the first joint side end of the second joint, substantially in parallel with the surface of the power semiconductor element and in the extending direction of the first metal ribbon The manufacturing method of the semiconductor device for electric power of Claim 4 which forms the 1st metal ribbon parallel part extended in the length more than the distance of the junction part between ribbons in the said 1st process. 上記第2工程において、上記リボン間接合部の中央部を、上記第1金属リボン平行部の中央部に配置する、請求項5記載の電力用半導体装置の製造方法。   The method of manufacturing a power semiconductor device according to claim 5, wherein, in the second step, a center portion of the inter-ribbon joint portion is disposed at a center portion of the first metal ribbon parallel portion.
JP2011133098A 2011-06-15 2011-06-15 Power semiconductor device and manufacturing method therefor Withdrawn JP2013004658A (en)

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JP2014183157A (en) * 2013-03-19 2014-09-29 Mitsubishi Electric Corp Power semiconductor device and method for manufacturing power semiconductor device
JP2015056412A (en) * 2013-09-10 2015-03-23 三菱電機株式会社 Power semiconductor device and method of manufacturing the same
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