JP2012500455A5 - - Google Patents

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Publication number
JP2012500455A5
JP2012500455A5 JP2011523172A JP2011523172A JP2012500455A5 JP 2012500455 A5 JP2012500455 A5 JP 2012500455A5 JP 2011523172 A JP2011523172 A JP 2011523172A JP 2011523172 A JP2011523172 A JP 2011523172A JP 2012500455 A5 JP2012500455 A5 JP 2012500455A5
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JP
Japan
Prior art keywords
present
circuit
pair combination
showing
view
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Granted
Application number
JP2011523172A
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Japanese (ja)
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JP2012500455A (en
JP5362006B2 (en
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Priority claimed from PCT/US2009/053729 external-priority patent/WO2010019785A1/en
Publication of JP2012500455A publication Critical patent/JP2012500455A/en
Publication of JP2012500455A5 publication Critical patent/JP2012500455A5/ja
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Publication of JP5362006B2 publication Critical patent/JP5362006B2/en
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Description

本発明の一実施形態によるＴＧジャック組立体の分解図である。1 is an exploded view of a TG jack assembly according to an embodiment of the present invention. FIG. 本発明の一実施形態による印刷回路基板の概略図である。1 is a schematic view of a printed circuit board according to an embodiment of the present invention. 本発明の一実施形態による２つのインダクタの間に位置付けられたコンデンサA capacitor positioned between two inductors according to an embodiment of the present invention を示す回路図である。FIG. 本発明の一実施形態による印刷回路基板の各層の伝導トレースを示す平面図でFIG. 3 is a plan view showing conductive traces of each layer of a printed circuit board according to an embodiment of the present invention. ある。is there. 本発明の一実施形態による重構造の印刷回路基板中の伝導トレースを示す斜視1 is a perspective view showing conductive traces in a heavy-duty printed circuit board according to an embodiment of the present invention. 図である。FIG. 本発明の一実施形態による対の組み合わせ４５‐３６の回路を示す回路図であFIG. 6 is a circuit diagram illustrating a circuit of a pair combination 45-36 according to an embodiment of the present invention. る。The 本発明の一実施形態による対の組み合わせ４５‐７８の回路を示す回路図であFIG. 7 is a circuit diagram illustrating a circuit of a pair combination 45-78 according to an embodiment of the present invention. る。The 本発明の一実施形態による対の組み合わせ４５‐１２の回路を示す回路図であFIG. 6 is a circuit diagram showing a circuit of a pair combination 45-12 according to an embodiment of the present invention. る。The 本発明の一実施形態による対の組み合わせ４５‐３６の回路を示す回路図であFIG. 6 is a circuit diagram illustrating a circuit of a pair combination 45-36 according to an embodiment of the present invention. る。The 本発明の一実施形態による対の組み合わせ３６‐１２の回路概略を示す回路Circuit showing circuit schematic of pair combination 36-12 according to one embodiment of the present invention. 図である。FIG. 本発明の一実施形態による対の組み合わせ４５‐３６の回路概略を示す回路Circuit showing circuit schematic for pair combination 45-36 according to one embodiment of the present invention. 図である。FIG.

JP2011523172A 2008-08-13 2009-08-13 Communication connector with multistage compensation Active JP5362006B2 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US8854808P 2008-08-13 2008-08-13
US61/088,548 2008-08-13
PCT/US2009/053729 WO2010019785A1 (en) 2008-08-13 2009-08-13 Communications connector with multi-stage compensation

Publications (3)

Publication Number Publication Date
JP2012500455A JP2012500455A (en) 2012-01-05
JP2012500455A5 true JP2012500455A5 (en) 2012-09-13
JP5362006B2 JP5362006B2 (en) 2013-12-11

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ID=41211868

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2011523172A Active JP5362006B2 (en) 2008-08-13 2009-08-13 Communication connector with multistage compensation

Country Status (11)

Country Link
US (2) US7927153B2 (en)
EP (1) EP2319138B1 (en)
JP (1) JP5362006B2 (en)
KR (1) KR101602719B1 (en)
CN (1) CN102119472B (en)
AU (1) AU2009281883A1 (en)
BR (1) BRPI0917950A2 (en)
CA (1) CA2733598A1 (en)
HK (1) HK1151893A1 (en)
MX (1) MX2011001542A (en)
WO (1) WO2010019785A1 (en)

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