JP2012248094A - Electronic equipment - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a technique for efficiently writing data to a flash ROM.SOLUTION: An MPU of an electronic controller divides data to be written to a flash ROM 13 into one-byte data (byte data) (S130), and selects the respective byte data constituting the data to be written as data to be processed in order (S140). Then the MPU compares the data to be processed with byte data corresponding to the data to be processed which is stored in the flash ROM (S150), and writes the data to be processed to the flash ROM in an additional writing manner (S160) when the data to be processed is obtained by altering the contents of data stored in the flash ROM (Yes at S150). When the data to be processed is not the data obtained by altering the contents of the data stored in the flash ROM (No at S150), the data to be processed is not written to the flash ROM.

Description

  The present invention relates to an electronic device that includes an electrically rewritable nonvolatile memory and writes data to the nonvolatile memory.

  Conventionally, EEPROM and flash ROM are known as nonvolatile memories capable of electrically rewriting data. Since this type of memory can store and hold data without power supply, it has been widely used in recent years for storing learning data and setting information.

  By the way, there is a limit to the number of times data can be erased from a nonvolatile memory such as an EEPROM or a flash ROM. For this reason, a technique for extending the life of the memory by suppressing unnecessary data writing and erasing has been studied.

  For example, in the prior art, when writing data to the EEPROM, it is determined whether or not the data to be written to the EEPROM has been changed from the old data already written in the EEPROM. In the case where it has not been changed, a technique for extending the life of the memory by not writing data to the EEPROM is known (see Patent Document 1).

Japanese Patent Laid-Open No. 11-141391

  However, in the prior art, when the write target data is partly changed from the old data, the entire write target data is written to the EEPROM. It could not be said that the data writing to the flash ROM) was sufficiently efficient.

  The present invention has been made in view of these problems, and an object of the present invention is to provide a technique for efficiently writing data to an electrically rewritable nonvolatile memory such as an EEPROM or a flash ROM. .

  In order to achieve the above object, the present invention is an electronic apparatus including a nonvolatile memory capable of electrically rewriting data, and includes a comparison unit and a write control unit. The comparison means compares the write target data with the old data corresponding to the write target data stored in the nonvolatile memory when the write target data for the nonvolatile memory is generated, and element data constituting the write target data In the group, element data whose contents are changed from the old data is specified. On the other hand, the write control means selectively writes the element data group whose contents have been changed from the old data specified by the comparison means among the element data groups constituting the write target data to the nonvolatile memory. As a result, the write target data is written to the nonvolatile memory.

  According to this electronic device (claim 1), among the element data group constituting the write target data, the element data group whose contents are changed from the old data is selectively written to the nonvolatile memory. However, when even a part of the data is changed from the old data, the amount of data written to the nonvolatile memory can be reduced as compared with the conventional technique in which the entire data to be written is written to the nonvolatile memory. . If the data write amount can be reduced, the number of data erasures can be reduced, and the lifetime of the nonvolatile memory can be extended. That is, according to this electronic device, data can be efficiently written into the nonvolatile memory so that the number of times of data erasure can be suppressed and the lifetime of the nonvolatile memory can be extended.

  When the write request for the nonvolatile memory is generated, the comparing means compares the write target data specified by the write request with the old data corresponding to the write target data stored in the nonvolatile memory. In the element data group constituting the write target data, the element data whose contents have been changed from the old data can be specified. When the write request is generated, the write control means Of the element data group constituting the target data, the element data group whose contents are changed from the old data specified by the comparing means can be written in the nonvolatile memory.

  In addition, when a read request occurs, the electronic device reads the latest data stored in the nonvolatile memory for each element data constituting the read target data specified by the read request, and updates the latest element data read out. It is possible to employ a configuration including a read control means for providing data to the read request source as the read target data.

  Further, the read control unit can combine the latest data of the read element data and provide the combined data to the read request source as the read target data. If the electronic device is configured in this way, the read request source does not need to manage the data stored in the nonvolatile memory for each element data, which is very convenient.

  By the way, if the nonvolatile memory is a memory that needs to be erased in units of predetermined areas corresponding to a plurality of element data, each element data is individually erased from the nonvolatile memory one by one. Can not do it. For this reason, when erasing data to secure free space in the nonvolatile memory, the area contains the latest data along with old data (unnecessary data) unless it is devised. In addition to the data erasing operation, the latest data that should not be erased may be erased from the nonvolatile memory.

  Therefore, the electronic device may be configured as follows. That is, the electronic device erases the element data group stored in the non-volatile memory in units of areas in order to secure an empty space, while the element data group stored in the area to be erased is erased. The element data group corresponding to the latest data may be provided with an erasure control means for writing and evacuating to other areas in the non-volatile memory that do not correspond to the area to be erased.

  By configuring the electronic device in this manner, it is possible to appropriately erase the data in the nonvolatile memory in units of areas and secure an empty space in the nonvolatile memory while avoiding the occurrence of the above-mentioned types of problems. Can do. The erasure control means deletes one of the plurality of areas in the non-volatile memory when a predetermined condition such that the number of empty areas in the non-volatile memory is less than a prescribed number is satisfied. This area can be selected and data in this area can be erased.

  When a unique identification code is assigned in advance to each element data, the writing control means and the comparison means of the electronic device can be configured as follows. That is, when writing element data in the nonvolatile memory, the write control means can be configured to write the identification code assigned to the element data in association with the element data in the nonvolatile memory. The comparing means compares the element data and the identification code assigned to the element data for each element data constituting the writing object data when the writing object data is compared with the old data stored in the nonvolatile memory. Compared with the element data stored in the nonvolatile memory in association with the same identification code, the element data group constituting the write target data is identified with the element data whose contents have been changed from the old data. (Claim 4).

If the identification code is used in this way, each element data of the write target data and each element data of the old data stored in the nonvolatile memory can be easily compared.
The element data described above can be defined as the minimum unit data that can be written to the nonvolatile memory. That is, each element data can be defined as the data of each partition expressed by partitioning the write target data in the minimum data unit that can be written to the nonvolatile memory.

  In addition, when the nonvolatile memory can write data in units of bytes, each element data should be defined as data of each section expressed by partitioning the write target data in units of bytes. (Claim 6).

  In addition, examples of the nonvolatile memory described above include an EEPROM and a flash ROM. However, the present invention is particularly applied to an electronic device including a flash ROM as an electrically rewritable nonvolatile memory. Preferred (claim 7). Since the flash ROM reaches the end of its life with a smaller number of data erasures than the EEPROM, when the present invention is provided to such an electronic device, the effect of extending the lifetime of the nonvolatile memory is further exhibited.

  In addition, the functions of each means included in the electronic device can be realized by a computer by a program. And the program for making a computer implement | achieve the function as each means with which the above-mentioned electronic device is provided can be recorded on a computer-readable recording medium, and can be provided to a user. Examples of the recording medium include a magnetic disk such as a hard disk, an optical disk such as a CD and a DVD, a magneto-optical disk, and a semiconductor memory such as a memory card.

2 is a block diagram illustrating a configuration of an electronic control device 1. FIG. It is a figure showing the structure (a) of flash ROM13, and the structure (b) of a storage block. It is a flowchart showing the write-control process which MPU11 performs. It is a figure showing the structure of a management table. It is the figure explaining the data write mode (a) to the flash ROM 13 by a present Example, and the data write mode (b) to the flash ROM 13 by a prior art. It is a flowchart showing the erasure | elimination control processing which MPU11 performs. It is a figure explaining the procedure at the time of erasing the data in a storage block. It is a flowchart showing the read control process which MPU11 performs.

Embodiments of the present invention will be described below with reference to the drawings.
An electronic control unit (ECU) 1 of this embodiment shown in FIG. 1 is mounted on a vehicle and controls each part of the vehicle. The electronic control device 1 controls each part of the vehicle by controlling various actuators mounted on the vehicle as the control target 3 based on output signals from the sensors 5 mounted on the vehicle. Examples of the electronic control device 1 include an electronic control device that performs engine control.

  Specifically, the electronic control device 1 includes a microprocessor (MPU) 11, a flash ROM 13, and an input / output circuit 15. MPU11 implement | achieves vehicle control by performing the process according to various programs. The MPU 11 includes a ROM 11a that stores the various programs, and a RAM 11b that is used as a work area when executing various processes based on the programs stored in the ROM 11a.

  That is, the MPU 11 acquires various output signals from the sensors 5 through the input / output circuit 15 by executing various programs stored in the ROM 11a, and generates a control signal for the control target 3 based on the output signals. This is input to the controlled object 3 through the input / output circuit 15. Control object 3 is controlled by such processing, and vehicle control is realized.

  On the other hand, the flash ROM 13 known as an electrically rewritable nonvolatile memory stores various data relating to vehicle control. When the electronic control device 1 is an electronic control device for engine control, the flash ROM 13 stores control parameters for engine control. The control parameters include control parameters that are learned and updated (hereinafter referred to as “learning parameters”). The learning parameter value is learned and updated according to the result of vehicle control by the MPU 11 and written to the flash ROM 13. In addition, the power-on count is written in the flash ROM 13. For example, the latest power-on count is written each time the accessory switch is turned on and the electronic control device 1 is powered on.

  The flash ROM 13 includes a plurality of storage blocks as in the known flash ROM (see FIG. 2A). Although data can be written in units of 1 byte, data erasure is performed in units of storage blocks. It must be erased. That is, the flash ROM 13 is configured such that the minimum writing unit is 1 byte unit, the minimum erasing unit is a storage block unit, and new data is stored in 1 byte unit in the storage block in which data is erased. Although the data can be written in, the area in the storage block in which the data has been written cannot be overwritten with new data unless the data erase operation is performed on the entire storage block. .

  Each storage block provided in the flash ROM 13 has a block header area at the head (see FIG. 2B), and stores information such as a block ID and a block state in the block header area. Each storage block includes an area following the block header area as an area for storing a data header and user data. The data header is data for user data management. On the other hand, the user data is data such as the control parameters and the number of times of power-on described above. In short, target data to be stored in the flash ROM 13 other than the management data is stored in the flash ROM 13 as user data.

  However, user data is defined as 1-byte data, and data such as control parameters and power-on counts composed of a plurality of bytes of data are expressed as 1-byte data (hereinafter referred to as “byte data”). ) And is written in the flash ROM 13 as user data. Specifically, as shown in FIG. 2B, user data is written in order from the rear end of the area in the area following the block header area.

  On the other hand, the data header indicates the ID code of the corresponding user data, the memory address corresponding to the storage location of the user data (in other words, the address pointer for accessing the user data), and the state of the user data. Contains flag data to represent. As shown in FIG. 2B, the data header is written in order from the leading end of the area in the area following the block header area.

  That is, when the MPU 11 writes the write target data such as the control data and the power-on count to the flash ROM 13, the MPU 11 divides the data into byte data, and each byte data constituting the write target data is converted to the byte data. Is written in the flash ROM 13 together with the data header corresponding to. At this time, the byte data is written from the rear end side of the area following the block header area, and the data header is written from the front end side of the area following the block header area.

  However, when the write target data is divided and each of the byte data constituting the write target data is written to the flash ROM 13 together with the data header, each byte data constituting the write target data and the flash ROM 13 Each byte data constituting the old data corresponding to the write target data to be stored is compared, and the byte data whose contents are changed from the old data is selectively written to the flash ROM 13 in the additional write format.

  Here, the byte data is written to the flash ROM 13 in the write-once format without deleting the old data, because the flash ROM 13 cannot overwrite the data and erases the old data for the byte data whose contents are changed. This is because erasing in units of storage blocks is necessary.

  More specifically, each storage block is set to a storage capacity sufficiently larger than the data amount of user data (byte data), and is configured to be able to store user data (byte data) for a plurality of bytes. Accordingly, since there is byte data whose contents have been changed from the old data in the write target data, every time the byte data whose contents have been changed from the old data is written to the flash ROM 13, the flash ROM 13 corresponding to this byte data. If the old data stored in is deleted from the flash ROM 13 by erasing data in units of storage blocks, the data erasure is wasted and the life of the flash ROM 13 will be shortened.

  For this reason, in this embodiment, when writing the latest data whose contents have been changed from the old data into the flash ROM 13, the latest data is added to the flash ROM 13 without deleting the old data from the flash ROM 13. Is stored in the flash ROM 13 with the old data remaining. By repeating such additional recording operation, the number of data erasures in the flash ROM 13 can be suppressed, and the life of the flash ROM 13 can be extended.

  However, the free space of the storage block is gradually reduced by repeating the appending operation. For this reason, with respect to the storage block in which there is no free space, the free space necessary for the flash ROM 13 is secured by sequentially erasing the data in the storage block. The MPU 11 writes data to each storage block in a predetermined order as indicated by an arrow in FIG. 2A, but an empty block (a storage block in which no user data or data header is registered) is defined. If the number is less than the number, the data in the storage block with the oldest data writing time is erased from the storage blocks that are not empty blocks. In this way, the MPU 11 secures an empty space.

Next, details of the data write operation, erase operation, and read operation by the MPU 11 will be described with reference to flowcharts.
When a write request to the flash ROM 13 is generated, the MPU 11 executes the write control process shown in FIG. 3 and writes the write target data specified by the write request to the flash ROM 13. The write request is input from, for example, a processing task for updating a learning parameter according to a result of vehicle control or a processing task for counting up the number of power-ons.

  When this write control process is executed, the MPU 11 acquires the write target data from the write request source to the flash ROM 13 and also acquires an ID code that is an identification code that can determine the type of the write target data ( S110). However, the ID code acquired here may be the above-described ID code used in the data header, or another ID code managed by the write request source. If the ID code to be acquired is an ID code managed by the write request source, it is necessary to convert it to an ID code used for the data header, so that the conversion table is stored in the ROM 11a or the like in advance. There is a need.

  When the processing in S110 is completed, the MPU 11 determines whether or not the acquired write target data is data of 2 bytes or more (S120), and determines that the data is data of 2 bytes or more (Yes in S120). ), This write target data is divided into data for each byte. That is, the write target data is divided into a group of byte data (S130). Thereafter, the process proceeds to S140. On the other hand, when determining that the write target data is 1-byte data (No in S120), the MPU 11 treats the write target data as byte data without executing the process of S130, and proceeds to S140. .

  After shifting to S140, the MPU 11 selects one byte data to be processed from the byte data group constituting the write target data, and this byte data to be processed is stored in the flash ROM 13 as the old data. It is determined whether or not the content has been changed (S150).

  Specifically, the latest byte data stored in the flash ROM 13 in association with the data header having the same ID code as the ID code assigned to the target byte data and the target byte data. By comparing the data with each other, it is determined whether or not the byte data to be processed has been changed from the old data stored in the flash ROM 13 (S150).

  However, in this embodiment, when the electronic control unit 1 is started, the MPU 11 refers to the entire flash ROM 13, and the byte data stored in the flash ROM 13 represents the storage address of the latest byte data for each ID code. Create a table. And this is memorize | stored in RAM11b. Each time the latest byte data is written in the flash ROM 13, the storage address of the byte data is updated in the management table.

  FIG. 4 shows the configuration of this management table. FIG. 4 shows that the latest data of the byte data constituting the first data (DATA1) and having the ID code “*** 0” is stored in the address “*** 3000H” of the flash ROM 13. , The upper byte (DATA2_H) of the second data (ID2) that is the byte data constituting the second data (DATA2) at the address “*** 3001H” of the flash ROM 13 Is stored in the flash ROM 13 address “*** 3010H”, and the ID data is “*** 2” which is the byte data constituting the second data (DATA2). The structure of the management table when the latest byte data of the lower byte DATA2_L of the second data is stored. It is used to represent an. Examples of the first and second data include the above-described learning parameters and the number of times of power-on.

  That is, when the MPU 11 compares the byte data to be processed with the byte data stored in the flash ROM 13 corresponding to the byte data to be processed in S150, the management table stored in the RAM 11b without using the data header. , The storage address of the latest data of the byte data stored in the flash ROM 13 corresponding to the ID code assigned to the byte data to be processed is specified. Then, the byte data to be compared is accessed by referring to the byte data stored at this address. However, the MPU 11 is not limited to such a method, but may search the flash ROM 13 for byte data to be compared with reference to the ID code of the data header.

  Through such a comparison operation, the MPU 11 changes the contents of the byte data to be processed from the old data stored in the flash ROM 13 (the latest data among the byte data of the same ID code stored in the flash ROM 13). If it is determined that the data has been processed (Yes in S150), the process proceeds to S160, and the processing target byte data is written as user data in the active block in the flash ROM 13 together with the data header (S160).

  The active block referred to here is a write destination block for newly writing byte data (user data) to the flash ROM 13 among a plurality of storage blocks of the flash ROM 13. As described above, the MPU 11 writes data to each storage block in a predetermined order, but this operation switches the active block to the next block when there is no free space in the active block. This is realized by a processing procedure such as writing new byte data to the active block.

  According to the example shown in FIG. 2A, the MPU 11 switches the active block in the order of the 0th storage block, the 1st storage block, the 2nd storage block,. When there is no more free space in the Mth storage block, the active block is switched to the 0th storage block as the next block, and byte data is written in the active block together with the data header. In this way, the active block is sequentially switched so as to loop from the 0th to the Mth storage blocks.

  When the byte data and the data header to be processed are written into this active block, the MPU 11 updates the management table stored in the RAM 11b in the subsequent S170 (see FIG. 3). That is, according to the write destination of the byte data to be processed in the flash ROM 13, the storage address of the corresponding byte data in the management table stored in the RAM 11b is updated to the write destination address (S170). Thereafter, the process proceeds to S180.

  When the process proceeds to S180, the MPU 11 selects all the byte data constituting the write target data as the process target byte data, and determines whether the processes after S150 have been executed. If it is determined that it is not executed (No in S180), the process returns to S140, and new byte data is selected as the byte data to be processed, and the processes after S150 are executed.

  In this way, when the processes after S150 are executed for all the byte data constituting the write target data (Yes in S180), the MPU 11 ends the write control process. The MPU 11 divides the data to be written into a group of byte data that is data in units of 1 byte by such a procedure, and among these byte data groups, the byte data whose contents are changed from the data stored in the flash ROM 13. Only the group is selectively written into the flash ROM 13 in a write-once format.

  For example, as shown in FIG. 5A, the data to be written is 2-byte data, and only the lower byte (DATA_L) of the upper byte (DATA_H) and the lower byte (DATA_L) is stored in the flash ROM 13. In the case of data updated from the updated data (DATA_L *), only the lower byte data (DATA_L *) of the upper byte and lower byte is selectively written to the flash ROM 13.

  FIG. 5A is a diagram showing a data writing mode to the flash ROM 13 according to the present embodiment, and FIG. 5B is a diagram showing a data writing mode to the flash ROM 13 according to the prior art. . According to the prior art, as shown in FIG. 5B, even if only the lower byte (DATA_L) is the data (DATA_L *) updated from the data stored in the flash ROM 13, the data to be written is If the data is 2-byte data, it is written into the flash ROM 13 without being divided. For this reason, the empty space in the flash ROM 13 is quickly lost, and the number of data erasures cannot be efficiently suppressed. According to the present embodiment, the number of data erasures can be efficiently suppressed as compared with such a conventional technique.

  Next, a data erasing operation for the flash ROM 13 will be described with reference to FIG. The MPU 11 executes the erase control process shown in FIG. 6 every time data is written to the flash ROM 13.

  When the erase control process is executed, the MPU 11 first determines whether or not the flash ROM 13 is in a state where the number of empty blocks is less than a prescribed number (for example, 2) when the next data is written (S310). If it is determined that this is not the case (No in S310), the erasure control process is terminated.

  The example shown in the first stage of FIG. 7 shows a state in which DATA 1-byte data DATA 2 and DATA 2 DATA 3 are stored in the flash ROM 13. A rectangle indicated by a thick solid line in FIG. 7 represents a storage block. In FIG. 7, the suffix “_H” is attached to the upper bytes of DATA2 and DATA3, and the suffix “_L” is attached to the lower bytes of DATA2 and DATA3. In the state shown in the first stage of FIG. 7, the active block is empty, and the flash ROM 13 is not in a state where the number of empty blocks is less than the prescribed number when writing the next data, so a negative determination is made in S310. The

  On the other hand, when the MPU 11 determines that the number of free blocks is less than the specified number (Yes in S310), the process proceeds to S320. In the second stage of FIG. 7, from the state shown in the first stage of FIG. 7, new data (DATA1, DATA2_L) is written in the active block, the active block becomes empty, and the active block is changed to the next block. It shows the state. The state shown in the second stage of FIG. 7 corresponds to a state in which the number of empty blocks is less than the prescribed number (2) when the next data is written when the prescribed number is “2”.

  In such a state, the MPU 11 in the subsequent S320, among the group of storage blocks that are not empty blocks (hereinafter referred to as “non-empty blocks”), storage blocks that have no free space at the earliest time. Are selected as storage blocks to be erased (hereinafter referred to as “erasure target blocks”). In the example shown in FIG. 7, the rightmost storage block corresponds to the erase target block.

  Thereafter, the MPU 11 specifies a byte data group corresponding to the latest data among the byte data groups stored in the selected erasure target block (S330). In the example shown in the second stage of FIG. 7, it is assumed that the upper byte (DATA3_H) of DATA3 and the upper byte (DATA2_H) of DATA2 are stored and held as the latest data in the block to be erased. In FIG. 7, the latest data is indicated by a filled image.

  Here, the specification of the byte data corresponding to the latest data stored in the erasure target block can be realized by referring to the management table stored in the RAM 11b, as in the processing in S150. As described above, in the management table, the storage address of the latest data of the byte data corresponding to the ID code is described for each ID code. Therefore, the byte data corresponding to the ID code in which the storage destination address corresponding to the erasure target block in the management table corresponds to the byte data corresponding to the latest data stored in the erasure target block. Therefore, in S330, in the management table, a group of byte data corresponding to the ID code in which the storage destination address corresponding to the erase target block is described is specified as a byte data group corresponding to the latest data stored in the erase target block. can do.

  However, as another example, the MPU 11 may specify the byte data group corresponding to the latest data stored in the erase target block by specifying the arrangement of the byte data in the flash ROM 13. In other words, when a plurality of byte data of the same ID code is stored in the flash ROM 13, the byte data group of the same ID code goes back upstream in the data writing direction from the current write position end in the flash ROM 13. The byte data that appears first is determined to be the latest data, and for byte data in which a plurality of byte data with the same ID code is not stored, the only byte data stored in the flash ROM 13 is replaced with the latest data. Therefore, it is possible to specify the byte data group corresponding to the latest data among the byte data groups stored in the erasure target block.

  In addition, when data representing the update count (version) of the corresponding byte data is written as the flag data in the data header, this flag data is referred to and the same ID code stored in the flash ROM 13 is referred to. Of the byte data group, the byte data with the largest number of updates (the latest version of the byte data) can be determined as the latest data. Such determination of the latest data can also be adopted in the processing of S150.

  In addition, when information indicating whether or not byte data has been normally written to the flash ROM 13 is written in the data header as the flag data, the flag data is referred to and byte data that is not normally written is referred to. May be treated formally as not stored in the flash ROM 13 and the latest data may be specified. In this case, in the management table of the RAM 11b, the byte data that has not been normally written is treated formally as not stored in the flash ROM 13, and stored corresponding to the latest data for each ID code. What is necessary is just to describe a destination address.

  After the processing of S330, the MPU 11 sets each of the byte data corresponding to the specified latest data among the byte data group stored in the erasure target block as a new active block updated at the previous data writing. In addition, by writing as user data, these byte data are saved in a storage block that is not an erasure target block (S340). Of course, in this case, a data header corresponding to these byte data is written in the active block. The third row in FIG. 7 shows an example in which the latest data (DATA3_H, DATA2_H) stored and held in the erasure target block is saved in the active block.

  Thereafter, the MPU 11 erases the data in the erase target block in units of blocks (S350), and ends the erase control process. When erasing the data in the erasure target block, the data in the block header area in the erasure target block is temporarily saved in the RAM 11b, and the data in the erasure target block is erased and then saved in the RAM 11b. Based on the data, necessary data is written into the block header area in the storage block after erasure.

  In this embodiment, the necessary data is not erased from the flash ROM 13 by erasing the data in the flash ROM 13 in units of storage blocks in such a procedure.

  Further, according to the electronic control device 1 of the present embodiment, the data stored in the flash ROM 13 is read as shown in FIG. In other words, when a request for reading data stored in the flash ROM 13 is generated, the MPU 11 executes the read control process shown in FIG. The read request is input from, for example, a task that requires data to be read.

  When the read control process is started, the MPU 11 corresponds to the read target data notified from the read request source, the storage destination address in the flash ROM 13 of the latest data of each byte data constituting the read target data specified by the read request. Identification based on the information of the ID code to be performed (S510). Specifically, it can be specified by referring to the management table stored in the RAM 11b. If the ID code notified from the read request source is different from the ID code used in the flash ROM 13, the ID code of each byte data constituting the read target data is set based on the conversion table as described above. You just have to specify.

  Thereafter, the MPU 11 refers to the storage address of each specified byte data, reads the latest data for each byte data constituting the read target data from the flash ROM 13 (S520), and reads each read byte data. Based on the ID code, the data is combined in the order of arrangement of the byte codes in the read target data. Thereby, combined data formed by combining a plurality of bytes of data corresponding to the data to be read is generated (S530). Thereafter, the combined data (read target data) is provided to the read request source (S540), and the read control process is terminated.

  According to the electronic control apparatus 1 of the present embodiment that executes the read control process in this way, it is not necessary to combine byte data read from the flash ROM 13 at the read request source. The processing corresponding to the present invention can be realized without drastically changing the specifications on the application program side that handles. That is, the processing corresponding to the present invention can be realized by setting the memory driver (program) to a program configuration capable of executing the above-described write control processing, erase control processing, and read control processing.

  Then, by incorporating such a program into the ROM 11a and configuring the electronic control unit 1 to cause the MPU 11 to execute these processes, it is highly convenient and the amount of data written to the flash ROM 13 is reduced, thereby reducing the flash ROM 13 It is possible to configure the electronic control device 1 that can extend the life of the device.

  The embodiment of the present invention has been described above. According to this embodiment, for example, when the number of power-on times is stored in the flash ROM 13 as 2-byte data, the following advantages are obtained. That is, the number of times of power-on is incremented by 1 every time the power is turned on, so the value of the lower byte is updated every time, but the upper byte is updated only once every 256 times. Accordingly, assuming that 256 times of writing are performed on the flash ROM 13 with respect to the number of times of power-on, according to the prior art, the total amount of writing is 2 bytes × 256 times = 512 bytes. For example, the total writing amount is 1 byte (lower byte) × 256 times + 1 byte (upper byte) × 1 time = 257 bytes, and the writing amount to the flash ROM 13 can be greatly reduced. Therefore, according to the present embodiment, the number of data erasures in the flash ROM 13 can be reduced, and as a result, the life of the flash ROM 13 can be extended.

  In the above-described embodiment, the process of S150 executed by the MPU 11 corresponds to an example of a process realized by the comparison unit, and the process of S160 executed by the MPU 11 is an example of a process realized by the write control unit. Correspondingly, the read control process executed by the MPU 11 corresponds to an example of a process realized by the read control means, and the erase control process executed by the MPU 11 corresponds to an example of a process realized by the erase control means.

Further, the present invention is not limited to the above-described embodiments, and can take various forms.
For example, in the above embodiment, the example in which the present invention is applied to the electronic control device 1 including the flash ROM 13 has been described. However, the present invention is applied to an EEPROM capable of erasing data in units of 1 byte instead of the flash ROM 13. May be. According to the present invention, the amount of data written can be reduced. As a result, the number of data erasures can be reduced even in the EEPROM, and the life of the EEPROM can be extended. However, data can be erased several hundred thousand times with an EEPROM, whereas data erase only about 10,000 times with a flash ROM. Therefore, the present invention is effective when applied to a flash ROM. It is further demonstrated.

  Further, in the above-described embodiment, the example in which the present invention is applied to the electronic control device 1 for vehicle control has been described. However, the present invention can be applied to various other electronic devices.

DESCRIPTION OF SYMBOLS 1 ... Electronic control unit, 3 ... Control object, 5 ... Sensors, 11 ... MPU, 11a ... ROM, 11b ... RAM, 13 ... Flash ROM, 15 ... I / O circuit

Claims (7)

An electrically rewritable nonvolatile memory;
When data to be written to the nonvolatile memory is generated, the data to be written is configured by comparing the data to be written with old data corresponding to the data to be written stored in the nonvolatile memory. Comparison means for specifying element data whose contents have been changed from the old data in the element data group;
Write control means for selectively writing an element data group whose contents have been changed from the old data specified by the comparison means among the element data groups constituting the write target data, to the nonvolatile memory;
An electronic device comprising: When a read request occurs, the latest data stored in the nonvolatile memory for each element data constituting the read target data designated by the read request is read, and the latest data of each read element data is used as the read target data. The electronic apparatus according to claim 1, further comprising: a read control unit that provides the read request source. The non-volatile memory is a memory that requires data erasing in a predetermined area unit corresponding to the plurality of element data,
The electronic device is
In order to secure an empty space, the element data group stored in the non-volatile memory is erased in units of the area, and when erasing, the latest data in the element data group stored in the area to be erased is deleted. 3. The electronic device according to claim 1, further comprising: an erasing control unit that writes and saves the element data group corresponding to 1 in another area in the nonvolatile memory that does not correspond to the area to be erased. machine. Each of the element data is pre-assigned a unique identification code,
The writing control means writes the identification code assigned to the element data in association with the element data to the nonvolatile memory when writing the element data to the nonvolatile memory,
When comparing the write target data with the old data stored in the nonvolatile memory, the comparing means is assigned to the element data and the element data for each element data constituting the write target data. The element data stored in the nonvolatile memory in association with the same identification code as the identification code is compared, and the element data whose contents are changed from the old data in the element data group constituting the write target data The electronic apparatus according to claim 1, wherein the electronic apparatus is specified. Each of the element data is data of each partition expressed by partitioning the write target data in a minimum data unit that can be written to the nonvolatile memory. 5. The electronic device according to any one of 4. The nonvolatile memory is a memory capable of writing data in units of bytes,
5. The electronic device according to claim 1, wherein each of the element data is data of each partition expressed by partitioning the write target data in the byte unit. .   The electronic device according to claim 1, wherein the nonvolatile memory is a flash ROM.