JP2012242772A - Display device, driving method for display device, and electronic apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a display device capable of being formed by a circuit using semiconductor material other than amorphous semiconductor or polycrystalline semiconductor, a driving method for the display device, and an electronic apparatus having the display device.SOLUTION: In the display device comprising a driving transistor that drives an electro-optical device that has a back gate whose potential is set to the same potential as a source potential for at least a light emission period, leakage current induced by a parasitic bipolar transistor formed in a vicinity of a drain region and a source region of the driving transistor is intended to be suppressed by making the back gate potential transit at the same time as or before a drain potential of the driving transistor transits.

Description

  The present disclosure relates to a display device, a driving method of the display device, and an electronic apparatus.

  As one of flat type display devices, a so-called current-driven electro-optical element whose light emission luminance changes in accordance with a current value flowing through the device is used as a light emitting portion (light emitting element) of a pixel. There is a display device. As a current-driven electro-optical element, for example, an organic EL element using a phenomenon in which light is emitted when an electric field is applied to an organic thin film using electroluminescence (EL) of an organic material is known.

  In an organic EL display device in which pixels including an organic EL element are arranged, conventionally, as a silicon material for forming a circuit for driving the organic EL element, an amorphous semiconductor (for example, amorphous silicon) or a polycrystalline semiconductor ( For example, polysilicon has been used (see, for example, Patent Document 1).

JP 2009-237426 A (see in particular paragraph 0037)

  In recent years, in the field of flat-type display devices typified by organic EL display devices, not only amorphous semiconductors and polycrystalline semiconductors but also a wider variety of semiconductor materials are used to meet various uses of display devices. A technique for forming a circuit is desired.

  Thus, the present disclosure provides a display device that enables formation of a circuit using a semiconductor material other than an amorphous semiconductor or a polycrystalline semiconductor, a driving method of the display device, and an electronic apparatus including the display device. For the purpose.

In order to achieve the above object, the present disclosure provides:
In a display device including a drive transistor for driving the electro-optical element, the driving transistor driving the electro-optical element, the back gate having a back gate potential set to the same potential as the source potential at least during the light emission period of the electro-optical element
The back gate potential is changed at the same time as or before the drain potential of the driving transistor changes. This display device can be used as a display unit in various electronic devices.

  In a transistor having a back gate, the back gate is usually fixed at a constant potential. In the case of a driving transistor, when the source potential rises to the light emitting voltage of the electro-optic element during light emission driving, the source potential with respect to the back gate potential rises. Then, the substrate effect that the transistor characteristics shift to enhancement occurs. This substrate effect deteriorates the characteristics of the driving transistor. Therefore, in the drive transistor, by setting the back gate potential to the same potential as the source potential at least during the light emission period of the electro-optic element, the source potential with respect to the back gate potential becomes 0 V, thereby eliminating the substrate effect. it can.

  On the other hand, since the pixels that are emitting light have different pixel-by-pixel luminance, it is necessary to separate the back gate for each pixel. In the case of adopting a structure in which the back gate is separated for each pixel in this way, if the pixels are miniaturized to cope with higher definition of the display image, the interval between the back gates of each pixel becomes narrower, which is unnecessary by the parasitic bipolar transistor. Devices are formed. A leak current is generated by the parasitic bipolar transistor.

  Therefore, the back gate potential is changed at the same time as or before the drain potential of the driving transistor changes. Thereby, the potential relationship of drain potential ≧ back gate potential is maintained. As a result, there is no period during which the parasitic bipolar transistor formed in the vicinity of the drain region and the source region of the driving transistor is in a conductive state, so that leakage current caused by the parasitic bipolar transistor can be suppressed.

  According to the present disclosure, it is possible to form a circuit using a transistor having a back gate. In a circuit using a transistor having a back gate, the leakage current caused by the parasitic bipolar transistor is suppressed by changing the potential of the back gate simultaneously with or before the transition of the drain potential of the driving transistor. Therefore, an increase in power consumption can be suppressed.

1 is a system configuration diagram illustrating an outline of a basic configuration of an active matrix organic EL display device as a premise of the present disclosure. It is a circuit diagram which shows an example of the concrete circuit structure of a pixel (pixel circuit). It is a timing waveform diagram with which it uses for description of the basic circuit operation | movement of the organic electroluminescence display used as the premise of this indication. FIG. 6 is an operation explanatory diagram (No. 1) of basic circuit operations of the organic EL display device as a premise of the present disclosure. FIG. 11 is an operation explanatory diagram (No. 2) of basic circuit operations of the organic EL display device as a premise of the present disclosure. FIG. 6 is a timing waveform diagram showing changes in the gate potential V _g and source potential V _s of the drive transistor during the bootstrap period. It is a figure which shows the relationship between the light emission current of an organic EL element, and the saturation current _Ids of a drive transistor. FIG. 6 is a characteristic diagram for explaining (A) a problem caused by variation in threshold voltage V _th of a drive transistor and (B) explaining a problem caused by variation in mobility μ of the drive transistor. It is a circuit diagram which shows the pixel circuit which applied the MOS process simply, (A) is the pixel circuit which applied the MOS process, (B) is the equivalent circuit of the transistor which used the TFT process, (C) is the MOS process The equivalent circuit of the transistor using is shown, respectively. It is explanatory drawing about a board | substrate effect. It is a circuit diagram which shows the circuit example of a well isolation | separation pixel circuit. FIG. 6 is a timing waveform diagram for explaining a well isolation pixel circuit. 4A and 4B are cross-sectional views showing a cross-sectional structure of a driving transistor, where FIG. 5A shows a cross-sectional structure in the case of a well isolation pixel circuit, and FIG. It is explanatory drawing about keeping an N well area | region in a reverse bias state with respect to a back gate area | region (P well area | region), and isolate | separating pixels. It is explanatory drawing about the parasitic bipolar transistor formed in the vicinity of a drain region and a source region. It is a wave form diagram which shows the electric potential relationship of the drain vicinity of the drive transistor currently light-emitting with arbitrary brightness | luminances. 2 is a circuit diagram illustrating a configuration example of a pixel circuit according to Embodiment 1. FIG. FIG. 6 is a timing waveform diagram for explaining the circuit operation of the pixel circuit according to the first embodiment. 10 is a circuit diagram illustrating a configuration example of a pixel circuit according to Embodiment 2. FIG. FIG. 10 is a timing waveform chart for explaining the circuit operation of the pixel circuit according to the second embodiment. 10 is a circuit diagram illustrating a configuration example of a pixel circuit according to Embodiment 3. FIG. FIG. 10 is a timing waveform chart for explaining the circuit operation of the pixel circuit according to the third embodiment. It is a perspective view which shows the external appearance of the television set to which this indication is applied. It is the perspective view which shows the external appearance of the digital camera to which this indication is applied, (A) is the perspective view seen from the front side, (B) is the perspective view seen from the back side. It is a perspective view showing appearance of a notebook personal computer to which the present disclosure is applied. It is a perspective view showing appearance of a video camera to which the present disclosure is applied. It is an external view showing a mobile phone to which the present disclosure is applied, (A) is a front view in an open state, (B) is a side view thereof, (C) is a front view in a closed state, (D) Is a left side view, (E) is a right side view, (F) is a top view, and (G) is a bottom view.

Hereinafter, modes for carrying out the technology of the present disclosure (hereinafter referred to as “embodiments”) will be described in detail with reference to the drawings. The description will be given in the following order.
1. 1. Display device as a premise of the present disclosure 1-1. System configuration 1-2. Basic circuit operation 1-3. MOS process 2. Description of Embodiment 2-1. Example 1
2-2. Example 2
2-3. Example 3
3. Application example 4. Electronic equipment Composition of this disclosure

<1. Display device as a premise of the present disclosure>
[1-1. System configuration]
FIG. 1 is a system configuration diagram illustrating an outline of a basic configuration of an active matrix display device as a premise of the present disclosure.

  The active matrix display device is a display device that controls the current flowing through the electro-optical element by an active element provided in the same pixel as the electro-optical element, for example, an insulated gate field effect transistor. As the insulated gate field effect transistor, a TFT (Thin Film Transistor) is typically used.

  Here, as an example, an active matrix organic EL display device that uses a current-driven electro-optical element, for example, an organic EL element, whose light emission luminance changes according to a current value flowing through the device, as a light-emitting element of a pixel (pixel circuit). This case will be described as an example.

  As shown in FIG. 1, an organic EL display device 10 as a premise of the present disclosure includes a plurality of pixels 20 including organic EL elements, a pixel array unit 30 in which the pixels 20 are two-dimensionally arranged in a matrix, And a driving circuit unit disposed around the pixel array unit 30. The drive circuit unit includes a write scanning circuit 40, a power supply scanning circuit 50, a signal output circuit 60, and the like, and drives each pixel 20 of the pixel array unit 30.

  Here, when the organic EL display device 10 supports color display, one pixel (unit pixel) which is a unit for forming a color image is composed of a plurality of sub-pixels (sub-pixels), and each of the sub-pixels is This corresponds to the pixel 20 in FIG. More specifically, in a display device that supports color display, one pixel includes, for example, a sub-pixel that emits red (Red) light, a sub-pixel that emits green (G) light, and blue (Blue). B) It is composed of three sub-pixels of sub-pixels that emit light.

  However, one pixel is not limited to a combination of RGB three primary color subpixels, and one pixel may be configured by adding one or more color subpixels to the three primary color subpixels. Is possible. More specifically, for example, one pixel is formed by adding a sub-pixel that emits white (W) light to improve luminance, or at least emits complementary color light to expand the color reproduction range. It is also possible to configure one pixel by adding one subpixel.

The pixel array unit 30 includes scanning lines 31 _{1 to} 31 _m and power supply lines 32 _{1 to} 32 _m along the row direction (the arrangement direction of the pixels in the pixel row) with respect to the arrangement of the pixels 20 in m rows and n columns. Are wired for each pixel row. Furthermore, signal lines 33 _{1 to} 33 _n are wired for each pixel column along the column direction (pixel arrangement direction of the pixel column) with respect to the arrangement of the pixels 20 in the m rows and the n columns.

The scanning lines 31 _{1 to} 31 _m are connected to the output ends of the corresponding rows of the writing scanning circuit 40, respectively. The power supply lines 32 _{1 to} 32 _m are connected to the output ends of the corresponding rows of the power supply scanning circuit 50, respectively. The signal lines 33 _{1 to} 33 _n are connected to the output ends of the corresponding columns of the signal output circuit 60, respectively.

  The pixel array unit 30 is usually formed on a transparent insulating substrate such as a glass substrate. Thereby, the organic EL display device 10 has a flat panel structure. The drive circuit for each pixel 20 in the pixel array section 30 can be formed using an amorphous silicon TFT or a low-temperature polysilicon TFT. In the case of using low-temperature polysilicon TFTs, as shown in FIG. 1, a display panel (substrate) 70 that forms the pixel array section 30 also for the write scanning circuit 40, the power supply scanning circuit 50, and the signal output circuit 60. Can be implemented on top.

The write scanning circuit 40 is configured by a shift register circuit that sequentially shifts (transfers) the start pulse sp in synchronization with the clock pulse ck. The writing scanning circuit 40, upon a signal voltage writing of the video signal to each pixel 20 of the pixel array unit 30, the writing scanning signal WS to the scanning lines 31 (31 ₁ ~31 _m) a (WS ₁ to WS _m) By sequentially supplying the pixels 20, the pixels 20 of the pixel array unit 30 are sequentially scanned (line-sequential scanning) in units of rows.

The power supply scanning circuit 50 includes a shift register circuit that sequentially shifts the start pulse sp in synchronization with the clock pulse ck. The power supply scanning circuit 50 can be switched between the first power supply potential V _ccp and the second power supply potential V _ini that is lower than the first power supply potential V _ccp in synchronization with the line sequential scanning by the write scanning circuit 40. The power supply potential DS (DS _{1 to} DS _m ) is supplied to the power supply line 32 (32 _{1 to} 32 _m ). As will be described later, light emission / non-light emission (extinction) of the pixel 20 is controlled by switching the power supply potential DS to V _ccp / V _ini .

The signal output circuit 60 includes a signal voltage V _sig and a reference voltage V _{ofs of} a video signal corresponding to luminance information supplied from a signal supply source (not shown) (hereinafter may be simply referred to as “signal voltage”). And are selectively output. Here, the reference voltage V _ofs is a potential serving as a reference for the signal voltage V _sig of the video signal (for example, a potential corresponding to the black level of the video signal), and is used in threshold correction processing described later.

The signal voltage V _sig / reference voltage V _ofs output from the signal output circuit 60 is scanned by the write scanning circuit 40 with respect to each pixel 20 of the pixel array unit 30 via the signal line 33 (33 _{1 to} 33 _n ). Are written in units of pixel rows selected by. In other words, the signal output circuit 60 adopts a line sequential writing driving form in which the signal voltage V _sig is written in units of rows (lines).

(Pixel circuit)
FIG. 2 is a circuit diagram illustrating an example of a specific circuit configuration of the pixel (pixel circuit) 20. The light-emitting portion of the pixel 20 includes an organic EL element 21 that is a current-driven electro-optical element whose emission luminance changes according to the value of a current flowing through the device.

  As shown in FIG. 2, the pixel 20 includes an organic EL element 21 and a drive circuit that drives the organic EL element 21 by passing a current through the organic EL element 21. The organic EL element 21 has a cathode electrode connected to a common power supply line 34 that is wired in common to all the pixels 20 (so-called solid wiring).

  The drive circuit that drives the organic EL element 21 has a configuration including a drive transistor 22, a write transistor 23, a storage capacitor 24, and an auxiliary capacitor 25. N-channel transistors can be used as the driving transistor 22 and the writing transistor 23. However, the combination of the conductivity types of the drive transistor 22 and the write transistor 23 shown here is merely an example, and is not limited to these combinations.

The drive transistor 22 has one electrode (source / drain electrode) connected to the anode electrode of the organic EL element 21 and the other electrode (source / drain electrode) connected to the power supply line 32 (32 _{1 to} 32 _m ). ing.

In the write transistor 23, one electrode (source / drain electrode) is connected to the signal line 33 (33 _{1 to} 33 _n ), and the other electrode (source / drain electrode) is connected to the gate electrode of the drive transistor 22. . The gate electrode of the writing transistor 23 is connected to the scanning line 31 (31 _{1 to} 31 _m ).

  In the driving transistor 22 and the writing transistor 23, one electrode is a metal wiring electrically connected to the source / drain region, and the other electrode is a metal wiring electrically connected to the drain / source region. Say. Further, depending on the potential relationship between one electrode and the other electrode, if one electrode becomes a source electrode, it becomes a drain electrode, and if the other electrode also becomes a drain electrode, it becomes a source electrode.

  The storage capacitor 24 has one electrode connected to the gate electrode of the drive transistor 22, and the other electrode connected to the other electrode of the drive transistor 22 and the anode electrode of the organic EL element 21.

  The auxiliary capacitor 25 has one electrode connected to the anode electrode of the organic EL element 21 and the other electrode connected to the common power supply line 34. The auxiliary capacitor 25 is provided as necessary in order to compensate for the insufficient capacity of the organic EL element 21 and to increase the video signal write gain to the storage capacitor 24. That is, the auxiliary capacitor 25 is not an essential component and can be omitted when the equivalent capacitance of the organic EL element 21 is sufficiently large.

  Here, the other electrode of the auxiliary capacitor 25 is connected to the common power supply line 34. However, the connection destination of the other electrode is not limited to the common power supply line 34, and may be a fixed potential node. That's fine. By connecting the other electrode of the auxiliary capacitor 25 to a node of a fixed potential, the intended purpose of compensating the shortage of the capacity of the organic EL element 21 and increasing the video signal write gain to the holding capacitor 24 can be achieved. it can.

In the pixel 20 configured as described above, the writing transistor 23 becomes conductive in response to a high active writing scanning signal WS applied to the gate electrode from the writing scanning circuit 40 through the scanning line 31. Thereby, the write transistor 23 samples the signal voltage V _sig of the video signal or the reference voltage V _ofs supplied from the signal output circuit 60 through the signal line 33 and writes it in the pixel 20. The written signal voltage V _sig or reference voltage V _ofs is applied to the gate electrode of the driving transistor 22 and held in the holding capacitor 24.

When the power supply potential DS of the power supply line 32 (32 _{1 to} 32 _m ) is at the first power supply potential V _ccp , the driving transistor 22 has one electrode as a drain electrode and the other electrode as a source electrode in a saturation region. Operate. As a result, the drive transistor 22 is supplied with current from the power supply line 32 and drives the organic EL element 21 to emit light by current drive. More specifically, the drive transistor 22 operates in the saturation region, thereby supplying the organic EL element 21 with a drive current having a current value corresponding to the voltage value of the signal voltage V _sig held in the storage capacitor 24. The organic EL element 21 is caused to emit light by current driving.

Further, when the power supply potential DS is switched from the first power supply potential V _ccp to the second power supply potential V _ini , the drive transistor 22 operates as a switching transistor with one electrode serving as a source electrode and the other electrode serving as a drain electrode. Thereby, the drive transistor 22 stops the supply of the drive current to the organic EL element 21 and puts the organic EL element 21 into a non-light emitting (quenching) state. That is, the drive transistor 22 also has a function as a transistor that controls light emission / non-light emission of the organic EL element 21.

  By the switching operation of the drive transistor 22, a period during which the organic EL element 21 is in a non-light emitting state (non-light emitting period) is provided, and the ratio (duty) of the light emitting period and the non-light emitting period of the organic EL element 21 can be controlled. . By this duty control, afterimage blurring caused by light emission of pixels over one display frame period can be reduced, so that the quality of moving images can be particularly improved.

Of the first and second power supply potentials V _ccp and V _ini selectively supplied from the power supply scanning circuit 50 through the power supply line 32, the first power supply potential V _ccp is a drive current for driving the organic EL element 21 to emit light. The power supply potential is supplied to the driving transistor 22. The second power supply potential V _ini is a power supply potential for applying a reverse bias to the organic EL element 21. The second power supply potential V _ini is a potential lower than the reference voltage V _ofs , for example, a potential lower than V _ofs −V _th when the threshold voltage of the driving transistor 22 is V _th , preferably V _ofs −V _th. Is set to a sufficiently lower potential.

[1-2. Basic circuit operation]
Next, the basic circuit operation of the organic EL display device 10 having the above-described configuration will be described with reference to the operation explanatory diagrams of FIGS. 4 and 5 based on the timing waveform diagram of FIG. In the operation explanatory diagrams of FIGS. 4 and 5, the write transistor 23 is illustrated by a switch symbol for simplification of the drawing.

In the timing waveform diagram of FIG. 3, the potential of the scanning line 31 (write scanning signal) WS, the potential of the power supply line 32 (power supply potential) DS, the potential of the signal line 33 (V _sig / V _ofs ), Changes in the gate potential V _g and the source potential V _s are shown.

(Light emission period of the previous display frame)
In the timing waveform diagram of FIG. 3, the time before time t ₁₁ is the light emission period of the organic EL element 21 in the previous display frame. During the light emission period of the previous display frame, the potential DS of the power supply line 32 is at the first power supply potential (hereinafter referred to as “high potential”) V _ccp , and the writing transistor 23 is in a non-conductive state.

At this time, the drive transistor 22 is designed to operate in a saturation region. As a result, as shown in FIG. 4A, the drive current (drain-source current) I _ds corresponding to the gate-source voltage V _gs of the drive transistor 22 is organic from the power supply line 32 through the drive transistor 22. It is supplied to the EL element 21. Accordingly, the organic EL element 21 emits light with a luminance corresponding to the current value of the drive current I _ds .

(Threshold correction preparation period)
At time t _11, it enters a new display frame of line sequential scanning (current display frame). Then, as shown in FIG. 4B, the second power source in which the potential DS of the power supply line 32 is sufficiently lower than V _ofs −V _{th with} respect to the reference voltage V _ofs of the signal line 33 from the high potential V _ccp. The potential (hereinafter referred to as “low potential”) V _ini is switched.

Here, the threshold voltage of the organic EL element 21 is V _thel , and the potential (cathode potential) of the common power supply line 34 is V _cath . At this time, if the low potential V _ini is V _ini <V _thel + V _cath , the source potential V _s of the drive transistor 22 becomes substantially equal to the low potential V _ini , so that the organic EL element 21 is in a reverse bias state and is quenched. To do.

Next, when the potential WS of the scanning line 31 transitions from the low potential side to the high potential side at time t ₁₂ , the writing transistor 23 becomes conductive as illustrated in FIG. 4C. At this time, since the reference voltage V _ofs is supplied from the signal output circuit 60 to the signal line 33, the gate potential V _g of the drive transistor 22 becomes the reference voltage V _ofs . The source potential V _s of the drive transistor 22 is at a potential sufficiently lower than the reference voltage V _ofs , that is, the low potential V _ini .

At this time, the gate-source voltage V _gs of the driving transistor 22 becomes V _ofs −V _ini . Here, if V _ofs −V _ini is not larger than the threshold voltage V _th of the drive transistor 22, threshold correction processing described later cannot be performed, so that a potential relationship of V _ofs −V _ini > V _th is set. There is a need.

As described above, the process of fixing the gate potential V _g of the driving transistor 22 to the reference voltage V _ofs and fixing (determining) the source potential V _s to the low potential V _ini is a threshold value described later. This is a preparation (threshold correction preparation) process before the correction process (threshold correction operation) is performed. Therefore, the reference voltage V _ofs and the low potential V _ini become the initialization potentials of the gate potential V _g and the source potential V _s of the driving transistor 22.

(Threshold correction period)
Next, at time t ₁₃ , as shown in FIG. 4D, when the potential DS of the power supply line 32 is switched from the low potential V _ini to the high potential V _ccp , the gate potential V _g of the drive transistor 22 is changed to the reference voltage. The threshold correction process is started in a state where V _ofs is maintained. That is, the source potential V _s of the drive transistor 22 starts to increase toward the potential obtained by subtracting the threshold voltage V _th of the drive transistor 22 from the gate potential V _g .

For convenience, the initialization potential V _ofs of the gate potential V _g of the driving transistor 22 as a reference, the source potential V _s towards the potential obtained by subtracting the threshold voltage V _th of the drive transistor 22 from the initialization potential V _ofs The changing process is called a threshold correction process. As the threshold correction process proceeds, the gate-source voltage V _gs of the drive transistor 22 eventually converges to the threshold voltage V _th of the drive transistor 22. A voltage corresponding to the threshold voltage V _th is held in the holding capacitor 24.

In the period for performing the threshold correction process (threshold correction period), the organic EL element 21 is cut off in order to prevent current from flowing exclusively to the storage capacitor 24 side and not to the organic EL element 21 side. As described above, the potential V _cath of the common power supply line 34 is set.

Next, at time t ₁₄ , the potential WS of the scanning line 31 transitions to the low potential side, so that the writing transistor 23 is turned off as illustrated in FIG. At this time, the gate electrode of the driving transistor 22 is electrically disconnected from the signal line 33 to be in a floating state. However, since the gate-source voltage V _gs is equal to the threshold voltage V _th of the drive transistor 22, the drive transistor 22 is in a cutoff state. Accordingly, the drain-source current I _ds does not flow through the driving transistor 22.

(Signal writing & mobility correction period)
Next, at time t ₁₅ , as shown in FIG. 5B, the potential of the signal line 33 is switched from the reference voltage V _ofs to the signal voltage V _sig of the video signal. Subsequently, at time t ₁₆ , the potential WS of the scanning line 31 transitions to the high potential side, so that the writing transistor 23 becomes conductive as shown in FIG. 5C, and the signal voltage V _{sig of the} video signal. Are sampled and written into the pixel 20.

By writing the signal voltage V _sig by the writing transistor 23, the gate potential V _g of the driving transistor 22 becomes the signal voltage V _sig . When the drive transistor 22 is driven by the signal voltage V _sig of the video signal, the threshold voltage V _th of the drive transistor 22 is canceled with the voltage corresponding to the threshold voltage V _th held in the holding capacitor 24. Details of the principle of threshold cancellation will be described later.

At this time, the organic EL element 21 is in a cutoff state (high impedance state). Therefore, the current (drain-source current I _ds ) flowing from the power supply line 32 to the drive transistor 22 in accordance with the signal voltage V _sig of the video signal flows into the equivalent capacitor and the auxiliary capacitor 25 of the organic EL element 21. Thereby, charging of the equivalent capacity of the organic EL element 21 and the auxiliary capacity 25 is started.

As the equivalent capacitance and the auxiliary capacitance 25 of the organic EL element 21 are charged, the source potential V _s of the drive transistor 22 increases with time. At this time, the pixel-to-pixel variation in the threshold voltage V _th of the drive transistor 22 has already been canceled, and the drain-source current I _ds of the drive transistor 22 depends on the mobility μ of the drive transistor 22. Note that the mobility μ of the drive transistor 22 is the mobility of the semiconductor thin film constituting the channel of the drive transistor 22.

Here, it is assumed that the ratio of the holding voltage V _gs of the holding capacitor 24 to the signal voltage V _sig of the video signal, that is, the write gain G is 1 (ideal value). Then, the source potential V _s of the drive transistor 22 rises to the potential of V _ofs −V _th + ΔV, so that the gate-source voltage V _gs of the drive transistor 22 becomes V _sig −V _ofs + V _th −ΔV.

That is, the increase ΔV of the source potential Vs of the driving transistor 22 is subtracted from the voltage (V _sig −V _ofs + V _th ) held in the holding capacitor 24, in other words, the charge stored in the holding capacitor 24 is discharged. Acts like In other words, the increase ΔV of the source potential Vs is negatively fed back to the storage capacitor 24. Therefore, the increase ΔV of the source potential V _s becomes a feedback amount of negative feedback.

Thus, the drain flowing through the driving transistor 22 - gate with the feedback amount ΔV corresponding to the source current I _ds - by applying the negative feedback to the source voltage V _gs, the drain of the driving transistor 22 - the source current I _ds The dependence on mobility μ can be negated. This canceling process is a mobility correction process for correcting the variation of the mobility μ of the driving transistor 22 for each pixel.

More specifically, since the drain-source current I _ds increases as the signal amplitude V _in (= V _sig −V _ofs ) of the video signal written to the gate electrode of the drive transistor 22 increases, the feedback amount of negative feedback The absolute value of ΔV also increases. Therefore, mobility correction processing according to the light emission luminance level is performed.

Furthermore, when a constant signal amplitude V _in of the video signal, since the greater the absolute value of the feedback amount ΔV of the mobility μ is large enough negative feedback of the drive transistor 22, to remove the variation of the mobility μ for each pixel Can do. Therefore, it can be said that the feedback amount ΔV of the negative feedback is a correction amount of the mobility correction process. Details of the principle of mobility correction will be described later.

(Light emission period)
Next, at time t ₁₇ , the potential WS of the scanning line 31 transitions to the low potential side, so that the writing transistor 23 is turned off as illustrated in FIG. As a result, the gate electrode of the driving transistor 22 is electrically disconnected from the signal line 33 and is in a floating state.

Here, when the gate electrode of the drive transistor 22 is in a floating state, the storage capacitor 24 is connected between the gate and the source of the drive transistor 22, thereby interlocking with the fluctuation of the source potential V _s of the drive transistor 22. Thus, the gate potential V _g also varies. That is, the source potential V _s and the gate potential V _g of the drive transistor 22 rise while holding the gate-source voltage V _gs held in the holding capacitor 24. Then, the source potential V _s of the driving transistor 22 rises to the light emission voltage V _oled of the organic EL element 21 corresponding to the saturation current I _{ds of the} transistor.

Thus, the operation in which the gate potential V _g of the drive transistor 22 varies in conjunction with the variation in the source potential V _s is a bootstrap operation. In other words, in the bootstrap operation, the gate potential V _g and the source potential V _s change while holding the gate-source voltage V _gs held in the holding capacitor 24, that is, the voltage across the holding capacitor 24. Is the action. FIG. 6 shows how the gate potential V _g and the source potential V _s of the drive transistor 22 change during the bootstrap period in which this bootstrap operation is performed.

The gate electrode of the drive transistor 22 is in a floating state, and at the same time, the drain-source current I _{ds of the} drive transistor 22 starts to flow through the organic EL element 21, so that the anode of the organic EL element 21 corresponds to the current I _ds. The potential increases. When the anode potential of the organic EL element 21 exceeds V _thel + V _cath , the drive current starts to flow through the organic EL element 21, so that the organic EL element 21 starts to emit light.

The light emission current of the organic EL element 21 is defined by the saturation current I _ds of the drive transistor 22 by the gate-source voltage V _{gs at} this time. For this reason, the drive transistor 22 becomes a constant current source at each signal voltage V _sig . FIG. 7 shows the relationship between the light emission current of the organic EL element 21 and the saturation current I _ds of the drive transistor 22.

The increase in the anode potential of the organic EL element 21 is none other than the increase in the source potential V _s of the drive transistor 22. When the source potential V _s of the driving transistor 22 rises, the gate potential V _g of the driving transistor 22 also rises in conjunction with the bootstrap operation of the storage capacitor 24.

At this time, when it is assumed that the bootstrap gain is 1 (ideal value), the increase amount of the gate potential V _g becomes equal to the increase amount of the source potential V _s . Therefore, during the light emission period, the gate-source voltage V _gs of the drive transistor 22 is kept constant at V _sig −V _ofs + V _th −ΔV. At time t ₁₈ , the potential of the signal line 33 is switched from the signal voltage V _{sig of the} video signal to the reference voltage V _ofs .

In the series of circuit operations described above, processing operations for threshold correction preparation, threshold correction, signal voltage V _sig writing (signal writing), and mobility correction are executed in one horizontal scanning period (1H). Further, the processing operations of the signal writing and mobility correction are concurrently executed in the period from time t ₁₆ -t _17.

[Division threshold correction]
Here, the case where the driving method in which the threshold value correction process is executed only once is described as an example, but this driving method is only an example and is not limited to this driving method. For example, in addition to the 1H period in which the threshold correction process is performed together with the mobility correction and the signal writing process, the threshold correction process is performed a plurality of times while being divided over a plurality of horizontal scanning periods preceding the 1H period. It is also possible to adopt a driving method for performing threshold correction.

  According to this division threshold correction driving method, even if the time allocated as one horizontal scanning period is shortened due to the increase in the number of pixels associated with high definition, sufficient time is provided for a plurality of horizontal scanning periods as the threshold correction period. Can be secured. Therefore, even if the time allocated as one horizontal scanning period is shortened, a sufficient time can be secured as the threshold correction period, so that the threshold correction process can be reliably executed.

[Principle of threshold cancellation]
Here, the principle of threshold cancellation (that is, threshold correction) of the drive transistor 22 will be described. The drive transistor 22 operates as a constant current source because it is designed to operate in the saturation region. As a result, the organic EL element 21 is supplied with a constant drain-source current (drive current) I _ds given by the following equation (1) from the drive transistor 22.
I _ds = (1/2) · μ (W / L) C _ox (V _gs −V _th ) ² (1)
Here, W is the channel width of the driving transistor 22, L is the channel length, and C _ox is the gate capacitance per unit area.

FIG. 8A shows the characteristics of the drain-source current I _ds versus the gate-source voltage V _gs of the driving transistor 22. As shown in the characteristic diagram of FIG. 8A, if the cancel process (correction process) for the variation of the threshold voltage V _th of the driving transistor 22 for each pixel is not performed, the gate is obtained when the threshold voltage V _th is V _th1. - a drain corresponding to the source voltage V _gs - source current I _ds becomes I _ds1.

On the other hand, when the threshold voltage V _th is _{V th2 (V th2> V th1} ), the same gate - drain corresponding to the source voltage V _gs - source current I _{ds I ds2 (I ds2 <I ds1} ) become. That is, when the threshold voltage V _th of the drive transistor 22 varies, the drain-source current I _ds varies even if the gate-source voltage V _gs is constant.

On the other hand, in the pixel (pixel circuit) 20 having the above configuration, as described above, the gate-source voltage V _gs of the driving transistor 22 at the time of light emission is V _sig −V _ofs + V _th −ΔV. Therefore, when this is substituted into the equation (1), the drain-source current I _ds is expressed by the following equation (2).
I _ds = (1/2) · μ (W / L) C _ox (V _sig −V _ofs −ΔV) ² (2)

That is, the term of the threshold voltage V _th of the drive transistor 22 is canceled, and the drain-source current I _ds supplied from the drive transistor 22 to the organic EL element 21 does not depend on the threshold voltage V _th of the drive transistor 22. . As a result, even if the threshold voltage V _th of the drive transistor 22 varies from pixel to pixel due to variations in the manufacturing process of the drive transistor 22 and changes over time, the drain-source current I _ds does not vary. 21 emission luminance can be kept constant.

[Principle of mobility correction]
Next, the principle of mobility correction of the drive transistor 22 will be described. FIG. 8B shows a characteristic curve in a state where a pixel A having a relatively high mobility μ of the drive transistor 22 and a pixel B having a relatively low mobility μ of the drive transistor 22 are compared. When the driving transistor 22 is composed of a polysilicon thin film transistor or the like, it is inevitable that the mobility μ varies between pixels like the pixel A and the pixel B.

In a state where the mobility μ varies between the pixel A and the pixel B, for example, the signal amplitude V _in (= V _sig −V _ofs ) of the same level is written to both the pixels A and B to the gate electrode of the drive transistor 22. Consider the case. In this case, if no not corrected mobility mu, drain flows to the pixel A having the high mobility mu - source current I _ds1 'and the drain flowing through the pixel B having the low mobility mu - source current I _ds2' and There will be a big difference between the two. As described above, when a large difference occurs between the pixels in the drain-source current I _ds due to the variation of the mobility μ from pixel to pixel, the uniformity of the screen is impaired.

Here, as is clear from the transistor characteristic equation of the equation (1) described above, the drain-source current I _ds increases when the mobility μ is large. Therefore, the feedback amount ΔV in the negative feedback increases as the mobility μ increases. As shown in FIG. 8B, the feedback amount ΔV ₁ of the pixel A having a high mobility μ is larger than the feedback amount ΔV ₂ of the pixel B having a low mobility μ.

Therefore, by applying negative feedback to the gate-source voltage Vgs with a feedback amount ΔV corresponding to the drain-source current I _ds of the driving transistor 22 by mobility correction processing, negative feedback is increased as the mobility μ increases. It will be. As a result, variation in mobility μ for each pixel can be suppressed.

Specifically, when applying a correction of the feedback amount [Delta] V ₁ at the pixel A having the high mobility mu, drain - source current I _ds larger drops from I _ds1 'to I _ds1. On the other hand, since the feedback amount [Delta] V ₂ small pixels B mobility μ is small, the drain - source current I _ds becomes lowered from I _ds2 'to I _ds2, not lowered so much. Consequently, the drain of the pixel A - drain-source current I _ds1 and the pixel B - to become nearly equal to the source current I _ds2, variations among the pixels of the mobility μ is corrected.

In summary, when there are a pixel A and a pixel B having different mobility μ, the feedback amount ΔV1 of the pixel A having a high mobility μ is larger than the feedback amount ΔV2 of the pixel B having a low mobility μ. That is, the larger the mobility μ, the larger the feedback amount ΔV, and the larger the amount of decrease in the drain-source current I _ds .

Therefore, the drain of the driving transistor 22 - with the feedback amount ΔV corresponding to the source current I _ds, the gate - by applying the negative feedback to the source voltage V _gs, the drain of pixels having different mobilities mu - source current I _ds The current value is made uniform. As a result, variation in mobility μ for each pixel can be corrected. That is, the feedback amount (correction amount) ΔV corresponding to the current flowing through the drive transistor 22 (drain-source current I _ds ) with respect to the gate-source voltage V _gs of the drive transistor 22, that is, the storage capacitor 24. On the other hand, the process of applying negative feedback is the mobility correction process.

[1-3. MOS process]
By the way, the organic EL display device 10 as the premise of the present disclosure described above uses a TFT process to form a circuit for driving the organic EL element 21. Here, the TFT process uses an insulator (for example, a glass substrate) as a substrate, and includes a gate electrode, a semiconductor layer including source / drain / channel regions, and a wiring layer including source / drain electrodes. It is a manufacturing technology that is produced only by thin film formation. An amorphous semiconductor such as amorphous silicon (a-Si) or a polycrystalline semiconductor such as low-temperature polysilicon (p-Si) is used as the active semiconductor layer.

  On the other hand, in recent years, in the field of flat-type display devices typified by organic EL display devices, not only amorphous semiconductors and polycrystalline semiconductors but also more various types to cope with various uses of display devices. A technique for forming a circuit using a semiconductor material is desired. As a semiconductor material other than an amorphous semiconductor or a polycrystalline semiconductor, for example, single crystal silicon widely used in the field of solid-state imaging devices can be given. Single crystal silicon is superior in crystallinity compared to amorphous silicon and low-temperature polysilicon. Therefore, when a display device is realized using single crystal silicon, higher definition can be achieved.

  A manufacturing technique for forming a circuit using single crystal silicon is called a MOS (Metal Oxide Semiconductor) process (or a CMOS (Complementary Metal Oxide Semiconductor) process). This MOS process is based on the steps of using single crystal silicon as a substrate, forming a diffusion region to be a source / drain region on the substrate, forming a gate insulating film by thermal oxidation, and forming an electrode or wiring. And

  Here, if the circuit for driving the organic EL element 21, that is, the pixel circuit 20 of FIG. 2 having, for example, a threshold correction function and a mobility correction function is realized using a MOS process instead of a TFT process, some problems arise. . This is because a transistor manufactured by the TFT process has three terminals (source / gate / drain), whereas a transistor manufactured by the MOS process has four terminals (source / gate / drain / back gate). This is because the characteristics are greatly affected by the back gate (substrate) potential. Incidentally, the back gate is also called a base.

  FIG. 9 shows a pixel circuit to which the MOS process is simply applied. 9A shows a pixel circuit using a MOS process, FIG. 9B shows an equivalent circuit of a transistor using a TFT process, and FIG. 9C shows an equivalent circuit of a transistor using a MOS process. .

  In FIG. 9A, parts equivalent to those in FIG. A transistor manufactured by the TFT process has three terminals (source / gate / drain) as shown in FIG. 9B, and a transistor manufactured by the MOS process has a terminal shown in FIG. 9C. 4 terminals (source / gate / drain / back gate).

In FIG. 9A, a driving transistor 22 that drives the organic EL element 21 and a writing transistor (sampling transistor) 23 that samples and writes the signal voltage V _sig become transistors using a MOS process, that is, MOS transistors. . In a transistor using the MOS process, the back gate (base) is usually fixed at a constant potential (0V for NMOS, power supply potential for PMOS).

(Substrate effect)
Focusing on the drive transistor 22, the source potential V _s rises to the light emission voltage V _oled of the organic EL element 21 from the bootstrap operation to the light emission operation. Then, when the back gate is fixed at 0 V, the source potential V _{s with} respect to the back gate potential V _b (hereinafter referred to as “source potential V _{sb with} respect to the back gate potential”) increases. In the MOS transistor, when the source potential V _sb with respect to the back gate potential rises, as shown in FIG. 10A, a substrate effect that the transistor characteristic shifts to enhancement (the threshold voltage V _{th of the} transistor is on the + side) occurs.

Then, the characteristics of the driving transistor 22 deteriorate due to the substrate effect, and in FIG. 10B, the current becomes lower than a desired current (saturation current obtained with the original signal voltage V _sig1 ). As described above, the current flowing through the organic EL element 21 is defined by the drive transistor 22. The current that can be passed through the drive transistor 22 is determined by the gate-source voltage V _gs during signal writing, that is, V _sig -V _s1 . Here, V _s1 is the source potential of the drive transistor 22 at the start of the bootstrap operation (see FIG. 6).

As a result, in order to obtain a desired current value, it is necessary to write a signal voltage V _sig2 larger than the original signal voltage V _sig1 in consideration of the substrate effect (see FIG. 10B). An increase in the signal voltage V _sig leads to an increase in power consumption. In addition, it is necessary to increase the size of the write transistor 23 in order to ensure a withstand voltage accompanying an increase in the signal voltage V _sig , and as a result, it is difficult to reduce the size of the pixel and consequently the display device. This is also a concern. Furthermore, this substrate effect is also a problem for image sticking. Here, “burn-in” refers to local luminance deterioration of the organic EL element that appears as fixed luminance unevenness on the screen.

  The burn-in due to the substrate effect will be specifically described by assuming that a pixel having no deterioration in characteristics of the organic EL element 21 is a normal pixel and a pixel having deterioration is a deteriorated pixel.

The light emission voltage V _oled of the organic EL element 21 required to achieve any brightness, when the respective normal pixels / degradation pixel V _OLED1 / V _OLED2, a _V oled1 «V oled2. Then, inevitably, the source potential V _s of the drive transistor 22 in the deteriorated pixel is further increased as compared with the normal pixel. As a result, the source potential V _sb with respect to the back gate potential becomes V _sb1 (normal pixel) << V _sb2 (deteriorated pixel), and the deteriorated pixel receives a larger substrate effect, and the current of the driving transistor 22 is reduced, thereby accelerating the burn-in. Will be allowed to.

(Well separation pixel circuit)
In contrast, in the drive transistor 22 having a back gate, the substrate effect can be eliminated by setting the back gate potential V _b and the source potential V _s to the same potential (V _b = V _s ) at least during the light emission period. it can. A circuit in which the back gate potential V _b and the source potential V _s of the drive transistor 22 are thus set to the same potential is referred to as a well isolation pixel circuit. In this well isolation pixel circuit, in order to make the back gate potential V _b and the source potential V _s of the drive transistor 22 the same, for example, as shown in FIG. 11, the back gate (terminal) and the source of the drive transistor 22 (Electrode / terminal) may be electrically connected.

By setting the back gate potential V _b and the source potential V _{s of the} driving transistor 22 to the same potential, V _sb (source potential V _{s with} respect to the back gate potential V _b ) = 0V can be realized as shown in FIG. Therefore, the substrate effect can be eliminated. In FIG. 12, the back gate potential V _b of the drive transistor 22 is represented by a broken line. For easy understanding, the back gate potential V _b is slightly shifted from the source potential V _s .

  As a matter of course, one pixel and one pixel luminance are different in the light emitting pixels. Therefore, in the well separation pixel circuit, it is necessary to separate the back gate for each pixel. FIG. 13A shows a cross-sectional structure of the driving transistor 22 in the well isolation pixel circuit that isolates the back gate for each pixel. FIG. 13B shows a cross-sectional structure of the driving transistor 22 in a pixel circuit in which the back gate is not separated for each pixel.

The drive transistor 22 is composed of, for example, an N-channel MOS transistor. Both the source / drain regions 221/222 are described as N ⁺ diffusion regions, and the back gate region 223 is described as a P-channel well region (hereinafter referred to as “P well region”). ). In the well isolation pixel circuit, an N-channel well region (hereinafter referred to as “N well region”) is separated from the substrate 225 in order to isolate the back gate region 223, that is, the P well region for each pixel. 224 is interposed.

A constant voltage V _nwh is applied to the isolation layer 224, that is, the N well region 224 in order to isolate the back gate potential (V _b = V _s = V _oled ) of each pixel during light emission. Then, to keep the relationship of the potential of _{V b} «V nwh, it holds the N-well region 224 in the reverse bias state against the back gate region (P well region) 223. This prevents leakage current from flowing between adjacent pixels and separates the pixels from each other.

Here, the separation of pixels from each other by holding the N well region 224 in a reverse bias state with respect to the back gate region (P well region) 223 will be described more specifically with reference to FIG. First, in FIG. 13A, the pixel 1 is in a light emitting state and the pixel 2 is in a non-light emitting state. In this state, when the constant voltage V _nwh is not applied to the N well region 224, there is no barrier between the pixel 1 and the pixel 2 as shown in FIG. Current flows. On the other hand, when a constant voltage V _nwh is applied to the N well region 224, a potential barrier due to the application of the constant voltage V _nwh exists between the pixel 1 and the pixel 2 as shown in FIG. Therefore, no leak current flows from the pixel 1 to the pixel 2.

  In this way, in order to isolate the back gate region (ie, P well region) 223, the structure in which the N well region 224 is interposed as an isolation layer and the back gate region 223 is separated for each pixel is referred to as a triple well structure. .

By the way, in the triple well structure, when the pixels are miniaturized in order to increase the definition of the display device, the interval between the back gates (P wells) between the pixels is narrowed, and an unnecessary device using a parasitic bipolar transistor is formed. The This parasitic bipolar transistor is mainly formed in the vicinity of the drain region and the source region of the drive transistor 22. Specifically, as shown in FIG. 15, an NPN parasitic bipolar transistor 80 is formed in the N ⁺ diffusion region which is the drain region 222 / the P well region which is the back gate region 223 / the N well region which is the separation layer 224. The

  In this NPN parasitic bipolar transistor 80, the emitter terminal 81 corresponds to the drain electrode of the drive transistor 22, the base terminal 82 corresponds to the back gate region 223 of the drive transistor 22, and the collector terminal 83 is an N well region that is a separation layer. 224. The leak current generated by the parasitic bipolar transistor 80 becomes a problem in the well isolation pixel circuit.

FIG. 16 shows a potential relationship in the vicinity of the drain of the driving transistor 22 that is emitting light at an arbitrary luminance. As is clear from the figure, the drain (N ⁺ ) potential = V _ccp (> V _oled ), the back gate (P ⁻ ) potential = V _oled [V], and the separation layer (N ⁻ ) potential = V _nwh (≧ V _i ). During the light emission, the parasitic bipolar transistor 80 has a potential relationship of a cutoff region, that is, N (emitter)> P (base) <N (collector), so that no leakage current flows.

Next, the potential relationship near the drain during the quenching operation will be described. When entering the extinction operation, the drain potential V _d of the drive transistor 22 transitions in a pulse shape, so that the fall is fast. On the other hand, the back gate potential V _b decreases in a form that follows the drain potential V _d . In other words, the drain potential V _d and the back gate potential V _b cause a delay in falling.

Then, the potential relationship of each terminal (electrode) of the drive transistor 22 is as _follows : drain (N ⁺ ) potential V _d = 0 V, back gate (P ⁻ ) potential V _b = source potential V _s = V _x (> 0), separation The layer (N ⁻ ) potential = V _nwh and a period in which the drain potential V _d is lower than the back gate potential V _b occurs. During this period, the potential relationship of the ON region of the parasitic bipolar transistor 80, that is, N (emitter) <P (base) <N (collector) is established.

Accordingly, a forward current flows between the collector and emitter of the parasitic bipolar transistor 80. That is, a forward current flows from the separation layer (N ⁻ ) toward the drain electrode. The forward current of the parasitic bipolar transistor 80 generated at the time of extinction is a considerably large current (overcurrent) because the bipolar transistor 80 has an amplifying function. As a result, a problem of reliability such as an increase in power consumption and a deterioration in device performance due to a large current flow occurs.

<2. Description of Embodiment>
In the embodiment of the present disclosure, in the pixel circuit using the MOS process, the leakage current caused by the parasitic bipolar transistor formed near the drain / source of the driving transistor 22 is suppressed. The purpose is to suppress.

In order to achieve this object, in the embodiment of the present disclosure, the back gate potential V _b is forcibly shifted at the same time as or before the drain potential V _d of the driving transistor 22 during the extinction operation. . More specifically, the back gate potential V _b is shifted to the same polarity side as the drain potential V _d . Thereby, the potential relationship of drain potential V _d ≧ back gate potential V _b is always maintained.

Here, the transition of the back gate potential V _b and the drain potential V _d means a fall when the drive transistor 22 is an N-channel MOS transistor, and a rise when the drive transistor 22 is a P-channel MOS transistor.

As described above, during the extinction operation, by maintaining the potential relationship of the drain potential V _d ≧ back gate potential V _b, the parasitic bipolar transistor formed in the vicinity of the drain region and the source region of the drive transistor 22 is in a conductive state. Period can be eliminated. As a result, the leakage current flowing from the isolation layer (collector) 224 to the drain (emitter) caused by the parasitic bipolar transistor, in particular, the overcurrent leakage that occurs during the quenching operation can be suppressed (reduced), thereby suppressing an increase in power consumption. Can do. In addition, since device performance deterioration due to a large current can be suppressed, the reliability of the display device can be improved.

A specific example of the pixel circuit 20 for forcibly transitioning the back gate potential V _b at the same time or before the transition of the drain potential V _d of the driving transistor 22 will be described below.

[2-1. Example 1]
FIG. 17 is a circuit diagram illustrating a configuration example of the pixel circuit 20 _A according to the first embodiment. In the drawing, the same components as those in FIG. 9 are denoted by the same reference numerals.

Similar to the pixel circuit 20 in FIG. 9A, the pixel circuit 20 _{A according} to the first embodiment includes a driving transistor 22, a writing transistor 23, a storage capacitor 24, and an auxiliary capacitor 25. The drive transistor 22 and the write transistor 23 are transistors using a MOS process, that is, MOS transistors.

That is, in the pixel circuit 20 _{A according to the} first embodiment, the driving transistor 22 and the writing transistor 23 have four terminals (source / gate / drain / back gate). In the drive transistor 22, for example, the back gate terminal and the source (electrode / terminal) are electrically connected, so that the back gate potential V _b is set to the same potential as the source potential V _s . Here, the back gate and the source are electrically connected to each other, but the back gate potential V _b may be set to the same potential as the source potential V _s at least during the light emission period. On the other hand, the back gate of the write transistor 23 is normally fixed at the ground level (0 V) in the same manner as the back gate of the transistor using the MOS process is fixed at a constant potential.

In the pixel circuit 20 _{A according to the} first embodiment, N-channel transistors are used as the drive transistor 22 and the write transistor 23. However, the combination of the conductivity types of these transistors 22 and 23 is merely an example. It is not limited to combinations. That is, a P-channel transistor can be used as at least one of the driving transistor 22 and the writing transistor 23.

In the pixel circuit 20 _A , the auxiliary capacitor 25 functions to determine a write gain when the signal voltage V _sig of the video signal is written and to hold the source potential V _s of the drive transistor 22. Therefore, as the auxiliary capacitor 25, a capacitor having a larger capacitance value than the equivalent capacitance _Coled of the organic EL element 21 is used. In other words, the auxiliary capacitor 25 is useful for writing the signal voltage V _sig and holding the source potential V _s of the drive transistor 22.

In the case of the pixel circuit 20 of FIG. 2 and the corresponding pixel circuit 20 of FIG. 9A, the auxiliary capacitor 25 has one end connected to the source (electrode / terminal) of the drive transistor 22 and the cathode electrode of the organic EL element 21. The other end was connected to the same common power supply line 34. In contrast, in the pixel circuit 20 _{A according to} the first embodiment, one end is connected to the source of the driving transistor 22 and the other end is connected to the power supply terminal 26.

A control potential S ₁ is supplied to the power supply terminal 26 from an external power supply unit (not shown). The control potential S ₁ instantaneously changes in pulses from the first potential V ₁ to the second potential V ₂ at the timing when the organic EL element 21 shifts from the light emission operation to the quenching operation. Here, the second potential V ₂ of the control potential S ₁ is the drain potential V _d of the driving transistor 22 during the extinction operation, that is, a potential equal to or lower than the second power supply potential V _ini (= 0V) of the power supply potential DS, for example, 0V. Is set to On the other hand, the first electric potential V ₁ of the control potential S ₁ is set to a sufficiently high potential than the second potential V _2.

An external power supply unit that supplies the control potential S ₁ to the power supply terminal 26 serves as a control unit that causes the back gate potential V _b to transition at the same time as or before the drain potential V _d of the driving transistor 22 transitions. Has function. Here, the drain potential V _d of the drive transistor 22 is the power supply potential DS. More specifically, the drain potential V _d is the first power source potential V _ccp of the power source potential DS when the organic EL element 21 emits light, and the second power source potential of the power source potential DS when the organic EL element 21 is extinguished. V _ini .

Next, the circuit operation when the organic EL element 21 shifts from the light emission operation to the extinction operation in the pixel circuit 20 _A according to the first embodiment having the above configuration will be described with reference to the timing waveform diagram of FIG.

At the timing at which the organic EL element 21 is shifted to the extinction operation from the light emitting operation (corresponding to the time t ₁₁ in FIG. 2), that the power supply potential DS is switched from the first power supply potential V _ccp to the second power supply potential V _ini, the driving transistor 22 drain potential V _d falls (transitions). In this case, the external power supply unit is a control unit, drain potential in synchronization with the transition of V _d, for example, the drain potential V _d is the the same time control potential S ₁ the first electric potential V ₁ as a transition 2 Fall to the potential V ₂ in pulses.

Here, an auxiliary capacitor 25 is interposed between the power supply terminal 26 to which the control potential S ₁ is applied and the source electrode of the drive transistor 22. Therefore, when the control potential S ₁ falls in a pulse shape, a negative potential jumps into the source electrode of the drive transistor 22 due to capacitive coupling by the auxiliary capacitor 25. Due to the jump of the negative potential due to the capacitive coupling, the source potential V _s of the driving transistor 22, that is, the back gate potential V _b is sufficiently lowered to become the drain potential V _d or less.

During the quenching operation of the organic EL element 21, the parasitic bipolar transistor formed in the vicinity of the drain region and the source region of the drive transistor 22 is maintained by maintaining the potential relationship of the drain potential V _d ≧ back gate potential V _b. The period during which the conductive state is established can be eliminated. As a result, the leakage current caused by the parasitic bipolar transistor, particularly the overcurrent leakage that occurs during the quenching operation, can be suppressed, so that an increase in power consumption can be suppressed. In addition, since device performance deterioration due to a large current can be suppressed, the reliability of the display device can be improved.

Further, according to the circuit configuration according to the first embodiment, the capacitive coupling to reduce the source potential V _s of the driving transistor 22. For using existing auxiliary capacitor 25, the number of elements of the pixel circuits 20 _A There is no need to increase Therefore, without increasing the number of elements in the pixel circuits 20 _A, intended purpose, i.e., to achieve the purpose of suppressing the leakage current caused by the parasitic bipolar transistor.

[2-2. Example 2]
FIG. 19 is a circuit diagram illustrating a configuration example of the pixel circuit 20 _B according to the second embodiment. In the drawing, the same components as those in FIG. 9 are denoted by the same reference numerals.

The pixel circuit 20 _{A according} to the first embodiment employs a configuration in which the other end of the auxiliary capacitor 25 is connected to the power supply terminal 26 and the control potential S ₁ is supplied to the power supply terminal 26 from an external power supply unit. In contrast, in the pixel circuit 20 _{B according to the} second embodiment, the other end of the auxiliary capacitor 25 is connected to the power supply line 32 of its own stage, and the power supply potential DS of the power supply line 32 is set to the other end of the auxiliary capacitor 25. In this case, the terminal potential V _sub is supplied as the terminal potential V _sub .

The power supply line 32 is selectively supplied with the first power supply potential V _ccp and the second power supply potential V _ini from the power supply scanning circuit 50 of FIG. Therefore, the power supply scanning circuit 50 supplies the power supply potential DS to the power supply line 32, the drain potential V _d of the driving transistor 22 to transition simultaneously or controller it to transition back gate potential V _b before As a function.

Next, the circuit operation when the organic EL element 21 shifts from the light emitting operation to the quenching operation in the pixel circuit 20 _B according to the second embodiment having the above-described configuration will be described with reference to the timing waveform diagram of FIG.

At the timing when the organic EL element 21 shifts from the light emission operation to the extinction operation (corresponding to the time t ₁₁ in FIG. 2), the power supply scanning circuit 50 in FIG. 1 changes the power supply potential DS from the first power supply potential V _ccp to the second power supply. Switch to potential V _ini . As a result, the drain potential V _d of the drive transistor 22 falls (transitions). Further, by switching the power supply potential DS, terminal potential V _sub of the other end of the auxiliary capacitor 25 also falls in pulse form from the first power supply potential V _ccp to the second power supply potential V _ini.

When the terminal potential V _sub of the auxiliary capacitor 25 falls in a pulse shape, a negative potential jumps into the source electrode of the drive transistor 22 due to capacitive coupling by the auxiliary capacitor 25. Due to the jump of the negative potential due to the capacitive coupling, the source potential V _s of the driving transistor 22, that is, the back gate potential V _b is sufficiently lowered to become the drain potential V _d or less.

During the quenching operation of the organic EL element 21, the parasitic bipolar transistor formed in the vicinity of the drain region and the source region of the drive transistor 22 is maintained by maintaining the potential relationship of the drain potential V _d ≧ back gate potential V _b. The period during which the conductive state is established can be eliminated. As a result, the leakage current caused by the parasitic bipolar transistor, particularly the overcurrent leakage that occurs during the quenching operation, can be suppressed, so that an increase in power consumption can be suppressed. In addition, since device performance deterioration due to a large current can be suppressed, the reliability of the display device can be improved.

Further, according to the circuit configuration of the second embodiment, it is not necessary to prepare a power supply unit for supplying the control potential S ₁ outside as in the first embodiment. There is an advantage that the entire configuration can be simplified.

[2-3. Example 3]
FIG. 21 is a circuit diagram illustrating a configuration example of the pixel circuit 20 _C according to the third embodiment. In the drawing, the same components as those in FIG. 9 are denoted by the same reference numerals.

In the pixel circuit 20 _{A according to the first} embodiment and the pixel circuit 20 _{B according to the} second embodiment, the capacitance cup by the existing auxiliary capacitor 25 is used to lower the source potential V _s of the driving transistor 22, that is, the back gate potential V _b. The structure which uses a ring was taken. In contrast, in the pixel circuit 20 _{C according to the} third embodiment, a quenching switch element such as the transistor 27 is provided between the source electrode of the driving transistor 22 and a node having a predetermined potential, such as a node at the ground level (0 V). A configuration is adopted in which the extinction transistor 27 is selectively turned on.

The extinction transistor 27 is controlled to be conductive / non-conductive by a control voltage (control pulse) ES supplied from an external timing controller (not shown). The extinguishing transistor 27 and the external timing control unit function as a control unit that causes the back gate potential V _b to transition at the same time as or before the drain potential V _d of the driving transistor 22 transitions.

Next, the circuit operation when the organic EL element 21 shifts from the light emitting operation to the quenching operation in the pixel circuit 20 _C according to the third embodiment having the above configuration will be described with reference to the timing waveform diagram of FIG.

During the extinction operation of the organic EL element 21, for example, before the timing at which the power supply potential DS switches from the first power supply potential V _ccp to the second power supply potential V _ini (corresponding to time t ₁₁ in FIG. 2). In response to the control voltage ES supplied from the timing control unit, the quenching transistor 27 is turned on.

As soon as the extinction transistor 27 becomes conductive, the source potential V _s of the drive transistor 22 is discharged through the extinction transistor 27 and falls to the ground level (0 V). Then, after the source potential V _s of the driving transistor 22 is reduced to 0 V, the power source potential DS is switched from the first power source potential V _ccp to the second power source potential V _ini , so that the source potential V _s (= back gate potential V _b). ) become ≒ drain potential V _d.

During the quenching operation of the organic EL element 21, the parasitic bipolar transistor formed in the vicinity of the drain region and the source region of the drive transistor 22 is maintained by maintaining the potential relationship of drain potential V _d ≈ back gate potential V _b. The period during which the conductive state is established can be eliminated. As a result, the leakage current caused by the parasitic bipolar transistor, particularly the overcurrent leakage that occurs during the quenching operation, can be suppressed, so that an increase in power consumption can be suppressed. In addition, since device performance deterioration due to a large current can be suppressed, the reliability of the display device can be improved.

In the case of the circuit configuration of the third embodiment, although the number of elements increases by adding the extinction transistor 27, the capacitive coupling by the auxiliary capacitor 25 is not used to lower the back gate potential _Vb . There is an advantage that can be applied to a pixel circuit having a circuit configuration that does not use the auxiliary capacitor 25.

<3. Application example>
In the above-described embodiment, the case where the pixel transistor is applied to a pixel circuit having two transistors of the driving transistor 22 and the writing transistor 23 has been described as an example. However, the present disclosure is limited to application to the pixel circuit. is not. Specifically, the reference voltage V _ofs is selectively applied to the pixel circuit having a transistor connected in series to the drive transistor 22 and controlling light emission / non-light emission of the organic EL element 21 or the gate of the drive transistor 22. The present invention is applicable to all pixel circuits using a MOS process, such as a pixel circuit having a transistor to be applied.

  In the above-described embodiment, the description has been made on the assumption that the pixel circuit has both the threshold correction function and the mobility correction function. However, the technology of the present disclosure only includes a pixel circuit that does not have both functions, and the threshold correction function. The present invention can be similarly applied to a pixel circuit having the above and a pixel circuit having only a mobility correction function.

  Furthermore, in the above embodiment, the case where the present invention is applied to an organic EL display device using an organic EL element as the electro-optical element of the pixel 20 has been described as an example, but the present disclosure is not limited to this application example. . Specifically, the present disclosure relates to a display device using a current-driven electro-optical element (light-emitting element) such as an inorganic EL element, an LED element, or a semiconductor laser element, whose emission luminance changes according to a current value flowing through the device. Applicable to all.

<4. Electronic equipment>
The display device according to the present disclosure described above is displayed on a display unit (display device) of an electronic device in any field that displays a video signal input to the electronic device or a video signal generated in the electronic device as an image or a video. Applicable. As an example, the present invention can be applied to various electronic devices shown in FIGS. 23 to 27, for example, digital cameras, notebook personal computers, mobile terminal devices such as mobile phones, and display units such as video cameras.

  As is clear from the description of the above-described embodiment, according to the display device according to the present disclosure, a circuit can be formed using a semiconductor material other than an amorphous semiconductor or a polycrystalline semiconductor, for example, single crystal silicon. Can be realized. Furthermore, a configuration in combination with a solid-state imaging device using a MOS process is also possible. Therefore, by using the display device according to the present disclosure as a display unit of electronic devices in all fields, it is possible to contribute to high definition of a display image and realization of a new application.

  The display device according to the present disclosure also includes a module-shaped device having a sealed configuration. As an example, a display module formed by attaching a facing portion such as transparent glass to the pixel array portion is applicable. Note that the display module may be provided with a circuit unit for inputting / outputting a signal and the like from the outside to the pixel array unit, an FPC (flexible printed circuit), and the like.

  Specific examples of electronic devices to which the present disclosure is applied will be described below.

  FIG. 23 is a perspective view illustrating an appearance of a television set to which the present disclosure is applied. The television set according to this application example includes a video display screen unit 101 including a front panel 102, a filter glass 103, and the like, and is manufactured by using the display device according to the present disclosure as the video display screen unit 101.

  24A and 24B are perspective views illustrating an external appearance of a digital camera to which the present disclosure is applied, in which FIG. 24A is a perspective view seen from the front side, and FIG. 24B is a perspective view seen from the back side. The digital camera according to this application example includes a light emitting unit 111 for flash, a display unit 112, a menu switch 113, a shutter button 114, and the like, and is manufactured by using the display device according to the present disclosure as the display unit 112.

  FIG. 25 is a perspective view illustrating an appearance of a notebook personal computer to which the present disclosure is applied. The notebook personal computer according to this application example includes a main body 121 including a keyboard 122 operated when inputting characters and the like, a display unit 123 that displays an image, and the like, and the display device according to the present disclosure is used as the display unit 123. It is produced by this.

  FIG. 26 is a perspective view illustrating an appearance of a video camera to which the present disclosure is applied. The video camera according to this application example includes a main body 131, a lens 132 for shooting an object on a side facing forward, a start / stop switch 133 at the time of shooting, a display unit 134, and the like. It is manufactured by using a display device.

  27A and 27B are external views showing a mobile terminal device to which the present disclosure is applied, for example, a mobile phone. FIG. 27A is a front view in an opened state, FIG. 27B is a side view thereof, and FIG. (D) is a left side view, (E) is a right side view, (F) is a top view, and (G) is a bottom view. A cellular phone according to this application example includes an upper casing 141, a lower casing 142, a connecting portion (here, a hinge portion) 143, a display 144, a sub-display 145, a picture light 146, a camera 147, and the like. Then, by using the display device according to the present disclosure as the display 144 or the sub display 145, the mobile phone according to the application example is manufactured.

<5. Configuration of the present disclosure>
In addition, this indication can take the following structures.
(1) a driving transistor for driving an electro-optic element, which has a back gate, and the potential of the back gate is set to the same potential as the source potential at least during the light emission period;
And a control unit that changes the potential of the back gate at the same time as or before the transition of the drain potential of the driving transistor.
(2) The display device according to (1), wherein the driving transistor is a MOS transistor.
(3) The display device according to (2), wherein the driving transistor is an N-channel MOS transistor.
(4) The display device according to any one of (1) to (3), wherein the control unit shifts the potential of the back gate to the same polarity side as the drain potential.
(5) The display unit according to (4), wherein the control unit causes the potential of the back gate of the driving transistor to transition to a drain potential or lower.
(6) The pixel circuit including the drive transistor has a storage capacitor connected between a gate and a source of the drive transistor,
The display device according to any one of (1) to (5), wherein a bootstrap operation is performed in which a gate potential and a source potential change while holding a voltage across the holding capacitor.
(7) The pixel circuit has an auxiliary capacitor having one end connected to the source of the driving transistor,
In the driving transistor, a back gate and a source are electrically connected,
The display device according to (6), wherein the control unit controls a potential of the other end of the auxiliary capacitor and causes a potential of a back gate to transition by capacitive coupling by the auxiliary capacitor.
(8) The display device according to (7), wherein the control unit causes a potential supplied from an external power supply unit to the other end of the auxiliary capacitor to transition in a pulse shape.
(9) A first power supply potential for driving the electro-optic element to emit light and a second power supply potential for applying a reverse bias to the electro-optic element are selectively used as a drain potential for the drive transistor. A power supply unit for supplying,
The display device according to (7), wherein the control unit is the power supply unit, and selectively supplies the first power supply potential and the second power supply potential to the other end of the auxiliary capacitor.
(10)
The control unit includes a switch element connected between a source of the driving transistor and a node of a predetermined potential, and changes the potential of the back gate by turning on the switch element. Display device.
(11) In driving a display device including a drive transistor for driving an electro-optic element, which includes a back gate, and the potential of the back gate is set to the same potential as the source potential at least during the light emission period.
A method for driving a display device, wherein a back gate potential is shifted simultaneously with or before a transition of a drain potential of the driving transistor.
(12) a driving transistor that drives the electro-optic element, having a back gate, and the potential of the back gate is set to the same potential as the source potential at least during the light emission period;
An electronic apparatus comprising: a display device comprising: a control unit that transitions the potential of the back gate simultaneously with or before the transition of the drain potential of the driving transistor.

10: organic EL display _{device, 20,20 A, 20 B, 20} C ... pixel (pixel circuit), 21 ... Organic EL device, 22 ... driving transistor, 23 ... write transistor, 24 ... storage capacitor, 25 ... auxiliary capacitor, 26 ... power supply terminal, 27 ... quenching transistor, 30 ... pixel array _{section, 31 (31 1 ~31 m)} ... scanning _{line, 32 (32 1 ~32 m)} ... power supply line, 33 (33 ₁ ~33 _n) ... Signal line 34 ... Common power supply line 40 ... Write scanning circuit 50 ... Power supply scanning circuit 60 ... Signal output circuit 70 ... Display panel

Claims (12)

A drive transistor for driving the electro-optic element, having a back gate, wherein the potential of the back gate is set to the same potential as the source potential during at least the light emission period of the electro-optic element;
And a control unit that changes the potential of the back gate at the same time as or before the transition of the drain potential of the driving transistor. The display device according to claim 1, wherein the driving transistor is a MOS transistor. The display device according to claim 2, wherein the drive transistor is an N-channel MOS transistor. The display device according to claim 1, wherein the control unit shifts the potential of the back gate to the same polarity side as the drain potential. The display device according to claim 4, wherein the control unit causes the potential of the back gate of the driving transistor to transition to a drain potential or lower. The pixel circuit including the driving transistor has a storage capacitor connected between a gate and a source of the driving transistor,
The display device according to claim 1, wherein a bootstrap operation is performed in which a gate potential and a source potential change while holding a voltage across the holding capacitor. The pixel circuit has an auxiliary capacitor having one end connected to the source of the driving transistor,
In the driving transistor, a back gate and a source are electrically connected,
The display device according to claim 6, wherein the control unit controls a potential of the other end of the auxiliary capacitor, and changes a potential of a back gate by capacitive coupling by the auxiliary capacitor. The display device according to claim 7, wherein the control unit transitions a potential supplied from an external power supply unit to the other end of the auxiliary capacitor in a pulse shape. A power supply that selectively supplies a first power supply potential for driving the electro-optic element to emit light and a second power supply potential for applying a reverse bias to the electro-optic element as a drain potential to the drive transistor. Having a supply section,
The display device according to claim 7, wherein the control unit is the power supply unit, and selectively supplies the first power supply potential and the second power supply potential to the other end of the auxiliary capacitor. The display according to claim 6, wherein the control unit includes a switch element connected between a source of the driving transistor and a node having a predetermined potential, and changes the potential of the back gate by turning on the switch element. apparatus. In driving a display device having a back gate, the back gate having a potential set to the same potential as the source potential at least during the light emission period of the electro-optical element, the driving device driving the electro-optical element,
A method for driving a display device, wherein a back gate potential is shifted simultaneously with or before a transition of a drain potential of the driving transistor. A drive transistor for driving the electro-optic element, having a back gate, wherein the potential of the back gate is set to the same potential as the source potential during at least the light emission period of the electro-optic element;
An electronic apparatus comprising: a display device comprising: a control unit that transitions the potential of the back gate simultaneously with or before the transition of the drain potential of the driving transistor.

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