JP2012238031A - Electro-optical device, method of driving electro-optical device, and electronic apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce display unevenness due to variation in data voltage to display a high-quality image in an electro-optical device such as a liquid crystal display device.SOLUTION: On a substrate 10, an electro-optical device comprises: a plurality of pixel parts 2 arrayed along a first direction on the substrate and a second direction intersecting the first direction; a plurality of data lines X provided along the first direction; and a plurality of output circuits 41f for outputting data voltage through the plurality of data lines to the plurality of pixel parts. The data voltage is output from at least two different output circuits among a plurality of output circuits to a pixel column comprising the pixel parts arrayed along the first direction among the plurality of pixel parts.

Description

  The present invention relates to an electro-optical device such as a liquid crystal display device, a driving method of the electro-optical device, and an electronic field such as a liquid crystal projector.

  As this type of electro-optical device, for example, a flexible mounted with an electro-optical panel that performs an electro-optical operation such as a display operation in a pixel region, and a driving integrated circuit that bears at least a part of a driving circuit for driving the electro-optical panel. There is an electro-optical device composed of a substrate. In the electro-optical device configured as described above, a part of the control circuit is separated from the electro-optical panel, thereby making it possible to reduce the size of the electro-optical panel, expand the pixel area with respect to the size of the electro-optical panel, or the like.

  For example, Patent Document 1 discloses a technique in which an integrated circuit for driving an electro-optical panel is provided on a flexible substrate by a mounting technique such as COF (Chip On Film), and data voltages are sequentially output to the electro-optical panel. .

Japanese Patent Laid-Open No. 2005-43417

  However, when the electro-optical panel is driven by the data voltage output from the driving integrated circuit as in the above-described technique, the output amplifier is set to the data voltage output from the plurality of output amplifiers included in the driving integrated circuit. Variations occur every time. Such a variation in data voltage may cause uneven brightness in a displayed image, for example. In other words, the above-described technique has a technical problem that the image quality may be deteriorated due to the variation in the data voltage.

  The present invention has been made in view of the above-described problems, for example, an electro-optical device that can reduce display unevenness due to variations in data voltage and display a high-quality image, and a driving method of the electro-optical device. An object is to provide an electronic device.

  In order to solve the above problems, an electro-optical device of the present invention includes a substrate, a plurality of pixel portions arranged on the substrate along a first direction and a second direction that intersects the first direction, and the substrate. A plurality of data lines provided along the first direction, and a plurality of output circuits that output data voltages to the plurality of pixel portions via the plurality of data lines. The data voltage is output from at least two different output circuits of the plurality of output circuits to a pixel column including pixel units arranged along the first direction.

  According to the electro-optical device of the present invention, during the operation, first, a data voltage is output from the output circuit via the plurality of data lines. The “data voltage” means a voltage having data for displaying an image. That is, the data voltage here can also be called an image signal. The output circuit is an amplifier circuit such as an operational amplifier, for example, and outputs the data voltage while amplifying it. The output circuit is typically formed as a part of an integrated circuit, and is disposed on a flexible substrate that is electrically connected to the substrate on which the pixel portion is arranged. In addition, you may arrange | position on the board | substrate with which a pixel part is arranged.

  Data voltages output to the plurality of data lines are supplied to a plurality of pixel portions arranged on the substrate. For example, the data voltage is supplied to the plurality of pixel units in correspondence with the scanning signal supplied from the scanning line. Thereby, image display by a so-called active matrix method is performed. The pixel portion includes a transparent electrode made of a transparent conductive material such as ITO (Indium Tin Oxide), for example, and is arranged along a first direction along the data line and a second direction intersecting the first direction. ing. That is, the plurality of pixel portions are arranged in a matrix on the substrate.

  Here, in the present invention, in particular, a data voltage is output from at least two different output circuits of the plurality of output circuits to the pixel column including the pixel units arranged in the first direction among the plurality of pixel units. The More specifically, for example, two data lines and two output circuits are provided for one pixel column. The data voltages output from the two output circuits are supplied to different pixel portions in one pixel column via different data lines.

  The data voltages output from the plurality of output circuits may vary. Therefore, for example, even when the same data voltage is output, the data voltages output from different output circuits may be shifted from each other. Here, if a data voltage is supplied to only one pixel column with only one output circuit, the data voltage supplied to each pixel column varies. That is, a luminance difference is generated for each pixel column. Therefore, the display image has a line-like display unevenness extending in the data line direction.

  However, in the present invention, in particular, as described above, data voltages are output to the pixel columns from at least two different output circuits. Therefore, it is possible to suppress line-shaped display unevenness due to variations in data voltage generated for each output circuit. Note that, even when a data voltage is output from at least two different output circuits for a pixel column, there is a variation in data voltage for each output circuit. The generated luminance difference does not appear for each pixel column. In other words, since the pixel portions in which the luminance difference is generated are not arranged in a line, it is possible to reduce display unevenness until it is not visually perceived or hardly felt.

  As described above, according to the electro-optical device of the present invention, it is possible to reduce display unevenness due to variations in data voltage. Therefore, it is possible to display a high quality image.

  In one aspect of the electro-optical device of the present invention, the at least two output circuits simultaneously output the data voltage to the pixel portion included in the pixel column.

  According to this aspect, at least two output circuits that output the data voltage to one pixel column simultaneously output the data voltage to the pixel unit included in the pixel column. That is, data voltages are simultaneously output from different amplifiers to the pixel portions included in one pixel column.

  For example, in the case where a data voltage is supplied to only one pixel column with only one output circuit, the data voltage is supplied to each pixel portion included in the pixel column. In contrast, when data voltages are supplied from at least two output circuits to one pixel column, the data voltages can be supplied to at least two pixel portions simultaneously. Therefore, the writing period in the pixel portion can be shortened, and for example, an image of one frame can be displayed in a shorter period. Therefore, it is possible to display a higher quality image.

  In another aspect of the electro-optical device according to the aspect of the invention, the at least two output circuits output the data voltage to the pixel portions adjacent to each other among the pixel portions included in the pixel column.

  According to this aspect, the data voltage is output from the at least two output circuits that output the data voltage to one pixel column to the pixel units adjacent to each other among the pixel units included in the pixel column. For example, when a data voltage is supplied from two output circuits to one pixel column, a pixel unit that outputs a data voltage from one of the two output circuits and the other output circuit Are adjacent to each other to which the data voltage is output. In other words, pixel portions from which data signals are output from one output circuit are not adjacent to each other, and pixel portions from which the data voltage is output from the other output circuit are not adjacent to each other. That is, the data voltage is output from the output circuits that are alternately different along the first direction to the pixel portion included in the pixel column.

  As described above, when the data voltage is supplied, the pixel portions in which the luminance difference is generated due to the variation in the data voltage are alternately arranged in the pixel column. Therefore, display unevenness caused by a luminance difference can be made less noticeable. Therefore, it is possible to display a higher quality image.

  In another aspect of the electro-optical device of the present invention, each of the plurality of output circuits outputs the data voltage to the plurality of pixel columns.

  According to this aspect, one output circuit outputs a data voltage to a plurality of pixel columns. More specifically, a plurality of data lines correspond to one output circuit, and a data voltage output from one output circuit is, for example, a data line output in a switch circuit (or switching circuit). It is supplied to the pixel column while being switched.

  By supplying the data voltage as described above, the number of output circuits as the entire device can be reduced. In other words, it is possible to prevent the number of output circuits from increasing even when the number of pixel columns increases with higher definition. In particular, when data voltages are output from at least two different output circuits for one pixel column, such an effect is remarkably exhibited.

  In another aspect of the electro-optical device of the present invention, each of the at least two output circuits is included in a different integrated circuit.

  According to this aspect, at least two output circuits that output a data voltage to one pixel column are included in different integrated circuits. That is, in this aspect, driving is performed by a plurality of integrated circuits, and data voltages are output from different integrated circuits to one pixel column.

  The variation in the data voltage generated for each output circuit is typically larger in the output variation between different integrated circuits than in the same integrated circuit. Therefore, as described above, when driving by a plurality of integrated circuits, the luminance difference between the plurality of pixel portions tends to increase.

  However, in this embodiment, in particular, a data voltage is supplied from at least two output circuits to one pixel column. Therefore, display unevenness due to variations in data voltage can be reduced. Therefore, it is possible to display a high quality image.

  In order to solve the above problems, an electronic apparatus according to the present invention includes the above-described electro-optical device according to the present invention (including various aspects thereof).

  According to the electronic apparatus of the present invention, since the above-described electro-optical device according to the present invention is provided, display unevenness due to data voltage variation can be reduced. Therefore, a projection display device, television, mobile phone, electronic notebook, word processor, viewfinder type or monitor direct-view type video tape recorder, workstation, videophone, POS terminal, touch panel capable of high-quality display Various electronic devices such as can be realized. Further, as the electronic apparatus of the present invention, for example, an electrophoretic device such as electronic paper can be realized.

  In order to solve the above problems, a driving method for an electro-optical device according to an aspect of the invention includes a substrate and a plurality of pixel portions arranged on the substrate along a first direction and a second direction intersecting the first direction, An electro-optic comprising: a plurality of data lines provided on the substrate along the first direction; and a plurality of output circuits for outputting data voltages to the plurality of pixel portions via the plurality of data lines. A method of driving an apparatus, wherein the data from at least two different output circuits of the plurality of output circuits is transferred to a pixel column including pixel units arranged in the first direction among the plurality of pixel units. A step of outputting a voltage.

  According to the driving method of the electro-optical device of the present invention, the data voltage is output from at least two different output circuits among the plurality of output circuits with respect to one pixel column. Therefore, as in the case of the electro-optical device of the present invention described above, it is possible to reduce display unevenness due to data voltage variations. Therefore, it is possible to display a high quality image.

  Note that the driving method of the electro-optical device of the present invention can also employ various aspects similar to the various aspects of the electro-optical device of the present invention described above.

  The operation and other advantages of the present invention will become apparent from the best mode for carrying out the invention described below.

It is a top view which shows the structure of an electro-optical panel. It is the HH 'sectional view taken on the line of FIG. 1 is a perspective view illustrating an overall configuration of an electro-optical device according to a first embodiment. FIG. 3 is a circuit diagram illustrating a specific configuration of the electro-optical device according to the first embodiment. It is a circuit diagram which shows the structure of a pixel part. It is a block diagram which shows the structure of driver IC. 3 is a timing chart of time-division driving of the electro-optical device according to the first embodiment. It is a perspective view which shows the whole structure of the electro-optical apparatus which concerns on 2nd Embodiment. FIG. 6 is a circuit diagram illustrating a specific configuration of an electro-optical device according to a second embodiment. It is a top view which shows the structure of the projector which is an example of the electronic device to which the electro-optical apparatus is applied.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

<Electro-optical device>
The electro-optical device according to this embodiment will be described with reference to FIGS. In the following, a drive circuit built-in type TFT (Thin Film Transistor) active matrix drive type liquid crystal device, which is an example of the electro-optical device of the present invention, is taken as an example.

  First, the configuration of the electro-optical panel in the electro-optical device according to the present embodiment will be described with reference to FIGS. 1 and 2. FIG. 1 is a plan view showing the configuration of the electro-optical panel in the electro-optical device according to this embodiment, and FIG. 2 is a cross-sectional view taken along the line HH ′ of FIG.

  1 and 2, in the electro-optical panel according to the present embodiment, a TFT array substrate 10 and a counter substrate 20 are arranged to face each other. The TFT array substrate 10 is an example of the “substrate” in the present invention, and is, for example, a transparent substrate such as a quartz substrate or a glass substrate, a silicon substrate, or the like. The counter substrate 20 is a transparent substrate such as a quartz substrate or a glass substrate. A liquid crystal layer 50 is sealed between the TFT array substrate 10 and the counter substrate 20. The TFT array substrate 10 and the counter substrate 20 are bonded to each other by a sealing material 52 provided in a sealing region located around the image display region 10a provided with a plurality of pixel electrodes.

  The sealing material 52 is made of, for example, an ultraviolet curable resin, a thermosetting resin, or the like for bonding the two substrates, and is applied on the TFT array substrate 10 in the manufacturing process and then cured by ultraviolet irradiation, heating, or the like. It is. In the sealing material 52, a gap material such as glass fiber or glass bead is dispersed for setting the distance between the TFT array substrate 10 and the counter substrate 20 (that is, the inter-substrate gap) to a predetermined value.

  A light-shielding frame light-shielding film 53 that defines the frame area of the image display area 10a is provided on the counter substrate 20 side in parallel with the inside of the seal area where the sealing material 52 is disposed. However, part or all of the frame light shielding film 53 may be provided as a built-in light shielding film on the TFT array substrate 10 side.

  A time division circuit 42 and an external circuit connection terminal 102 are provided along one side of the TFT array substrate 10 in a region located outside the seal region where the seal material 52 is disposed in the peripheral region. The scanning line driving circuit 104 is provided along two sides adjacent to the one side so as to be covered with the frame light shielding film 53. Further, in order to connect the two scanning line driving circuits 104 provided on both sides of the image display region 10 a in this way, a plurality of the pixel lines are covered along the remaining side of the TFT array substrate 10 and covered with the frame light shielding film 53. Wiring 105 is provided.

  On the TFT array substrate 10, vertical conduction terminals 106 for connecting the two substrates with the vertical conduction material 107 are arranged in regions facing the four corner portions of the counter substrate 20. Thus, electrical conduction can be established between the TFT array substrate 10 and the counter substrate 20.

  In FIG. 2, on the TFT array substrate 10, an alignment film is formed on the pixel electrode 9a after the pixel switching TFT, the scanning line, the data line and the like are formed. The pixel electrode 9a is made of a transparent conductive film such as an ITO film, and the alignment film is made of an organic film such as a polyimide film. On the other hand, on the counter substrate 20, a lattice-shaped or striped light-shielding film 23 is formed, and then a counter electrode 21 is provided over the entire surface, and an alignment film is formed on the uppermost layer portion. Yes. The counter electrode 21 is made of a transparent conductive film such as an ITO film, and the alignment film is made of an organic film such as a polyimide film. A liquid crystal layer 50 is formed between the TFT array substrate 10 and the counter substrate 20 that are configured as described above and are arranged so that the pixel electrode 9a and the counter electrode 21 face each other. The liquid crystal layer 50 is made of, for example, a liquid crystal in which one or several types of nematic liquid crystals are mixed, and takes a predetermined alignment state between the pair of alignment films.

  1 and FIG. 2, on the TFT array substrate 10, in addition to the drive circuits such as the time division circuit 42 and the scanning line drive circuit 104, the image signal on the image signal line is sampled to obtain the data line. A sampling circuit that supplies a precharge signal at a predetermined voltage level to a plurality of data lines in advance of an image signal, and inspects the quality, defects, etc. of the electro-optical device during manufacture or at the time of shipment An inspection circuit or the like may be formed.

<First Embodiment>
Next, the configuration and operation of the electro-optical device according to the first embodiment will be described with reference to FIGS. FIG. 3 is a perspective view showing the overall configuration of the electro-optical device according to the first embodiment, and FIG. 4 is a circuit diagram showing the specific configuration of the electro-optical device according to the first embodiment. FIG. 5 is a circuit diagram showing the configuration of the pixel portion, and FIG. 6 is a block diagram showing the configuration of the driver IC. FIG. 7 is a timing chart of time-division driving of the electro-optical device according to the first embodiment.

  3, the electro-optical device according to the first embodiment includes the above-described electro-optical panel, the flexible substrate 200, and a driver IC 41 that is an example of the “integrated circuit” of the present invention.

  The flexible substrate 200 is electrically connected to the electro-optical panel via the external circuit connection terminal 102. In addition, the end portion on the side not connected to the electro-optical panel is electrically connected to a circuit board (not shown) or the like. That is, the image signal is supplied from the circuit board or the like to the electro-optical panel via the flexible board 200.

  The driver IC 41 is provided on the flexible substrate 200 and is constructed as an image signal supply device or circuit for the electro-optical panel. In addition, the driver IC 41 may be configured to execute correction processing such as gamma correction and serial-parallel conversion. In addition, it may be constructed as a circuit or device built in the electro-optical panel, and in such a case, it may be constructed including the time division circuit 42, the scanning line driving circuit 104, etc. described above. A more detailed configuration of the driver IC 41 will be described later.

  In FIG. 4, pixel portions 2 for m dots × n lines are arranged in a matrix (two-dimensional plane) in the image display region 10 a of the electro-optical panel. In the image display area 10a, n scanning lines Y1 to Yn each extending in the row direction (that is, the X direction) are provided. That is, one row of pixel portions 2 is arranged for one scanning line Y. The image display area 10a is provided with 2m data lines X1a, X1b, X2a, X2b,..., Xma, Xmb, each extending in the column direction (that is, the Y direction). That is, one column of pixel portions 2 (hereinafter referred to as “pixel columns” as appropriate) are arranged for two data lines X. That is, two data lines Xia and Xib are provided for two pixel portions in the i-th column (i = 1,..., M).

  In the following description, when a certain pixel portion 2 in the image display area 10a is specified, the subscripts 1 to m of the data line X and the subscripts 1 to n of the scanning line Y are used, and these intersections (1 to m , 1-n). For example, the upper left pixel portion 2 in the figure is (1, 1), and the lower right pixel portion 2 is (m, n).

  In FIG. 5, one pixel portion 2 includes a TFT 21 that is a switching element, a liquid crystal capacitor 22, and a storage capacitor 23.

  The source of the TFT 21 is connected to one data line X, and its gate is connected to one scanning line Y. For the pixel portions 2 arranged in the same row, the gates of the respective TFTs 21 are connected to the same scanning line Y. However, for the pixel portions 2 arranged in the same column, each TFT 21 has two sources. They are connected to different data lines X. The drain of the TFT 21 is commonly connected to a liquid crystal capacitor 22 and a storage capacitor 23 provided in parallel.

  The liquid crystal capacitor 22 includes a pixel electrode 22a, a counter electrode 22b, and a liquid crystal layer 50 sandwiched between these electrodes 22a and 22b. The storage capacitor 23 is formed between the pixel electrode 22a and a common capacitor electrode (not shown), and is supplied with the voltage Vcs. The storage capacitor 23 suppresses the influence of leakage of charges accumulated in the liquid crystal. On the other hand, a data voltage or the like is applied to the pixel electrode 22a side via the TFT 21, and the liquid crystal capacitor 22 and the storage capacitor 23 are charged / discharged according to the applied voltage level. Thereby, the transmittance of the liquid crystal layer is set according to the potential difference between the pixel electrode 22a and the counter electrode 22b (that is, the applied voltage of the liquid crystal), and the gradation of the pixel unit 2 is set.

  Returning to FIG. 4, the pixel unit 2 is driven by AC driving in which the voltage polarity is inverted every predetermined period in order to extend the life of the liquid crystal. The voltage polarity is defined based on the direction of the electric field acting on the liquid crystal layer 50, in other words, based on the forward and reverse of the voltage applied to the liquid crystal layer 50. In the present embodiment, common DC driving, which is one type of AC driving, that is, the voltage Vlcom applied to the counter electrode 22b and the voltage Vcs applied to the common capacitor electrode are kept constant, and the pixel electrode 22a side A drive system that reverses the polarity is adopted.

  The control circuit 5 is based on external signals such as a vertical synchronization signal Vs, a horizontal synchronization signal Hs, and a dot clock signal DCLK input from a host device (not shown), and the scanning line driving circuit 104, the data line driving circuit 101, and the frame memory 6 Are controlled synchronously. Under this synchronous control, the scanning line driving circuit 104 and the data line driving circuit 101 perform display control of the display unit 1 in cooperation with each other. In the present embodiment, in order to suppress the occurrence of flicker by high-speed display, double speed driving in which the refresh rate (that is, the vertical synchronization frequency) is set to 120 [Hz] corresponding to twice the normal speed is employed. In this case, one frame (that is, 1/60 [Sec]) defined by the vertical synchronization signal Vs is composed of two fields, and two line sequential scans are performed in one frame.

  The scanning line driving circuit 104 is mainly configured by a shift register, an output circuit, and the like, and outputs a scanning signal SEL to each of the scanning lines Y1 to Yn, so that each horizontal scanning period (hereinafter referred to as “1H”). The scanning lines Y1 to Yn are sequentially selected. As will be described in detail later, in this embodiment, two scanning lines Y are selected for 1H. The scanning signal SEL takes a binary level of a high potential level (hereinafter referred to as “H level”) or a low potential level (hereinafter referred to as “L level”), and scan corresponding to a pixel row to which data is to be written. The line Y is set to the H level, and the other scanning lines Y are set to the L level. By this scanning signal SEL, pixel rows to which data is to be written are sequentially selected, and data written in the pixel portion 2 is held over one field.

  The frame memory 6 has at least an m × n-bit memory space corresponding to the resolution of the image display area 10a, and stores and holds display data input from the host device in units of frames. Writing of data to the frame memory 6 and reading of data from the frame memory 6 are controlled by the control circuit 5. Here, the display data D defining the gradation of the pixel unit 2 is, for example, 64 gradation data composed of 6 bits D0 to D5. The display data D read from the frame memory 6 is serially transferred to the data line driving circuit 101 via a 6-bit bus.

  The data line driving circuit 101 is provided in the subsequent stage of the frame memory 6 and includes a driver IC 41 and a time division circuit 42. The data line driving circuit 101 cooperates with the scanning line driving circuit 104 to output data to be supplied for each pixel row to which data is to be written to the data lines X1a to Xmb.

  The driver IC 41 simultaneously performs data output for the pixel row to which data is written this time and dot-sequential latching (that is, retention) of data relating to the pixel row to which data is to be written next time. Hereinafter, the configuration and operation of the driver IC 41 will be described in detail.

  In FIG. 6, the driver IC 41 includes main circuits such as an X shift register 41a, a first latch circuit 41b, a second latch circuit 41c, a changeover switch group 41d, a D / A conversion circuit 41e, and an output circuit 41f. ing. The X shift register 41a transfers the start signal ST supplied first at 1H according to the clock signal CLX, and sets any one of the latch signals S1, S2, S3,. To do. The first latch circuit 41b sequentially latches m pieces of 6-bit data D supplied as serial data when the latch signals S1, S2, S3,. The second latch circuit 41c simultaneously latches the data D latched by the first latch circuit 41b when the latch pulse LP falls. The latched m pieces of data D are output in parallel from the second latch circuit 41c as data signals d1 to dm which are digital data in the next 1H.

  For example, the data signals d1 to dm are grouped as time-series data for four pixels by m / 4 (= i) changeover switch groups 41d provided in units of four data lines. . Here, the single changeover switch group 41d is illustrated as a set of five switches, but actually has five systems of 6-bit switch groups. Since six switches in the same system always operate in the same manner, the following description will be made assuming that the six switches are one switch.

  In addition to the data signals (for example, d1 to d4) for four pixels output from the second latch circuit 41c, the correction data damd is also input to each changeover switch group 41d. The correction data damd is digital data that defines the voltage level of the correction voltage Vamd (so-called precharge voltage). The five switches constituting the changeover switch group 41d are conductively controlled by any one of the four control signals CNT1 to CNT5, and are sequentially turned on alternately at the offset timing. Thereby, in 1H, the set of the correction data damd and the data signals d1 to d4 for four pixels is time-series in this order (in order of damd, d1, d2, d3, and d4). Output in time series.

  A D / A (Digital to Analog) conversion circuit 41e performs D / A conversion on a series of digital data output from each changeover switch group 41d to generate a voltage as analog data. Thereby, the correction data damd is converted into the correction voltage Vamd, and the data signals d1 to dm time-series in units of four pixels are converted into the data voltages V1 to Vm.

  The correction voltage Vamd and the data voltages V1 to Vm are amplified by i output circuits 41f1 to 41fi and are output in time series from the output pins PIN1 to PINi.

  As shown in FIG. 4, any of output lines DO1 to DOi is connected to the output pins PIN1 to PINi of the driver IC 41. One output line DO is associated with a group of data lines X corresponding to four adjacent pixel columns. Specifically, four data lines X1a, X2a, X3a, and X4a are associated with the output line DO1, and four data lines X1b, X2b, X3b, and X4b are associated with the output line DO2. The output line DO3 is associated with four data lines X5a, X6a, X7a and X8a, the output line DO4 is associated with four data lines X5b, X6b, X7b and X8b,. The output line DO (i-1) is associated with four data lines X (m-3) a, X (m-2) a, X (m-1) a, and Xma, and the output line DOi Are associated with four data lines X (m−3) b, X (m−2) b, X (m−1) b, and Xmb. In other words, the output circuit 41f1 (see FIG. 6) is associated with four data lines X1a, X2a, X3a and X4a, and the output circuit 41f2 is provided with four data lines X1b, X2b, X3b and X4b. The output circuit 41f3 is associated with four data lines X5a, X6a, X7a, and X8a, and the output circuit 41f4 is associated with four data lines X5b, X6b, X7b, and X8b, ..., the output circuit 41f (i-1) is associated with four data lines X (m-3) a, X (m-2) a, X (m-1) a and Xma. 41fi is associated with four data lines X (m-3) b, X (m-2) b, X (m-1) b, and Xmb.

  Between the output line DO and the grouped data lines X, a time division circuit 42 is provided for each output line.

  The time division circuit 42 has four selection switches corresponding to the number of grouped data lines X, and each selection switch is turned on by any one of the selection signals SS1 to SS4 from the control circuit 5. Be controlled. The selection signals SS1 to SS4 define the ON period of the selection switch in the same group and are synchronized with the time-series signal output from the driver IC 41. In the following description, the output lines DO1 and DO2 will be described.

  In FIG. 7, the leftmost time division circuit 42 connected to the output line DO1 first supplies the correction voltage Vamd output to the output line DO1 to the four data lines X1a to X4a. The correction voltage Vamd may be sequentially supplied as shown in the figure or may be supplied all at once. Subsequently, the time division circuit 42 time-divides the data voltages V1 to V4 for four pixels in time series, and distributes the individual data voltages V obtained thereby to any one of the data lines X1a to X4a. Specifically, in the first 1H in one field, the scanning signal SEL1 becomes H level, and the uppermost scanning line Y1 is selected. In this 1H, the correction voltage Vamd is first output to the output line DO1, and subsequently, the data voltages V1 to V4 for four pixels corresponding to the intersections of the data lines X1a to X4a and the scanning line Y1 (first 1H, V (1,1), V (2,1), V (3,1), and V (4,1)) are sequentially output.

  In addition to the voltage supply on the output line DO1, the voltage supply on the output line DO2 is also performed. The time division circuit 42 connected to the output line DO2 first supplies the correction voltage Vamd output to the output line DO2 to the four data lines X1b to X4b. Subsequently, the time division circuit 42 time-divides the data voltages V1 to V4 for four pixels in time series, and distributes the individual data voltages V obtained thereby to any of the data lines X1b to X4b. Specifically, in the first 1H in one field, the scanning signal SEL2 becomes H level, and the second scanning line Y2 from the top is selected. In 1H, first, the correction voltage Vamd is output to the output line DO2, and subsequently, the data voltages V1 to V4 for four pixels corresponding to the intersections of the data lines X1b to X4b and the scanning line Y2 (first 1H, V (1,2), V (2,2), V (3,2), V (4,2)) are sequentially output.

  As described above, in this embodiment, voltages output from different PINs of the driver IC 41 are simultaneously supplied to the pixel units 2 adjacent to each other in the column direction (that is, the Y direction). That is, the correction voltage Vamd and the data voltage are simultaneously supplied from different output circuits 41f. Hereinafter, the supply of each voltage described above will be described in detail in time series.

  In a state where the correction voltage Vamd is output to the output line DO1, the selection signals SS1 to SS4 sequentially become H level in the order of SS1, SS2, SS3, SS4, and the four switches constituting the time division circuit 42 are Turn on sequentially. Thus, the correction voltage Vamd output to the output lines DO1 and DO2 is sequentially supplied to the data lines X1a to X4a and X1b to X4b. That is, the correction voltage Vamd is supplied to X1a and X1b at the same time, and similarly supplied to X2a and X2b, X3a and X3b, X4a and X4b at the same time. The correction voltage Vamd is a voltage for reducing the influence of vertical crosstalk (that is, display unevenness in the column direction), and is set to a constant value 0 [V] in this embodiment.

  Next, in a state where the data voltage V (1, 1) is output to the output line DO1, only the selection signal SS1 becomes H level and corresponds to the data line X1a among the switches constituting the time division circuit 42. Only the switch to turn on. As a result, the data voltage V (1,1) output to the output line DO1 is supplied to the data line X1a, and data is written to the pixel portion (1,1) according to the data voltage V (1,1). Is done. While the data voltage V (1, 1) is output to the output line DO1, the switches corresponding to the data lines X2a, X3a, and X4a remain off, so the voltages on the data lines X2a, X3a, and X4a are corrected. The voltage Vamd is maintained.

  At the same time, the data voltage V (1,2) is output to the output line DO2, and only the switch corresponding to the data line X1b among the switches constituting the time division circuit 42 is turned on. As a result, the data voltage V (1,2) output to the output line DO2 is supplied to the data line X1b, and data is written to the pixel portion (1,2) according to the data voltage V (1,2). Is done. While the data voltage V (1,2) is being output to the output line DO2, the switches corresponding to the data lines X2b, X3b, X4b remain off, so the voltages on the data lines X2a, X3a, X4a are corrected. The voltage Vamd is maintained.

  Subsequently, in a state where the data voltage V (2, 1) is output to the output line DO1, only the selection signal SS2 becomes H level and corresponds to the data line X2a among the switches constituting the time division circuit 42. Only the switch to turn on. As a result, the data voltage V (2,1) output to the output line DO1 is supplied to the data line X2a, and data is written to the pixel portion (2,1) according to the data voltage V (2,1). Is done. While the data voltage V (2, 1) is being output to the output line DO1, the switches corresponding to the data lines X1a, X3a, and X4a remain off, so the data line X1a has the data voltage V (1, 1), The data lines X3a and X4a are maintained at the correction voltage Vamd, respectively.

  At the same time, the data voltage V (2, 2) is output to the output line DO2, and only the switch corresponding to the data line X2b among the switches constituting the time division circuit 42 is turned on. As a result, the data voltage V (2, 2) output to the output line DO2 is supplied to the data line X1b, and data is written to the pixel portion (2, 2) according to the data voltage V (2, 2). Is done. While the data voltage V (2, 2) is being output to the output line DO2, the switches corresponding to the data lines X1b, X3b, X4b remain off, so that the data line X1b has the data voltage V (1, 2), The data lines X3b and X4b are maintained at the correction voltage Vamd, respectively.

  Although not shown in the following, similarly, data writing to the pixel portion (3, 1) and the pixel portion (3, 2) is performed simultaneously. Then, data is simultaneously written to the pixel portion (4, 1) and the pixel portion (4, 2).

  In the next 1H, the scanning signals SEL3 and SEL4 become H level, and the third scanning line Y3 and the fourth scanning line Y4 from the top are selected. In this 1H, the correction voltage Vamd is first output to the output lines DO1 and DO2. Following this, the output line DO1 has data voltages V1 to V4 for four pixels corresponding to the intersections of the data lines X1a to X4a and the scanning line Y3 (V (1, 3), V ( 2, 3), V (3, 3), and V (4, 3)) are sequentially output. The output line DO2 includes data voltages V1 to V4 for four pixels corresponding to the intersections of the data lines X1b to X4b and the scanning line Y3 (V (1, 4), V (2, 4 in this 1H). ), V (3,4) and V (4,4)) are sequentially output.

  The process at 1H is the same as that at 1H except that the polarities of the voltages output to the output lines DO1 and DO2 are inverted, and the supply of the correction voltage Vamd and the time series data voltage are the same. Is assigned. The same applies to the subsequent steps, while supplying the correction voltage Vamd to each pixel row while performing polarity inversion every 1H until the lowermost scanning line Yn is selected, and the subsequent data voltages V1 to V1. The distribution of V4 is sequentially performed.

  Thus, for example, of the pixel portion (1, 1) to the pixel portion (1, n) constituting the first column, the pixel portion (1, 1), the pixel portion (1, 3),. (1, n) includes the data voltages V (1,1), V (1,3),..., V (1, n−1) output from the output line D01 (in other words, the output circuit 41f1). Accordingly, data is written, and the pixel portion (1, 2), the pixel portion (1, 4),..., The pixel portion (1, n) is output from the output line D02 (in other words, the output circuit 41f2). Data is written according to the output data voltages V (1,1), V (1,3),..., V (1, n). That is, data is written into the plurality of pixel portions (k, 1) to (k, n) constituting the k-th column according to the data voltages output from the two different output circuits 41f. Therefore, due to the output variation of the output circuits 41f1 to 41fi (that is, variation of deviation from the original voltage value included in the data voltage output from each of the output circuits 41f1 to 41fi), the luminance difference for each pixel column. Can be reduced. Therefore, it is possible to suppress the occurrence of line-shaped display unevenness extending in the Y direction in the displayed image.

  Regarding the output lines DO3 and later, in the output lines DO3 and DO4, except that the voltages to be distributed are V5 to V8, and the data lines to be distributed are X5a to X8a and X5b to X8b, the outputs described above. The same process as lines DO1 and DO2 is performed in parallel. This also applies to each system up to the output line DOi.

  FIG. 7 shows an example in which the polarity of the voltage output to the output line DO1 is inverted every 1H period. However, the polarity may be inverted every field or every frame. It operates in the same way. Also, the polarity may be reversed so that the voltages output to the output lines DO1 and DO2 have opposite polarities.

  As described above, in the electro-optical device according to this embodiment, voltages are supplied from the two different output circuits 41f to each pixel column. Here, there are variations in the voltages output from the different output circuits 41f. When the voltages are supplied as described above, for example, the voltages are supplied from one output circuit 41f to each pixel column. Compared to the case, the variation of the average voltage for each pixel column is reduced, and the average voltage acts in the direction of equalization. That is, it is possible to prevent the variation in the data voltage generated for each output circuit 41f from appearing as a luminance difference for each pixel column. Therefore, in the image displayed in the image display area 10a, the line-like luminance unevenness in the direction along the data line can be made inconspicuous. That is, it is possible to display a high quality image.

Second Embodiment
Next, an electro-optical device according to a second embodiment will be described with reference to FIGS. FIG. 8 is a perspective view showing the overall configuration of the electro-optical device according to the second embodiment, and FIG. 9 is a circuit diagram showing the specific configuration of the electro-optical device according to the second embodiment. The second embodiment differs from the first embodiment described above in the configuration of the driver IC, and the other configurations are generally the same. Therefore, in the second embodiment, portions different from the first embodiment will be described in detail, and descriptions of other overlapping portions will be omitted as appropriate. 8 and 9, the same reference numerals are assigned to the same components as the components according to the first embodiment shown in FIGS. 3 and 4.

  In FIG. 8, the electro-optical device according to the second embodiment is provided with two flexible substrates 200 and two driver ICs 41 for one electro-optical panel. Specifically, two rows of external circuit connection terminals 102 are provided on the electro-optical panel, and a flexible substrate 200 having a driver IC 41 is electrically connected to each row.

  With this configuration, the drive in the electro-optical panel can be shared by the two driver ICs 41. Therefore, for example, the electro-optical panel can be reliably driven even when the number of various wirings, external circuit connection terminals 102, and the like increase with the increase in definition of the device.

  9, in the electro-optical device according to the second embodiment, various signals are output from the control circuit 5 and the frame memory 6 to each of the two driver ICs 41. In other words, signals related to the display of the pixel unit 2 assigned to each of the two driver ICs 41 are output.

  The two driver ICs are provided with i PINs in total. That is, one driver IC 41 includes i-numbers of PINs. Each PIN is supplied with a voltage from a different output circuit 41f as in the first embodiment. Here, as shown in the figure, the leftmost PIN1 of the left driver IC 41 is electrically connected to the output line DO1. The leftmost PIN (i / 2 + 1) of the right driver IC 41 is electrically connected to the output line DO2. Thus, the output pin PIN of the left driver IC 41 is connected to the odd-numbered output line, and the output pin PIN of the right driver IC 41 is connected to the even-numbered output line. Therefore, a voltage is supplied to the data line Xka (k = 1,..., M) from the output circuits 41f1, 41f3,..., 41f (i−1) included in the left driver IC 41, and the right driver IC 41 is supplied to the right driver IC 41. A voltage is supplied to the data line Xkb (k = 1,..., M) from the included output circuits 41f2, 41f4,.

  During the operation of the electro-optical device according to the second embodiment, a voltage is simultaneously applied to the pixel units 2 adjacent to each other in the column direction (that is, the Y direction), as in the first embodiment described above. For example, a voltage is simultaneously output to the data lines X1a and X1b. For this reason, voltages are supplied from the different driver ICs 41 to the pixel portions 2 adjacent to each other in the pixel column. In other words, the voltage is simultaneously supplied from different output circuits 41f.

  Here, the variation in the data voltage generated for each output circuit 41f is typically larger in output variation between different driver ICs 41 than in the same driver IC 41. However, in the electro-optical device according to the second embodiment, as described above, voltages are supplied from different output circuits 41f to one pixel column. Therefore, similarly to the electro-optical device according to the first embodiment, it is possible to prevent the variation in the data voltage generated for each output circuit 41f from appearing as a luminance difference for each pixel column. Therefore, in the image displayed in the image display area 10a, the line-like luminance unevenness in the direction along the data line can be made inconspicuous. That is, it is possible to display a high quality image.

<Electronic equipment>
Next, the case where the liquid crystal device which is the above-described electro-optical device is applied to various electronic devices will be described. FIG. 10 is a plan view showing a configuration example of the projector. Hereinafter, a projector using the liquid crystal device as a light valve will be described.

  As shown in FIG. 10, a projector 1100 includes a lamp unit 1102 made of a white light source such as a halogen lamp. The projection light emitted from the lamp unit 1102 is separated into three primary colors of RGB by four mirrors 1106 and two dichroic mirrors 1108 arranged in the light guide 1104, and serves as a light valve corresponding to each primary color. The light enters the liquid crystal panels 1110R, 1110B, and 1110G.

  The configurations of the liquid crystal panels 1110R, 1110B, and 1110G are the same as those of the liquid crystal device described above, and are driven by R, G, and B primary color signals supplied from the image signal processing circuit. The light modulated by these liquid crystal panels enters the dichroic prism 1112 from three directions. In the dichroic prism 1112, R and B light is refracted at 90 degrees, while G light travels straight. Therefore, as a result of the synthesis of the images of the respective colors, a color image is projected onto the screen or the like via the projection lens 1114.

  Here, paying attention to the display images by the liquid crystal panels 1110R, 1110B, and 1110G, the display image by the liquid crystal panel 1110G needs to be horizontally reversed with respect to the display images by the liquid crystal panels 1110R and 1110B.

  In addition, since light corresponding to each primary color of R, G, and B is incident on the liquid crystal panels 1110R, 1110B, and 1110G by the dichroic mirror 1108, it is not necessary to provide a color filter.

  In addition to the electronic device described with reference to FIG. 10, a mobile personal computer, a mobile phone, a liquid crystal television, a viewfinder type, a monitor direct-view type video tape recorder, a car navigation device, a pager, an electronic device Examples include a notebook, a calculator, a word processor, a workstation, a videophone, a POS terminal, and a device equipped with a touch panel. Needless to say, the present invention can be applied to these various electronic devices.

  In addition to the liquid crystal devices described in the above embodiments, the present invention includes a reflective liquid crystal device (LCOS), a plasma display (PDP), a field emission display (FED, SED), an organic EL display, and a digital micromirror device. (DMD), electrophoresis apparatus and the like are also applicable.

  The present invention is not limited to the above-described embodiment, and can be appropriately changed without departing from the spirit or idea of the invention that can be read from the claims and the entire specification, and an electro-optical device with such a change, The electro-optical device driving method and electronic apparatus are also included in the technical scope of the present invention.

  Y ... scanning line, X ... data line, 2 ... pixel unit, 5 ... control circuit, 6 ... frame memory, 10 ... TFT array substrate, 10a ... image display area, 20 ... counter substrate, 21 ... TFT, 22 ... liquid crystal capacitance , 23 ... Storage capacitor, 41 ... Driver IC, 41a ... X shift register, 42b ... First latch circuit, 41c ... Second latch circuit, 41d ... Changeover switch group, 41e ... D / A conversion circuit, 41f ... Output Reference numeral: 42, time division circuit, 50 ... liquid crystal layer, 101 ... data line driving circuit, 102 ... external circuit connection terminal, 104 ... scanning line driving circuit, 200 ... flexible substrate.

Claims (7)

A substrate,
A plurality of pixel portions arranged along a first direction and a second direction intersecting the first direction on the substrate;
A plurality of data lines provided along the first direction on the substrate;
A plurality of output circuits for outputting data voltages to the plurality of pixel portions via the plurality of data lines, and
The data voltage is output from at least two different output circuits of the plurality of output circuits to a pixel column composed of the pixel units arranged along the first direction among the plurality of pixel units. Electro-optical device characterized.   The electro-optical device according to claim 1, wherein the at least two output circuits simultaneously output the data voltage to a pixel unit included in the pixel column.   3. The electro-optical device according to claim 1, wherein the at least two output circuits output the data voltages to adjacent pixel portions among the pixel portions included in the pixel column.   4. The electro-optical device according to claim 1, wherein each of the plurality of output circuits outputs the data voltage to a plurality of the pixel columns. 5.   5. The electro-optical device according to claim 1, wherein each of the at least two output circuits is included in different integrated circuits. 6.   An electronic apparatus comprising the electro-optical device according to claim 1. A substrate, a plurality of pixel portions arranged along a first direction on the substrate and a second direction intersecting the first direction, and a plurality of data lines provided along the first direction on the substrate And a plurality of output circuits for outputting data voltages to the plurality of pixel portions via the plurality of data lines, and a driving method of an electro-optical device,
A step of outputting the data voltage from at least two different output circuits of the plurality of output circuits to a pixel column composed of the pixel units arranged along the first direction among the plurality of pixel units. A method for driving an electro-optical device.

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