JP2012235565A - Power supply device, control circuit for the same, and electronic apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a power supply device that implements improved efficiency.SOLUTION: A switching regulator 10 steps down an input voltage Vto generate a first output voltage V. A linear regulator 30 stabilizes the first output voltage Vto generate a second output voltage V. A pulse signal generation section 11 generates a pulse signal S2 having a duty ratio controlled to match the first output voltage Vwith a first setting level V. A driver 16 controls a switching operation of the switching regulator 10 in accordance with the pulse signal S2. The linear regulator 30 stabilizes the first output voltage Vto a second setting level Vindicated by control data S1 to generate the second output voltage V. An output adjustment section 44 sets the first setting level Vat a value depending on the control data S1.

Description

  The present invention relates to a power supply circuit.

  In order to convert a certain level of DC voltage into another level of DC voltage, a switching regulator (DC / DC converter) or a linear regulator (LDO: Low Drop Output) is used. Switching regulators have the advantage of higher efficiency than linear regulators. However, since noise (ripple) is superimposed on the output voltage, the linear regulator is superior from the viewpoint of output voltage stability.

  Consider a power supply unit in which a switching regulator and a linear regulator are connected in series. In this power supply device, the input voltage from the outside is stepped down or boosted by the front-stage switching regulator, and the output voltage of the switching regulator is stabilized by the rear-stage linear regulator.

  According to this power supply device, the voltage level can be converted with high efficiency by the switching regulator, and noise superimposed on the output voltage of the switching regulator can be removed by the linear regulator. That is, both high efficiency and stability can be achieved.

The present inventor has studied such a power supply device and has come to recognize the following problems.
The level of the output voltage of the power supply device, that is, the output voltage of the linear regulator, varies depending on the load connected thereto. For example, in some applications, the load of the power supply device is a digital circuit and an output voltage of 1.5V is required. In another application, the addition of the power supply device is an analog circuit and an output voltage of 3V may be required.

  Regardless of the set value of the output voltage, if the output voltage of the preceding switching regulator is designed to be constant, the efficiency of the entire power supply device deteriorates in a certain situation.

  The present invention has been made in view of these problems, and one of exemplary purposes of an aspect thereof is to provide a power supply device with improved efficiency.

One embodiment of the present invention relates to a control circuit for a power supply device. The power supply apparatus includes a switching regulator that generates a first output voltage by stepping down an input voltage, and a linear regulator that generates a second output voltage by stabilizing the first output voltage.
The control circuit includes a pulse signal generation unit that generates a pulse signal whose duty ratio is adjusted so that the first output voltage matches the first setting level, and a driver that controls a switching operation of the switching regulator according to the pulse signal A linear regulator that stabilizes the first output voltage to the second setting level indicated by the control data and generates the second output voltage; and an output adjustment unit that sets the first setting level to a value according to the control data; .

  According to this aspect, since the output voltage of the switching regulator, that is, the input voltage of the linear regulator is set according to the output voltage of the linear regulator, the linear regulator can be operated in a highly efficient state, and the efficiency is improved. Can do.

  The pulse signal generation unit divides the first output voltage to generate a first feedback voltage, and a first error to generate an error voltage corresponding to an error between the first feedback voltage and the first reference voltage. An amplifier and a pulse modulator that generates a pulse signal having a duty ratio corresponding to the error voltage may be included. The linear regulator divides the first output voltage to generate a second feedback voltage, an output transistor provided between the output terminal of the switching regulator and the output terminal of the linear regulator, and a second feedback A second error amplifier that adjusts the potential of the control terminal of the output transistor so that the voltage matches the second reference voltage. The output adjusting unit may set the voltage dividing ratio of the first voltage dividing circuit and the voltage dividing ratio of the second voltage dividing circuit according to the control data.

  The pulse signal generation unit divides the first output voltage to generate a first feedback voltage, and a first error to generate an error voltage corresponding to an error between the first feedback voltage and the first reference voltage. An amplifier and a pulse modulator that generates a pulse signal having a duty ratio corresponding to the error voltage may be included. The linear regulator divides the first output voltage to generate a second feedback voltage, an output transistor provided between the output terminal of the switching regulator and the output terminal of the linear regulator, and a second feedback A second error amplifier that adjusts the potential of the control terminal of the output transistor so that the voltage matches the second reference voltage. The output adjustment unit may set the first reference voltage and the second reference voltage according to the control data.

  The control circuit may further include a second linear regulator that stabilizes the first output voltage at a third setting level indicated by the control data and generates a third output voltage. The output adjustment unit may set the first setting level based on a lower one of the second setting level and the third setting level indicated by the control data.

  Another aspect of the present invention is a power supply device. This device includes an output circuit of a switching regulator and one of the control circuits described above.

  Yet another embodiment of the present invention is an electronic device. This electronic apparatus includes a battery and the above-described power supply device that receives the voltage of the battery as an input voltage.

  Note that any combination of the above-described constituent elements and the constituent elements and expressions of the present invention replaced with each other among methods, apparatuses, systems, and the like are also effective as an aspect of the present invention.

  According to an aspect of the present invention, efficiency can be improved.

It is a circuit diagram which shows the structure of an electronic device provided with the power supply device which concerns on embodiment. It is a figure which shows an example of the preferable relationship between the setting level of the 2nd output voltage of a power supply device, and the setting level of a 1st output voltage. It is a circuit diagram which shows the structure of the power supply device which concerns on a modification.

  The present invention will be described below based on preferred embodiments with reference to the drawings. The same or equivalent components, members, and processes shown in the drawings are denoted by the same reference numerals, and repeated descriptions are omitted as appropriate. The embodiments do not limit the invention but are exemplifications, and all features and combinations thereof described in the embodiments are not necessarily essential to the invention.

In this specification, “the state in which the member A is connected to the member B” means that the member A and the member B are electrically connected in addition to the case where the member A and the member B are physically directly connected. It includes the case of being indirectly connected through another member that does not affect the connection state.
Similarly, “the state in which the member C is provided between the member A and the member B” refers to the case where the member A and the member C or the member B and the member C are directly connected, as well as an electrical condition. It includes the case of being indirectly connected through another member that does not affect the connection state.

  FIG. 1 is a circuit diagram illustrating a configuration of an electronic device 1 including a power supply device 8 according to an embodiment.

The electronic device 1 is a battery-driven device such as a notebook PC, a digital camera, a digital video camera, a mobile phone terminal, or a PDA (Personal Digital Assistant). The electronic device 1 includes a battery 2, a load 4, a host processor 6, and a power supply device 8. Battery 2 is a secondary battery such as a lithium ion battery, for example, and generates battery voltage V _BAT . The load 4 includes a liquid crystal driver, an LED (Light Emitting Diode), a DSP (Digital Signal Processor), an analog circuit, and the like. In the present embodiment, load 4 includes a circuit that operates with a power supply voltage lower than battery voltage _VBAT . The host processor 6 controls the entire electronic device 1 in an integrated manner. The host processor 6 may be a part of the load 4.

The power supply device 8 steps down and stabilizes the battery voltage V _BAT to generate an output voltage V _OUT2 having an optimum level as the power supply voltage of the load 4.

The power supply device 8 mainly includes a switching regulator 10 and a linear regulator 30. The switching regulator 10 steps down the input voltage (battery voltage) V _BAT to generate a first output voltage V _OUT1 . The linear regulator 30 stabilizes the first output voltage V _OUT1 and generates the second output voltage V _OUT2 .

  Specifically, the power supply device 8 includes a control IC (Integrated Circuit) 100, an output circuit 102 of a switching regulator, and an output capacitor C2. The control IC 100 is a functional IC that controls the power supply device 8 and is integrated on a single semiconductor substrate. “Integrated integration” includes the case where all of the circuit components are formed on a semiconductor substrate and the case where the main components of the circuit are integrated. A resistor, a capacitor, or the like may be provided outside the semiconductor substrate.

  In relation to the switching regulator 10, the control IC 100 includes a pulse signal generation unit 11, a driver 16, a switching transistor M 1, a synchronous rectification transistor M 2, and a first voltage dividing circuit 18. Further, in relation to the linear regulator 30, the control IC 100 includes an output transistor M3, a second error amplifier 32, and a second voltage dividing circuit 34. Further, the control IC 100 includes an interface circuit 40, a register 42, and an output adjustment unit 44.

The second output voltage V _OUT2 generated by the linear regulator 30 can be set from the outside. Specifically, the control IC 100 and the host processor 6 are connected via the bus 104. The interface circuit 40 of the control IC 100 receives the control data S1 instructing the setting level of the second output voltage _VOUT2 output from the host processor 6, and writes it into the register 42.

The battery voltage _VBAT is input to the first input terminal P1 of the control IC 100, and the ground terminal P2 is grounded.

  The switching transistor M1 and the synchronous rectification transistor M2 are sequentially connected in series between the first input terminal P1 and the ground terminal. A connection point between the switching transistor M1 and the synchronous rectification transistor M2 is connected to the switching terminal P3. One end of an inductor L1 is connected to the switching terminal P3. The output capacitor C1 is provided between the other end of the inductor L1 and the ground terminal. The switching transistor M1 and the synchronous rectification transistor M2 may be provided outside the control IC 100 without being integrated.

A first output voltage V _OUT1 generated by the switching regulator 10 is generated in the output capacitor C1. The first output voltage _VOUT1 is input to the second input terminal P4.
The pulse signal generator 11 generates a pulse signal S2 whose duty ratio is adjusted so that the first output voltage V _OUT1 matches the first set level V _L1 .

  The driver 16 controls the switching operation of the switching regulator 10, that is, the on / off states of the switching transistor M1 and the synchronous rectification transistor M2 in accordance with the pulse signal S2.

The pulse signal generation unit 11 includes a first error amplifier 12, a pulse modulator 14, and a first voltage dividing circuit 18. First voltage dividing circuit 18 includes resistors R11, R12 provided in series between the second input terminal P4 ground terminal, dividing the first output voltage _{V OUT1} in the first voltage dividing ratio alpha _1, first A feedback voltage V _FB1 is generated. The first voltage dividing ratio alpha ₁ is R12 / (R11 + R12).

The first error amplifier 12 amplifies an error between the first feedback voltage V _FB1 and the first reference voltage V _REF1 and generates an error voltage V _ERR corresponding to the error. The pulse modulator 14 generates a pulse signal S2 having a duty ratio corresponding to the error voltage _VERR . For example, the pulse modulator 14 may be a pulse width modulator or a pulse frequency modulator, and its configuration is not particularly limited.

The setting level V _L1 of the first output voltage V _OUT1 generated by the switching regulator 10 is given by Expression (1).
V _L1 = V _REF1 × (R11 + R12) / R12 (1)

The linear regulator 30 stabilizes the first output voltage V _OUT1 at the second setting level V _L2 designated by the control data S1, generates the second output voltage V _OUT2 and outputs it from the output terminal P5. An output capacitor C2 is externally connected to the output terminal P5. The linear regulator 30 includes a second error amplifier 32, an output transistor M3, and a second voltage dividing circuit 34.

Second voltage dividing circuit 34 includes resistors R21, R22 provided in series between the second input terminal P4 ground terminal, dividing the first output voltage _{V OUT1} second voltage dividing ratio alpha _2, a second A feedback voltage V _FB2 is generated. The output transistor M3 is a P-channel MOSFET (Metal Oxide Semiconductor Field Effect Transistor), and is provided between the output terminal of the switching regulator 10, that is, the second input terminal P4, and the output terminal P5 of the linear regulator 30. The second error amplifier 32 adjusts the potential V _G of the control terminal (gate) of the output transistor M3 so that the second feedback voltage V _FB2 matches the second reference voltage V _REF2 .

The setting level V _L2 of the second output voltage V _OUT2 is given by Expression (2).
V _L2 = V _REF2 × (R21 + R22) / R22 (2)

The output adjustment unit 44 sets the second setting level V _L2 given by the equation (2) to a value indicated by the control data S1. Furthermore, the output adjustment unit 44 sets the first setting level V _L1 given by the expression (1) to a value corresponding to the control data S1.

FIG. 2 is a diagram illustrating an example of a preferable relationship between the setting level V _L2 of the second output voltage V _OUT2 of the power supply device 8 and the setting level V _L2 of the first output voltage V _OUT1 . The relationship between the setting levels V _L1 and V _L2 is preferably determined so that the linear regulator 30 operates most efficiently.

Here, the efficiency of the linear regulator 30 is examined. In some cases, the efficiency of a linear regulator using a P-channel MOSFET can be improved if the voltage drop ΔV (= V _OUT1 −V _OUT2 ) of the MOSFET is reduced as the output voltage V _OUT2 is higher. In this case, the linear regulator 30 can be operated with high efficiency by defining the setting levels V _L1 and V _L2 as shown in FIG.

For example, the output adjustment unit 44 may include a table that holds combinations of the second setting level V _L2 indicated by the control data S1 and the first setting level V _L1 corresponding thereto.

In Figure 1, the partial pressure ratio alpha ₂ partial pressure ratio alpha ₁ and the second voltage dividing circuit 34 of the first voltage dividing circuit 18 is switchable configured. That is, at least one of the resistors R11 and R12 is configured by a variable resistor, and at least one of the resistors R21 and R22 is configured by a variable resistor.

The output adjusting unit 44 adjusts the voltage dividing ratio α _{2 of} the second voltage dividing circuit 34, that is, the resistance value of at least one of the resistors R21 and R22 so that the set level V _L2 indicated by the control data S1 is obtained.

Further, the output adjusting unit 44 adjusts the voltage dividing ratio α _{1 of} the first voltage dividing circuit 18, that is, the resistance value of at least one of the resistors R 21 and R 22 so that the set level V _L1 corresponding to the control data S ₁ is obtained.

  The above is the configuration of the control IC 100. Next, the operation will be described.

The control data S1 instructing the set level V _L2 of the second output voltage V _OUT2 is input from the host processor 6 to the control IC 100. The output adjustment unit 44 sets the voltage division ratio α2 of the _second voltage dividing circuit 34 so that the set level _VL2 indicated by the control data S1 is obtained. The output adjustment unit 44 sets the setting level V _L1 of the first output voltage V _OUT1 based on the relationship of FIG.

The above is the operation of the power supply device 8.
According to the power supply device 8, the input voltage, that is, the setting level V _L1 of the output voltage V _OUT1 of the switching regulator 10 is changed according to the setting level V _L2 of the second output voltage V _OUT2 that is the output of the linear regulator 30. The voltage drop of the output transistor M3, that is, the power loss can be reduced, and the linear regulator 30 can be operated with high efficiency.

The advantage of the power supply device 8 becomes clear by comparison with the case where the setting level V _L1 of the output voltage V _OUT1 of the switching regulator 10 is fixed, regardless of the setting level V _L2 of the output voltage V _OUT2 of the linear regulator 30.

When the setting level V _L1 of the output voltage V _OUT1 of the switching regulator 10 is fixed, the value is set on the assumption that the output voltage V _OUT2 of the linear regulator 30 is the highest, as shown by a one-dot chain line in FIG. There is a need. In this case, when the output voltage V _OUT2 of the linear regulator 30 is low, the voltage drop ΔV ′ of the output transistor M3 becomes large and the efficiency deteriorates. On the other hand, according to the power supply device 8 of FIG. 1, the output voltage V _OUT1 can be optimized according to the output voltage V _OUT2 , and the efficiency can be improved.

  The present invention has been described based on the embodiments. This embodiment is an exemplification, and various modifications may exist in each of those constituent elements, each processing process, and a combination thereof. Hereinafter, such modifications will be described.

In the embodiment, the setting levels V _L1 and V _L2 of the output voltages V _OUT1 and V _OUT2 are set according to the voltage dividing ratio α ₁ of the _first voltage dividing circuit 18 and the voltage dividing ratio α ₂ of the second voltage dividing circuit 34. Although the case has been described, the present invention is not limited to this. As is clear from the equations (1) and (2), the setting levels V _L1 and V _L2 correspond to the reference voltages V _REF1 and V _REF2 , so that the output adjustment unit 44 sets the voltage dividing ratios α ₁ and α ₂ . The reference voltages V _REF1 and V _REF2 may be changed instead of or in combination with them.

FIG. 3 is a circuit diagram showing a configuration of a power supply device 8a according to a modification. The control IC 100 a of the power supply device 8 a includes a second linear regulator 30 a in addition to the linear regulator 30. The linear regulator 30a stabilizes the first output voltage V _OUT1 to the third setting level V _L3 indicated by the control data S1a, and generates the third output voltage V _OUT3 . The linear regulator 30a is configured similarly to the linear regulator 30 of FIG.

The control IC 100a receives control data S1a that indicates the set levels V _L2 and V _L3 of the output voltage V _{OUT2 of} the linear regulator 30 and the output voltage V _OUT3 of the linear regulator 30a.

The output adjustment unit 44a sets the setting levels V _L2 and V _L3 indicated by the control data S1a for each of the linear regulator 30 and the linear regulator 30a. Further, the output adjustment unit 44a sets the first setting level V _L1 based on the lower one of the second setting level V _L2 and the third setting level V _L3 indicated by the control data S1a.

When three or more linear regulators are provided, the output adjustment unit 44a may set the setting level of the output voltage _VOUT1 of the switching regulator 10 according to the lowest setting level among the setting levels of the output voltages. .

  According to the modification of FIG. 3, the efficiency can be improved even in a system provided with a multi-channel linear regulator.

Although the linear regulator in which the output transistor M3 is a P-channel MOSFET has been described in the embodiment, it may be an N-channel MOSFET. Also in this case, the efficiency can be improved by optimizing the setting level V _L1 of the switching regulator 10 according to the setting level V _L2 of the linear regulator 30. The output transistor M3 may be a bipolar transistor.

  Although the present invention has been described using specific terms based on the embodiments, the embodiments only illustrate the principles and applications of the present invention, and the embodiments are defined in the claims. Many variations and modifications of the arrangement are permitted without departing from the spirit of the present invention.

DESCRIPTION OF SYMBOLS 1 ... Electronic device, 2 ... Battery, 4 ... Load, 6 ... Host processor, 8 ... Power supply device, 100 ... Control IC, 10 ... Switching regulator, 11 ... Pulse signal generation part, 12 ... 1st error amplifier, 14 ... Pulse Modulator, 16 ... driver, 18 ... first voltage dividing circuit, M1 ... switching transistor, M2 ... synchronous rectification transistor, C1 ... output capacitor, L1 ... inductor, 30 ... linear regulator, 32 ... second error amplifier, 34 ... second 2 voltage dividing circuit, M3... Output transistor, C2... Output capacitor, 40... Interface circuit, 42.

Claims (7)

A control circuit for a power supply device comprising: a switching regulator that steps down an input voltage to generate a first output voltage; and a linear regulator that stabilizes the first output voltage and generates a second output voltage,
A pulse signal generation unit that generates a pulse signal in which a duty ratio is adjusted so that the first output voltage matches a first setting level;
A driver for controlling a switching operation of the switching regulator in response to the pulse signal;
The linear regulator that stabilizes the first output voltage to a second set level indicated by control data and generates a second output voltage;
An output adjustment unit for setting the first setting level to a value according to the control data;
A control circuit comprising: The pulse signal generator is
A first voltage dividing circuit for dividing the first output voltage and generating a first feedback voltage;
A first error amplifier that generates an error voltage according to an error between the first feedback voltage and the first reference voltage;
A pulse modulator for generating the pulse signal having a duty ratio corresponding to the error voltage;
Including
The linear regulator is
A second voltage dividing circuit for dividing the first output voltage and generating a second feedback voltage;
An output transistor provided between an output terminal of the switching regulator and an output terminal of the linear regulator;
A second error amplifier that adjusts the potential of the control terminal of the output transistor so that the second feedback voltage matches a second reference voltage;
Including
2. The control circuit according to claim 1, wherein the output adjustment unit sets a voltage dividing ratio of the first voltage dividing circuit and a voltage dividing ratio of the second voltage dividing circuit according to the control data. The pulse signal generator is
A first voltage dividing circuit for dividing the first output voltage and generating a first feedback voltage;
A first error amplifier that generates an error voltage according to an error between the first feedback voltage and the first reference voltage;
A pulse modulator for generating the pulse signal having a duty ratio corresponding to the error voltage;
Including
The linear regulator is
A second voltage dividing circuit for dividing the first output voltage and generating a second feedback voltage;
An output transistor provided between an output terminal of the switching regulator and an output terminal of the linear regulator;
A second error amplifier that adjusts the potential of the control terminal of the output transistor so that the second feedback voltage matches a second reference voltage;
Including
The control circuit according to claim 1, wherein the output adjustment unit sets the first reference voltage and the second reference voltage according to the control data. A second linear regulator that stabilizes the first output voltage to a third setting level indicated by the control data and generates a third output voltage;
The said output adjustment part sets the said 1st setting level based on the lower one among the 2nd setting level and the 3rd setting level which the said control data instruct | indicates, The any one of Claim 1 to 3 characterized by the above-mentioned. A control circuit according to any one of the above. A plurality of the linear regulators are provided, and the set level of the output voltage of each linear regulator is indicated by the control data,
The said output adjustment part sets the said 1st setting level based on the lowest level among the setting levels of the output voltage of each linear regulator which the said control data instruct | indicates, The Claim 1 to 3 characterized by the above-mentioned. The control circuit according to any one of the above. An output circuit of the switching regulator;
A control circuit according to any one of claims 1 to 5;
A power supply apparatus comprising: Battery,
An output circuit of the switching regulator;
The control circuit according to any one of claims 1 to 5, which receives the voltage of the battery as the input voltage;
An electronic device comprising:

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