JP2012227378A - Method of manufacturing semiconductor device and manufacturing apparatus for semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a wafer in which the surface roughness of a bevel part is appropriately set so that a film deposited on the bevel part of the wafer has excellent adhesion.SOLUTION: A method of manufacturing a semiconductor device comprises the step of polishing a bevel part 2 of a wafer 1 so that the surface roughness (Ra) of the bevel part 2 ranges from 0.4 nm or more to 1.4 nm or less.

Description

  The present invention relates to a semiconductor device manufacturing method and a semiconductor device manufacturing apparatus.

  Patent Document 1 describes that a peripheral portion (bevel portion) of a semiconductor wafer (hereinafter simply referred to as a wafer) is mirror-polished. The surface roughness (Ra) of the bevel portion is generally 20 nm or less as described in the same document.

  Note that Patent Document 1 also describes that when a polysilicon film is formed on the entire surface of the wafer, the polysilicon that has entered the minute irregularities of the bevel portion remains, thereby causing an adverse effect in a subsequent process. Has been. The technique of Patent Document 1 is to make the surface roughness (Ra) of the bevel portion 20 nm or less in order to avoid such an adverse effect, and in the same document, it is possible to process into a smoother mirror surface by polishing. There is a statement that it is desirable.

JP-A-11-260775

According to the study of the present inventor, the following knowledge was obtained.
Since the film formed on the fine irregularities of the bevel portion has poor adhesion, the film may be peeled off. When film peeling occurs, the peeled film adheres to the wafer, which causes a decrease in yield. Patent Document 1 describes that the surface roughness (Ra) of the bevel portion is 20 nm or less. However, the surface roughness (Ra) of 20 nm is currently a rough level, and the surface roughness of that level is low. Now, film peeling occurs depending on the type of film to be formed.
As described above, Patent Document 1 has a description that the smaller the surface roughness, the better. However, the present inventor has found that when the surface roughness of the bevel portion is too small, the unevenness of the surface becomes too small, and the adhesion between the formed film and the wafer is rather deteriorated.

  As described above, it has been difficult to obtain a wafer in which the surface roughness of the bevel portion is appropriately set so that the adhesion of the film formed on the bevel portion of the wafer becomes good.

  As a result of studying an appropriate value of the surface roughness of the bevel portion of the wafer by the present inventor, when the surface roughness (Ra) is 0.4 nm or more and 1.4 nm or less, the film is formed on the bevel portion of the wafer. The knowledge that the adhesiveness of the formed film was improved was obtained (see FIG. 2).

  Therefore, the present invention includes a step of polishing the bevel portion so that the surface roughness (Ra) of the bevel portion of the semiconductor wafer is 0.4 nm or more and 1.4 nm or less. Provide a method.

According to this manufacturing method, the unevenness on the surface of the bevel portion can be appropriately reduced, so that the film formed on the bevel portion can be prevented from being peeled off due to the unevenness being too large.
In addition, since the unevenness can be prevented from becoming excessively small, appropriate adhesion between the surface of the bevel portion and the film formed on the bevel portion can be ensured. It can suppress that the formed film | membrane peels.
Thus, the adhesion of the film formed on the bevel portion can be improved, and the film peeling can be suppressed.
That is, it is possible to obtain a wafer in which the surface roughness of the bevel portion is appropriately set so that the adhesion of the film formed on the bevel portion of the wafer is good.

  According to another aspect of the present invention, there is provided a semiconductor device comprising a bevel polishing portion that polishes the bevel portion so that the surface roughness (Ra) of the bevel portion of the semiconductor wafer is 0.4 nm or more and 1.4 nm or less. A manufacturing apparatus is provided.

  ADVANTAGE OF THE INVENTION According to this invention, the wafer by which the surface roughness of the bevel part was set appropriately can be obtained so that the adhesiveness of the film | membrane formed into a film on the bevel part of a wafer may become favorable.

It is a figure for demonstrating the manufacturing method of the semiconductor device which concerns on 1st Embodiment. It is a figure which shows the relationship between the surface roughness of the bevel part of a wafer, and the ease of film | membrane peeling. It is a figure which shows the bevel grinding | polishing part of the manufacturing apparatus of the semiconductor device which concerns on 1st Embodiment. It is a block diagram which shows the manufacturing apparatus of the semiconductor device which concerns on 1st Embodiment. It is a block diagram which shows the manufacturing apparatus of the semiconductor device which concerns on 2nd Embodiment. It is a figure for demonstrating the manufacturing method of the semiconductor device which concerns on a comparative example.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. In all the drawings, the same components are denoted by the same reference numerals, and description thereof will be omitted as appropriate.

[First Embodiment]
FIG. 1 is a view for explaining a method of manufacturing a semiconductor device according to the first embodiment, and shows a cross section of a part of a semiconductor wafer 1 (hereinafter simply referred to as wafer 1). 1A shows a state before the bevel portion 2 is polished, FIG. 1B shows a state after the bevel portion 2 is polished, and FIG. 1C shows a wafer after the bevel portion 2 is polished. 1 shows a state in which a film 4 is formed on the surface of 1.

  The manufacturing method of the semiconductor device according to the present embodiment includes a step of polishing the bevel portion 2 so that the surface roughness (Ra) of the bevel portion 2 of the wafer 1 is 0.4 nm or more and 1.4 nm or less. Details will be described below.

  First, a silicon single crystal ingot (not shown) is manufactured by a single crystal pulling method. Next, the outer periphery of the silicon single crystal ingot is ground. Next, as processing for positioning in the crystal direction, for example, notch processing is performed on the single crystal ingot. Next, the silicon single crystal ingot is sliced with a wire saw to obtain a slice wafer.

  Next, chamfering of the bevel portion (outer peripheral portion: see bevel portion 2 in FIG. 1) using a grinding wheel is performed on the slice wafer. Next, the wafer is finished to have a uniform thickness, parallelism, flatness, and a certain degree of surface roughness by double-sided lapping. Next, the processing damage layer is removed by etching the wafer with acid or alkali for processing strain removal and cleaning.

  Next, mirror finishing is performed on the wafer 1 by double-side polishing. In this polishing, for example, first, the front and back surfaces 1a and 1b (see FIG. 1) of the wafer 1 are polished, and then the bevel portion 2 is polished. FIG. 1A shows a state after the front and back surfaces 1a and 1b of the wafer 1 are polished and before the bevel portion 2 is polished. At this stage, the surface roughness (Ra) of the bevel portion 2 is 10 nm or more. In addition, Ra which is a unit of surface roughness is arithmetic average roughness. There are minute irregularities 3 on the surface of the bevel portion 2.

  Here, in this embodiment, the bevel portion 2 is polished so that the surface roughness (Ra) of the bevel portion 2 of the wafer 1 is 0.4 nm or more and 1.4 nm or less. More preferably, the surface roughness (Ra) of the bevel portion 2 is set to 0.5 nm or more and 1.0 nm or less (FIG. 1B).

  Here, the polishing of the bevel portion 2 can be performed using a semiconductor device manufacturing apparatus as described below.

  FIG. 3 is a diagram showing the bevel polishing unit 110 included in the semiconductor device manufacturing apparatus 100 (FIG. 4) according to the present embodiment.

  The bevel polishing part 110 polishes the bevel part 2 so that the surface roughness (Ra) of the bevel part 2 of the wafer 1 is 0.4 nm or more and 1.4 nm or less.

  The bevel polishing unit 110 includes a stage (not shown) that supports the wafer 1 and one or a plurality of (for example, four as shown in FIG. 3) polishing units 111 that polish the bevel unit 2.

For example, the stage supports the wafer 1 horizontally by the upper surface of the stage, and rotates the wafer 1 as the stage rotates. The rotation axis coincides with the center of the wafer 1 in plan view.
The dimension (planar dimension) of the portion that supports the wafer 1 on the stage is smaller than the planar dimension of the wafer 1, and the wafer 1 is held on the stage so that the bevel portion 2 projects outward from the stage. .
The stage preferably holds the wafer 1 by suction.

  Each polishing unit 111 includes, for example, a polishing tape 112 and a pair of (for example, a pair of upper and lower) pulleys 113.

A polishing tape (polishing cloth) 112 is stretched between the pair of pulleys 113.
Each polishing unit 111 is arranged, for example, at regular intervals around the wafer 1 held on the stage.
Of the pair of pulleys 113 of the polishing unit 111, the upper pulley 113 is located above the wafer 1, and the lower pulley 113 is located below the wafer 1.
In the polishing tape 112, a portion between the pair of pulleys 113 (hereinafter, the polishing portion 112 a) is in contact with the bevel portion 2 of the wafer 1 with a predetermined tension.
Therefore, by rotating the stage, friction is generated between the polishing tape 112 and the bevel portion 2, and the bevel portion 2 is polished by the polishing tape 112.

  Here, by appropriately adjusting the length of time for polishing (hereinafter, polishing time), the bevel portion 2 can be polished so that the bevel portion 2 has a desired surface roughness.

  The manufacturing apparatus 100 is, for example, an EAC300 series manufactured by Ebara Corporation. The polishing tape 112 is, for example, a nonwoven fabric such as suba400.

FIG. 4 is a block diagram of the manufacturing apparatus 100.
As shown in FIG. 4, the bevel polishing unit 110 has a stage rotation motor 114 that rotates the stage. The manufacturing apparatus 100 includes a control unit 220 that controls the operation of the stage rotation motor 114 and the like.
For example, the bevel unit 2 can be polished so that the bevel unit 2 has a desired surface roughness by appropriately adjusting the length of time for which the stage is rotated by the stage rotation motor 114 by the control unit 220. The length of time for rotating the stage is obtained, for example, by an experiment in advance, and the time is stored and held in the control unit 220.

  A semiconductor device is manufactured using the wafer 1 obtained by polishing the bevel portion 2 using such a manufacturing apparatus 100. In this manufacturing process, if foreign matter adheres to the wafer 1, it leads to a decrease in yield. Therefore, it is necessary to avoid foreign matter adhesion to the wafer 1 as much as possible.

  This manufacturing process includes a film forming process. In this film forming process, various films 4 are formed on the surface (for example, the front surface 1a) of the wafer 1 including the bevel portion 2 (FIG. 1). (C)). This film 4 is also formed on the bevel portion 2 of the wafer 1. The film 4 can be, for example, any one of a TiN film, a Ta film, a silicon oxide film, a silicon nitride film, an aluminum film, and a Cu film.

  Here, FIG. 2 is a diagram showing an experimental result in which the surface roughness (Ra) of the bevel portion 2 of the wafer 1 is changed in a plurality of stages and the ease of film peeling (film peeling potential) is evaluated for each. is there. The film peeling is the peeling of the film 4 from the bevel portion 2. The film peeling potential is represented by the number of foreign matters on the wafer 1. This is expressed in particular as the number of foreign matter (particles) generated at the peripheral edge of the wafer 1 due to film peeling from the bevel portion 2. As the film peeling potential is smaller (the number of foreign matters on the wafer 1 is smaller), film peeling is more difficult. In this experiment, a TiN film was used as the film 4.

From the experimental results shown in FIG. 2, it is understood that the film peeling potential can be suppressed by setting the surface roughness (Ra) of the bevel portion 2 to 0.4 nm or more and 1.4 nm or less. In particular, it can be seen that when the surface roughness (Ra) of the bevel portion 2 is 0.5 nm or more and 1.0 nm or less, the film peeling potential can be remarkably suppressed.
This is because the unevenness 3 on the surface of the bevel portion 2 becomes an appropriate size, and sufficient adhesion between the surface of the bevel portion 2 and the film 4 is obtained. That is, as a result of an increase in the contact area between the bevel portion 2 and the film 4 as compared with the case where the surface roughness (Ra) of the bevel portion 2 is less than 0.4 nm, the film adhesion is improved. Peeling is less likely to occur. Further, when the surface roughness (Ra) of the bevel portion 2 exceeds 1.4 nm, the potential of film peeling does not greatly differ, but the film is formed in a needle shape because the surface of the bevel portion 2 is rough. Therefore, the problem is that the film is easily broken and adheres to the wafer 1 as a foreign matter defect. That is, the range of the surface roughness (Ra) of the bevel portion 2 is 0.4 nm or more and 1.4 nm so that the film peeling hardly occurs and the film-formed film has a small potential that easily breaks in a needle shape. The range is as follows.

  On the other hand, when the surface roughness (Ra) of the bevel portion 2 is less than 0.4 nm, or when the surface roughness exceeds 1.4 nm, the film peeling potential increases and the film peeling tends to occur.

FIG. 6 is a view for explaining a method of manufacturing a semiconductor device according to a comparative example, and shows a partial cross section of the wafer 1. In the manufacturing method according to Comparative Example 1, as shown in FIG. 6A, the surface roughness (Ra) of the bevel portion 2 exceeds 1.4 nm (for example, 10 nm). On the other hand, in the manufacturing method according to Comparative Example 2, as shown in FIG. 6B, the surface roughness is less than 0.4 nm (for example, 0.1 nm). As can be seen from the results shown in FIG. 2, film peeling tends to occur in these cases.
FIG. 6C shows a process of forming the film 4 on the wafer 1 having a surface roughness (Ra) of the bevel portion 2 of 0.1 nm, and FIG. 6D shows the process of forming the film 4 on the bevel after this process. It is a schematic diagram which shows a mode that it peeled from the part 2 (a mode that film | membrane peeling 5 produced).

According to the first embodiment as described above, the surface roughness (Ra) of the bevel portion 2 is set to 0.4 nm or more and 1.4 nm or less, so that the unevenness 3 on the surface of the bevel portion 2 is appropriately reduced. Therefore, it is possible to prevent the film 4 formed on the bevel portion 2 from being peeled off due to the unevenness 3 being too large.
In addition, since the unevenness 3 can be prevented from becoming excessively small, appropriate adhesion between the surface of the bevel portion 2 and the film 4 can be ensured, and this also causes the film 4 to peel off. Can be suppressed.
Thus, by controlling the surface roughness of the bevel portion 2 within a certain range, the adhesion of the film 4 formed on the bevel portion 2 can be improved, and the film peeling can be suppressed.
That is, it is possible to obtain the wafer 1 in which the surface roughness (Ra) of the bevel portion 2 is appropriately set so that the adhesion of the film 4 formed on the bevel portion 2 of the wafer 1 is good.
Accordingly, it is possible to suppress a decrease in yield of the semiconductor device due to the peeled film 4.

[Second Embodiment]
FIG. 5 is a block diagram showing a semiconductor device manufacturing apparatus 100 according to the second embodiment.
In the present embodiment, the manufacturing apparatus 100 further includes a roughness monitor meter 210 that monitors the surface roughness (Ra) of the bevel unit 2 and a control unit 220 that controls the bevel polishing unit 110. The polishing is terminated when the surface roughness monitored by the roughness monitor 210 reaches a predetermined surface roughness.

  As the roughness monitor 210, for example, a measuring device using AFM (atomic force microscopy) (for example, NV2000 manufactured by Olympus Corporation) can be used. The roughness monitor 210 measures the surface roughness (Ra) of the bevel portion 2 as needed and outputs the measurement result to the control unit 220.

  The control unit 220 monitors the measurement result input from the roughness monitor 210, and when the value reaches a predetermined surface roughness (for example, 0.4 nm or more and 1.4 nm or less), the bevel portion by the bevel polishing unit 110 is displayed. 2 polishing operation is terminated.

  That is, in the method of manufacturing a semiconductor device according to the present embodiment, the bevel portion 2 is polished by the bevel polishing portion 110 while the surface roughness (Ra) of the bevel portion 2 is monitored by the roughness monitor meter 210. When the monitored surface roughness reaches a predetermined surface roughness, the polishing of the bevel portion 2 is finished.

In general, when polishing is performed, the polishing state changes due to the abrasion of the polishing cloth, so it is difficult to accurately control the surface roughness of the bevel portion 2.
In contrast, in the present embodiment, the bevel portion 2 is polished while monitoring the surface roughness of the bevel portion 2 with the roughness monitor 210 as needed, and the polishing is finished when the monitored surface roughness reaches a predetermined surface roughness. Therefore, the surface roughness of the bevel portion 2 can be accurately controlled. Therefore, the surface roughness of the bevel portion 2 can be controlled with higher accuracy.

1 Semiconductor wafer 1a surface (surface)
1b side (back side)
2 Bevel part 3 Concavity and convexity 4 Film 5 Film peeling 100 Semiconductor device manufacturing apparatus 110 Bevel polishing part 111 Polishing unit 112 Polishing tape 112a Polishing part 113 Pulley 114 Stage rotation motor 210 Roughness monitor meter 220

Claims (7)

  A method of manufacturing a semiconductor device, comprising: a step of polishing the bevel portion so that the surface roughness (Ra) of the bevel portion of the semiconductor wafer is 0.4 nm or more and 1.4 nm or less.   2. The method of manufacturing a semiconductor device according to claim 1, wherein, in the polishing step, the surface roughness is set to 0.5 nm or more and 1.0 nm or less.   3. The polishing according to claim 1, wherein the polishing step is performed while the surface roughness is monitored, and the polishing is terminated when the monitored surface roughness reaches a predetermined surface roughness. 4. A method for manufacturing a semiconductor device. After the polishing step,
4. The method of manufacturing a semiconductor device according to claim 1, wherein a film is formed on a surface of the semiconductor wafer including the bevel portion. 5.   5. The method for manufacturing a semiconductor device according to claim 4, wherein the film is any one of a TiN film, a Ta film, a silicon oxide film, a silicon nitride film, an aluminum film, and a Cu film.   An apparatus for manufacturing a semiconductor device, comprising: a bevel polishing portion for polishing the bevel portion so that the surface roughness (Ra) of the bevel portion of the semiconductor wafer is 0.4 nm or more and 1.4 nm or less. A roughness monitor for monitoring the surface roughness;
A control unit for controlling the bevel polishing unit;
Further comprising
The apparatus for manufacturing a semiconductor device according to claim 6, wherein the controller terminates the polishing when the surface roughness monitored by the roughness monitor meter reaches a predetermined surface roughness.

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