JP2012218952A - Substrate for nitride semiconductor, and method for producing substrate for nitride semiconductor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a substrate for a nitride semiconductor, which is comparatively easily enlarged and which is comparatively low-cost.SOLUTION: The substrate 100 for a nitride semiconductor includes: a base material 120; a buffer layer 160 set on the upper side of the base material 120; and a nitride semiconductor layer 180 set on the upper side of the buffer layer 160; wherein the base material 120 is composed of quartz, the buffer layer 160 includes a nitride of gallium (Ga) and/or aluminum (Al), the nitride semiconductor layer 180 comprises a nitride semiconductor including gallium (Ga) and/or aluminum (Al), a stress relaxation layer 125 is set between the base material 120 and the buffer layer 160, the stress relaxation layer 125 includes an amorphous layer 130 on the side near the base material 120 and a crystallization layer 150 on the side far from the base material 120, or includes an amorphous layer including a crystalline component on the side far from the base material 120, and the stress relaxation layer 125 includes silicon nitride or silicon oxynitride.

Description

  The present invention relates to a nitride semiconductor substrate such as gallium nitride (GaN) and a method for manufacturing a nitride semiconductor substrate such as gallium nitride (GaN).

  Nitride semiconductors containing group 13 (former group III) elements of the periodic table, in particular, (Al, Ga, In) N-based nitridation containing aluminum (Al), gallium (Ga), and / or indium (In) The semiconductors (hereinafter collectively referred to as “nitride semiconductors such as GaN”) can continuously adjust the band gap according to the composition, and can change the emission wavelength widely from ultraviolet to red. It has the feature that it can be. For this reason, nitride semiconductors such as GaN are being developed as materials for light emitting / receiving devices in the region from the ultraviolet to the visible light region.

  For example, in the visible light region, blue to green light emitting diodes (LEDs) using this material system are used as light sources for traffic lights or large displays. Further, white LEDs combining a nitride semiconductor LED, such as GaN, which emits light in the near-ultraviolet region, and phosphors are improving in efficiency year by year. Lumen) / W is reported to be capable of emitting light with high efficiency. Further, a laser diode (LD) emitting blue light using a nitride semiconductor such as GaN is becoming an indispensable light source for a high recording density disk. Furthermore, since nitride semiconductors such as GaN are not easily deteriorated even at high temperatures of 500 ° C. or higher and are stable, nitride semiconductors such as GaN are attracting attention as device materials that can be used in high-temperature environments or do not require cooling. Yes.

  Such a device including a nitride semiconductor such as GaN is usually formed on a substrate (hereinafter referred to as “nitride semiconductor substrate”). The “nitride semiconductor substrate” is formed by forming a buffer layer on a single crystal base material and then epitaxially growing a nitride semiconductor layer (epitaxial layer) on the buffer layer. The buffer layer is provided to alleviate the lattice constant mismatch between the single crystal substrate and the epitaxial layer.

Conventionally, as the single crystal base material, products using sapphire (Al ₂ O ₃ ) single crystal occupy the highest market share, but R & D products and some products include gallium nitride ( GaN) single crystals, silicon carbide (SiC) single crystals, and silicon (Si) single crystals are used. In particular, when a gallium nitride (GaN) single crystal substrate is used, the lattice matching between the substrate and the epitaxial layer can be improved.

JP 2000-133841 A

Naoya Murata, Hikari Tochishita, Yui Shimizu, Tsutomu Araki, and Yasushi Nanishi: Jpn. J. et al. Appl. Phys. , Vol37, pp. L1214-L1216, (1998)

As described above, sapphire (Al ₂ O ₃ ) single crystal, silicon carbide (SiC) single crystal, or silicon (Si) is currently used as a single crystal substrate for devices including nitride semiconductors such as GaN. Has been.

However, such a single crystal base material has a problem that it is difficult to increase the size. For example, the diameter of a sapphire (Al ₂ O ₃ ) single crystal, which is the most main substrate at present, is limited to about 6 inches to 8 inches at the maximum. The diameter of the gallium nitride single crystal is only about 4 inches at the maximum. In addition, the silicon carbide (SiC) single crystal is also about 4 inches at the maximum. For this reason, naturally, it is difficult to increase the size of nitride semiconductors such as GaN formed on such a base material, and this is one of the factors that hinder the expansion of the use of nitride semiconductors such as GaN. ing. Moreover, even if it becomes possible to increase the size of the single crystal base material in the future, such a single crystal base material is likely to be extremely expensive. Therefore, in this case, various devices having a nitride semiconductor such as GaN also increase in cost as a result.

  On the other hand, the silicon (Si) single crystal base material is relatively large compared to other single crystal base materials, and a maximum of about 12 inches can be obtained. Used only in products. This is due to a problem peculiar to a silicon substrate, that is, a lattice mismatch with GaN is as large as 17%, and it is difficult to reduce crystal defects. Moreover, since the band gap of Si is 1.12 eV, which is smaller than that of other base materials, there is a problem that silicon absorbs visible light when applied to LEDs. For this reason, LED using a silicon (Si) single crystal base material has low efficiency, and the silicon (Si) single crystal base material is not a main base material for LED applications.

  In order to deal with such problems, it has been proposed to use quartz glass instead of a single crystal as a base material for a nitride semiconductor such as GaN (Non-patent Document 1, Patent Document 1). .

  However, in a normal case, when a GaN layer is grown on a quartz glass substrate, the resulting GaN layer becomes a multi-oriented polycrystalline layer. Such a multi-oriented polycrystalline layer is known to have inferior characteristics as compared with an epitaxially grown layer. For example, the brightness of a light emitting diode (LED) comprising a polycrystalline GaN layer formed on a quartz glass substrate was constructed by growing a single crystal (epitaxial) layer of GaN on a sapphire single crystal substrate. As compared with the LED, the luminance is reduced to about 1/100 (Patent Document 1).

  On the other hand, the production of a unidirectionally oriented GaN film on a quartz glass substrate as a form closer to the epitaxial layer is reported (Non-Patent Document 1). However, there is no report that the LED emits light with respect to this unidirectionally oriented GaN film, and it has not been commercialized.

  The present invention has been made to solve such problems, and an object of the present invention is to provide a nitride semiconductor substrate that is relatively easy to increase in size and is relatively inexpensive. It is another object of the present invention to provide a method for manufacturing such a nitride semiconductor substrate.

In the present invention,
A nitride semiconductor substrate having a base material, a buffer layer placed on top of the base material, and a nitride semiconductor layer placed on top of the buffer layer,
The substrate is made of quartz,
The buffer layer includes a nitride of gallium (Ga) and / or aluminum (Al),
The nitride semiconductor layer is composed of a nitride semiconductor containing gallium (Ga) and / or aluminum (Al),
Between the base material and the buffer layer, a stress relaxation layer is installed,
The stress relaxation layer has an amorphous layer on the side close to the substrate and a crystallized layer on the side far from the substrate, or an amorphous layer containing a crystal component on the side far from the substrate,
A nitride semiconductor substrate is provided in which the stress relaxation layer includes silicon nitride or silicon oxynitride.

  In the nitride semiconductor substrate according to the present invention, the stress relaxation layer may have one or a plurality of through grooves, and the stress relaxation layer may be separated into a plurality of islands by the through grooves.

  In the nitride semiconductor substrate according to the present invention, the through groove may be a substantially striped groove or a substantially lattice-shaped groove.

  In the nitride semiconductor substrate according to the present invention, the base material may have a recess corresponding to the through groove of the stress relaxation layer.

Furthermore, in the present invention,
A method for producing a nitride semiconductor substrate, comprising: a base material; a buffer layer disposed on the base material; and a nitride semiconductor layer disposed on the buffer layer,
(A) preparing a quartz substrate;
(B) installing an amorphous layer containing silicon nitride or silicon oxynitride on the substrate;
(C) crystallizing the surface of the amorphous layer to form a layer (hereinafter referred to as a crystallized layer) in which part or all of the surface is crystallized;
(D) installing a buffer layer containing a nitride of gallium (Ga) and / or aluminum (Al) on the crystallized layer;
(E) growing a nitride semiconductor layer containing gallium (Ga) and / or aluminum (Al) on the buffer layer;
A method for manufacturing a nitride semiconductor substrate is provided.

  In the manufacturing method according to the present invention, the step (b) may be performed by a sputtering method of silicon nitride or silicon oxynitride in a state where the substrate is kept at a temperature in the range of room temperature to 400 ° C.

  In the manufacturing method according to the present invention, the step (c) may be performed by subjecting the amorphous layer to plasma nitriding treatment, microwave irradiation treatment, or laser annealing treatment.

In the manufacturing method according to the present invention, between the step (c) and the step (d),
(C ′) A step of forming one or a plurality of through grooves in the amorphous layer and the crystallized layer may be included.

  In the manufacturing method according to the present invention, at least one of the through grooves formed in the step (c ′) may reach the inside of the base material.

  According to the present invention, it is possible to provide a nitride semiconductor substrate that is relatively easy to increase in size and relatively inexpensive. In addition, a method for manufacturing such a nitride semiconductor substrate can be provided.

It is the figure which showed schematically the structure of the conventional board | substrate for nitride semiconductors. It is the figure which showed roughly the example of 1 structure of the board | substrate for nitride semiconductors by this invention. It is the figure which showed roughly the example of 1 structure of the board | substrate for another nitride semiconductor by this invention. It is the figure which showed schematically the example of 1 structure of the another board | substrate for nitride semiconductors by this invention. It is the figure which showed roughly the flow of the manufacturing method of the board | substrate for semiconductors by this invention. 3 is a graph showing an X-ray diffraction pattern of a sample according to Example 1. 6 is a graph showing an X-ray diffraction pattern of a sample according to Comparative Example 1. 6 is a graph showing an X-ray diffraction pattern of a sample according to Comparative Example 2. 4 is a graph (solid line) showing an emission spectrum at the time of ultraviolet irradiation obtained in the sample according to Example 1, and a graph (dotted line) showing an emission spectrum at the time of ultraviolet irradiation obtained in a sample according to Comparative Example 1. .

  Hereinafter, the present invention will be described with reference to the drawings.

  To better understand the configuration and features of the present invention, a conventional GaN semiconductor substrate will be briefly described first.

  FIG. 1 schematically shows a configuration of a conventional GaN semiconductor substrate.

  As shown in FIG. 1, a conventional GaN semiconductor substrate 10 is configured by laminating a single crystal base material 20, a buffer layer 60, and a GaN epitaxial layer 80 in this order.

  The single crystal substrate 20 is a member used for stacking and supporting each layer on the top. The single crystal substrate 20 is made of, for example, a sapphire single crystal, a GaN single crystal, a silicon carbide (SiC) single crystal, or a silicon (Si) single crystal.

  The buffer layer 60 is typically made of a nitride containing gallium (Ga) and aluminum (Al), such as GaAlN.

  The buffer layer 60 has a role of relaxing a lattice constant mismatch between the GaN epitaxial layer 80 formed on the upper portion and the single crystal substrate 20. That is, when the GaN epitaxial layer 80 is grown directly on the single crystal substrate 20 without providing the buffer layer 60, the GaN epitaxial layer 80 has a lattice constant mismatch with the single crystal substrate 20, so When the device is actually operated as a device, the injected carriers are deactivated. On the other hand, when the buffer layer 60 is installed between the single crystal substrate 20 and the GaN epitaxial layer 80, the occurrence of crystal defects in the GaN epitaxial layer 80 is significantly suppressed.

  The GaN epitaxial layer 80 is configured by epitaxially growing GaN on the buffer layer 60.

  Devices such as LEDs can be manufactured by forming various semiconductor elements and the like on the GaN semiconductor substrate 10.

However, such a configuration of the substrate 10 for GaN semiconductor has a problem that it is difficult to increase the size because the single crystal base material 20 is used. For example, the maximum diameter of the current sapphire (Al ₂ O ₃ ) single crystal substrate is currently limited to about 6 inches to 8 inches at the maximum. The silicon carbide (SiC) single crystal substrate is also about 4 inches at the maximum. Moreover, the diameter of the GaN single crystal base material currently used is only about 4 inches at maximum.

  Moreover, since such a GaN semiconductor substrate 10 has an expensive single crystal base material 20, there is a problem that it is difficult to suppress material costs and manufacturing costs. For this reason, various devices manufactured on the basis of this GaN semiconductor substrate 10 also become expensive as a result.

  Therefore, in order to deal with such problems, it is conceivable to use a quartz glass substrate instead of the single crystal substrate 20.

  However, usually, when a GaN layer is grown on a quartz glass substrate, there is a problem that the obtained GaN layer becomes a multi-oriented polycrystalline layer. Such a multi-oriented polycrystalline layer is known to have inferior characteristics as compared to an epitaxially grown layer. For example, the brightness of a light emitting diode (LED) including a polycrystalline GaN layer formed on a quartz glass substrate is higher than that of an LED configured by growing a GaN epitaxial layer on a sapphire single crystal substrate. The luminance is reduced to about 1/100 (Patent Document 1).

In addition, when a quartz glass base material is used as the base material of the GaN semiconductor substrate, the following factors can be considered as causes of the deterioration of the characteristics of the finally obtained GaN semiconductor device.
(I) Since the multi-oriented polycrystalline film has large crystal surface irregularities and the metal electrode contacts are insufficient compared to a single crystal base material, so-called contact resistance increases and current does not flow easily. turn into.
(Ii) Because of the multi-oriented polycrystalline film, the multi-oriented crystal is directed to various crystal orientations through a complicated path until the carriers injected from the metal electrode reach the light emitting region (pn junction). It must pass through grain boundaries (grain boundaries). For this reason, before the carriers reach the light emitting region, crystal defects existing at the grain boundaries are trapped by the non-light emitting centers and deactivated.

  Therefore, by changing from a multi-oriented film to a single-oriented film aligned with a specific crystal orientation in the same way as an epitaxial film, the number of grain boundaries is reduced and the luminance is improved as compared to a multi-oriented film. It is considered possible. However, the LED with this single alignment film has not yet been put into practical use, like the multi-alignment LED.

As a factor in which an LED using a quartz glass substrate has not yet been put into practical use, for example, a mismatch in thermal expansion coefficient between the quartz glass substrate and the buffer layer and the GaN layer on the buffer layer is one of the characteristics deterioration. It is considered as a cause. For example, the thermal expansion coefficient of quartz glass is approximately 0.54 × 10 ⁻⁶ / K, whereas the thermal expansion coefficient of GaN is approximately 4.6 to 5.1 × 10 ⁻⁶ / K. The thermal expansion coefficient of AlN is approximately 4.3 × 10 ⁻⁶ / K. Therefore, it is expected that the thermal expansion coefficient is greatly different between the quartz glass substrate and the buffer layer and the GaN layer. Further, during the growth of the GaN layer, the quartz glass substrate is maintained at a high temperature of 800 ° C. to 1000 ° C. For this reason, a large strain is generated between the quartz glass substrate, the buffer layer, and the GaN layer in the cooling process of the GaN layer. Such strain is expected to cause defects in the GaN layer, such as cracks and / or dislocations.

In contrast, in the present invention,
In a nitride semiconductor substrate having a base material, a buffer layer placed on top of the base material, and a nitride semiconductor layer placed on top of the buffer layer,
The substrate is made of quartz,
The buffer layer includes a nitride of gallium (Ga) and / or aluminum (Al),
The nitride semiconductor layer is composed of a nitride semiconductor containing gallium (Ga) and / or aluminum (Al),
Between the base material and the buffer layer, a stress relaxation layer is installed,
The stress relaxation layer has an amorphous layer on the side close to the substrate and a crystallized layer on the side far from the substrate, or an amorphous layer containing a crystal component on the side far from the substrate,
The stress relaxation layer is characterized by containing silicon nitride or silicon oxynitride.

  In the present invention, instead of the conventional single crystal substrate 20, a quartz substrate that is relatively inexpensive and that can be used in a relatively large area is also used. Therefore, the nitride semiconductor substrate according to the present invention can be manufactured at a relatively low cost. Further, the nitride semiconductor substrate according to the present invention can relatively easily cope with an increase in size.

In the present invention, a stress relaxation layer is provided between the quartz substrate and the buffer layer. This stress relaxation layer contains silicon nitride or silicon oxynitride. Silicon nitride and silicon oxynitride include a quartz substrate (thermal expansion coefficient: about 0.54 × 10 ⁻⁶ / K) and a buffer layer (thermal expansion coefficient of GaN: about 4.6 to 5.1 × 10 ⁻⁶ / K). K) has an intermediate thermal expansion coefficient. For example, the thermal expansion coefficient of silicon nitride (Si ₃ N ₄ ) is about 3.3 × 10 ⁻⁶ / K. Therefore, in the present invention, stress strain that can occur between the quartz substrate, the nitride semiconductor layer, and the buffer layer in the process of cooling the nitride semiconductor layer to room temperature from the time of growth can be significantly suppressed. Therefore, in the nitride semiconductor substrate according to the present invention, the occurrence of crystal defects such as cracks and / or dislocations in the nitride semiconductor layer is significantly suppressed. This also makes it possible to configure a device having desired characteristics (for example, light emission characteristics and luminance characteristics) using the nitride semiconductor substrate according to the present invention.

(Configuration of substrate for nitride semiconductor according to the present invention)
Next, the configuration of the nitride semiconductor substrate according to the present invention will be described in detail with reference to FIG.

  FIG. 2 schematically shows an example of the structure of a nitride semiconductor substrate according to the present invention.

  As shown in FIG. 2, the nitride semiconductor substrate 100 according to the present invention is configured by installing a quartz base 120, a stress relaxation layer 125, a buffer layer 160, and a nitride semiconductor layer 180 in this order.

  The quartz substrate 120 has a role of supporting each member laminated on the upper part. It should be noted that in the present invention, the quartz substrate 120 having a large area can be prepared relatively easily and inexpensively.

  The stress relaxation layer 125 includes an amorphous layer 130 and a crystallized layer 150.

The amorphous layer 130 has an amorphous phase. The crystallized layer 150 is disposed on the amorphous layer 130 and has a crystallized phase of the amorphous layer 130. In addition, the amorphous layer 130 and the crystallized layer 150 have a thermal expansion coefficient between that of quartz and that of nitrides such as gallium nitride and aluminum nitride. For example, the amorphous layer 130 and the crystallized layer 150 include silicon nitride (a coefficient of thermal expansion of about 3.3 × 10 ⁻⁶ / K) and / or silicon oxynitride.

The silicon nitride may have a composition of Si _x N _y such as Si ₃ N ₄ , for example. Here, 0 <x ≦ 1 and 0 <y ≦ 1. Further, the silicon oxynitride may have a composition of Si _x O _y N _z . Here, 0 <x ≦ 1, 0 <y ≦ 1, and 0 <z ≦ 1. In an actual film formation process, it is difficult to form a pure silicon nitride layer, and even when silicon nitride film formation is performed, the obtained layer contains some oxygen and Si _x O it should be noted that there is a tendency that a composition of _y N _z.

  The amorphous layer 130 of the stress relaxation layer 125 serves to relieve stress strain that may occur in the nitride semiconductor layer 180 due to a mismatch of thermal expansion coefficients between the quartz substrate 120, the buffer layer 160, and the nitride semiconductor layer 180. Have. That is, by placing an amorphous layer 130 having a thermal expansion coefficient intermediate between the quartz substrate 120 and the buffer layer 160, the nitride semiconductor layer 180 is grown and in the subsequent cooling process, etc. The problem that a large number of defects are formed in the nitride semiconductor layer 180 due to stress strain that may occur in the nitride semiconductor layer 180, and further, the characteristics (for example, luminance) of the nitride semiconductor layer 180 deteriorates. It becomes possible to avoid the problem of end.

  The crystallized layer 150 of the stress relaxation layer 125 has a role of crystal-growing a single-orientated nitride semiconductor layer 180 on the amorphous layer 130 via the buffer layer 160 via a buffer layer 160. That is, when the crystallized layer 150 does not exist, the multi-orientation occurs when the buffer layer 160 is interposed on the amorphous layer 130, and it is extremely difficult to form the single-orientated nitride semiconductor layer 180. However, in the present invention, since the stress relaxation layer 125 has the crystallized layer 150 crystallized on the surface, the nitride semiconductor layer 180 that is mono-oriented via the buffer layer 160 is formed on the stress relaxation layer 125. It can be formed properly.

  The stress relaxation layer 125 (the amorphous layer 130 and the crystallized layer 150) may contain various metal compounds in addition to silicon nitride and / or silicon oxynitride. Such metal compounds include tantalum (Ta), molybdenum (Mo), and / or iridium (Ir).

  As will be described later, the stress relaxation layer 125 is obtained by, for example, forming an amorphous layer 130 of silicon nitride and / or silicon oxynitride on the quartz substrate 120 by a film forming method such as sputtering, and then obtaining the amorphous layer. The surface 130 is formed by performing plasma nitriding treatment. By the plasma nitriding treatment, the surface of the amorphous layer 130 is crystallized, and a crystallized layer 150 of silicon nitride and / or silicon oxynitride can be formed on the amorphous layer 130.

  The buffer layer 160 is made of a nitride containing gallium (Ga) and aluminum (Al), such as GaAlN, like the buffer layer 60 of the conventional GaN semiconductor substrate 10. The buffer layer 160 has a role of relaxing a lattice constant mismatch between the nitride semiconductor layer 180 and the crystallized layer 150 formed thereon.

The nitride semiconductor layer 180 is a nitride layer containing Ga, such as GaN of the conventional GaN semiconductor substrate 10. Specifically, it is a nitride containing an element similar to Ga, for example, a nitride semiconductor containing gallium (Ga), aluminum (Al), and indium (In). These are nitrides that can be generally represented by Ga _X Al _1-X N (0 ≦ X ≦ 1), Ga _X In _1-X N (0 ≦ X ≦ 1) or the like in the chemical formula. Here, Ga _X Al _Y In _(1-XY) N (0 ≦ X ≦ 1, 0 ≦ Y ≦ 1), which is a mixed crystal system thereof, may also be used. Here, when the nitride semiconductor layer 180 includes Al, the band gap of the semiconductor becomes wider than that of Ga, and thus light emission is shifted to the ultraviolet region. In addition, when the nitride semiconductor layer 180 contains In, the band gap becomes narrower, so that the semiconductor substrate including such a nitride semiconductor layer 180 emits light in the blue or green visible light region. Can be used as a device.

  As described above, in the nitride semiconductor substrate 100 according to the present invention, the stress relaxation layer 125 is provided between the quartz substrate 120 and the buffer layer 160. For this reason, in the present invention, stress strain that may occur between the quartz substrate 120 and the nitride semiconductor layer 180 and the buffer layer 160 in the process of growing the nitride semiconductor layer 180 or cooling from the growth process to room temperature. Can be significantly suppressed. Thereby, the occurrence of crystal defects such as cracks and / or dislocations in the nitride semiconductor layer 180 is significantly suppressed.

(Another nitride semiconductor substrate according to the present invention)
Next, another nitride semiconductor substrate according to the present invention will be described with reference to FIG.

  FIG. 3 schematically shows an example of the configuration of another nitride semiconductor substrate 200 according to the present invention.

  As shown in FIG. 3, the nitride semiconductor substrate 200 basically has the same configuration as the nitride semiconductor substrate 100 shown in FIG. Therefore, in FIG. 3, members corresponding to those in FIG. 2 are given reference numerals obtained by adding 100 to the reference numerals of the members in FIG. 2.

  However, the nitride semiconductor substrate 200 is different from the nitride semiconductor substrate 100 shown in FIG. 2 in that the stress relaxation layer 225, that is, the amorphous layer 230 and the crystallization layer 250 are at least penetrating the stress relaxation layer 225. One through groove 255 is provided.

  Such through-grooves 255 are formed when the nitride semiconductor substrate 200 is subjected to stress, such as when the nitride semiconductor substrate 200 is cooled to room temperature after the GaN layer 280 is formed. It has a function of relaxing in the direction perpendicular to the growth direction of the film, that is, in the left-right direction in the figure. Therefore, the nitride semiconductor substrate 200 shown in FIG. 3 can suppress the stress strain generated inside more effectively than the nitride semiconductor substrate 100 shown in FIG. Also, this can suppress the introduction of defects into the nitride semiconductor layer 280.

  The pattern form of the through groove 255 is not particularly limited. The through groove 255 may be, for example, a stripe-shaped groove extending in the first direction, or a lattice shape (square shape, rectangular shape, rhombus shape) extending in the first and second directions. Etc.). Further, the through groove 255 may have other forms.

  The width of the through groove 255 is not particularly limited, but the width may be, for example, in the range of 4 μm to 200 μm. Further, the stress relaxation layer 225 divided by the through groove 255 may have a dimension in the range of 4 μm to 5 mm in length and width, for example.

(Still another nitride semiconductor substrate according to the present invention)
Next, still another nitride semiconductor substrate according to the present invention will be described with reference to FIG.

  FIG. 4 schematically shows an example of the configuration of another nitride semiconductor substrate 300 according to the present invention.

  As shown in FIG. 4, this nitride semiconductor substrate 300 basically has the same configuration as nitride semiconductor substrate 100 shown in FIG. 2. Therefore, in FIG. 4, members corresponding to those in FIG. 2 are given reference numerals obtained by adding 200 to the reference numerals of the members in FIG. 2.

  However, unlike the nitride semiconductor substrate 100 shown in FIG. 2, the nitride semiconductor substrate 300 has at least one groove 356 extending from the upper surface of the stress relaxation layer 325 to the inside of the quartz base material 320. .

  Similar to the through-groove 255 provided in the nitride semiconductor substrate 200 described above, the groove 356 causes the stress to be applied to the growth direction of the film when the nitride semiconductor substrate 300 is subjected to stress strain. And has a function of relaxing in the vertical direction, that is, in the horizontal direction of the figure. Therefore, in the nitride semiconductor substrate 300 shown in FIG. 4 as well, similar to the nitride semiconductor substrate 200 shown in FIG. 3, the stress strain generated inside the nitride semiconductor substrate 300 can be suppressed. Further, this can suppress the introduction of defects into the nitride semiconductor layer 380.

  In the example of FIG. 4, the width of the groove 356 is different between the stress relaxation layer 325 and the quartz substrate 320. However, this is merely an example, and the width of the groove 356 may be equal between the stress relaxation layer 325 and the quartz substrate 320. However, when the groove 356 is formed by etching the stress relaxation layer 325 and the quartz substrate 320, the width between the stress relaxation layer 325 and the quartz substrate 320 as shown in FIG. Tend to produce differently shaped grooves 356.

(Manufacturing method of a nitride semiconductor substrate according to the present invention)
Next, an example of a method for manufacturing the nitride semiconductor substrate 100 according to the present invention having the above-described configuration will be described. The following description is merely an example of a method for manufacturing the nitride semiconductor substrate 100, and it is understood by those skilled in the art that the nitride semiconductor substrate 100 according to the present invention may be manufactured by another manufacturing method. it is obvious.

FIG. 5 schematically shows a flow of a method for manufacturing a nitride semiconductor substrate according to the present invention. As shown in FIG. 5, a method for manufacturing a nitride semiconductor substrate according to the present invention includes:
(A) preparing a quartz substrate (step S110);
(B) installing an amorphous layer containing silicon nitride or silicon oxynitride on the substrate (step S120);
(C) crystallizing the surface of the amorphous layer to form a crystallized layer (step S130);
(D) installing a buffer layer containing a nitride of gallium (Ga) and / or aluminum (Al) on the crystallized layer (step S140);
(E) growing a nitride semiconductor layer containing gallium (Ga) and / or aluminum (Al) on the buffer layer (step S150);
Have Hereinafter, each step will be described in detail.

(Step S110)
First, a quartz substrate is prepared. The thickness of the quartz substrate is not particularly limited, and may be, for example, in the range of 0.1 mm to 10 mm. In the present invention, it should be noted that a quartz substrate having a large area can be prepared relatively easily and inexpensively.

(Step S120)
Next, an amorphous layer containing silicon nitride or silicon oxynitride is placed on the quartz substrate. The installation method of the amorphous layer is not particularly limited. For example, the amorphous layer may be installed by applying a normal film formation method such as a sputtering method or a chemical vapor deposition (CVD) method. In particular, in the sputtering method, amorphous silicon nitride or silicon oxynitride can be formed in a relatively low temperature range such as room temperature to 100 ° C.

As described above, it is difficult to form a pure silicon nitride layer in an actual film formation process, and even when silicon nitride film formation is performed, the obtained layer has a certain amount of oxygen. It should be noted that the composition tends to include Si _x O _y N _z .

  Although the thickness of an amorphous layer is not specifically limited, For example, the range of 0.1 micrometer-10 micrometers may be sufficient.

(Step S130)
Next, a crystallization process is performed on the surface of the amorphous layer formed in step S120 described above to form a crystallized layer. This crystallized layer may not be completely crystallized, and part of the crystallized layer may contain an amorphous layer or fine crystals of about 1 nm to 10 nm in the amorphous layer.

  The crystallization process may be formed, for example, by performing a plasma nitriding process on the surface of the amorphous layer. By the plasma nitriding treatment, the upper surface of the amorphous layer is crystallized, and a crystallized layer of silicon nitride and / or silicon oxynitride can be formed. Similarly, the surface of the amorphous layer may be irradiated by an electron cyclotron resonance (ECR) apparatus. Alternatively, the crystallization process may be formed by performing a laser annealing process on the surface of the amorphous layer.

  The thickness of the crystallized layer is not particularly limited, but may be in the range of 1 nm to 500 nm, for example.

  When the through groove 255 as shown in FIG. 3 or the groove 356 as shown in FIG. 4 is formed in the stress relaxation layer (and the quartz substrate), the stress relaxation layer may be patterned at this stage. . The pattern processing method is not particularly limited, and the through groove 255 or the groove 356 may be formed by using a conventional etching process using a mask or the like.

(Step S140)
Next, a buffer layer containing GaN and / or AlN is provided on the crystallization layer.

  The buffer layer is formed by a general film formation method such as a CVD method. The temperature at the time of film formation is, for example, about 400 ° C to 500 ° C.

  The thickness of the buffer layer is not particularly limited, but may be in the range of 0.1 μm to 10 μm, for example.

(Step S150)
Next, a nitride semiconductor layer containing GaN and / or AlN is formed on the buffer layer.

  The nitride semiconductor layer is formed by a general film forming method such as a molecular beam epitaxy (MBE) method, a metal organic vapor phase epitaxy (MOVPE) method, or a halide vapor phase epitaxy (HVPE) method. The temperature at the time of film formation is, for example, about 800 ° C. to 1000 ° C.

  As described above, in the present invention, a stress relaxation layer having a thermal expansion coefficient intermediate between the quartz base material and the buffer layer is provided. Therefore, even when the temperature of the base material is heated to 800 ° C. to 1000 ° C. during the nitride semiconductor layer film forming process, and then cooled, large stress strain is generated in the buffer layer and the nitride semiconductor layer. Occurrence is significantly suppressed. Therefore, in the present invention, a nitride semiconductor layer having few characteristics such as fine cracks and significant characteristics can be formed.

  The thickness of the nitride semiconductor layer is not particularly limited, but may be in the range of 0.5 μm to 10 μm, for example.

  Through the above steps, the nitride semiconductor substrate according to the present invention can be manufactured.

  Next, examples of the present invention will be described.

Example 1
A nitride semiconductor substrate according to Example 1 was manufactured by the following method.

  First, a quartz substrate (diameter 3 inches φ, thickness 0.7 mm) was prepared.

  Next, a silicon nitride layer was formed on one surface of the quartz substrate. For the formation of the silicon nitride layer, a silicon nitride layer was formed by sputtering at room temperature using a sputtering apparatus (CFS-4EP, manufactured by Shibaura Eletech Corporation). The thickness of the silicon nitride layer is about 1 μm. In addition, when the layer state of the silicon nitride layer was analyzed by an X-ray diffractometer (SmartLab, manufactured by Rigaku) after film formation, it was confirmed that this layer was in an amorphous state.

  Next, a nitriding plasma treatment was performed on the amorphous silicon nitride layer. The nitriding plasma treatment was performed at 900 ° C. using an apparatus EPI-RFS-450 manufactured by Veeco. During processing, the inside of the chamber was kept in a vacuum state.

  As a result, a crystallized layer of silicon nitride having a thickness of about 250 nm (observed by TEM) was formed on the amorphous silicon nitride layer.

Next, a GaAlN buffer layer was placed on the silicon nitride crystallized layer. The buffer layer
It was formed by a molecular beam epitaxy (MBE) method (RC3100SRAN, manufactured by EpiQuest). The thickness was about 80 nm.

  Next, a gallium nitride layer was grown on the buffer layer. For the growth of the gallium nitride layer, a molecular beam epitaxy (MBE) method (RC3100SRAN, manufactured by EpiQuest) was used. Thereby, a gallium nitride layer having a thickness of about 0.9 μm was formed.

  Through the above steps, a nitride semiconductor substrate according to Example 1 (hereinafter referred to as “sample according to Example 1”) was obtained.

(Comparative Example 1)
First, as in Example 1, a quartz substrate (diameter 3 inches φ, thickness 0.7 mm) was prepared.

  Next, without forming a silicon nitride layer as in Example 1, a nitriding plasma treatment was performed directly on the quartz substrate. The nitriding plasma treatment was performed at 900 ° C. using an apparatus EPI-RFS-450 manufactured by Veeco. During processing, the inside of the chamber was kept in a vacuum state. The conditions for this nitriding plasma treatment are the same as in the first embodiment.

  As a result, an extremely thin silicon nitride crystallized layer of about 1 nm to 5 nm was formed on the quartz substrate.

  Next, a GaAlN buffer layer was placed on the silicon nitride crystallized layer. The buffer layer was formed by a molecular beam epitaxy (MBE) method (RC3100SRAN, manufactured by Epiquest Corporation). The thickness was about 80 nm. The production conditions for this buffer layer are also the same as those in Example 1.

  Next, a gallium nitride layer was grown on the buffer layer. For the growth of the gallium nitride layer, a molecular beam epitaxy (MBE) method (RC3100SRAN, manufactured by EpiQuest) was used. Thereby, a gallium nitride layer having a thickness of about 0.9 μm was formed. The conditions for producing this gallium nitride layer are the same as in Example 1.

  Through the above steps, a nitride semiconductor substrate according to Comparative Example 1 (hereinafter referred to as “sample according to Comparative Example 1”) was obtained.

(Comparative Example 2)
A nitride semiconductor substrate according to Comparative Example 2 was manufactured by the following method.

  First, a sapphire single crystal substrate (diameter 10 mmφ, thickness 0.5 mm) was prepared.

  Next, as in the case of Comparative Example 1, a nitriding plasma treatment was performed on the sapphire substrate. The nitriding plasma treatment was performed at 900 ° C. using an apparatus EPI-RFS-450 manufactured by Veeco. During processing, the inside of the chamber was kept in a vacuum state. The conditions for this nitriding plasma treatment are the same as in Comparative Example 1.

  Next, a buffer layer of GaAlN was installed on one surface of the single crystal substrate by the same method as in Example 1. The buffer layer was about 80 nm thick.

  Next, an epitaxial layer of gallium nitride was grown on the buffer layer by the same method as in the previous embodiment. The thickness of the epitaxial layer was about 1.1 μm.

  The nitride semiconductor substrate according to Comparative Example 2 (hereinafter referred to as “sample according to Comparative Example 2”) was obtained through the above steps.

(Evaluation)
Using the samples according to Example 1, Comparative Example 1, and Comparative Example 2, surface X-ray diffraction analysis was performed.

  FIGS. 6A, 6B, and 6C show the X-ray diffraction patterns of the samples according to Example 1, Comparative Example 1, and Comparative Example 2, respectively. As shown in FIG. 6A, in the sample according to Example 1, a sharp peak having a main orientation of (0002) of gallium nitride is observed at a position where 2θ is around 34 °. Further, a minute peak having a main orientation of (0004) of gallium nitride is observed at a position where 2θ is around 73 °. Since (0002) and (0004) have the same orientation, it can be said that the sample according to Example 1 has a single orientation.

  Further, as can be seen from FIG. 6 (b), in the sample according to Comparative Example 1 as well, a sharp peak having (0002) as the main orientation of gallium nitride is recognized at a position where 2θ is around 34 °, A minute peak having a main orientation of (0004) of gallium nitride is observed at a position where 2θ is around 73 °. Also in Comparative Example 2, a peak is observed at the same position. Since (0002) and (0004) have the same orientation, in Comparative Example 1 and Comparative Example 2, the sample has a single orientation.

  Thus, even in the sample according to Example 1 using the quartz base material, (0002) and (0004) are in the same orientation, so in Comparative Example 2 configured using a conventional single crystal base material. As with the sample, it was confirmed that a gallium nitride layer having a single orientation was formed. In addition, since the half width of the peak having (0002) as the main orientation in the sample according to Example 1 is substantially equal to that of the sample according to Comparative Example 2, the gallium nitride layer has dislocations, cracks, and the like. It is expected that the crystal defects are extremely small.

  In FIG. 7, the emission spectrum (solid line) obtained in the sample which concerns on Example 1 is shown. This figure shows the relationship between photon energy (horizontal axis) and emission intensity (vertical axis) in the emission spectrum obtained when the sample according to Example 1 was irradiated with ultraviolet rays at room temperature.

  On the other hand, FIG. 7 also shows an emission spectrum (dotted line) when the sample according to Comparative Example 1 is irradiated with ultraviolet rays at room temperature.

  As is clear from the solid line in FIG. 7, the obtained emission peak is at a position of about 3.40 eV, and this value is a value of a nitride semiconductor substrate having a conventional sapphire single crystal substrate. It is close to about 3.426 eV. Further, in the sample according to Example 1, the half width of the spectrum was about 108 meV. This value is close to the half width (75 meV) reported for a nitride semiconductor substrate having a sapphire single crystal substrate.

  On the other hand, as shown in FIG. 6B, also in Comparative Example 1, the surface of the quartz substrate was directly subjected to the nitrogen plasma treatment, and therefore, from a single orientation having (0002) as the main orientation. A gallium nitride layer is obtained. However, as is apparent from the dotted line in FIG. 7, the emission peak is at a position of 3.38 eV, which is located on the lower energy side as compared with the peak position of Example 1. Moreover, the half width of the emission peak was also 130 meV. This half-value width is larger than the half-value width of the first embodiment. As a result, it is possible to grow a single-oriented gallium nitride thin film only by directly plasma-treating the surface of the quartz substrate, but only the extreme surface (2 to 5 nm) of the quartz substrate can be nitrided. This indicates that the growth layer does not function as a stress relaxation layer.

  Thus, the nitride semiconductor substrate according to the present invention (sample according to Example 1) is inferior to the conventional nitride semiconductor substrate having a single crystal base material (sample according to Comparative Example 2). It was confirmed that the light emission characteristic was exhibited.

  The present invention can be used, for example, as a substrate for a light emitting diode (LED), a substrate for a semiconductor laser element, and a substrate for various other light emitting elements.

DESCRIPTION OF SYMBOLS 10 Conventional substrate for GaN semiconductor 20 Single crystal substrate 60 Buffer layer 80 GaN epitaxial layer 100 Substrate for nitride semiconductor according to the present invention 120 Quartz substrate 125 Stress relaxation layer 130 Amorphous layer 150 Crystallized layer 160 Buffer layer 180 Nitride semiconductor Layer 200 Another nitride semiconductor substrate according to the present invention 220 Quartz substrate 225 Stress relaxation layer 230 Amorphous layer 250 Crystallized layer 255 Through groove 260 Buffer layer 280 Nitride semiconductor layer 300 Still another nitride semiconductor substrate according to the present invention 320 Quartz substrate 325 Stress relaxation layer 330 Amorphous layer 350 Crystallized layer 356 Groove 360 Buffer layer 380 Nitride semiconductor layer

Claims (9)

A nitride semiconductor substrate having a base material, a buffer layer placed on top of the base material, and a nitride semiconductor layer placed on top of the buffer layer,
The substrate is made of quartz,
The buffer layer includes a nitride of gallium (Ga) and / or aluminum (Al),
The nitride semiconductor layer is composed of a nitride semiconductor containing gallium (Ga) and / or aluminum (Al),
Between the base material and the buffer layer, a stress relaxation layer is installed,
The stress relaxation layer has an amorphous layer on the side close to the substrate and a crystallized layer on the side far from the substrate, or an amorphous layer containing a crystal component on the side far from the substrate,
The substrate for a nitride semiconductor, wherein the stress relaxation layer contains silicon nitride or silicon oxynitride.   2. The nitride semiconductor according to claim 1, wherein the stress relaxation layer includes one or a plurality of through grooves, and the stress relaxation layer is separated into a plurality of islands by the through grooves. Substrate.   The nitride semiconductor substrate according to claim 2, wherein the through groove is a substantially striped groove or a substantially lattice-shaped groove.   4. The nitride semiconductor substrate according to claim 2, wherein the base has a recess corresponding to a through groove of the stress relaxation layer. 5. A method for producing a nitride semiconductor substrate, comprising: a base material; a buffer layer disposed on the base material; and a nitride semiconductor layer disposed on the buffer layer,
(A) preparing a quartz substrate;
(B) installing an amorphous layer containing silicon nitride or silicon oxynitride on the substrate;
(C) crystallizing the surface of the amorphous layer to form a crystallized layer;
(D) installing a buffer layer containing a nitride of gallium (Ga) and / or aluminum (Al) on the crystallized layer;
(E) growing a nitride semiconductor layer containing gallium (Ga) and / or aluminum (Al) on the buffer layer;
A method for producing a nitride semiconductor substrate, comprising:   The step (b) is performed by a sputtering method of silicon nitride or silicon oxynitride in a state where the base material is maintained at a temperature in a range of room temperature to 400 ° C. Production method.   The method according to claim 5, wherein the step (c) is performed by subjecting the amorphous layer to a plasma nitriding treatment, a microwave irradiation treatment, or a laser annealing treatment. Between the step (c) and the step (d),
(C ') The manufacturing method according to any one of claims 5 to 7, further comprising a step of forming one or a plurality of through grooves in the amorphous layer and the crystallized layer.   The manufacturing method according to claim 8, wherein at least one of the through grooves formed in the step (c ′) reaches the inside of the base material.

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