JP2012208184A - Liquid crystal display element and manufacturing method for the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a liquid crystal panel that can secure the contrast by reducing the unevenness of a pixel electrode without increasing the manufacturing cost.SOLUTION: A liquid crystal panel 11 includes an array substrate 12. The array substrate 12 includes an insulation layer 21. The array substrate 12 includes a plurality of thin film transistors 24 on a side of the insulation layer 21 that is opposite to the liquid crystal layer 14. The array substrate 12 includes a support layer 27 that covers the thin film transistors 24. The array substrate 12 includes a plurality of pixel electrodes 29 that are driven by the thin film transistors 24 at a position of the insulation layer 21 that is opposite to the thin film transistors 24.

Description

  Embodiments described herein relate generally to a liquid crystal display element in which a liquid crystal layer is interposed between an array substrate and a counter substrate, and a method for manufacturing the same.

  Conventionally, liquid crystal display devices are widely used as flat display devices, that is, flat panel displays (FPDs). For example, a transmissive liquid crystal display device includes a liquid crystal panel that is a liquid crystal display element, and a backlight that irradiates planar light on the back side of the liquid crystal panel. The liquid crystal panel is configured by interposing a liquid crystal layer, which is a light modulation layer, between an array substrate and a counter substrate.

  The array substrate has a plurality of wiring lines (scanning lines and signal lines) formed vertically and horizontally on one main surface on the liquid crystal layer side of a transparent glass substrate, and switching elements corresponding to the positions where these lines intersect The thin film transistors (TFTs) are formed in a matrix, and an insulating layer is formed so as to cover the thin film transistors. A pixel is formed across the contact hole formed on the insulating layer at a position corresponding to each thin film transistor and the insulating layer. The pixel electrode, which is a transparent electrode constituting the, is formed in layers. A polarizing plate is attached to the other main surface of the glass substrate.

  On the other hand, in the counter substrate, a counter electrode common to each pixel is formed on one main surface of the transparent glass substrate on the liquid crystal layer side. A polarizing plate is attached to the other main surface of the glass substrate.

  When a voltage is applied to the pixel electrode through the thin film transistor switched by a signal from the wiring, the liquid crystal material constituting the liquid crystal layer is irradiated from the backlight according to the voltage applied to the pixel electrode. The polarization plane of the light passing through the polarizing plate on the array substrate side is rotated. In accordance with the polarization angle of the light whose polarization plane has been rotated, the ratio of light transmitted through the polarizing plate on the counter substrate side, that is, the light transmittance is determined. Therefore, in the liquid crystal panel, an image is displayed by changing the potential of the pixel electrode for each location by each thin film transistor.

  In such a liquid crystal panel, unevenness on the surface of the pixel electrode causes a decrease in contrast. This is because the alignment of the liquid crystal material is disturbed by the electric field disturbance due to the unevenness of the surface of the pixel electrode. Therefore, a configuration in which the unevenness of the pixel electrode is reduced by applying a flattening material such as acrylic resin to the portion of the array substrate that becomes the base of the pixel electrode and baking it to form a flattened layer is known. .

JP 2006-133791 A

  When a planarization layer is formed as in the configuration described in Patent Document 1, the effect of reducing the unevenness of the pixel electrode is further increased by increasing the thickness of the planarization layer. However, since a contact hole which is an opening for conducting the pixel electrode and the thin film transistor has to be formed in the planarization layer, there is a limit to increasing the thickness of the planarization layer. On the other hand, after forming the planarizing layer, it may be possible to improve the planarity by polishing, but in this case, the manufacturing cost increases as the number of processes increases.

  The problem to be solved by the present invention is to provide a liquid crystal display element capable of ensuring the contrast by reducing the unevenness of the pixel electrode without increasing the manufacturing cost, and a manufacturing method thereof.

  The liquid crystal display element of the embodiment has an array substrate. In addition, the liquid crystal display element has a counter substrate disposed to face the array substrate. Further, this liquid crystal display element has a liquid crystal layer interposed between the array substrate and the counter substrate. The array substrate includes an insulating layer. The array substrate includes a plurality of switching elements arranged on the opposite side of the liquid crystal layer of the insulating layer. Furthermore, the array substrate includes a support layer that covers the switching elements. The array substrate includes a plurality of pixel electrodes which are provided at positions opposite to the respective switching elements with respect to the insulating layer, and are electrically connected to and driven by these switching elements.

It is sectional drawing which expands and shows typically a part of liquid crystal display element of one Embodiment. It is sectional drawing which expands and shows typically the manufacturing method of a liquid crystal display element same as the above. It is sectional drawing which expands and shows typically the state following FIG. 2 of the manufacturing method of a liquid crystal display element same as the above. It is sectional drawing which expands and shows typically the state following FIG. 3 of the manufacturing method of a liquid crystal display element same as the above. It is sectional drawing which expands and shows typically the state following FIG. 4 of the manufacturing method of a liquid crystal display element same as the above. It is sectional drawing which expands and shows typically the state following FIG. 5 of the manufacturing method of a liquid crystal display element same as the above. It is sectional drawing which expands and shows typically the state following FIG. 6 of the manufacturing method of a liquid crystal display element same as the above.

  The configuration of one embodiment will be described below with reference to FIGS.

  In FIG. 1, reference numeral 11 denotes a liquid crystal panel which is a flat display element as a liquid crystal display element. The liquid crystal panel 11 is a transmissive active matrix that displays an image by transmitting planar light from a backlight (not shown), for example. Type LCD panel.

  That is, in the liquid crystal panel 11, a square array substrate 12 and a square counter substrate 13 are arranged to face each other through a predetermined gap (cell gap) with the counter substrate 13 as a display side. A liquid crystal layer 14 is interposed between 12 and 13, and a spacer (not shown) that holds a gap between the substrates 12 and 13, and the display side of the array substrate 12 (the side opposite to the liquid crystal layer 14) and the back surface of the counter substrate 13 A polarizing plate (not shown) is attached to the side (the side opposite to the liquid crystal layer 14), and an active area that displays an image in which a plurality of pixels 18 are arranged in a matrix, for example, a display area is formed in a square shape, for example. Has been.

  The array substrate 12 includes an insulating layer 21, a gate insulating film 22 as a first insulating film formed on the insulating layer 21, and an interlayer insulating film 23 as a second insulating film formed on the gate insulating film 22. A plurality of thin film transistors (TFTs) 24 as switching elements arranged in a matrix corresponding to the plurality of pixels 18 at positions corresponding to the display area on the insulating layer 21 and a plane corresponding to the display area A plurality of scanning lines and signal lines (not shown) that are formed in a lattice shape and are electrically connected to each thin film transistor 24, and a support layer 27 that is formed on the interlayer insulating film 23 so as to cover all the thin film transistors 24, and is insulated A light shielding layer 28 formed on the opposite side of the thin film transistor 24 with respect to the layer 21 and a pixel electrode 29 constituting each pixel 18, and an orientation (not shown) formed on the insulating layer 21 covering the light shielding layer 28 and the pixel electrode 29 With membrane To have. Further, on the array substrate 12, for example, a driver circuit (not shown) which is a drive circuit for driving each thin film transistor 24 that is electrically connected to an external circuit on the insulating layer 21 has a frame shape outside the display region ( It is arranged corresponding to a non-display area formed in a rectangular frame shape.

  The insulating layer 21 is also called an undercoat layer, and is a thin film formed of an insulating member such as silicon monoxide (SiO), for example, and is positioned on the liquid crystal layer 14 side of the array substrate 12. In the present embodiment, the insulating layer 21 is formed with a film thickness of, for example, 300 nm.

  The gate insulating film 22 is a thin film formed of an insulating member such as silicon monoxide (SiO). In the present embodiment, the gate insulating film 22 is formed to a thickness of, for example, 80 nm.

  The interlayer insulating film 23 is a thin film formed of an insulating member such as silicon oxynitride (SiON). In the present embodiment, the interlayer insulating film 23 is formed to a thickness of 600 nm, for example.

  In the present embodiment, each thin film transistor 24 is, for example, a top-gate P-type polysilicon (p-Si) thin film transistor, and includes a semiconductor layer 31 located on the main surface 21a of the insulating layer 21, a gate insulating film 22 and the like. A gate electrode 32 that is a control electrode that is insulated from the semiconductor layer 31 via the interlayer insulating film 23 and is located on the gate electrode 32 that is insulated from the gate electrode 32 via the interlayer insulating film 23 It has a source electrode 33 that is an insulated signal electrode and a drain electrode 34 that is a drive electrode. The thin film transistors 24 are arranged corresponding to the intersections between the scanning lines and the signal lines.

  The semiconductor layer 31 is formed in, for example, an island shape using polysilicon, and includes a channel region 31C corresponding to the gate electrode 32, a source region 31S electrically connected to the source electrode 33, and a drain electrode 34. Connected drain region 31D.

  The gate electrode 32 is electrically connected to the scanning line, for example, protrudes from a part of the scanning line, and intersects the semiconductor layer 31 in plan view. The gate electrode 32 is formed of a conductive member (alloy) such as molybdenum tungsten (MoW). The gate electrode 32 is formed integrally with the scanning line, for example, by patterning the same member as the scanning line in the same process.

  Further, the source electrode 33 is disposed at a position on one side avoiding the position directly above the gate electrode 32, and is electrically connected to the signal line. The source electrode 33 is formed by sequentially laminating titanium (Ti), aluminum (Al), and titanium, which are conductive members, for example, and covers the contact hole 36 formed across the gate insulating film 22 and the interlayer insulating film 23. By being formed, the source region 31S of the semiconductor layer 31 is electrically connected.

  In addition, the drain electrode 34 is disposed at a position on the other side avoiding the position directly above the gate electrode 32. The drain electrode 34 is formed, for example, by sequentially laminating titanium, aluminum, and titanium, which are conductive members, and covering the contact hole 37 formed across the gate insulating film 22 and the interlayer insulating film 23. The drain region 31D of the semiconductor layer 31 is electrically connected. The drain electrode 34 is formed, for example, by patterning the same member as the source electrode 33 in the same process.

  Each scanning line switches each thin film transistor 24 located in the same row by applying a scanning signal from the driver circuit to the gate electrode 32 of each thin film transistor 24 located in the same row.

  Each signal line applies an image signal from the driver circuit to the source electrode 33 of each thin film transistor 24 located in the same column.

  The support layer 27 is a resin layer formed of a member having flexibility (elasticity) and translucency, such as acrylic resin, and is positioned on the opposite side of the liquid crystal layer 14 with respect to the insulating layer 21. Yes. In the present embodiment, the support layer 27 is formed to a thickness of 20 μm, for example. The main surface of the support layer 27 opposite to the interlayer insulating film 23 (upper side in FIG. 1) does not affect the display characteristics of the liquid crystal panel 11 even if it is not flat. May be flattened.

  Further, each light shielding layer 28 is also called a black matrix or the like, and prevents light from the backlight from passing from each thin film transistor 24 to the display side by shielding part of the display side of each thin film transistor 24. belongs to. These light shielding layers 28 are formed of a member such as molybdenum (Mo), for example, and are formed on the opposite side of each thin film transistor 24 with respect to the insulating layer 21, that is, on the main surface 21b of the insulating layer 21 on the liquid crystal layer 14 side. Has been. Further, these light shielding layers 28 are arranged in, for example, substantially parallel to the respective signal lines, are formed in a continuous shape between the respective thin film transistors 24 located in the same column, and have a stripe shape over the entire display region. ing.

  Each pixel electrode 29 covers the contact hole 41 formed in the insulating layer 21 with a light-transmitting and conductive member (alloy) such as indium tin oxide (ITO), for example. It is formed in a film shape on the main surface 21b, is electrically connected to the drain region 31D of the semiconductor layer 31 of each thin film transistor 24, and is electrically connected to the drain electrode. Further, each pixel electrode 29 is formed to have a film thickness substantially equal to that of each light shielding layer 28. In the present embodiment, the pixel electrode 29 has a film thickness of, for example, 50 nm.

  On the other hand, the counter substrate 13 is formed by covering the counter electrode 46 with an insulating substrate 45 having insulating properties and translucency, a counter electrode 46 which is a common electrode formed on the insulating substrate 45, and the counter electrode 46. And an alignment film (not shown).

  The insulating substrate 45 is, for example, a glass substrate or a flexible (elastic) resin substrate.

  The counter electrode 46 sets a common ground potential for each thin film transistor 24. For example, at least a display region is formed in a film shape with a light-transmitting and conductive member (alloy) such as indium tin oxide. Has been. Further, these counter electrodes 46 are electrically connected to the array substrate 12 side via transfer electrodes (not shown) in the non-display area.

  Further, the liquid crystal layer 14 is disposed between the alignment film on the array substrate 12 side and the alignment film on the counter substrate 13 side, and the liquid crystal material 48 constituting the liquid crystal layer 14 is controlled in alignment by these alignment films. Yes. The liquid crystal material 48 rotates the polarization plane of light irradiated from the backlight and passed through the polarizing plate on the array substrate 12 side in accordance with the voltage applied to each pixel electrode 29.

  The liquid crystal panel 11 can perform color display by providing a color layer (color filter layer) corresponding to each pixel 18 on the display side (liquid crystal layer 14) side of the array substrate 12 or the counter substrate 13 or the like. .

  Next, a method for manufacturing the liquid crystal panel 11 according to the embodiment will be described.

  First, as shown in FIG. 2, the separation layer 52 is formed on the substrate 51 with a film thickness of, for example, 50 nm using molybdenum or the like, for example. The separation layer 52 is for improving the separation between the substrate 51 and each layer in a subsequent process.

  Next, as illustrated in FIG. 3, the insulating layer 21 is formed with a film thickness of, for example, 300 nm on the separation layer 52 by using, for example, a plasma CVD method or the like using silicon monoxide or the like.

  Furthermore, after forming an amorphous silicon film (a-Si) with a film thickness of, for example, 50 nm using, for example, a plasma CVD method, dehydrogenation annealing is performed, for example, at 450 ° C. for 30 minutes, and an excimer laser beam is irradiated to form an amorphous film. The silicon film is polycrystallized to form a polysilicon film. Further, after a predetermined photoresist pattern is formed on the polysilicon film, dry etching or the like is performed to etch the polysilicon film into a predetermined shape and remove the photoresist pattern.

  Next, the gate insulating film 22 is formed to a thickness of, for example, 80 nm on the main surface 21a of the insulating layer 21 by using, for example, a plasma CVD method or the like on the main surface 21a of the insulating layer 21 with silicon monoxide or the like.

  In addition, a conductive film is formed using molybdenum tungsten or the like by a sputtering method, and after a predetermined photoresist pattern is formed on the conductive film, dry etching or the like is performed to etch the conductive film into a predetermined shape. Then, the scanning line and the gate electrode 32 are integrally formed by removing the photoresist pattern.

  Further, using the gate electrode 32 as a mask, impurities are implanted into the polysilicon film, and the polysilicon film is used as a semiconductor layer 31 having a channel region 31C, a source region 31S, and a drain region 31D.

  Thereafter, an interlayer insulating film 23 is formed with a film thickness of, for example, 600 nm on the gate insulating film 22 by using, for example, a plasma CVD method or the like by using silicon oxynitride or the like so as to cover the gate electrode 32.

  Further, after a predetermined photoresist pattern is formed on the interlayer insulating film 23, dry etching or the like is performed to penetrate the interlayer insulating film 23 and the gate insulating film 22 to the source region 31S and the drain region 31D of the semiconductor layer 31. Contact holes 36 and 37 are then formed, and the photoresist pattern is removed. Further, a three-layer film of, for example, titanium, aluminum and titanium is formed so as to cover these contact holes 36 and 37, a predetermined photoresist pattern is formed on the three-layer film, and then dry etching or the like is performed to form the three-layer film. By etching the layer film into a predetermined shape and removing the photoresist pattern, the signal line, the source electrode 33 and the drain electrode 34 are formed. As a result, the source electrode 33 and the drain electrode 34 are electrically connected to the source region 31S and the drain region 31D of the semiconductor layer 31 through the contact holes 36 and 37, respectively, and each thin film transistor 24 is formed.

  Next, as shown in FIG. 4, after covering all the thin film transistors 24 and applying a liquid acrylic resin or the like with a coating device such as a slit coater (not shown) to a thickness of 20 μm, the support is obtained by baking at 230 ° C., for example. Layer 27 is formed.

  Further, the substrate 51 is removed as shown in FIG. 5 by wet etching in which the entire substrate 51 is immersed in an etching solution such as buffered hydrofluoric acid. At this time, the separation layer 52 formed of, for example, molybdenum serves as an etching stopper, and etching does not affect the thin film transistors 24 and the support layer 27 positioned on the separation layer 52.

  Thereafter, after a predetermined photoresist pattern is formed on the separation layer 52, the separation layer 52 is etched into a predetermined shape by, for example, wet etching with an etchant such as a mixed solution of phosphoric acid, nitric acid, and acetic acid. Then, the light shielding layer 28 is formed as shown in FIG. At this time, the main surface 21b of the insulating layer 21 excluding each light shielding layer 28 is exposed.

  Further, a predetermined photoresist pattern is formed on the exposed main surface 21b of the insulating layer 21, and then dry etching or the like is performed to form a contact hole 41 that penetrates to the drain region 31D of the semiconductor layer 31. The resist pattern is removed. Then, for example, a sputtering method is used to form an electrode film with indium tin oxide or the like so as to cover the insulating layer 21 and its contact hole 41 with a film thickness of, for example, 50 nm, and then a predetermined photoresist pattern is formed on the electrode film. Then, wet etching or the like is performed to etch the electrode film into a predetermined shape, and the photoresist pattern is removed, thereby forming each pixel electrode 29 as shown in FIG. As a result, each pixel electrode 29 is electrically connected to the drain region 31D of the semiconductor layer 31 through the contact hole 41, and is located on the same plane as each light shielding layer 28.

  Thereafter, as with the normal array substrate 12, the film formation and patterning are repeated as appropriate to configure the array substrate 12 with a driver circuit and the like. The substrate 12 is bonded by the same process as that of the normal liquid crystal panel 11, and the liquid crystal layer 48 is formed by interposing the liquid crystal material 48 between the array substrate 12 and the counter substrate 13, and the array substrate 12 and the counter substrate 13 are formed. A liquid crystal panel 11 is completed by attaching a polarizing plate, an optical sheet, and the like as appropriate.

  The completed liquid crystal panel 11 is housed in a case body such as a bezel together with a backlight, and electrically connects a driver circuit and the like to an external circuit. Then, the driver circuit applies a voltage to the gate electrode 32 through the scanning line by a signal from the external circuit to switch each thin film transistor 24, and an image signal supplied to the signal line is applied to the source electrode 33, so that each thin film transistor The image signal is written into each pixel electrode 29 through the drain electrode 34 by 24. In accordance with the voltage of the image signal written in each pixel electrode 29, the liquid crystal material 48 at the position corresponding to each pixel 18 is irradiated from the backlight, and the polarization plane of the light that has passed through the polarizing plate on the array substrate 12 side Rotate. An image is displayed by determining the ratio of the light transmitted through the polarizing plate on the counter substrate 13, that is, the light transmittance, according to the polarization angle of the light whose polarization plane is rotated.

  As described above, in the one embodiment, in the array substrate 12, the thin film transistors 24 are disposed on the opposite side of the insulating layer 21 with respect to the liquid crystal layer 14, and the thin film transistors 24 are covered with the support layer 27, and A plurality of pixel electrodes 29 are formed at positions opposite to the respective thin film transistors 24 with respect to the insulating layer 21.

  Then, in this array substrate 12, an insulating layer 21 is formed on a substrate 51, a plurality of thin film transistors 24 are formed on the insulating layer 21, a support layer 27 is formed covering these thin film transistors 24, and the substrate 51 is removed. In addition, a plurality of pixel electrodes 29 driven by the thin film transistors 24 are formed at positions opposite to the thin film transistors 24 with respect to the insulating layer 21.

  Therefore, when forming the array substrate 12, there is no need to perform a patterning process on the insulating layer 21 which is the base of the pixel electrode 29, and the insulating layer 21 formed on the substrate 51 is formed on the main surface 21b on the substrate 51 side. The unevenness is substantially the same as the surface of the substrate 51, and the flatness is improved without polishing. Therefore, the unevenness of each pixel electrode 29 formed on the main surface 21b of the insulating layer 21 on the substrate 51 side is reduced, and the electric field disturbance due to the unevenness on the surface of the pixel electrode 29 is unlikely to occur. Since the alignment is not easily disturbed, for example, the contrast of the liquid crystal panel 11 can be ensured without increasing the manufacturing cost by increasing the number of manufacturing steps such as formation and polishing of a planarizing layer for leveling the unevenness of the pixel electrode.

  Further, the support layer 27 is made of a flexible resin layer, and the insulating substrate 45 of the counter substrate 13 is made flexible so that the liquid crystal panel 11 can be flexible.

  Further, by providing the light shielding layer 28 corresponding to each thin film transistor 24, the contrast can be further improved. In addition, by providing the light shielding layer 28 on the insulating layer 21 with a thickness substantially equal to that of each pixel electrode 29, a step due to the thickness of each light shielding layer 28 is unlikely to occur on the liquid crystal layer 14 side of the insulating layer 21. Thus, the alignment disorder of the liquid crystal material 48 can be minimized.

  Further, before forming the insulating layer 21 on the substrate 51, the substrate 51 can be easily removed by forming the separation layer 52 on the substrate 51 to improve the separation between the substrate 51 and the insulating layer 21 side. At the same time, by forming each light shielding layer 28 by patterning the separation layer 52 on the trace of removing the substrate 51, a process for providing the light shielding layer 28 becomes unnecessary, reducing the number of manufacturing steps and suppressing the manufacturing cost. it can.

  Further, by making each thin film transistor 24 a top gate type, it is possible to suppress the occurrence of light leakage current in each thin film transistor 24 when the backlight is irradiated.

  In the above embodiment, the liquid crystal panel 11 has been described as a transmissive type. However, for example, the liquid crystal panel 11 may be a reflective type in which the pixel electrode 29 is formed of a member that reflects light.

  The thin film transistor 24 is a P-type polysilicon thin film transistor, but is not limited to this, and may be, for example, an amorphous silicon thin film transistor, an N type thin film transistor, or an oxide semiconductor thin film transistor. That is, the thin film transistor 24 can be appropriately selected according to the configuration of the liquid crystal panel 11.

  Further, the thin film transistor 24 is not a top gate type, and particularly when used in the reflective liquid crystal panel 11, the problem of light leakage current does not occur even when the thin film transistor 24 is a bottom gate type.

  Further, the separation layer 52 is not an essential configuration. That is, instead of the separation layer 52, a film using polyimide or the like as an undercoat layer may be formed on the substrate 51, and the substrate 51 may be mechanically removed. In this case, the substrate 51 can be reused. Further, since the substrate 51 is removed before the array substrate 12 is completed, it is not necessary to be a generally used glass substrate, and it is possible to use a substrate 51 having excellent durability such as a metal substrate. .

  As the support layer 27, a substrate or a film prepared separately in advance may be used other than the resin layer formed by coating and baking. That is, the material of the support layer 27 can be arbitrarily selected.

  In the liquid crystal panel 11, the counter substrate 13 is used as the display side, but the array substrate 12 side can also be used as the display side.

  Furthermore, the pixels 18 and the thin film transistors 24, the pixel electrodes 29, and the like corresponding to the pixels 18 can be arbitrarily arranged in accordance with the shape of the display region, not only those arranged in a matrix.

  Further, depending on the mode of the liquid crystal layer 14, the counter electrode 46 may be formed not on the counter substrate 13 side but on the array substrate 12 side, that is, on the same layer as the pixel electrode 29 (on the main surface 21b of the insulating layer 21). Good. In this case, when the pixel electrode 29 is formed (film formation and patterning), the counter electrode 46 can be formed in the same process using the same material as the pixel electrode 29, and the manufacturability is further improved.

  And although one Embodiment of this invention was described, this embodiment is shown as an example and is not intending limiting the range of invention. The novel embodiment can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the scope of the invention. This embodiment and its modifications are included in the scope and gist of the invention, and are included in the invention described in the claims and the equivalents thereof.

11 Liquid crystal panels as liquid crystal display elements
12 Array substrate
13 Counter substrate
14 Liquid crystal layer
21 Insulation layer
24 Thin-film transistors as switching elements
27 Support layer
28 Shading layer
29 Pixel electrode
51 PCB
52 Separation layer

Claims (8)

A liquid crystal display element comprising an array substrate, a counter substrate disposed to face the array substrate, and a liquid crystal layer interposed between the array substrate and the counter substrate,
The array substrate is
An insulating layer;
A plurality of switching elements arranged on the opposite side of the insulating layer with respect to the liquid crystal layer;
A support layer covering these switching elements;
A plurality of pixel electrodes provided at positions opposite to the respective switching elements with respect to the insulating layer, electrically connected to the switching elements and driven by the switching elements; Liquid crystal display element. The liquid crystal display element according to claim 1, wherein the support layer is a flexible resin layer. The array substrate includes a plurality of light shielding layers provided at positions opposite to the switching elements with respect to the insulating layer, and shielding at least a part of the switching elements. 3. A liquid crystal display element according to 1 or 2. The liquid crystal display element according to claim 3, wherein each of the light shielding layers is provided on the insulating layer with a thickness substantially equal to that of the pixel electrode. A method of manufacturing a liquid crystal display device comprising an array substrate, a counter substrate disposed opposite to the array substrate, and a liquid crystal layer interposed between the array substrate and the counter substrate,
Forming an insulating layer on the substrate;
Forming a plurality of switching elements on the insulating layer;
Forming a support layer covering these switching elements;
Removing the substrate;
Forming a plurality of pixel electrodes driven by the switching elements at positions opposite to the switching elements with respect to the insulating layer. A method of manufacturing a liquid crystal display element, comprising: The method for manufacturing a liquid crystal display element according to claim 5, wherein the support layer is a resin layer having flexibility. Before the step of forming the insulating layer on the substrate, forming a separation layer on the substrate to improve the separation between the substrate and the insulating layer side;
After the step of removing the substrate, the separation layer is patterned to form a plurality of light shielding layers that shield at least a part of the switching elements at positions corresponding to the switching elements. The method for producing a liquid crystal display element according to claim 5 or 6. The method for manufacturing a liquid crystal display element according to claim 7, wherein in the step of forming the light shielding layer, the light shielding layer has a thickness substantially equal to that of the pixel electrode.

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