JP2012195407A - Semiconductor light-emitting element manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a reflection electrode layer which achieves high luminance by improvement in reflectance, reduction in contact resistance, inhibition of peeling and improvement of durability against time degradation.SOLUTION: A manufacturing method of a semiconductor light-emitting element having a reflection electrode comprises: a process of sequentially laminating a first semiconductor layer of a first conductivity type, an active layer and a second semiconductor layer of a second conductivity type to form a semiconductor film; a process of forming a metal buffer layer relaxing lattice mismatch between a metal reflection layer and the semiconductor film on the second semiconductor layer; a process of forming the metal reflection layer on the metal buffer layer; a process of forming a metal passivation layer that inhibits detachment of the metal reflection layer on the metal reflection layer, and an antioxidation layer that inhibits oxidation of the metal passivation layer on the metal passivation layer; a process of performing heat treatment so as to cause mutual diffusion between the metal passivation layer and the antioxidation layer to form an alloy layer at a boundary surface between the metal passivation layer and the antioxidation layer; and a process of removing at least a part of the alloy layer together with a layer formed on the alloy layer to form the reflection electrode.

Description

  2. Description of the Related Art A semiconductor light emitting device is known that includes a semiconductor film in which a p-type semiconductor layer, an active layer, and an n-type semiconductor layer are stacked, and a support substrate bonded to the semiconductor film via a reflective electrode layer. The reflective electrode layer functions as an electrode and forms a light reflecting surface that reflects light emitted from the active layer toward the light emitting surface, thereby increasing the brightness of the semiconductor light emitting device.

  For example, Patent Document 1 describes a semiconductor light emitting device in which a reflective electrode layer having an Ag film is provided on a GaN-based semiconductor film. Non-Patent Document 1 describes a semiconductor light emitting device in which a reflective electrode layer having an Ag layer is provided on a GaN-based semiconductor film.

Patent Publication 2005-175462

Appl. Phys. Lett. 95, 062108 (2009).

In order to improve the reflection characteristics of the reflective electrode layer and achieve high brightness of the semiconductor light emitting device, a buffer layer made of Ni with a thickness of 1 nm on the p-GaN layer, a reflective layer made of Ag with a thickness of 150 nm, A three-layer reflective electrode layer in which a passivation layer made of Ni with a thickness of 2 nm was sequentially formed was studied. As a result of heat-treating the three-layer reflective electrode layer in order to reduce the contact resistance of the reflective layer made of Ag, a reflectance of about 84% and a contact resistance of about 10 ⁻⁵ Ωcm ² were achieved.

  However, the reflectance of the three-layer reflective electrode layer after the heat treatment is 10% or more lower than the reflectance of about 95% of the single-layer reflective layer made of Ag that has not been heat-treated. Since the reflective electrode layer is usually an ohmic contact layer with respect to the semiconductor film and also has a function of the reflective layer, the low reflectivity is directly related to a decrease in the light output and becomes a big problem. The thickness of the passivation layer made of Ni is 2 nm, and the thickness is about the diameter of Ni atoms (0.25 nm) × 8. Therefore, Ni constituting the passivation layer is oxidized at the moment when it is exposed to the atmosphere after lamination, and can be combined with oxygen to form a NiO insulating layer. When the heat treatment is performed on the three-layer reflective electrode layer in a state where the passivation layer is oxidized, the function of preventing the oxidation of the reflective layer made of Ag under the passivation layer is lowered. Thus, an Ag oxide or an AgNi oxide is formed. As a result, the reflective function of the reflective layer is lowered, and there is a problem that the reflectance is further lowered as compared with a reflective electrode layer composed of a single reflective layer made of Ag that has not been heat-treated. When only the thickness of the passivation layer made of Ni is simply increased, the ratio of Ni having a lower reflectance than Ag constituting the reflective layer is increased, and thus the reflectance is lowered. On the other hand, when the layer thicknesses of both the reflective layer made of Ag and the passivation layer made of Ni are excessively increased, the oxidation of the reflective layer accompanying the oxidation of the passivation layer can be prevented. However, as the layer thickness increases, the layer thickness of another layer constituting the semiconductor light emitting element also increases. Therefore, the time and cost required for the manufacturing process of the semiconductor light emitting device are increased. Furthermore, the increase in the layer thickness reduces the heat dissipation of the semiconductor light emitting element, which may cause another problem due to heat generated during driving.

  Furthermore, in the three-layer reflective electrode layer, it has been confirmed that there are a plurality of fine concavo-convex structures called hillocks on the surface of the passivation layer made of Ni. Although details regarding the hillock generation mechanism are unknown, it occurs after the heat treatment for the three-layer reflective electrode layer. As one of the mechanisms, the thermal expansion coefficient of Ag constituting the reflective layer is GaN constituting the semiconductor film. Therefore, it is considered that a thermal compressive stress is applied to the three-layer reflective electrode layer together with heating, and atoms are diffused on the surface. When a large number of such concavo-convex structures are present, poor bonding occurs in the bonding process with the support substrate. Therefore, in the three-layer reflective electrode layer, it is inevitable that the overall bonding strength of the semiconductor light emitting element is reduced, and the yield in the bonding process such as peeling is reduced.

  Further, in the three-layer reflective electrode layer, Ni in the passivation layer after the heat treatment is oxidized and insulated to become a NiO insulating layer. Since the oxide layer is present on the outermost surface of the three-layer reflective electrode layer, adhesion between the reflective electrode layer and the bonding layer that can be formed on the reflective electrode layer is low, which causes peeling. Further, the contact resistance is increased by the NiO insulating layer, and the driving voltage of the semiconductor light emitting element is increased.

  The present invention provides a method for manufacturing a semiconductor light emitting device capable of achieving higher brightness by reducing the reflectance of a reflective electrode layer, reducing contact resistance, improving resistance to deterioration over time, and preventing occurrence of peeling. For the purpose.

  According to another aspect of the present invention, there is provided a method for manufacturing a semiconductor light-emitting device, comprising: a reflective electrode including a semiconductor film; and a metal reflective layer provided on the semiconductor film and having light reflectivity with respect to an emission wavelength of light emitted from the semiconductor film; A method of manufacturing a semiconductor light emitting device comprising: a first conductive type first semiconductor layer, an active layer, and a second conductive type second semiconductor layer sequentially stacked; and Forming a metal buffer layer on the second semiconductor layer for relaxing lattice mismatch between the metal reflective layer and the semiconductor film; forming the metal reflective layer on the metal buffer layer; Forming a metal passivation layer for preventing the metal reflective layer from detaching on the metal reflective layer, forming an antioxidant layer for preventing the metal passivation layer from being oxidized on the metal passivation layer, and Performing a heat treatment so that mutual diffusion occurs between the metal passivation layer and the antioxidant layer to form an alloy layer at the interface between these layers; and at least part of the alloy layer on the alloy layer Forming the reflective electrode by removing together with the formed layer.

  According to the semiconductor light-emitting device of the present invention, in a semiconductor light-emitting device having a reflective electrode layer, it is possible to achieve high brightness, reduced contact resistance, prevention of peeling, and improved resistance to deterioration over time by improving reflectivity. it can.

FIG. 1 is a flowchart of a method for manufacturing a semiconductor light emitting device according to Example 1 of the present invention. 2A to 2B are cross-sectional views illustrating a method for manufacturing a semiconductor light emitting device according to Example 1 of the present invention. 2B-2 and FIG. 2C are cross-sectional views illustrating a method for manufacturing a semiconductor light emitting device according to Example 1 of the present invention. 2D and 2E are cross-sectional views illustrating a method for manufacturing a semiconductor light emitting device according to Example 1 of the present invention. FIG. 3 is a flowchart of a method for manufacturing a semiconductor light emitting device according to Example 2 of the present invention. 4A and 4B are cross-sectional views illustrating a method for manufacturing a semiconductor light emitting device according to Example 2 of the present invention. FIG. 5 is a diagram showing a reflection spectrum of the semiconductor light emitting device according to the example of the present invention.

  Embodiments of the present invention will be described below with reference to the drawings. In the drawings shown below, substantially the same or equivalent components and parts are denoted by the same reference numerals.

  A method for manufacturing the semiconductor light emitting device 1 according to Example 1 of the present invention will be described below with reference to FIGS. 1 and 2. FIG. 1 is a flowchart showing manufacturing steps of a semiconductor light emitting device 1 according to Example 1 of the present invention. 2A to 2D are cross-sectional views of the semiconductor light emitting device 1 in several manufacturing steps.

(S1: Semiconductor film forming step)
A growth substrate 10 is prepared, and a semiconductor film 20 including an n-type semiconductor layer 21, an active layer 22, and a p-type semiconductor layer 23 is formed on the growth substrate 10 (FIG. 2A).

Specifically, the semiconductor film 20 is made of, for example, Al _x In _y Ga _z N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z ≦ 1, x + y + z = 1). . The growth substrate 10 is, for example, a C-plane sapphire substrate.

The n-type semiconductor layer 21 is formed by stacking a low-temperature buffer layer, a base GaN layer, and a Si-doped n-type GaN layer on the growth substrate 10. Specifically, the growth substrate 10 is put into an MOCVD apparatus, the substrate temperature is set to about 1000 ° C., and heat treatment is performed for about 10 minutes in a hydrogen atmosphere (thermal cleaning). Subsequently, the substrate temperature (growth temperature) is set to 500 ° C., and TMG (trimethylgallium) (flow rate 10.4 μmol / min) and NH ₃ (flow rate 3.3 LM) are supplied for about 3 minutes to form a low-temperature buffer layer made of GaN. . Next, the substrate temperature (growth temperature) is raised to 1000 ° C. and held for about 30 seconds to crystallize the low-temperature buffer layer. Subsequently, while maintaining the substrate temperature (growth temperature) at 1000 ° C., TMG (flow rate 45 μmol / min) and NH ₃ (flow rate 4.4 LM) are supplied for about 20 minutes to form a base GaN layer having a thickness of about 1 μm. Next, TMG (flow rate 45 μmol / min), NH ₃ (flow rate 4.4 LM) and SiH ₄ (flow rate 2.7 × 10 ⁻⁹ μmol / min) as a dopant gas are supplied for about 60 minutes at a substrate temperature (growth temperature) of 1000 ° C. Then, an n-type GaN layer having a thickness of about 4 μm is formed. Through the above steps, the n-type semiconductor layer 21 is formed on the growth substrate 10.

Subsequently, an active layer 22 is formed on the n-type semiconductor layer 21. In this embodiment, the active layer 22 has a multiple quantum well structure made of InGaN / GaN. Five cycles of growth are performed with InGaN / GaN as one cycle. Specifically, TMG (flow rate 3.6 μmol / min), TMI (trimethylindium) (flow rate 10 μmol / min), NH ₃ (flow rate 4.4 LM) are supplied for about 33 seconds at a substrate temperature (growth temperature) of 700 ° C. An InGaN well layer having a thickness of about 2.2 nm is formed, and then TMG (flow rate 3.6 μmol / min) and NH ₃ (flow rate 4.4 LM) are supplied for about 320 seconds to form a GaN barrier layer having a thickness of about 15 nm. . The active layer 22 is formed by repeating this process for five cycles.

The p-type semiconductor layer 23 is formed by laminating a p-type AlGaN cladding layer and an Mg-doped p-type GaN layer. Specifically, following the previous step, the substrate temperature (growth temperature) is raised to 870 ° C., TMG (flow rate 8.1 μmol / min), TMA (trimethylaluminum) (flow rate 7.5 μmol / min), NH ₃ (flow rate). 4.4LM) and Cp ₂ Mg (bis-cyclopentadienyl Mg) (flow rate 2.9 × 10 ⁻⁷ μmol / min) as a dopant are supplied for about 5 minutes to form a p-type AlGaN cladding layer having a thickness of about 40 nm. Subsequently, while maintaining the substrate temperature (growth temperature), TMG (flow rate 18 μmol / min), NH ₃ (flow rate 4.4 LM) and Cp ₂ Mg (flow rate 2.9 × 10 ⁻⁷ μmol / min) as a dopant for about 7 minutes. Then, a p-type GaN layer having a thickness of about 150 nm is formed. Through the above steps, the p-type semiconductor layer 23 is formed on the surface of the active layer 22.
(S2: Reflective electrode precursor layer forming step)
A buffer layer 25, a reflective layer 26, a passivation layer 27, and an antioxidant layer 28 are sequentially formed on the p-type semiconductor layer 23 to form a reflective electrode precursor layer 30 (FIG. 2B). In this embodiment, the buffer layer 25 is made of Ni having a layer thickness of 1 nm. The reflective layer 26 is made of Ag having a layer thickness of 150 nm. The passivation layer is made of Ni having a layer thickness of 2 nm. The antioxidant layer 28 is made of Ag having a layer thickness of 50 nm.

  The buffer layer 25 of the reflective electrode precursor layer 30 can alleviate the lattice mismatch between the p-type semiconductor layer 23 and the reflective layer 26, and can be a metal layer with good electrical conductivity. Further, the buffer layer 25 may be a metal layer that can interdiffuse with the reflective layer 26 in a later heat treatment step. In the heat treatment step, the buffer layer 25 and the reflective layer 26 are mutually diffused and alloyed in the vicinity of the interface, so that a decrease in reflectance due to the buffer layer 25 itself can be suppressed. Furthermore, the buffer layer 25 can prevent the atoms constituting the reflective layer 26 from diffusing into the p-type semiconductor layer 23. Thus, the buffer layer 25 can have a smaller diffusion coefficient than the reflective layer 26. The layer thickness of the buffer layer 25 can alleviate the lattice mismatch between the p-type semiconductor layer 23 and the reflective layer 26, minimizes the influence on the reflectance of the reflective layer 26, and makes contact with the entire reflective electrode layer. It can be set so that the resistance does not increase excessively. When the thickness of the buffer layer 25 is too small, the lattice mismatch between the p-type semiconductor layer 23 and the reflective layer 26 cannot be sufficiently relaxed, and the reflective layer 26 formed on the buffer layer 25 has Due to the lattice mismatch, atoms constituting the reflective layer 26 may be aggregated in a specific region in the reflective layer 26 to increase the density of the aggregated domain structure. With such a structure, the layer thickness of the reflective layer 26 becomes non-uniform or a step is generated on the surface thereof. High reflectivity cannot be obtained due to light scattering at the step. On the contrary, when the layer thickness of the buffer layer 25 is excessive, the drop of the reflectance by the buffer layer 25 itself becomes remarkable, and the contact resistance also increases.

  Specifically, Ni was used as the material of the buffer layer 25, and the layer thickness was set to 1 nm. The layer thickness of Ni is preferably 0.5 nm or more and 5 nm or less, more preferably 1 nm or more and 2 nm or less. When the Ni layer thickness is too thin, an aggregated domain structure that cannot be relaxed even by heat treatment can occur in the reflective layer 26 made of Ag. On the other hand, if the Ni layer thickness is excessive, the reflectance of Ni itself is 60-70%, so that the decrease in reflectance due to Ni itself cannot be ignored, and the contact resistance increases. Other material candidates for the buffer layer 25 may be a metal such as Ti or an alloy containing Ti that improves adhesion as well as Ni. However, Ni is preferred because other candidates have a lower reflectance than when Ni is used.

  The reflective layer 26 of the reflective electrode precursor layer 30 can be made of a metal layer having high reflectivity and high electrical conductivity. Further, the reflective layer 26 may be a metal layer that can diffuse mutually in the vicinity of the respective interfaces between the buffer layer 25 and the passivation layer 27 in a later heat treatment step. In the heat treatment step, by interdiffusion in the vicinity of each interface between the buffer layer 25 and the passivation layer 27 and alloying in the vicinity of these interfaces, a decrease in the reflectance in the buffer layer 25 is suppressed, It is possible to alleviate layer thickness non-uniformity and steps that may occur at the interfaces between the buffer layer 25 and the passivation layer 27. The layer thickness of the reflective layer 26 is set so that sufficient reflectance can be obtained. When the layer thickness of the reflective layer 26 is too small, the reflectance is lowered. On the contrary, when the thickness of the reflective layer 25 is excessive, there is no particular problem in the element characteristics such as reflectance, but the time and cost required for the process increase.

  Specifically, Ag having high reflection characteristics was used as the material of the reflective layer 26, and the layer thickness was set to 150 nm. The layer thickness of Ag is preferably 50 nm to 200 nm, and more preferably 100 nm to 200 nm. When the layer thickness of Ag is too small, the reflectance is lowered. In our experimental results, the reflectance is clearly reduced when the thickness of the Ag single layer is less than 70 nm, and almost saturated at 100 nm or more. Even if the Ag layer thickness is increased, it seems that there is no particular problem in the element characteristics such as reflectance, but about 200 nm or less is desirable in order to suppress the time and cost required for the manufacturing process. Other material candidates for the reflective layer 25 include Al, Rh, or alloys containing these, which are inferior to the reflectivity of Ag but have a relatively high reflectivity.

  The passivation layer 27 of the reflective electrode precursor layer 30 can be a metal layer that prevents diffusion and desorption of atoms constituting the reflective layer 26 and has good electrical conductivity characteristics. Further, the passivation layer 27 may be a metal layer that can interdiffuse with the reflective layer 26 in a later heat treatment step. When the passivation layer 27 and the reflective layer 26 are mutually diffused and both are alloyed in the vicinity of the interface, it is possible to alleviate the unevenness of the layer thickness and the level difference generated in the reflective layer 26. Thereby, the reflective layer 26 can be further flattened, and light scattering due to unevenness in layer thickness or steps can be suppressed. Further, the passivation layer 27 can prevent atoms constituting the reflective layer 26 from being detached from the antioxidant layer 28 on the passivation layer 27 during the heat treatment. Furthermore, the passivation layer 27 can prevent the atoms constituting the reflective layer 26 from diffusing into the cap layer formed on the passivation layer 27. Therefore, atoms constituting the reflective layer 26 may have a smaller diffusion coefficient in the passivation layer 27. The thickness of the passivation layer 27 is set so that diffusion of atoms constituting the reflective layer 26 can be prevented, and unevenness or steps in the layer thickness that can occur in the reflective layer 26 can be reduced. When the passivation layer 27 is too small, the passivation effect on the reflective layer 26 becomes weak, and the oxidation of the reflective layer 26 cannot be prevented. On the other hand, when the passivation layer 27 is excessive, the reflectance decreases as in the case of the buffer layer 25, and an uneven structure that causes irregular reflection such as hillocks occurs in the passivation layer 27.

  Specifically, Ni was used as the material for the passivation layer 27, and the layer thickness was set to 1 nm. The layer thickness of Ni is preferably 0.5 nm or more and 10 nm or less, more preferably 1 nm or more and 3 nm or less. When the layer thickness of Ni is too small, the diffusion of atoms constituting the reflective layer made of Ag cannot be prevented. On the other hand, when the Ni layer thickness is excessive, it is expected that the reflectance decreases by itself as in the case of the buffer layer made of Ni, and the width and height of the hillock are expected to increase. In the reflective electrode layer forming step S4, it becomes difficult to remove hillocks. Other material candidates for the passivation layer 27 may be metals such as Ti and alloys containing Ti that improve adhesion as well as Ni. However, Ni is preferred because other candidates have a lower reflectance than when Ni is used.

  The anti-oxidation layer 28 of the reflective electrode precursor layer 30 prevents the passivation layer 27, the reflective layer 26 and the buffer layer 25 from being oxidized during the subsequent heat treatment step S3, has good electrical conduction characteristics, and is a passivation layer. This is a metal layer for covering an unnecessary concavo-convex structure such as hillock that can be formed when forming the layer 27 or during heat treatment. Furthermore, the antioxidant layer 28 may be a metal layer that interdiffuses at the interface with the passivation layer 27 in the heat treatment step S3. The anti-oxidation layer 28 can relieve concavo-convex structures such as hillocks that can be formed on the passivation layer 27 by interdiffusion with the passivation layer 27 in the heat treatment step. Further, when the sputtering rate of the atoms constituting the concavo-convex structure such as hillock is smaller than the sputtering rate of the atoms constituting the antioxidant layer 28 due to such interdiffusion, the antioxidant layer 28 is removed first, The structure corresponding to the concavo-convex structure such as hillock is prevented from remaining on the passivation layer 27. Since the antioxidant layer 28 is removed in a later step, it can be a metal layer that can be easily removed by etching or the like. When the thickness of the antioxidant layer 28 is too small, an unnecessary structure such as hillock existing on the passivation layer 27 cannot be covered. Therefore, in the subsequent removal process of the antioxidant layer 28, hillock or the like is sufficiently removed. It cannot be removed. Conversely, when the thickness of the antioxidant layer 28 is excessive, the metal atoms constituting the antioxidant layer 28 migrate to the passivation layer 27, the reflective layer 26, and the buffer layer 25 in the heat treatment step of the reflective electrode precursor layer 30. As a result, an unnecessary aggregated structure is formed, and the reflectance is reduced by scattering.

  Specifically, Ag was used as the material of the antioxidant layer 28, and the layer thickness was set to 50 nm. The thickness of the antioxidant layer 28 made of Ag is preferably 5 nm or more and 50 nm or less, more preferably 10 nm or more and 30 nm or less. When the thickness of the antioxidant layer 28 made of Ag is less than 5 nm, the hillocks generated on the surface of the passivation layer from the Ni layer cannot be sufficiently covered, so that the hillocks cannot be removed. On the other hand, if the thickness of the antioxidant layer 28 made of Ag is excessive, it diffuses to the antireflection layer 26 made of Ag through the lower passivation layer made of Ni after the heat treatment and is oxidized in the antireflection layer 26. An aggregate structure in which Ag atoms from the prevention layer 28 are aggregated can be formed. Another candidate material for the antioxidant layer 28 is a material that can diffuse well with the passivation layer 27 made of Ni and can be removed in a later reverse sputtering step.

  Next, a method for forming and patterning the buffer layer 25, the reflective layer 26, the passivation layer 27, and the antioxidant layer 28 will be described. These film formation structures are formed by, for example, an existing technique such as a dry process or a wet process, or a combination thereof. Examples of the dry process include electron beam evaporation and sputtering, and examples of the wet process include plating. However, since a high reflectivity can be obtained by forming a dense film and a layer thickness controllability on the order of nm is required, it is preferable that all be formed by sputtering. After film formation, a desired resist mask having an opening in a part of the reflective electrode precursor layer is formed by photolithography. A part of the reflective electrode precursor layer exposed in the opening is etched, the resist mask is removed, and a buffer layer 25 and a reflective layer 26 are formed on the p-type semiconductor layer 23 as shown in FIG. Then, the reflective electrode precursor layer 30 in which the passivation layer 27 and the antioxidant layer 28 are sequentially stacked is formed. The etching is performed using an etching solution such as a commercially available Ag etching solution or a mixed acid solution containing nitric acid. In the first embodiment, etching is performed using an etchant composed of a mixed acid solution of pure water: nitric acid: acetic acid: phosphoric acid = 1: 1: 8: 10. As another patterning method for the reflective electrode precursor layer 30, a desired photoresist mask having an opening in the reflective electrode precursor layer formation region is formed by lift-off, and then the buffer layer 25 is formed in the opening of the photoresist mask. Then, the reflective layer 26, the passivation layer 27, and the antioxidant layer 28 are sequentially laminated, and then the photoresist pattern is removed to form the reflective electrode precursor layer 30 as shown in FIG.

  Through the above steps, a reflective electrode precursor layer 30 in which a buffer layer 25, a reflective layer 26, a passivation layer 27, and an antioxidant layer 28 are sequentially stacked is formed on the p-type semiconductor layer 23 (FIG. 2 ( b)).

  The sum of the thickness of the buffer layer 25 and the thickness of the passivation layer 27 is preferably 1/60 or less of the thickness of the reflective layer 26. When the ratio is excessive, the buffer layer 25 and the passivation 27 are diffused into the reflective layer 26 by heat treatment and excessively alloyed. Such alloying reduces the original reflectance of the reflective layer 26.

(S3: Heat treatment step of the reflective electrode precursor layer)
A heat treatment is performed on the reflective electrode precursor layer 30.

  The crystallinity of the buffer layer 25, the reflective layer 26, the passivation layer 27, and the antioxidant layer 28 is improved by the heat treatment process. Further, in the heat treatment step, the atoms constituting the buffer layer 25, the reflective layer 26, the passivation layer 27, and the antioxidant layer 28 are diffused in the vicinity of the interface of the respective layers, thereby occurring in the reflective electrode precursor layer forming step S2. The resulting layer thickness non-uniformity, aggregated structure, and voids in each layer are alleviated. As a result, the reflective layer 26 is flattened, layer thickness non-uniformity and scattering due to steps are suppressed, and high reflectivity is achieved.

  The temperature during the heat treatment is lower than the melting points of the buffer layer 25, the reflective layer 26, the passivation layer 27, and the antioxidant layer 28 of the precursor reflective electrode layer 30, and the buffer layer 25, the reflective layer 26, the passivation layer 27, and the antioxidant layer 28 It is carried out at a temperature that can mutually diffuse. Further, the heat treatment temperature is such that the element structure of the semiconductor film 20 is not affected. When the heat treatment temperature is too low, aggregated structures and voids generated in the buffer layer 25, the reflective layer 26, the passivation layer 27, and the antioxidant layer 28 cannot be relaxed, and improvement in crystallinity and contact resistance cannot be obtained. On the other hand, when the heat treatment temperature is too high, the buffer layer 25, the reflective layer 26, the passivation layer 27, and the antioxidant layer 28 diffuse even outside the vicinity of the interface, and the reflectance can be lowered.

Specific heat treatment conditions will be described. As a condition for realizing a low contact resistance for the buffer layer 25, the reflective layer 26, the passivation layer 27, and the antioxidant layer 28, heat treatment is performed at a temperature of 400 ° C. or higher in an atmosphere containing at least oxygen. More preferably, the heating time is 30 to 120 seconds at a temperature of 450 to 550 ° C. in an atmosphere containing oxygen. When the heating temperature is excessively low and the heating time is excessively short with respect to such conditions, a NiAg alloy formed near the interface by interdiffusing with Ag constituting the antioxidant layer 28 and Ni constituting the passivation layer 27. It becomes insufficient. On the other hand, when the heating temperature is excessively high and the heating time is excessively long, it is difficult to suppress oxidation of Ag constituting the reflective layer 26. Although the oxygen concentration has not been studied, a contact resistance lower than 10 ⁻⁴ [Ωcm ² ] and a high reflection of 93% or higher are obtained by performing a heat treatment for 1 minute at a heating temperature of 500 ° C. in an air atmosphere. Rate is achieved. Furthermore, by performing additional annealing at 300 ° C. or higher in an inert gas (N ₂ , Ar, etc.) atmosphere, a higher reflectance of about 97% at the maximum is achieved. However, this additional heat treatment in the inert gas tends to increase the contact resistance, so that the desired contact resistance and reflectivity can be obtained according to the element shape and the thickness of the Ni constituting the buffer layer 25. It is necessary to adjust the conditions. In the manufacturing method of Example 1, in the subsequent support substrate bonding step S7, a heat treatment of 340 ° C./10 minutes or more is performed in an N ₂ atmosphere to improve the reflectance. In step S3, no additional heat treatment is performed.

  Specifically, after the heat treatment, as shown in FIG. 2B-1, the reflective electrode precursor 30 ′ after the heat treatment was formed on the p-type semiconductor layer 23 by the Ni buffer 25 and the Ag reflection layer 26. The NiAg alloy layer 25A, the Ag reflection layer 26A which is a part of the Ag reflection layer 26 left unalloyed, the NiAg alloy layer formed by the Ag reflection layer 26, the Ni badge passage layer 27, and the Ag antioxidant layer 28 27A, the Ag oxidation preventing layer 28B remaining without being alloyed or oxidized, and the Ag oxide layer 28B formed by oxidizing the surface side of the Ag oxidation preventing layer 28 are considered to be formed. Alternatively, as shown in FIG. 2B-2, the NiAg oxide layer 28C and the Ag antioxidant layer 28, which are formed by oxidizing a part of the NiAg alloy layer 27A, are oxidized on the NiAg alloy layer 27A. It is considered that the Ag oxide layer 28A is formed.

(S4: Reflective electrode layer forming step)
The Ag oxidation preventing layer 28A of the precursor reflective electrode precursor layer 30 ′ after the heat treatment is removed together with a part or all of the NiAg alloy layer 27A to form a reflective electrode layer 31 as shown in FIG. At this time, the Ag oxidation preventing layer 28B or the NiAg oxide layer 28C is also removed depending on the configuration of the reflective electrode precursor layer 30 ′ after the heat treatment.

  A method for removing the oxide layer 28A will be specifically described. The removal of the oxide layer 28A is performed by a reverse sputtering method. The reverse sputtering method generates a plasma composed of inert gas ions in the vicinity of the substrate to be sputtered, and applies a negative acceleration voltage according to the surface binding energy of the substrate material to be sputtered so that the inert gas ions are sputtered. This is a technique in which constituent atoms are ejected from a sputtering target substrate by irradiating the substrate. By using the reverse sputtering method, it is possible to simultaneously sputter a wafer to be sputtered with a large area, rather than using a sputtering gun with a limited irradiation range of ionized atoms. Therefore, in a wafer on which a plurality of element structures are formed, variations between element structures can be suppressed and sputtering can be performed at high speed. In the present embodiment, Ar is used as an inert gas, and Ag oxidation formed by oxidizing the antioxidant layer 28 made of Ag at an etching rate of about 10 nm / min in an Ar atmosphere with a degree of vacuum of 0.5 Pa. The physical layer 28A was etched. The NiAg alloy layer formed in the heat treatment step S3 at the interface between the Ag oxide layer 28A made of Ag and the passivation layer 27 made of Ni has a lower etching rate by reverse sputtering than the antioxidant layer 28 made of Ag. By selecting a condition for etching the Ag oxide layer 28A slightly thicker than the Ag layer constituting the prevention layer 28, a part of the NiAg alloy layer 27A containing hillocks is effectively removed and the passivation layer 27 is removed. It is possible to expose the surface. Alternatively, the NiAg alloy layer 27A can be entirely removed (in this case, a part of the Ag layer 26A may be removed) to expose the surface made of Ag.

  Here, when the thickness of the passivation layer 27 is relatively small, Ni atoms constituting the passivation layer 27 are interdiffused with Ag atoms constituting the reflective layer 26 and the antioxidant layer 28 as a whole in the heat treatment step S3. The passivation layer 27 is entirely changed to the NiAg alloy layer 27A. Then, since the etching rate of Ag is faster than the etching rate of the NiAg alloy, the NiAg alloy is not removed so that the NiAg alloy layer 27A is removed, but the NiAg alloy has the same thickness as that of the passivation layer 27 before alloying. The layer 27A is preferably removed to expose the NiAg alloy surface.

(S5: Cap layer forming step)
A cap layer 32 is formed so as to cover the reflective electrode layer 31 on the structure shown in FIG.

  The cap layer 32 employs a material that is difficult to migrate itself and that can prevent migration of the constituent material of the reflective electrode layer 31. Examples of the material of the cap layer 32 include Ti or TiW. The desired pattern can be formed by using the lift-off method or etching as in the case of the p-electrode. However, since the material of the cap layer is a material system that is difficult to etch without remaining, it should be formed by the lift-off method. Is desirable. As the film forming method, it is desirable to use a sputtering method because the coverage of the stepped portion is better than that of electron beam evaporation. The reason why the sputtering method is used is that the cap layer 32 can be formed in the same processing apparatus as the reverse sputtering method used in the reflective electrode layer forming step S4.

(S6: Connection metal forming step)
A bonding metal layer 33 is formed on the cap layer 32 formed in step S6 (FIG. 2D).

  The bonding metal layer 33 is a metal layer for bonding the support substrate 50 to the semiconductor film. The bonding metal layer 33 is formed by sequentially forming a diffusion prevention layer (not shown) and a bonding layer (not shown) on the cap layer 32. Specifically, Pt was used as the diffusion preventing layer, and Au or AuSn was used as the bonding layer. An additional metal layer may be inserted between the cap layer 32 and the diffusion prevention layer as another configuration of the bonding metal layer 33. Thereby, adhesiveness with the cap layer 32 can further be improved. Examples of the metal layer that improves the adhesion to the cap layer 32 include a metal layer made of Ti or Ni.

(S7: Support substrate bonding step)
The bonding metal layer 33 and the support substrate 50 are bonded.

  The support substrate 50 may have a thermal expansion coefficient comparable to that of the growth substrate 10 or the semiconductor film 20. For this purpose, compressive stress or stretching stress is applied to the growth substrate 10, the semiconductor film 20, or the support substrate 50 due to heat generated when the semiconductor light emitting device 1 is driven, and the semiconductor light emitting device 1 as a whole is distorted or cracked. It is for preventing. Further, the support substrate 50 can have a high thermal conductivity. This is to dissipate heat generated during driving. Specifically, the support substrate is metallized Si which is Si having AuSn or the like formed on the surface. The support substrate is not limited to a semiconductor substrate made of Si, but is a semiconductor substrate made of Ge, GaAs, GaP or the like, a metal substrate made of Fe, Ge alloy, Cu, Cu alloy, Al, Al alloy, or the like. Also good.

(S8: Growth Substrate Removal Step S8)
A part of the growth substrate 10 is removed, and a part of the n-type semiconductor layer 21 is exposed. This is because an opening for forming the n-electrode 40 is provided.

  Specifically, a photoresist is applied to the surface of the growth substrate 10 and patterned into a desired shape using a photolithography technique. Next, it is put into a reactive ion etching (RIE) apparatus, and etching is performed until a part of the n-type semiconductor layer 21 is exposed, whereby a part of the growth substrate 10 is removed. It is also possible to remove all of the growth substrate 10 and expose all of the n-type semiconductor layer 21. As the removal method, the entire growth substrate 10 is peeled off using an existing peeling method, such as laser lift-off, or a substrate is peeled off by a mechanical / chemical method with a sacrificial layer for peeling in the middle of forming a semiconductor film.

(S9: n-electrode formation step)
An n-electrode 40 is formed on the exposed surface of the n-type semiconductor layer 21.

  Specifically, Ti having a thickness of 1 nm and Al having a thickness of 1000 nm are sequentially formed on the exposed surface of the n-type semiconductor layer 21 using an existing electron beam evaporation method, and an n-electrode pattern is formed. The n-electrode 40 is formed by the lift-off method.

(S10: element isolation step)
The semiconductor film 20 and the support substrate 80 are cut, and the semiconductor light emitting element is separated into pieces. Specifically, for example, the conventional laser scribe / breaking, point scribe / playking, dicing, and the like were used. Through the above steps, the semiconductor light emitting element 1 as shown in FIG. 2E is completed.

  A method for manufacturing the semiconductor light emitting device 1 according to Example 2 of the present invention will be described below with reference to FIGS. FIG. 3 is a flowchart showing manufacturing steps of the semiconductor light emitting device 1 according to Example 2 of the present invention. 4A and 4B are cross-sectional views of the semiconductor light emitting device 1 in several manufacturing steps. The manufacturing steps S21 to S26 of the second embodiment shown in FIG. 3 are the same as the manufacturing steps S1 to S6 of the first embodiment shown in FIG. In Example 1, as shown in FIG. 2D, the cap layer 32 was formed so that the p-type semiconductor layer 23 was not exposed. In the second embodiment, as shown in FIG. 4A, the cap layer 32 is formed so that a part of the p-type semiconductor layer 23 is exposed, and it is different from the first embodiment in this respect. Should.

(S27: n-type semiconductor exposure process)
A part of the p-type semiconductor layer 23 and the active layer 22 in the structure shown in FIG. 4A is removed, and a part of the n-type semiconductor layer 21 is exposed.

  Specifically, a photoresist is applied to the surface of the semiconductor layer 20, and is patterned into a desired shape using a photolinographic technique. Next, it is put into a reactive ion etching (RIE) apparatus, and the region where the semiconductor layer 20 is exposed (region where a recess is desired to be formed) is etched until a part of the n-type semiconductor layer 21 is exposed.

(S28: n-electrode formation step)
An n-electrode 40 is formed on the surface of the n-type semiconductor layer 21 exposed in the n-type semiconductor exposure step S22.

  Specifically, the n electrode 40 was formed by sequentially forming Ti having a layer thickness of 1 nm and Al having a layer thickness of 1000 nm by electron beam evaporation, and patterning was performed by a lift-off method.

(S29: Joining metal layer forming step)
A bonding metal layer 60 is formed on the n-electrode 40 formed in step S21.

  The bonding metal layer 60 is a metal layer for bonding the n-electrode 40 and the support substrate 50 together. The bonding metal layer 60 is formed by sequentially forming a diffusion prevention layer (not shown) and a bonding layer (not shown) on the n-electrode 40. Specifically, Pt is used as the diffusion preventing layer, and Au or AuSn is used as the bonding layer. In the bonding metal layer 60 having another configuration, a metal layer, a diffusion prevention layer, and a bonding layer that improve adhesion to the n electrode 40 are sequentially formed on the n electrode 40. Examples of the metal layer that improves the adhesion to the n-electrode 40 include a metal layer made of Ti or Ni.

(S30: Support substrate bonding step)
The bonding metal layer 33 and the bonding metal layer 60 are bonded to the support substrate 50.

  The support substrate 50 may have a thermal expansion coefficient comparable to that of the growth substrate 10 or the semiconductor film 20. This is because compressive stress or expansion stress is applied to the growth substrate 10, the semiconductor film 20, or the support substrate 50 due to heat generated when the semiconductor light emitting device 1 is driven, and the semiconductor light emitting device 1 as a whole is distorted or cracked. This is to prevent it. Further, the support substrate 50 can have a high thermal conductivity. This is to dissipate heat generated during driving. Specifically, the material of the support substrate 50 is metallized Si, which is Si having AuSn or the like formed on the surface. The support substrate is not limited to a semiconductor substrate made of Si, but is a semiconductor substrate made of Ge, GaAs, GaP or the like, a metal substrate made of Fe, Ge alloy, Cu, Cu alloy, Al, Al alloy, or the like. Also good. On the support substrate 50, the p-electrode wiring and the n-electrode wiring respectively connected to the connection metal layer 33 formed above the reflective electrode 31 and the connection metal layer 60 formed on the n-electrode 40 are electrically connected. Electrically insulated wiring is provided. The support substrate 50 is bonded to the growth substrate 10 so that the p-electrode wiring and the n-electrode wiring are arranged with the metal layer 33 and the connection metal layer 60, respectively. As a bonding method, an existing method such as eutectic bonding is used.

(S31: Element isolation step)
The semiconductor film 20 and the support substrate 80 are cut, and the semiconductor light emitting element is separated into pieces. Specifically, for example, the conventional laser scribe / breaking, point scribe / playking, dicing, and the like were used. Through the above steps, the semiconductor light emitting element 2 as shown in FIG. 4B is completed.

  In the second embodiment as well, the growth substrate may be removed by arbitrarily using a growth substrate removing step between the support basic bonding step 30 and the element isolation step 31. Moreover, in the said Example 1 or 2, the process etc. which form the unevenness | corrugation for improving light extraction on the light extraction surface can be added suitably.

  In Example 1 or 2, the supporting base is formed by bonding the supporting substrate to the semiconductor film through the bonding metal layer forming step S6 or S29 and the supporting substrate bonding step S7 or S30. When a metal substrate is formed as the support substrate, the support substrate can be formed by laminating metals using a plating method instead of the bonding metal layer forming step and the support substrate bonding step. For example, Cu can be laminated by electroplating to form a Cu substrate.

  In Example 1 or 2, a sapphire substrate is used as the growth substrate, but a GaN substrate or the like can be used as the growth substrate. In this case, the growth substrate can also be removed depending on the mode. However, it can be left as part of the semiconductor light emitting device.

  FIG. 5 is a graph showing the reflection spectrum of the semiconductor light emitting device 1 or 2 formed by using the manufacturing method of Example 1 or 2 of the present invention. The vertical axis represents reflectance (%), and the horizontal axis represents wavelength (nm). In FIG. 5, a solid line indicates a buffer layer 25 made of Ni having a thickness of 1 nm, a reflective layer 26 made of Ag having a thickness of 150 nm, a passivation layer 27 made of Ni having a thickness of 2 nm, and an antioxidant layer made of Ag having a thickness of 50 nm. 2 shows the reflectance of a semiconductor light emitting device (hereinafter referred to as sample A) according to an embodiment of the present invention in which the reflective electrode precursor layer 31 having 28 is heat-treated. On the other hand, the dotted line has a buffer layer 25 made of Ni with a layer thickness of 1 nm, a reflective layer 26 made of Ag with a layer thickness of 200 nm, and a passivation layer 27 made of Ni with a layer thickness of 2 nm, but without the antioxidant layer 28. The reflectance of the semiconductor light emitting device (hereinafter referred to as sample B) according to a comparative example when heat treatment is performed on the reflective electrode precursor layer is shown. The reflection spectra of sample A and sample B decrease as the wavelength of light becomes shorter as in the case of bulk Ag. Comparing the reflection spectra of sample A and sample B, it can be seen that the reflection spectrum of sample A is higher than that of sample B in the wavelength range of 350 nm to 550 nm. In particular, focusing on 450 nm near the wavelength of light emitted from the semiconductor light emitting element, sample A has a reflectivity of 93.3%, and sample B has a reflectivity of 89.7% at 450 nm. Considering that the reflectance of the Ag layer having a layer thickness of 200 nm before heat treatment is 96.3%, the semiconductor light emitting device can achieve a reflectance closer to the ideal value by using the manufacturing method of the present invention. Is shown.

As a result of examining the contact resistance using TLM (Transmission Line Model) measurement, the contact resistance of the reflective electrode layer from which the reflection spectrum of Sample A was obtained was 10 ⁻⁴ [Ωcm ² ] or less. On the other hand, the contact resistance of the reflective electrode layer from which the reflection spectrum of Sample B was obtained is 10 ⁻³ to 10 ⁻⁴ [Ωcm ² ], and the reflective electrode layer produced using the production method of the present invention is The result was a contact resistance that was nearly an order of magnitude lower.

  According to the method for manufacturing a semiconductor light emitting device of the present invention, it is possible to form a reflective electrode layer having a high reflectance at the wavelength of light generated in the semiconductor film. Since such light can be reflected by the reflective electrode layer at a high reflectance and the reflected light can be emitted through the light extraction surface, a high-luminance semiconductor light emitting device can be manufactured.

  According to the method for manufacturing a semiconductor light emitting device of the present invention, since the heat treatment step is performed in a state where the surface of the metal passivation layer of the reflective electrode layer is covered with the antioxidant layer, the metal passivation layer is oxidized in the heat treatment step. Therefore, a reflective electrode layer having a low contact resistance can be formed. Such low contact resistance suppresses a decrease in potential applied to the semiconductor layer of the semiconductor film formed below the reflective electrode layer, so that the driving voltage of the semiconductor light emitting element can be reduced.

  According to the method for manufacturing a semiconductor light emitting device of the present invention, hillocks that can be formed at the interface between the metal passivation layer and the antioxidant layer of the reflective electrode layer can be alloyed with the antioxidant layer to reduce its size, The antioxidant layer can be removed together with the alloy layer containing hillocks. Hillocks can be reduced and the metal passivation layer can be planarized. Steps due to hillocks are reduced in the bonding process. As a result, it is possible to improve a decrease in yield such as bonding failure with the support substrate and peeling. Furthermore, since the level difference due to hillocks is reduced, the reflective electrode layer and the bonding layer for bonding are bonded together as a whole, so that the current path between the reflective electrode layer and the bonding layer is widened. Thereby, a uniform potential is applied to the semiconductor layer of the semiconductor film formed under the reflective electrode layer.

  According to the method for manufacturing a semiconductor light emitting device of the present invention, the reflective layer dominant to the reflectance of the reflective electrode layer is prevented from being oxidized by the metal passivation layer. Atoms constituting the reflective layer combine with oxygen to have a low reflectivity and are less likely to be converted to an insulated oxide, reducing reflectivity degradation and contact resistance degradation even at high temperatures for long periods of time. . This means that even when the semiconductor light emitting device of the present invention is driven for a long time and generates heat, the light output is deteriorated due to a decrease in reflectivity and the drive voltage is deteriorated due to an increase in contact resistance due to oxidation insulation. Can be suppressed.

  The present invention relates to a method for manufacturing a semiconductor light emitting device, and more particularly to a method for manufacturing a semiconductor light emitting device having a reflective electrode layer.

  2. Description of the Related Art A semiconductor light emitting device is known that includes a semiconductor film in which a p-type semiconductor layer, an active layer, and an n-type semiconductor layer are stacked, and a support substrate bonded to the semiconductor film via a reflective electrode layer. The reflective electrode layer functions as an electrode and forms a light reflecting surface that reflects light emitted from the active layer toward the light emitting surface, thereby increasing the brightness of the semiconductor light emitting device.

  For example, Patent Document 1 describes a semiconductor light emitting device in which a reflective electrode layer having an Ag film is provided on a GaN-based semiconductor film. Non-Patent Document 1 describes a semiconductor light emitting device in which a reflective electrode layer having an Ag layer is provided on a GaN-based semiconductor film.

Patent Publication 2005-175462

Appl. Phys. Lett. 95, 062108 (2009).

In order to improve the reflection characteristics of the reflective electrode layer and achieve high brightness of the semiconductor light emitting device, a buffer layer made of Ni with a thickness of 1 nm on the p-GaN layer, a reflective layer made of Ag with a thickness of 150 nm, A three-layer reflective electrode layer in which a passivation layer made of Ni with a thickness of 2 nm was sequentially formed was studied. As a result of heat-treating the three-layer reflective electrode layer in order to reduce the contact resistance of the reflective layer made of Ag, a reflectance of about 84% and a contact resistance of about 10 ⁻⁵ Ωcm ² were achieved.

  However, the reflectance of the three-layer reflective electrode layer after the heat treatment is 10% or more lower than the reflectance of about 95% of the single-layer reflective layer made of Ag that has not been heat-treated. Since the reflective electrode layer is usually an ohmic contact layer with respect to the semiconductor film and also has a function of the reflective layer, the low reflectivity is directly related to a decrease in the light output and becomes a big problem. The thickness of the passivation layer made of Ni is 2 nm, and the thickness is about the diameter of Ni atoms (0.25 nm) × 8. Therefore, Ni constituting the passivation layer is oxidized at the moment when it is exposed to the atmosphere after lamination, and can be combined with oxygen to form a NiO insulating layer. When the heat treatment is performed on the three-layer reflective electrode layer in a state where the passivation layer is oxidized, the function of preventing the oxidation of the reflective layer made of Ag under the passivation layer is lowered. Thus, an Ag oxide or an AgNi oxide is formed. As a result, the reflective function of the reflective layer is lowered, and there is a problem that the reflectance is further lowered as compared with a reflective electrode layer composed of a single reflective layer made of Ag that has not been heat-treated. When only the thickness of the passivation layer made of Ni is simply increased, the ratio of Ni having a lower reflectance than Ag constituting the reflective layer is increased, and thus the reflectance is lowered. On the other hand, when the layer thicknesses of both the reflective layer made of Ag and the passivation layer made of Ni are excessively increased, the oxidation of the reflective layer accompanying the oxidation of the passivation layer can be prevented. However, as the layer thickness increases, the layer thickness of another layer constituting the semiconductor light emitting element also increases. Therefore, the time and cost required for the manufacturing process of the semiconductor light emitting device are increased. Furthermore, the increase in the layer thickness reduces the heat dissipation of the semiconductor light emitting element, which may cause another problem due to heat generated during driving.

  Furthermore, in the three-layer reflective electrode layer, it has been confirmed that there are a plurality of fine concavo-convex structures called hillocks on the surface of the passivation layer made of Ni. Although details regarding the hillock generation mechanism are unknown, it occurs after the heat treatment for the three-layer reflective electrode layer. As one of the mechanisms, the thermal expansion coefficient of Ag constituting the reflective layer is GaN constituting the semiconductor film. Therefore, it is considered that a thermal compressive stress is applied to the three-layer reflective electrode layer together with heating, and atoms are diffused on the surface. When a large number of such concavo-convex structures are present, poor bonding occurs in the bonding process with the support substrate. Therefore, in the three-layer reflective electrode layer, it is inevitable that the overall bonding strength of the semiconductor light emitting element is reduced, and the yield in the bonding process such as peeling is reduced.

  Further, in the three-layer reflective electrode layer, Ni in the passivation layer after the heat treatment is oxidized and insulated to become a NiO insulating layer. Since the oxide layer is present on the outermost surface of the three-layer reflective electrode layer, adhesion between the reflective electrode layer and the bonding layer that can be formed on the reflective electrode layer is low, which causes peeling. Further, the contact resistance is increased by the NiO insulating layer, and the driving voltage of the semiconductor light emitting element is increased.

  The present invention provides a method for manufacturing a semiconductor light emitting device capable of achieving higher brightness by reducing the reflectance of a reflective electrode layer, reducing contact resistance, improving resistance to deterioration over time, and preventing occurrence of peeling. For the purpose.

  According to another aspect of the present invention, there is provided a method for manufacturing a semiconductor light-emitting device, comprising: a reflective electrode including a semiconductor film; and a metal reflective layer provided on the semiconductor film and having light reflectivity with respect to an emission wavelength of light emitted from the semiconductor film; A method of manufacturing a semiconductor light emitting device comprising: a first conductive type first semiconductor layer, an active layer, and a second conductive type second semiconductor layer sequentially stacked; and Forming a metal buffer layer on the second semiconductor layer for relaxing lattice mismatch between the metal reflective layer and the semiconductor film; forming the metal reflective layer on the metal buffer layer; Forming a metal passivation layer for preventing the metal reflective layer from detaching on the metal reflective layer, forming an antioxidant layer for preventing the metal passivation layer from being oxidized on the metal passivation layer, and Performing a heat treatment so that mutual diffusion occurs between the metal passivation layer and the antioxidant layer to form an alloy layer at the interface between these layers; and at least part of the alloy layer on the alloy layer Forming the reflective electrode by removing together with the formed layer.

  According to the semiconductor light-emitting device of the present invention, in a semiconductor light-emitting device having a reflective electrode layer, it is possible to achieve high brightness, reduced contact resistance, prevention of peeling, and improved resistance to deterioration over time by improving reflectivity. it can.

FIG. 1 is a flowchart of a method for manufacturing a semiconductor light emitting device according to Example 1 of the present invention. 2A to 2B are cross-sectional views illustrating a method for manufacturing a semiconductor light emitting device according to Example 1 of the present invention. 2B-2 and FIG. 2C are cross-sectional views illustrating a method for manufacturing a semiconductor light emitting device according to Example 1 of the present invention. 2D and 2E are cross-sectional views illustrating a method for manufacturing a semiconductor light emitting device according to Example 1 of the present invention. FIG. 3 is a flowchart of a method for manufacturing a semiconductor light emitting device according to Example 2 of the present invention. 4A and 4B are cross-sectional views illustrating a method for manufacturing a semiconductor light emitting device according to Example 2 of the present invention. FIG. 5 is a diagram showing a reflection spectrum of the semiconductor light emitting device according to the example of the present invention.

  Embodiments of the present invention will be described below with reference to the drawings. In the drawings shown below, substantially the same or equivalent components and parts are denoted by the same reference numerals.

  A method for manufacturing the semiconductor light emitting device 1 according to Example 1 of the present invention will be described below with reference to FIGS. 1 and 2. FIG. 1 is a flowchart showing manufacturing steps of a semiconductor light emitting device 1 according to Example 1 of the present invention. 2A to 2D are cross-sectional views of the semiconductor light emitting device 1 in several manufacturing steps.

(S1: Semiconductor film forming step)
A growth substrate 10 is prepared, and a semiconductor film 20 including an n-type semiconductor layer 21, an active layer 22, and a p-type semiconductor layer 23 is formed on the growth substrate 10 (FIG. 2A).

Specifically, the semiconductor film 20 is made of, for example, Al _x In _y Ga _z N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z ≦ 1, x + y + z = 1). . The growth substrate 10 is, for example, a C-plane sapphire substrate.

The n-type semiconductor layer 21 is formed by stacking a low-temperature buffer layer, a base GaN layer, and a Si-doped n-type GaN layer on the growth substrate 10. Specifically, the growth substrate 10 is put into an MOCVD apparatus, the substrate temperature is set to about 1000 ° C., and heat treatment is performed for about 10 minutes in a hydrogen atmosphere (thermal cleaning). Subsequently, the substrate temperature (growth temperature) is set to 500 ° C., and TMG (trimethylgallium) (flow rate 10.4 μmol / min) and NH ₃ (flow rate 3.3 LM) are supplied for about 3 minutes to form a low-temperature buffer layer made of GaN. . Next, the substrate temperature (growth temperature) is raised to 1000 ° C. and held for about 30 seconds to crystallize the low-temperature buffer layer. Subsequently, while maintaining the substrate temperature (growth temperature) at 1000 ° C., TMG (flow rate 45 μmol / min) and NH ₃ (flow rate 4.4 LM) are supplied for about 20 minutes to form a base GaN layer having a thickness of about 1 μm. Next, TMG (flow rate 45 μmol / min), NH ₃ (flow rate 4.4 LM) and SiH ₄ (flow rate 2.7 × 10 ⁻⁹ μmol / min) as a dopant gas are supplied for about 60 minutes at a substrate temperature (growth temperature) of 1000 ° C. Then, an n-type GaN layer having a thickness of about 4 μm is formed. Through the above steps, the n-type semiconductor layer 21 is formed on the growth substrate 10.

Subsequently, an active layer 22 is formed on the n-type semiconductor layer 21. In this embodiment, the active layer 22 has a multiple quantum well structure made of InGaN / GaN. Five cycles of growth are performed with InGaN / GaN as one cycle. Specifically, TMG (flow rate 3.6 μmol / min), TMI (trimethylindium) (flow rate 10 μmol / min), NH ₃ (flow rate 4.4 LM) are supplied for about 33 seconds at a substrate temperature (growth temperature) of 700 ° C. An InGaN well layer having a thickness of about 2.2 nm is formed, and then TMG (flow rate 3.6 μmol / min) and NH ₃ (flow rate 4.4 LM) are supplied for about 320 seconds to form a GaN barrier layer having a thickness of about 15 nm. . The active layer 22 is formed by repeating this process for five cycles.

The p-type semiconductor layer 23 is formed by laminating a p-type AlGaN cladding layer and an Mg-doped p-type GaN layer. Specifically, following the previous step, the substrate temperature (growth temperature) is raised to 870 ° C., TMG (flow rate 8.1 μmol / min), TMA (trimethylaluminum) (flow rate 7.5 μmol / min), NH ₃ (flow rate). 4.4LM) and Cp ₂ Mg (bis-cyclopentadienyl Mg) (flow rate 2.9 × 10 ⁻⁷ μmol / min) as a dopant are supplied for about 5 minutes to form a p-type AlGaN cladding layer having a thickness of about 40 nm. Subsequently, while maintaining the substrate temperature (growth temperature), TMG (flow rate 18 μmol / min), NH ₃ (flow rate 4.4 LM) and Cp ₂ Mg (flow rate 2.9 × 10 ⁻⁷ μmol / min) as a dopant for about 7 minutes. Then, a p-type GaN layer having a thickness of about 150 nm is formed. Through the above steps, the p-type semiconductor layer 23 is formed on the surface of the active layer 22.

(S2: Reflective electrode precursor layer forming step)
A buffer layer 25, a reflective layer 26, a passivation layer 27, and an antioxidant layer 28 are sequentially formed on the p-type semiconductor layer 23 to form a reflective electrode precursor layer 30 (FIG. 2B). In this embodiment, the buffer layer 25 is made of Ni having a layer thickness of 1 nm. The reflective layer 26 is made of Ag having a layer thickness of 150 nm. The passivation layer is made of Ni having a layer thickness of 2 nm. The antioxidant layer 28 is made of Ag having a layer thickness of 50 nm.

  The buffer layer 25 of the reflective electrode precursor layer 30 can alleviate the lattice mismatch between the p-type semiconductor layer 23 and the reflective layer 26, and can be a metal layer with good electrical conductivity. Further, the buffer layer 25 may be a metal layer that can interdiffuse with the reflective layer 26 in a later heat treatment step. In the heat treatment step, the buffer layer 25 and the reflective layer 26 are mutually diffused and alloyed in the vicinity of the interface, so that a decrease in reflectance due to the buffer layer 25 itself can be suppressed. Furthermore, the buffer layer 25 can prevent the atoms constituting the reflective layer 26 from diffusing into the p-type semiconductor layer 23. Thus, the buffer layer 25 can have a smaller diffusion coefficient than the reflective layer 26. The layer thickness of the buffer layer 25 can alleviate the lattice mismatch between the p-type semiconductor layer 23 and the reflective layer 26, minimizes the influence on the reflectance of the reflective layer 26, and makes contact with the entire reflective electrode layer. It can be set so that the resistance does not increase excessively. When the thickness of the buffer layer 25 is too small, the lattice mismatch between the p-type semiconductor layer 23 and the reflective layer 26 cannot be sufficiently relaxed, and the reflective layer 26 formed on the buffer layer 25 has Due to the lattice mismatch, atoms constituting the reflective layer 26 may be aggregated in a specific region in the reflective layer 26 to increase the density of the aggregated domain structure. With such a structure, the layer thickness of the reflective layer 26 becomes non-uniform or a step is generated on the surface thereof. High reflectivity cannot be obtained due to light scattering at the step. On the contrary, when the layer thickness of the buffer layer 25 is excessive, the drop of the reflectance by the buffer layer 25 itself becomes remarkable, and the contact resistance also increases.

  Specifically, Ni was used as the material of the buffer layer 25, and the layer thickness was set to 1 nm. The layer thickness of Ni is preferably 0.5 nm or more and 5 nm or less, more preferably 1 nm or more and 2 nm or less. When the Ni layer thickness is too thin, an aggregated domain structure that cannot be relaxed even by heat treatment can occur in the reflective layer 26 made of Ag. On the other hand, if the Ni layer thickness is excessive, the reflectance of Ni itself is 60-70%, so that the decrease in reflectance due to Ni itself cannot be ignored, and the contact resistance increases. Other material candidates for the buffer layer 25 may be a metal such as Ti or an alloy containing Ti that improves adhesion as well as Ni. However, Ni is preferred because other candidates have a lower reflectance than when Ni is used.

  The reflective layer 26 of the reflective electrode precursor layer 30 can be made of a metal layer having high reflectivity and high electrical conductivity. Further, the reflective layer 26 may be a metal layer that can diffuse mutually in the vicinity of the respective interfaces between the buffer layer 25 and the passivation layer 27 in a later heat treatment step. In the heat treatment step, by interdiffusion in the vicinity of each interface between the buffer layer 25 and the passivation layer 27 and alloying in the vicinity of these interfaces, a decrease in the reflectance in the buffer layer 25 is suppressed, It is possible to alleviate layer thickness non-uniformity and steps that may occur at the interfaces between the buffer layer 25 and the passivation layer 27. The layer thickness of the reflective layer 26 is set so that sufficient reflectance can be obtained. When the layer thickness of the reflective layer 26 is too small, the reflectance is lowered. On the contrary, when the thickness of the reflective layer 25 is excessive, there is no particular problem in the element characteristics such as reflectance, but the time and cost required for the process increase.

  Specifically, Ag having high reflection characteristics was used as the material of the reflective layer 26, and the layer thickness was set to 150 nm. The layer thickness of Ag is preferably 50 nm to 200 nm, and more preferably 100 nm to 200 nm. When the layer thickness of Ag is too small, the reflectance is lowered. In our experimental results, the reflectance is clearly reduced when the thickness of the Ag single layer is less than 70 nm, and almost saturated at 100 nm or more. Even if the Ag layer thickness is increased, it seems that there is no particular problem in the element characteristics such as reflectance, but about 200 nm or less is desirable in order to suppress the time and cost required for the manufacturing process. Other material candidates for the reflective layer 25 include Al, Rh, or alloys containing these, which are inferior to the reflectivity of Ag but have a relatively high reflectivity.

  The passivation layer 27 of the reflective electrode precursor layer 30 can be a metal layer that prevents diffusion and desorption of atoms constituting the reflective layer 26 and has good electrical conductivity characteristics. Further, the passivation layer 27 may be a metal layer that can interdiffuse with the reflective layer 26 in a later heat treatment step. When the passivation layer 27 and the reflective layer 26 are mutually diffused and both are alloyed in the vicinity of the interface, it is possible to alleviate the unevenness of the layer thickness and the level difference generated in the reflective layer 26. Thereby, the reflective layer 26 can be further flattened, and light scattering due to unevenness in layer thickness or steps can be suppressed. Further, the passivation layer 27 can prevent atoms constituting the reflective layer 26 from being detached from the antioxidant layer 28 on the passivation layer 27 during the heat treatment. Furthermore, the passivation layer 27 can prevent the atoms constituting the reflective layer 26 from diffusing into the cap layer formed on the passivation layer 27. Therefore, atoms constituting the reflective layer 26 may have a smaller diffusion coefficient in the passivation layer 27. The thickness of the passivation layer 27 is set so that diffusion of atoms constituting the reflective layer 26 can be prevented, and unevenness or steps in the layer thickness that can occur in the reflective layer 26 can be reduced. When the passivation layer 27 is too small, the passivation effect on the reflective layer 26 becomes weak, and the oxidation of the reflective layer 26 cannot be prevented. On the other hand, when the passivation layer 27 is excessive, the reflectance decreases as in the case of the buffer layer 25, and an uneven structure that causes irregular reflection such as hillocks occurs in the passivation layer 27.

  Specifically, Ni was used as the material for the passivation layer 27, and the layer thickness was set to 1 nm. The layer thickness of Ni is preferably 0.5 nm or more and 10 nm or less, more preferably 1 nm or more and 3 nm or less. When the layer thickness of Ni is too small, the diffusion of atoms constituting the reflective layer made of Ag cannot be prevented. On the other hand, when the Ni layer thickness is excessive, it is expected that the reflectance decreases by itself as in the case of the buffer layer made of Ni, and the width and height of the hillock are expected to increase. In the reflective electrode layer forming step S4, it becomes difficult to remove hillocks. Other material candidates for the passivation layer 27 may be metals such as Ti and alloys containing Ti that improve adhesion as well as Ni. However, Ni is preferred because other candidates have a lower reflectance than when Ni is used.

  The anti-oxidation layer 28 of the reflective electrode precursor layer 30 prevents the passivation layer 27, the reflective layer 26 and the buffer layer 25 from being oxidized during the subsequent heat treatment step S3, has good electrical conduction characteristics, and is a passivation layer. This is a metal layer for covering an unnecessary concavo-convex structure such as hillock that can be formed when forming the layer 27 or during heat treatment. Furthermore, the antioxidant layer 28 may be a metal layer that interdiffuses at the interface with the passivation layer 27 in the heat treatment step S3. The anti-oxidation layer 28 can relieve concavo-convex structures such as hillocks that can be formed on the passivation layer 27 by interdiffusion with the passivation layer 27 in the heat treatment step. Further, when the sputtering rate of the atoms constituting the concavo-convex structure such as hillock is smaller than the sputtering rate of the atoms constituting the antioxidant layer 28 due to such interdiffusion, the antioxidant layer 28 is removed first, The structure corresponding to the concavo-convex structure such as hillock is prevented from remaining on the passivation layer 27. Since the antioxidant layer 28 is removed in a later step, it can be a metal layer that can be easily removed by etching or the like. When the thickness of the antioxidant layer 28 is too small, an unnecessary structure such as hillock existing on the passivation layer 27 cannot be covered. Therefore, in the subsequent removal process of the antioxidant layer 28, hillock or the like is sufficiently removed. It cannot be removed. Conversely, when the thickness of the antioxidant layer 28 is excessive, the metal atoms constituting the antioxidant layer 28 migrate to the passivation layer 27, the reflective layer 26, and the buffer layer 25 in the heat treatment step of the reflective electrode precursor layer 30. As a result, an unnecessary aggregated structure is formed, and the reflectance is reduced by scattering.

  Specifically, Ag was used as the material of the antioxidant layer 28, and the layer thickness was set to 50 nm. The thickness of the antioxidant layer 28 made of Ag is preferably 5 nm or more and 50 nm or less, more preferably 10 nm or more and 30 nm or less. When the thickness of the antioxidant layer 28 made of Ag is less than 5 nm, the hillocks generated on the surface of the passivation layer from the Ni layer cannot be sufficiently covered, so that the hillocks cannot be removed. On the other hand, if the thickness of the antioxidant layer 28 made of Ag is excessive, it diffuses to the antireflection layer 26 made of Ag through the lower passivation layer made of Ni after the heat treatment and is oxidized in the antireflection layer 26. An aggregate structure in which Ag atoms from the prevention layer 28 are aggregated can be formed. Another candidate material for the antioxidant layer 28 is a material that can diffuse well with the passivation layer 27 made of Ni and can be removed in a later reverse sputtering step.

  Next, a method for forming and patterning the buffer layer 25, the reflective layer 26, the passivation layer 27, and the antioxidant layer 28 will be described. These film formation structures are formed by, for example, an existing technique such as a dry process or a wet process, or a combination thereof. Examples of the dry process include electron beam evaporation and sputtering, and examples of the wet process include plating. However, since a high reflectivity can be obtained by forming a dense film and a layer thickness controllability on the order of nm is required, it is preferable that all be formed by sputtering. After film formation, a desired resist mask having an opening in a part of the reflective electrode precursor layer is formed by photolithography. A part of the reflective electrode precursor layer exposed in the opening is etched, the resist mask is removed, and a buffer layer 25 and a reflective layer 26 are formed on the p-type semiconductor layer 23 as shown in FIG. Then, the reflective electrode precursor layer 30 in which the passivation layer 27 and the antioxidant layer 28 are sequentially stacked is formed. The etching is performed using an etching solution such as a commercially available Ag etching solution or a mixed acid solution containing nitric acid. In the first embodiment, etching is performed using an etchant composed of a mixed acid solution of pure water: nitric acid: acetic acid: phosphoric acid = 1: 1: 8: 10. As another patterning method for the reflective electrode precursor layer 30, a desired photoresist mask having an opening in the reflective electrode precursor layer formation region is formed by lift-off, and then the buffer layer 25 is formed in the opening of the photoresist mask. Then, the reflective layer 26, the passivation layer 27, and the antioxidant layer 28 are sequentially laminated, and then the photoresist pattern is removed to form the reflective electrode precursor layer 30 as shown in FIG.

  Through the above steps, a reflective electrode precursor layer 30 in which a buffer layer 25, a reflective layer 26, a passivation layer 27, and an antioxidant layer 28 are sequentially stacked is formed on the p-type semiconductor layer 23 (FIG. 2 ( b)).

  The sum of the thickness of the buffer layer 25 and the thickness of the passivation layer 27 is preferably 1/60 or less of the thickness of the reflective layer 26. When the ratio is excessive, the buffer layer 25 and the passivation 27 are diffused into the reflective layer 26 by heat treatment and excessively alloyed. Such alloying reduces the original reflectance of the reflective layer 26.

(S3: Heat treatment step of the reflective electrode precursor layer)
A heat treatment is performed on the reflective electrode precursor layer 30.

  The crystallinity of the buffer layer 25, the reflective layer 26, the passivation layer 27, and the antioxidant layer 28 is improved by the heat treatment process. Further, in the heat treatment step, the atoms constituting the buffer layer 25, the reflective layer 26, the passivation layer 27, and the antioxidant layer 28 are diffused in the vicinity of the interface of the respective layers, thereby occurring in the reflective electrode precursor layer forming step S2. The resulting layer thickness non-uniformity, aggregated structure, and voids in each layer are alleviated. As a result, the reflective layer 26 is flattened, layer thickness non-uniformity and scattering due to steps are suppressed, and high reflectivity is achieved.

  The temperature during the heat treatment is lower than the melting points of the buffer layer 25, the reflective layer 26, the passivation layer 27, and the antioxidant layer 28 of the precursor reflective electrode layer 30, and the buffer layer 25, the reflective layer 26, the passivation layer 27, and the antioxidant layer 28 It is carried out at a temperature that can mutually diffuse. Further, the heat treatment temperature is such that the element structure of the semiconductor film 20 is not affected. When the heat treatment temperature is too low, aggregated structures and voids generated in the buffer layer 25, the reflective layer 26, the passivation layer 27, and the antioxidant layer 28 cannot be relaxed, and improvement in crystallinity and contact resistance cannot be obtained. On the other hand, when the heat treatment temperature is too high, the buffer layer 25, the reflective layer 26, the passivation layer 27, and the antioxidant layer 28 diffuse even outside the vicinity of the interface, and the reflectance can be lowered.

Specific heat treatment conditions will be described. As a condition for realizing a low contact resistance for the buffer layer 25, the reflective layer 26, the passivation layer 27, and the antioxidant layer 28, heat treatment is performed at a temperature of 400 ° C. or higher in an atmosphere containing at least oxygen. More preferably, the heating time is 30 to 120 seconds at a temperature of 450 to 550 ° C. in an atmosphere containing oxygen. When the heating temperature is excessively low and the heating time is excessively short with respect to such conditions, a NiAg alloy formed near the interface by interdiffusing with Ag constituting the antioxidant layer 28 and Ni constituting the passivation layer 27. It becomes insufficient. On the other hand, when the heating temperature is excessively high and the heating time is excessively long, it is difficult to suppress oxidation of Ag constituting the reflective layer 26. Although the oxygen concentration has not been studied, a contact resistance lower than 10 ⁻⁴ [Ωcm ² ] and a high reflection of 93% or higher are obtained by performing a heat treatment for 1 minute at a heating temperature of 500 ° C. in an air atmosphere. Rate is achieved. Furthermore, by performing additional annealing at 300 ° C. or higher in an inert gas (N ₂ , Ar, etc.) atmosphere, a higher reflectance of about 97% at the maximum is achieved. However, this additional heat treatment in the inert gas tends to increase the contact resistance, so that the desired contact resistance and reflectivity can be obtained according to the element shape and the thickness of the Ni constituting the buffer layer 25. It is necessary to adjust the conditions. In the manufacturing method of Example 1, in the subsequent support substrate bonding step S7, a heat treatment of 340 ° C./10 minutes or more is performed in an N ₂ atmosphere to improve the reflectance. In step S3, no additional heat treatment is performed.

  Specifically, after the heat treatment, as shown in FIG. 2B-1, the reflective electrode precursor 30 ′ after the heat treatment was formed on the p-type semiconductor layer 23 by the Ni buffer 25 and the Ag reflection layer 26. The NiAg alloy layer 25A, the Ag reflection layer 26A which is a part of the Ag reflection layer 26 left unalloyed, the NiAg alloy layer formed by the Ag reflection layer 26, the Ni badge passage layer 27, and the Ag antioxidant layer 28 27A, the Ag oxidation preventing layer 28B remaining without being alloyed or oxidized, and the Ag oxide layer 28B formed by oxidizing the surface side of the Ag oxidation preventing layer 28 are considered to be formed. Alternatively, as shown in FIG. 2B-2, the NiAg oxide layer 28C and the Ag antioxidant layer 28, which are formed by oxidizing a part of the NiAg alloy layer 27A, are oxidized on the NiAg alloy layer 27A. It is considered that the Ag oxide layer 28A is formed.

(S4: Reflective electrode layer forming step)
The Ag oxidation preventing layer 28A of the precursor reflective electrode precursor layer 30 ′ after the heat treatment is removed together with a part or all of the NiAg alloy layer 27A to form a reflective electrode layer 31 as shown in FIG. At this time, the Ag oxidation preventing layer 28B or the NiAg oxide layer 28C is also removed depending on the configuration of the reflective electrode precursor layer 30 ′ after the heat treatment.

  A method for removing the oxide layer 28A will be specifically described. The removal of the oxide layer 28A is performed by a reverse sputtering method. The reverse sputtering method generates a plasma composed of inert gas ions in the vicinity of the substrate to be sputtered, and applies a negative acceleration voltage according to the surface binding energy of the substrate material to be sputtered so that the inert gas ions are sputtered. This is a technique in which constituent atoms are ejected from a sputtering target substrate by irradiating the substrate. By using the reverse sputtering method, it is possible to simultaneously sputter a wafer to be sputtered with a large area, rather than using a sputtering gun with a limited irradiation range of ionized atoms. Therefore, in a wafer on which a plurality of element structures are formed, variations between element structures can be suppressed and sputtering can be performed at high speed. In the present embodiment, Ar is used as an inert gas, and Ag oxidation formed by oxidizing the antioxidant layer 28 made of Ag at an etching rate of about 10 nm / min in an Ar atmosphere with a degree of vacuum of 0.5 Pa. The physical layer 28A was etched. The NiAg alloy layer formed in the heat treatment step S3 at the interface between the Ag oxide layer 28A made of Ag and the passivation layer 27 made of Ni has a lower etching rate by reverse sputtering than the antioxidant layer 28 made of Ag. By selecting a condition for etching the Ag oxide layer 28A slightly thicker than the Ag layer constituting the prevention layer 28, a part of the NiAg alloy layer 27A containing hillocks is effectively removed and the passivation layer 27 is removed. It is possible to expose the surface. Alternatively, the NiAg alloy layer 27A can be entirely removed (in this case, a part of the Ag layer 26A may be removed) to expose the surface made of Ag.

  Here, when the thickness of the passivation layer 27 is relatively small, Ni atoms constituting the passivation layer 27 are interdiffused with Ag atoms constituting the reflective layer 26 and the antioxidant layer 28 as a whole in the heat treatment step S3. The passivation layer 27 is entirely changed to the NiAg alloy layer 27A. Then, since the etching rate of Ag is faster than the etching rate of the NiAg alloy, the NiAg alloy is not removed so that the NiAg alloy layer 27A is removed, but the NiAg alloy has the same thickness as that of the passivation layer 27 before alloying. The layer 27A is preferably removed to expose the NiAg alloy surface.

(S5: Cap layer forming step)
A cap layer 32 is formed so as to cover the reflective electrode layer 31 on the structure shown in FIG.

  The cap layer 32 employs a material that is difficult to migrate itself and that can prevent migration of the constituent material of the reflective electrode layer 31. Examples of the material of the cap layer 32 include Ti or TiW. The desired pattern can be formed by using the lift-off method or etching as in the case of the p-electrode. However, since the material of the cap layer is a material system that is difficult to etch without remaining, it should be formed by the lift-off method. Is desirable. As the film forming method, it is desirable to use a sputtering method because the coverage of the stepped portion is better than that of electron beam evaporation. The reason why the sputtering method is used is that the cap layer 32 can be formed in the same processing apparatus as the reverse sputtering method used in the reflective electrode layer forming step S4.

(S6: Connection metal forming step)
A bonding metal layer 33 is formed on the cap layer 32 formed in step S6 (FIG. 2D).

  The bonding metal layer 33 is a metal layer for bonding the support substrate 50 to the semiconductor film. The bonding metal layer 33 is formed by sequentially forming a diffusion prevention layer (not shown) and a bonding layer (not shown) on the cap layer 32. Specifically, Pt was used as the diffusion preventing layer, and Au or AuSn was used as the bonding layer. An additional metal layer may be inserted between the cap layer 32 and the diffusion prevention layer as another configuration of the bonding metal layer 33. Thereby, adhesiveness with the cap layer 32 can further be improved. Examples of the metal layer that improves the adhesion to the cap layer 32 include a metal layer made of Ti or Ni.

(S7: Support substrate bonding step)
The bonding metal layer 33 and the support substrate 50 are bonded.

  The support substrate 50 may have a thermal expansion coefficient comparable to that of the growth substrate 10 or the semiconductor film 20. For this purpose, compressive stress or stretching stress is applied to the growth substrate 10, the semiconductor film 20, or the support substrate 50 due to heat generated when the semiconductor light emitting device 1 is driven, and the semiconductor light emitting device 1 as a whole is distorted or cracked. It is for preventing. Further, the support substrate 50 can have a high thermal conductivity. This is to dissipate heat generated during driving. Specifically, the support substrate is metallized Si which is Si having AuSn or the like formed on the surface. The support substrate is not limited to a semiconductor substrate made of Si, but is a semiconductor substrate made of Ge, GaAs, GaP or the like, a metal substrate made of Fe, Ge alloy, Cu, Cu alloy, Al, Al alloy, or the like. Also good.

(S8: Growth Substrate Removal Step S8)
A part of the growth substrate 10 is removed, and a part of the n-type semiconductor layer 21 is exposed. This is because an opening for forming the n-electrode 40 is provided.

  Specifically, a photoresist is applied to the surface of the growth substrate 10 and patterned into a desired shape using a photolithography technique. Next, it is put into a reactive ion etching (RIE) apparatus, and etching is performed until a part of the n-type semiconductor layer 21 is exposed, whereby a part of the growth substrate 10 is removed. It is also possible to remove all of the growth substrate 10 and expose all of the n-type semiconductor layer 21. As the removal method, the entire growth substrate 10 is peeled off using an existing peeling method, such as laser lift-off, or a substrate is peeled off by a mechanical / chemical method with a sacrificial layer for peeling in the middle of forming a semiconductor film.

(S9: n-electrode formation step)
An n-electrode 40 is formed on the exposed surface of the n-type semiconductor layer 21.

  Specifically, Ti having a thickness of 1 nm and Al having a thickness of 1000 nm are sequentially formed on the exposed surface of the n-type semiconductor layer 21 using an existing electron beam evaporation method, and an n-electrode pattern is formed. The n-electrode 40 is formed by the lift-off method.

(S10: element isolation step)
The semiconductor film 20 and the support substrate 80 are cut, and the semiconductor light emitting element is separated into pieces. Specifically, for example, the conventional laser scribe / breaking, point scribe / playking, dicing, and the like were used. Through the above steps, the semiconductor light emitting element 1 as shown in FIG. 2E is completed.

  A method for manufacturing the semiconductor light emitting device 1 according to Example 2 of the present invention will be described below with reference to FIGS. FIG. 3 is a flowchart showing manufacturing steps of the semiconductor light emitting device 1 according to Example 2 of the present invention. 4A and 4B are cross-sectional views of the semiconductor light emitting device 1 in several manufacturing steps. The manufacturing steps S21 to S26 of the second embodiment shown in FIG. 3 are the same as the manufacturing steps S1 to S6 of the first embodiment shown in FIG. In Example 1, as shown in FIG. 2D, the cap layer 32 was formed so that the p-type semiconductor layer 23 was not exposed. In the second embodiment, as shown in FIG. 4A, the cap layer 32 is formed so that a part of the p-type semiconductor layer 23 is exposed, and it is different from the first embodiment in this respect. Should.

(S27: n-type semiconductor exposure process)
A part of the p-type semiconductor layer 23 and the active layer 22 in the structure shown in FIG. 4A is removed, and a part of the n-type semiconductor layer 21 is exposed.

  Specifically, a photoresist is applied to the surface of the semiconductor layer 20, and is patterned into a desired shape using a photolinographic technique. Next, it is put into a reactive ion etching (RIE) apparatus, and the region where the semiconductor layer 20 is exposed (region where a recess is desired to be formed) is etched until a part of the n-type semiconductor layer 21 is exposed.

(S28: n-electrode formation step)
An n-electrode 40 is formed on the surface of the n-type semiconductor layer 21 exposed in the n-type semiconductor exposure step S22.

  Specifically, the n electrode 40 was formed by sequentially forming Ti having a layer thickness of 1 nm and Al having a layer thickness of 1000 nm by electron beam evaporation, and patterning was performed by a lift-off method.

(S29: Joining metal layer forming step)
A bonding metal layer 60 is formed on the n-electrode 40 formed in step S21.

  The bonding metal layer 60 is a metal layer for bonding the n-electrode 40 and the support substrate 50 together. The bonding metal layer 60 is formed by sequentially forming a diffusion prevention layer (not shown) and a bonding layer (not shown) on the n-electrode 40. Specifically, Pt is used as the diffusion preventing layer, and Au or AuSn is used as the bonding layer. In the bonding metal layer 60 having another configuration, a metal layer, a diffusion prevention layer, and a bonding layer that improve adhesion to the n electrode 40 are sequentially formed on the n electrode 40. Examples of the metal layer that improves the adhesion to the n-electrode 40 include a metal layer made of Ti or Ni.

(S30: Support substrate bonding step)
The bonding metal layer 33 and the bonding metal layer 60 are bonded to the support substrate 50.

  The support substrate 50 may have a thermal expansion coefficient comparable to that of the growth substrate 10 or the semiconductor film 20. This is because compressive stress or expansion stress is applied to the growth substrate 10, the semiconductor film 20, or the support substrate 50 due to heat generated when the semiconductor light emitting device 1 is driven, and the semiconductor light emitting device 1 as a whole is distorted or cracked. This is to prevent it. Further, the support substrate 50 can have a high thermal conductivity. This is to dissipate heat generated during driving. Specifically, the material of the support substrate 50 is metallized Si, which is Si having AuSn or the like formed on the surface. The support substrate is not limited to a semiconductor substrate made of Si, but is a semiconductor substrate made of Ge, GaAs, GaP or the like, a metal substrate made of Fe, Ge alloy, Cu, Cu alloy, Al, Al alloy, or the like. Also good. On the support substrate 50, the p-electrode wiring and the n-electrode wiring respectively connected to the connection metal layer 33 formed above the reflective electrode 31 and the connection metal layer 60 formed on the n-electrode 40 are electrically connected. Electrically insulated wiring is provided. The support substrate 50 is bonded to the growth substrate 10 so that the p-electrode wiring and the n-electrode wiring are arranged with the metal layer 33 and the connection metal layer 60, respectively. As a bonding method, an existing method such as eutectic bonding is used.

(S31: Element isolation step)
The semiconductor film 20 and the support substrate 80 are cut, and the semiconductor light emitting element is separated into pieces. Specifically, for example, the conventional laser scribe / breaking, point scribe / playking, dicing, and the like were used. Through the above steps, the semiconductor light emitting element 2 as shown in FIG. 4B is completed.

  In the second embodiment as well, the growth substrate may be removed by arbitrarily using a growth substrate removing step between the support basic bonding step 30 and the element isolation step 31. Moreover, in the said Example 1 or 2, the process etc. which form the unevenness | corrugation for improving light extraction on the light extraction surface can be added suitably.

  In Example 1 or 2, the supporting base is formed by bonding the supporting substrate to the semiconductor film through the bonding metal layer forming step S6 or S29 and the supporting substrate bonding step S7 or S30. When a metal substrate is formed as the support substrate, the support substrate can be formed by laminating metals using a plating method instead of the bonding metal layer forming step and the support substrate bonding step. For example, Cu can be laminated by electroplating to form a Cu substrate.

  In Example 1 or 2, a sapphire substrate is used as the growth substrate, but a GaN substrate or the like can be used as the growth substrate. In this case, the growth substrate can also be removed depending on the mode. However, it can be left as part of the semiconductor light emitting device.

  FIG. 5 is a graph showing the reflection spectrum of the semiconductor light emitting device 1 or 2 formed by using the manufacturing method of Example 1 or 2 of the present invention. The vertical axis represents reflectance (%), and the horizontal axis represents wavelength (nm). In FIG. 5, a solid line indicates a buffer layer 25 made of Ni having a thickness of 1 nm, a reflective layer 26 made of Ag having a thickness of 150 nm, a passivation layer 27 made of Ni having a thickness of 2 nm, and an antioxidant layer made of Ag having a thickness of 50 nm. 2 shows the reflectance of a semiconductor light emitting device (hereinafter referred to as sample A) according to an embodiment of the present invention in which the reflective electrode precursor layer 31 having 28 is heat-treated. On the other hand, the dotted line has a buffer layer 25 made of Ni with a layer thickness of 1 nm, a reflective layer 26 made of Ag with a layer thickness of 200 nm, and a passivation layer 27 made of Ni with a layer thickness of 2 nm, but without the antioxidant layer 28. The reflectance of the semiconductor light emitting device (hereinafter referred to as sample B) according to a comparative example when heat treatment is performed on the reflective electrode precursor layer is shown. The reflection spectra of sample A and sample B decrease as the wavelength of light becomes shorter as in the case of bulk Ag. Comparing the reflection spectra of sample A and sample B, it can be seen that the reflection spectrum of sample A is higher than that of sample B in the wavelength range of 350 nm to 550 nm. In particular, focusing on 450 nm near the wavelength of light emitted from the semiconductor light emitting element, sample A has a reflectivity of 93.3%, and sample B has a reflectivity of 89.7% at 450 nm. Considering that the reflectance of the Ag layer having a layer thickness of 200 nm before heat treatment is 96.3%, the semiconductor light emitting device can achieve a reflectance closer to the ideal value by using the manufacturing method of the present invention. Is shown.

As a result of examining the contact resistance using TLM (Transmission Line Model) measurement, the contact resistance of the reflective electrode layer from which the reflection spectrum of Sample A was obtained was 10 ⁻⁴ [Ωcm ² ] or less. On the other hand, the contact resistance of the reflective electrode layer from which the reflection spectrum of Sample B was obtained is 10 ⁻³ to 10 ⁻⁴ [Ωcm ² ], and the reflective electrode layer produced using the production method of the present invention is The result was a contact resistance that was nearly an order of magnitude lower.

  According to the method for manufacturing a semiconductor light emitting device of the present invention, it is possible to form a reflective electrode layer having a high reflectance at the wavelength of light generated in the semiconductor film. Since such light can be reflected by the reflective electrode layer at a high reflectance and the reflected light can be emitted through the light extraction surface, a high-luminance semiconductor light emitting device can be manufactured.

  According to the method for manufacturing a semiconductor light emitting device of the present invention, since the heat treatment step is performed in a state where the surface of the metal passivation layer of the reflective electrode layer is covered with the antioxidant layer, the metal passivation layer is oxidized in the heat treatment step. Therefore, a reflective electrode layer having a low contact resistance can be formed. Such low contact resistance suppresses a decrease in potential applied to the semiconductor layer of the semiconductor film formed below the reflective electrode layer, so that the driving voltage of the semiconductor light emitting element can be reduced.

  According to the method for manufacturing a semiconductor light emitting device of the present invention, hillocks that can be formed at the interface between the metal passivation layer and the antioxidant layer of the reflective electrode layer can be alloyed with the antioxidant layer to reduce its size, The antioxidant layer can be removed together with the alloy layer containing hillocks. Hillocks can be reduced and the metal passivation layer can be planarized. Steps due to hillocks are reduced in the bonding process. As a result, it is possible to improve a decrease in yield such as bonding failure with the support substrate and peeling. Furthermore, since the level difference due to hillocks is reduced, the reflective electrode layer and the bonding layer for bonding are bonded together as a whole, so that the current path between the reflective electrode layer and the bonding layer is widened. Thereby, a uniform potential is applied to the semiconductor layer of the semiconductor film formed under the reflective electrode layer.

  According to the method for manufacturing a semiconductor light emitting device of the present invention, the reflective layer dominant to the reflectance of the reflective electrode layer is prevented from being oxidized by the metal passivation layer. Atoms constituting the reflective layer combine with oxygen to have a low reflectivity and are less likely to be converted to an insulated oxide, reducing reflectivity degradation and contact resistance degradation even at high temperatures for long periods of time. . This means that even when the semiconductor light emitting device of the present invention is driven for a long time and generates heat, the light output is deteriorated due to a decrease in reflectivity and the drive voltage is deteriorated due to an increase in contact resistance due to oxidation insulation. Can be suppressed.

Claims (7)

A method of manufacturing a semiconductor light emitting device having a reflective electrode on a semiconductor film,
Sequentially stacking a first semiconductor layer of a first conductivity type, an active layer, and a second semiconductor layer of a second conductivity type to form the semiconductor film;
Forming a first metal layer made of Ni, Ti, or an alloy thereof on the second semiconductor layer;
Forming a second metal layer made of Ag, Al, Rh or an alloy containing these on the first metal layer;
Forming a third metal layer made of Ni, Ti or an alloy thereof on the second metal layer;
Forming a fourth metal layer made of Ag on the third metal layer;
Performing a heat treatment so that mutual diffusion occurs between the third metal layer and the fourth metal layer, and forming an alloy layer at an interface between these layers;
Forming the reflective electrode by removing at least a part of the alloy layer together with a layer formed on the alloy layer.   The manufacturing method according to claim 1, wherein the sum of the thickness of the first metal layer and the thickness of the third metal layer is 1/60 or less of the second metal layer. The first metal layer is made of Ni having a layer thickness of 0.5 nm or more and 5 nm or less,
The second metal layer is made of Ag having a layer thickness of 50 nm or more and 200 nm or less,
The third metal layer is made of Ni having a layer thickness of 0.5 nm or more and 10 nm or less,
The manufacturing method according to claim 1, wherein the fourth metal layer is made of Ag having a thickness of 5 nm or more and 50 nm or less. A method of manufacturing a semiconductor light-emitting element, comprising: a semiconductor film; and a reflective electrode provided on the semiconductor film and including a metal reflective layer having light reflectivity with respect to an emission wavelength of light emitted from the semiconductor film. And
Sequentially stacking a first semiconductor layer of a first conductivity type, an active layer, and a second semiconductor layer of a second conductivity type to form the semiconductor film;
Forming a metal buffer layer on the second semiconductor layer for relaxing lattice mismatch between the metal reflective layer and the semiconductor film;
Forming the metal reflective layer on the metal buffer layer;
Forming a metal passivation layer on the metal reflective layer to prevent the metal reflective layer from being detached; and
Forming an antioxidant layer on the metal passivation layer to prevent oxidation of the metal passivation layer;
Performing a heat treatment so that mutual diffusion occurs between the metal passivation layer and the antioxidant layer, and forming an alloy layer at the interface between these layers;
Forming the reflective electrode by removing at least a part of the alloy layer together with the layer formed on the alloy layer.   The manufacturing method according to claim 4, wherein the sum of the thickness of the metal buffer layer and the thickness of the metal passivation layer is 1/60 or less of the metal reflective layer. The metal buffer layer is made of Ni, Ti or an alloy thereof,
The metal reflective layer may be any of Ag, Al, Rh, or an alloy containing these,
The metal passivation layer is made of Ni, Ti or an alloy containing these,
The manufacturing method according to claim 4, wherein the antioxidant layer is made of Ag. The metal buffer layer is made of Ni having a layer thickness of 0.5 nm or more and 5 nm or less,
The metal reflective layer is made of Ag having a layer thickness of 50 nm or more and 200 nm or less,
The metal passivation layer is made of Ni having a layer thickness of 0.5 nm or more and 10 nm or less,
The manufacturing method according to claim 4, wherein the antioxidant layer is made of Ag having a thickness of 5 nm or more and 50 nm or less.

Images