JP2012190530A - Nonvolatile memory unit - Google Patents

Nonvolatile memory unit Download PDF

Info

Publication number
JP2012190530A
JP2012190530A JP2012007375A JP2012007375A JP2012190530A JP 2012190530 A JP2012190530 A JP 2012190530A JP 2012007375 A JP2012007375 A JP 2012007375A JP 2012007375 A JP2012007375 A JP 2012007375A JP 2012190530 A JP2012190530 A JP 2012190530A
Authority
JP
Japan
Prior art keywords
connected
mos transistor
mtj element
transistor
tcam
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2012007375A
Other languages
Japanese (ja)
Other versions
JP5907524B2 (en
Inventor
Takahiro Haniyu
Shoun Matsunaga
Akira Katsumata
Masanori Natsui
Tetsuo Endo
Hideo Ono
翠 勝俣
雅典 夏井
英男 大野
翔雲 松永
貴弘 羽生
哲郎 遠藤
Original Assignee
Tohoku Univ
国立大学法人東北大学
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to JP2011040872 priority Critical
Priority to JP2011040872 priority
Application filed by Tohoku Univ, 国立大学法人東北大学 filed Critical Tohoku Univ
Priority to JP2012007375A priority patent/JP5907524B2/en
Publication of JP2012190530A publication Critical patent/JP2012190530A/en
Application granted granted Critical
Publication of JP5907524B2 publication Critical patent/JP5907524B2/en
Application status is Active legal-status Critical
Anticipated expiration legal-status Critical

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C15/00Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores
    • G11C15/02Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores using magnetic elements
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C15/00Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores
    • G11C15/04Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores using semiconductor elements
    • G11C15/046Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores using semiconductor elements using non-volatile storage elements

Abstract

PROBLEM TO BE SOLVED: To obtain a nonvolatile TCAM cell and a nonvolatile TCAM word circuit capable of complete parallel operation while maintaining compactness and low power consumption.
A first MOS transistor and a second MOS transistor for selection having one end connected to a first connection point and gates connected to first and second search lines, the first MOS transistor and the first MOS transistor Spin injection type first MTJ element and second MTJ element each having one end connected to the other end of the second MOS transistor and the other end connected to a second connection point connected to the bit line or GND A third MOS transistor and a fourth MOS transistor for writing to the MTJ element, each of which is connected to one end of each of the first MTJ element and the second MTJ element and whose gate is connected to a word line. , A current source transistor connected to the first connection point, and between the first connection point and the match line A non-volatile TCAM cell and a non-volatile TCAM word circuit comprising an arranged diode.
[Selection] Figure 3

Description

  The present invention relates to a nonvolatile functional memory device, and more particularly to a completely parallel nonvolatile TCAM cell and nonvolatile TCAM word circuit using MTJ elements.

A method of utilizing a functional memory device is known as a dedicated hardware engine that realizes a pattern matching technology, which is one of the important technologies that support the modern network society. As a representative example of this functional memory device, a ternary content-addressable memory (TCAM: ternary associative memory) has attracted attention.
Since TCAM can search stored data and input data in parallel, a very high-speed search is possible. In addition to the usual “0” and “1”, the mask search function is realized by defining three storage states of “Don't-care (X)”. Thus, the TCAM having both high speed and flexibility of search can be applied to various fields such as network router, virus search, image / voice recognition, etc. (Patent Documents 1 to 3, Non-Patent Documents 1 to 2). reference).

  While TCAM has excellent features, it has problems in terms of area and power consumption. A conventional TCAM cell having a CMOS configuration is composed of two SRAM cell circuits and a comparison circuit, and requires at least 12 transistors per cell (see Non-Patent Document 3). Therefore, it is difficult to increase the density of TCAM. is there. Furthermore, with the recent miniaturization of semiconductor processes, an increase in static power consumption due to leakage current has also become a problem in TCAM (see Non-Patent Document 4). TCAM density is increased and static power consumption is reduced. It is important to establish circuit technology that can achieve this.

The present inventors have proposed a bit serial type TCAM based on a 2T-2MTJ type non-volatile TCAM cell utilizing the characteristics of a magnetic tunnel junction (MTJ) element which is one of non-volatile memory elements (Non-patent Documents 5 to 5). 6).
The MTJ element can be microfabricated to the same extent as the CMOS process, and can be stacked on the upper layer of the transistor, and the memory function and logic operation function can be integrated, making the hardware more compact (See Non-Patent Documents 7 to 8). In addition, by utilizing the nonvolatile storage function of the element, it is possible to cut off the power supply during non-operation while retaining the stored information, and it is possible to completely cut the static power consumption associated with the leakage current. .

JP 2003-272386 A JP 2007-317342 A JP 2008-192218 A

C.-C. Wang, C.-J. Cheng, T.-F. Chen, and J.-S. Wang, "An Adaptively Dividable Dual-Port BiTCAM for Virus-Detection Processors in Mobile Devices", IEEE Journal of Solid-State Circuits, vol. 44, no. 5, pp. 1571-1581, May 2009. K. Pagiamtzis, and A. Sheikholeslami, "Content-Addressable Memory (CAM) Circuits and Architectures: A Tutorial and Survey," IEEE Journal of Solid-State Circuits, vol. 41, no. 3, Mar. 2006. I. Arsovski, T. Chandler, and A. Sheikholeslami, "A Ternary Content-Addressable Memory (TCAM) Based on 4T Static Storage and Including a Current-Race Sensing Scheme," IEEE Journal of Solid-State Circuits, vol. 38, no. 1, Jan. 2003. D. Kudithipudi, and E. John, "On Estimation of Static Power-Performance in TCAM," Midwest Symposium on Circuits and Systems, pp. 783-786, Aug. 2008. S. Matsunaga, K. Hiyama, A. Matsumoto, S. Ikeda, H. Hasegawa, K. Miura, J. Hayakawa, T. Endoh, H. Ohno, and T. Hanyu, "Standby-Power-Free Compact Ternary Content -Addressable Memory Cell Chip Using Magnetic Tunnel Junction Devices, "Applied Physics Express, vol. 2, no. 2, pp. 023004-1 to 023004-3, Feb. 2009. S. Matsunaga, M. Natsui, K. Hiyama, T. Endoh, H. Ohno, and T. Hanyu, "Fine-Grained Power-Gating Scheme of a Metal-Oxide-Semiconductor and Magnetic-Tunnel-Junction-Hybrid Bit- Serial Ternary Content-Addressable Memory, "Japanese Journal of Applied Physics, vol. 49, no. 4, pp. 04DM05-1 to 04DM05-5, Apr. 2010. S.Ikeda, J.Hayakawa, Young Min Lee, F.Matsukura, Y.Ohno, T.Hanyu, and H.Ohno, "Magnetic Tunnel Junctions for Spintronic Memories and Beyond," IEEE Trans. Electron Devices, vol. 54, no. 5, pp. 991-1002, May 2007. S. Ikeda, K. Miura, H. Yamamoto, K. Mizunuma, HD Gan, M. Endo, S. Kanai, J. Hayakawa, F. Matsukura, and H. Ohno, "A perpendicular-anisotropy CoFeB-MgO magnetic tunnel junction, "NATURE MATERIALS, Jul. 11, 2010 (Published online). S. Matsunaga, J. Hayakawa, S. Ikeda, K. Miura, H. Hasegawa, T. Endoh, H. Ohno, and T. Hanyu, "Fabrication of a Nonvolatile Full Adder Based on Logic-in-Memory Architecture Using Magnetic Tunnel Junctions, "Applied Physics Express, vol. 1, no. 9, pp. 091301-1 ~ 091301-3, Aug. 2008. D. Suzuki, M. Natsui, S. Ikeda, H. Hasegawa, K. Miura, J. Hayakawa, T. Endoh, H. Ohno, and T. Hanyu, "Fabrication of a Nonvolatile Lookup-Table Circuit Chip Using Magneto / Semiconductor-Hybrid Structure for an Immediate-Power-Up Field Programmable Gate Array, "IEEE Symp. VLSI Circuits, Dig. Tech. Papers, pp. 80-81, Jun. 2009.

By utilizing the features of the MTJ element, a very compact and low power consumption nonvolatile TCAM cell has been obtained. However, the proposed nonvolatile TCAM cell has been difficult to perform multi-bit parallel operation due to its operating principle.
It is an object of the present invention to obtain a nonvolatile TCAM cell and a nonvolatile TCAM word circuit that enable complete parallel operation while maintaining the compactness and low power consumption of the previously proposed nonvolatile TCAM cell.

Means for solving the problems are as follows.
(1) A comparison operation circuit unit in which a non-volatile memory unit in which a spin injection type MTJ element connected in series and a MOS transistor for selection are connected in parallel and a search operation unit are integrated, and the comparison operation A transistor for writing to each MTJ element in the circuit unit; a current source transistor for supplying current to the comparison operation circuit unit; and a diode disposed between the output of the comparison operation circuit unit and the match line. Nonvolatile TCAM cell.
(2) a first MOS transistor and a second MOS transistor for selection, one end of which is connected to the first connection point and whose gates are connected to the first and second search lines, and the first MOS transistor and the first MOS transistor A spin injection type first MTJ element and a second MTJ element each having one end connected to the other end of the 2MOS transistor and the other end connected to a second connection point connected to the bit line or GND; A third MOS transistor and a fourth MOS transistor for writing to the MTJ element, each of which is connected to one end of each of the first MTJ element and the second MTJ element and whose gate is connected to a word line; A current source transistor connected to the first connection point, and disposed between the first connection point and the match line; Diode and non-TCAM cell with a.
(3) The nonvolatile TCAM cell according to (1), wherein each of the selection MOS transistors is also used as a transistor for writing to each MTJ element.
(4) a first MOS transistor and a second MOS transistor for selection whose one end is connected to the first connection point and whose gates are connected to the first and second search lines, and the first MOS transistor and the first MOS transistor A spin injection type first MTJ element and a second MTJ element each having one end connected to the other end of the 2MOS transistor and the other end connected to a second connection point connected to the bit line or GND; A non-volatile TCAM cell comprising a current source transistor connected to the first connection point, and a diode disposed between the first connection point and the match line,
The non-volatile TCAM cell, wherein each of the selection first MOS transistor and the second MOS transistor also serves as a transistor for writing to each MTJ element.
(5) The nonvolatile TCAM cell according to any one of (1) to (4), wherein the diode is an n-channel MOS transistor having a drain and a gate connected to a match line.
(6) The nonvolatile TCAM cell according to any one of (1) to (5), wherein the current source transistor is a p-channel MOS transistor arranged between VDD and the first connection point. .
(7) A plurality of TCAM cells according to any one of (1) to (6) connected in parallel to a match line, a precharge / evaluate controller for controlling charge / discharge of the match line, a sense amplifier, and a write controller And a nonvolatile TCAM word circuit.

According to the present invention, it is possible to obtain a non-volatile TCAM cell that enables a completely parallel operation while maintaining the compactness and low power consumption of the circuit by adding a minimum number of elements to the previously proposed non-volatile TCAM cell. it can.
That is, according to the present invention, it is possible to suppress the attenuation of the amplitude when a plurality of nonvolatile TCAM cells are operated in parallel and transmit the output amplitude of the nonvolatile TCAM cell to the match line as it is.
Furthermore, according to the present invention, it is possible to obtain a nonvolatile TCAM word circuit that suppresses a decrease in voltage amplitude and enables parallel search of 1024 bits or more even when a large number of MTJ elements having a small magnetoresistance ratio are connected in parallel. it can.

Overall structure of fully parallel TCAM MTJ element: (a) element structure, (b) cross-sectional view, (c) RI characteristic, (d) circuit symbol 6T-2MTJ nonvolatile TCAM cell: (a) Cell circuit diagram, (b) Truth table TCAM word circuit Word circuit operation: (a) Precharge phase, (b) Evaluate phase, (c) Match line waveform Characteristics of diode-connected MOS transistors Match line operation waveform Word length vs. match line amplitude characteristics Equivalent circuit model of diode-connected MOS transistor in word circuit: (a) transistor circuit diagram, (b) representation by linear resistance model 4T-2MTJ nonvolatile TCAM cell

(Fully parallel nonvolatile TCAM)
FIG. 1 shows the entire structure of a completely parallel nonvolatile TCAM.
Non-volatile TCAM is a circuit in which non-volatile TCAM cells that perform comparison operations are arranged in an array and connected by match lines to form a word circuit, which performs comparison operations between stored words and input words. It is.

  In a completely parallel type nonvolatile TCAM, input words are input to all word circuits all at once and operated in parallel to output a match / mismatch result between stored data and input data. All the non-volatile TCAM cells constituting the word circuit also operate in parallel, and all the bits in the word perform comparison operations simultaneously. As described above, since the non-volatile TCAM of the complete parallel type can perform the comparison operation in bit parallel / word parallel, it can realize a very high-speed search function.

(MTJ element)
The structure of the MTJ element used in the nonvolatile TCAM is shown in FIG.
An MTJ element is composed of two magnetic layers called a free layer and a fixed layer, and a tunnel barrier sandwiched between them. The stored data is defined by whether the magnetization direction of the free layer is parallel or antiparallel to the magnetization direction of the fixed layer. When the magnetization directions are parallel to each other, the electrical resistance of the MTJ element is low (R P ), and when the magnetization directions are anti-parallel, the MTJ element is high resistance (R AP ).
Since these states are preserved even when the power is turned off, the stored data is non-volatile.

  Further, the MTJ element can be stacked on top of the transistor as shown in FIG. 2B, and the area overhead of the memory element can be greatly reduced. In addition, compared with conventional nonvolatile memory elements, it has excellent features such as high rewrite resistance, low power writing, and compatibility with a CMOS process, and is very useful as a next-generation nonvolatile memory element.

  Data writing to the MTJ element is performed by a spin injection magnetization reversal phenomenon in which the magnetization of the free layer is reversed by passing a current of a certain value or more through the element. By flowing a current from the free layer side to the fixed layer side of the MTJ element, the magnetization of the free layer becomes the same direction (parallel) as the fixed layer, and the MTJ element has a low resistance.

  On the other hand, by flowing a current from the fixed layer side to the free layer side, the magnetization direction of the free layer becomes opposite (antiparallel) to the fixed layer, and the MTJ element becomes high resistance. As shown in FIG. 2C, since the MT characteristic of the MTJ element has hysteresis, the magnetization direction is maintained as it is even when no current is applied.

Since the MTJ element has a feature that the electric resistance changes depending on the state of magnetization, it can be used as a pseudo switching element utilizing the change in resistance. The MTJ element takes two states, a low resistance state (R P ) and a high resistance state (R AP ). By defining each as a state in which logical values “1” and “0” are stored, FIG. As in 2 (d), it can be regarded as a variable resistance element whose electric resistance changes depending on the memory state.

  While the MOS transistor is a switching element that turns on and off (the resistance value changes) depending on the potential of the gate terminal, the MTJ element is also considered as a pseudo switching element whose resistance changes depending on the stored data. Thus, in a circuit that performs a logical operation between stored data and input data, the switching element and the storage element that controls the switching element can be replaced with a single MTJ element (see Non-Patent Documents 9 to 10). Therefore, by configuring the nonvolatile TCAM cell using the MTJ element, not only the storage function but also a part of the comparison operation circuit can be replaced, and a high-density nonvolatile TCAM can be realized.

(Nonvolatile TCAM cell according to the present invention)
FIG. 3 shows a circuit diagram of a 6T-2MTJ type nonvolatile TCAM cell according to the present invention and a truth table thereof.
The comparison operation circuit portion of the nonvolatile TCAM cell surrounded by a dotted line in FIG. 3 has the same configuration as that of the previously proposed 2T-2MTJ type nonvolatile TCAM cell. In the non-volatile TCAM cell having the 2T-2MTJ configuration, non-volatility and compactness have been achieved by utilizing the characteristics of the MTJ element described above and integrating the comparison operation circuit and the storage function. On the other hand, when a plurality of cells are operated in parallel, the amplitude of the match line (ML) is greatly attenuated, so that multi-bit parallel operation is difficult.

  Therefore, in order to realize a compact non-volatile TCAM capable of complete parallel operation, it is necessary to realize a mechanism for ensuring the voltage amplitude of the match line with a minimum number of elements. The nonvolatile TCAM cell according to the present invention realizes multi-bit parallel operation by incorporating a load by a p-channel MOS current source and a diode (diode-connected n-channel MOS transistor) inside the cell.

Since the TCAM cell has three storage states of “0”, “1”, and “X (Don't-care)”, as shown in FIG. 3B, “b 1 ” and “b 2 ”. "Is expressed as 2-bit binary data. Data writing to each MTJ element is controlled by the write transistors M W1 and M W2 . These write transistors are driven by the corresponding word line (WL_A or WL_B), and writing is performed by flowing current from the bit lines (BL and _BL) to the MTJ element.

The potential of V Result corresponding to the search result in the TCAM cell is determined by the resistance value of the comparison operation circuit unit. When the stored data matches the input data, or when “X” is stored, the comparison operation circuit unit is in a high resistance state. On the other hand, when the stored data and the input data do not match, the comparison operation circuit unit is in a low resistance state. The resistance value is converted to a potential of V the Result by current of the p-channel MOS current source M CS.

That is, in the case of coincidence, V Result becomes a high potential (V Result-high ), and in the case of mismatch, it becomes a low potential (V Result-low ). The TCAM word circuit connects a plurality of cells to the match line in parallel and operates all the bits at the same time to detect whether the input word and the storage word are completely matched or not.

(Nonvolatile TCAM word circuit according to the present invention)
FIG. 4 shows a configuration of a nonvolatile TCAM word circuit according to the present invention.
The completely parallel nonvolatile TCAM word circuit according to the present invention includes a one-dimensional cell array connected in parallel to a match line, a precharge / evaluate controller for controlling charge / discharge of the match line, a sense amplifier (SA), and a write controller.

  In writing to the MTJ element in the cell array, the clock signal and the search line signal are cut off and the word line and the bit line are driven for each MTJ element while the write enable signal WE is applied. This word circuit operates in two phases: a precharge phase for charging the match line and an evaluation phase for comparing the input data and the stored data while discharging the match line charge.

FIG. 5 shows the operation of the word circuit and the change in potential of the match line in each phase. In the precharge phase, the transistors M C1 and M C2 in the comparison operation circuit unit of each cell and the transistor M DC in the precharge / evaluate controller unit are cut off to charge the match line to the level of the power supply voltage VDD. In the Evaluate phase, by applying an input to the search lines (SL and _SL), either one of M C1 or M C2 in each cell is turned on, the current path of the comparison operation circuit is selected, and the match line is passed through the cell. The comparison calculation is performed by discharging the electric charge to GND.

Discharge of the match line is controlled by a diode-connected n-channel MOS transistor M D of TCAM cell, the magnitude relation between the match line of the output voltage V the Result of the comparison operation circuit portion of the electric potential and the cell, independently for each cell Switching between discharge and interruption is performed automatically.
As shown in FIG. 5 (c), the potential of the match line in the Evaluate phase is discharged to V Result-high when the input data and the stored data completely match.

On the other hand, if there is a mismatch, that is, if there is a cell in which the input data does not match the stored data in the word circuit, the discharge will not stop even if the match line potential is equal to V Result-high , Discharged to V Result-low . This charge of the match line through the M D in each cell until the lowest V the Result among all the cells are discharged, in order to be finally cut off.

FIG. 6 shows the characteristics of the diode-connected n-channel MOS transistor. The diode-connected transistor has a gate terminal and a drain terminal short-circuited as shown in FIG. 6 and operates like a diode. For example, when the potential of the match line, that is, the potential of the drain end and the gate end is higher than the output V Result of the comparison operation circuit in the cell, the transistor is turned on and current flows.

On the other hand, when the potential of the match line becomes equal to or lower than V Result , although a weak reverse current exists, the state is almost cut off and the discharge path from the match line is cut off. Due to this characteristic, the potential of the match line changes depending on whether or not there is a mismatched cell. When the input word and the storage word completely match, all the diode-connected n-channel MOS transistors are cut off at the same time when the potential of the match line becomes equal to the output potential V Result-high of the comparison operation circuit unit. Thus, the match line potential is maintained.

On the other hand, if there is even a mismatched cell, the diode-connected n-channel MOS transistor in the mismatched cell is not shut off until the potential of the match line becomes equal to the output potential V Result-low of the comparison operation circuit portion of the mismatched cell. For this reason, the potential of the match line is lower than that at the time of perfect match. As a result, the potential of the match line differs depending on whether the comparison calculation results match or not, and the input word and the storage word can be compared by detecting this potential difference with the sense amplifier. In this manner, the nonvolatile TCAM cell according to the present invention can suppress the attenuation of amplitude when a plurality of cells are operated in parallel, and can transmit the output amplitude of the cell as it is to the match line.

(Evaluation and Consideration of Nonvolatile TCAM Word Circuit According to the Present Invention)
FIG. 7 shows a match line waveform of a word circuit based on a conventional bit serial nonvolatile TCAM cell (2T-2MTJ) and a completely parallel nonvolatile TCAM cell (6T-2MTJ) according to the present invention. The conventional 2T-2MTJ type cell has a small change in cell resistance when it completely matches and when one bit does not match, and as the number of word circuits increases, cell resistances are connected in parallel, and the resistance value of the word circuit decreases. . For this reason, the change in resistance value of the word circuit when discriminating between the complete match and the 1-bit mismatch state is very small, and it becomes difficult to detect the search result. (Refer to the top 3 of FIG. 7)
On the other hand, in the nonvolatile TCAM cell of 6T-2MTJ type according to the present invention, the attenuation of the match line voltage amplitude accompanying the increase in word length is suppressed. (See bottom 3 in FIG. 7)

  FIG. 8 shows the characteristics of the word length and match line amplitude of each nonvolatile TCAM word circuit. In the 2T-2MTJ type nonvolatile TCAM word circuit, when cells are connected in parallel, the voltage amplitude of the match line is significantly attenuated, and when the word length is 4 bits or more, the amplitude of the match line is less than 0.1V. On the other hand, in the nonvolatile TCAM word circuit according to the present invention, the attenuation of the match line amplitude is greatly improved, and a parallel operation of 1024 bits or more is realized.

It can be seen that the voltage amplitude of the match line is reduced although it is moderate compared with the case of using a 2T-2MTJ type non-volatile TCAM cell.
A possible reason for this is an increase in match line potential at the time of mismatch due to the reverse current of the diode-connected transistor. When the potential of the match line decreases and becomes lower than V Result-high , as shown in FIG. 9A, a reverse current of a diode-connected n-channel MOS transistor is generated from the match cell toward the match line. Will be charged slightly.

  In particular, in the case of 1-bit mismatch in a multi-bit nonvolatile TCAM word circuit, the reverse current amount from the match cell increases, so that the match line potential at the time of mismatch does not easily drop, and the match line potential difference at the time of match and mismatch Decrease.

FIG. 9B shows a diode-connected MOS transistor network in a non-matching 1 bit in a nonvolatile TCAM word circuit in a linear resistance model, where the diode-connected MOS transistor resistance of the matching cell is R High and the diode connection of the non-matching cell. The MOS transistor resistance is replaced with R Low . When the match line potential difference ΔV ML at the time of 1 bit mismatch in the n-bit word circuit is obtained based on this model, it is expressed by the following equation (1).

From the equation (1), it can be seen that a larger match line voltage amplitude is obtained as R High is larger than R Low . Therefore, when the number of bits of the word circuit is increased, it is effective to increase the operation margin by using a switching element having excellent characteristics and increasing the output voltage amplitude of the cell.

  According to the completely parallel nonvolatile TCAM word circuit using the nonvolatile TCAM cell of 6T-2MTJ configuration according to the present invention, a parallel operation of 1024 bits or more is possible as can be seen from FIG.

(Other nonvolatile TCAM cell according to the present invention)
FIG. 10 shows a circuit diagram of a 4T-2MTJ type nonvolatile TCAM cell as another nonvolatile TCAM cell according to the present invention.
The comparison operation circuit unit, current source transistor, and diode of the nonvolatile TCAM cell surrounded by a dotted line in FIG. 10 have the same configuration as that of the 6T-2MTJ type nonvolatile TCAM cell according to the present invention.

In this 4T-2MTJ shaped non TCAM cells are removed write transistor M W1 and M W2 are the 6T-2MTJ shaped non TCAM cell shown in FIG. 3, the transistors of the comparison operation circuit section also serves its function ing.
Writing to the MTJ element is performed by selecting a transistor and a current source transistor in the comparison operation circuit unit and passing a current from the bit lines (BL and _BL) to the MTJ element.

  In this non-volatile TCAM cell of the 4T-2MTJ type, the number of elements is reduced by deleting a write-only transistor and using another transistor also as a write transistor. Along with this, the word line (WL_A or WL_B) and the bit line (_BL) are also deleted, and the search line (_SL or SL) and the power supply line (VDD) are also used, so the number of wirings in the cell is reduced. Has been. As a result, further downsizing of the cell is realized as compared with the nonvolatile TCAM cell having the 6T-2MTJ configuration.

Claims (7)

  1.   In the comparison operation circuit unit, a comparison operation circuit unit in which a non-volatile storage unit in which a spin injection type MTJ element connected in series and a MOS transistor for selection are connected in parallel and an operation unit for search are integrated Non-volatile TCAM comprising a transistor for writing to each MTJ element, a current source transistor for supplying current to the comparison operation circuit unit, and a diode disposed between the output of the comparison operation circuit unit and the match line cell.
  2.   A first MOS transistor and a second MOS transistor for selection having one end connected to the first connection point and each gate connected to the first and second search lines, and the first MOS transistor and the second MOS transistor. A spin injection type first MTJ element and a second MTJ element each connected at one end to the other end and connected to a second connection point having the other end connected to the bit line or GND; A third MOS transistor and a fourth MOS transistor for writing to the MTJ element, each of which is connected to one end of each of the one MTJ element and the second MTJ element and whose gate is connected to a word line; A current source transistor connected to the connection point of the first transistor and a diode disposed between the first connection point and the match line. Non TCAM cell that includes a diode.
  3.   2. The nonvolatile TCAM cell according to claim 1, wherein each of the selection MOS transistors also serves as a transistor for writing to each MTJ element.
  4. A first MOS transistor and a second MOS transistor for selection having one end connected to the first connection point and each gate connected to the first and second search lines, and the first MOS transistor and the second MOS transistor. A spin injection type first MTJ element and a second MTJ element each connected at one end to the other end and connected to a second connection point having the other end connected to the bit line or GND; A non-volatile TCAM cell comprising a current source transistor connected to one connection point and a diode arranged between the first connection point and the match line,
    The non-volatile TCAM cell, wherein each of the selection first MOS transistor and the second MOS transistor also serves as a transistor for writing to each MTJ element.
  5.   5. The nonvolatile TCAM cell according to claim 1, wherein the diode is an n-channel MOS transistor having a drain and a gate connected to a match line.
  6.   6. The non-volatile TCAM cell according to claim 1, wherein the current source transistor is a p-channel MOS transistor disposed between VDD and the first connection point.
  7.   A plurality of non-volatile TCAM cells according to claim 1 connected in parallel to a match line, a precharge / evaluate controller for controlling charge / discharge of the match line, a sense amplifier and a write controller. Nonvolatile TCAM word circuit.
JP2012007375A 2011-02-25 2012-01-17 Nonvolatile functional memory device Active JP5907524B2 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2011040872 2011-02-25
JP2011040872 2011-02-25
JP2012007375A JP5907524B2 (en) 2011-02-25 2012-01-17 Nonvolatile functional memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2012007375A JP5907524B2 (en) 2011-02-25 2012-01-17 Nonvolatile functional memory device

Publications (2)

Publication Number Publication Date
JP2012190530A true JP2012190530A (en) 2012-10-04
JP5907524B2 JP5907524B2 (en) 2016-04-26

Family

ID=47083516

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2012007375A Active JP5907524B2 (en) 2011-02-25 2012-01-17 Nonvolatile functional memory device

Country Status (1)

Country Link
JP (1) JP5907524B2 (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013200920A (en) * 2012-03-26 2013-10-03 Tohoku Univ Nonvolatile memory device
WO2014038340A1 (en) * 2012-09-06 2014-03-13 日本電気株式会社 Nonvolatile content addressable memory and method for operating same
JPWO2014038341A1 (en) * 2012-09-06 2016-08-08 日本電気株式会社 Non-volatile associative memory
JPWO2014208051A1 (en) * 2013-06-26 2017-02-23 日本電気株式会社 Associative memory cell and associative memory
US10103199B2 (en) 2015-09-15 2018-10-16 Kabushiki Kaisha Toshiba Magnetic memory

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20190029059A (en) 2017-09-11 2019-03-20 삼성전자주식회사 A tcam device and an operating method thereof

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53136447A (en) * 1977-05-02 1978-11-29 Nippon Telegr & Teleph Corp <Ntt> Associative memory
JPH0346194A (en) * 1989-07-14 1991-02-27 Mitsubishi Electric Corp Contents address memory cell
JPH03160694A (en) * 1989-11-16 1991-07-10 Mitsubishi Electric Corp Semiconductor memory
US6262907B1 (en) * 2000-05-18 2001-07-17 Integrated Device Technology, Inc. Ternary CAM array
US20060018183A1 (en) * 2003-10-22 2006-01-26 Stmicroelectronics S.R.L. Content addressable memory cell
JP2008545221A (en) * 2005-06-30 2008-12-11 インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation Nonvolatile associative memory using phase change material memory element
WO2010137573A1 (en) * 2009-05-29 2010-12-02 日本電気株式会社 Non-volatile cam

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53136447A (en) * 1977-05-02 1978-11-29 Nippon Telegr & Teleph Corp <Ntt> Associative memory
JPH0346194A (en) * 1989-07-14 1991-02-27 Mitsubishi Electric Corp Contents address memory cell
JPH03160694A (en) * 1989-11-16 1991-07-10 Mitsubishi Electric Corp Semiconductor memory
US6262907B1 (en) * 2000-05-18 2001-07-17 Integrated Device Technology, Inc. Ternary CAM array
US20060018183A1 (en) * 2003-10-22 2006-01-26 Stmicroelectronics S.R.L. Content addressable memory cell
JP2008545221A (en) * 2005-06-30 2008-12-11 インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation Nonvolatile associative memory using phase change material memory element
WO2010137573A1 (en) * 2009-05-29 2010-12-02 日本電気株式会社 Non-volatile cam

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
JPN6015043639; Shoun Matsunaga他3名: 'Design of a Low-Energy Nonvolatile Fully-Parallel Ternary CAM Using a Two-Level Segmented Match-Line' Multiple-Valued Logic (ISMVL), 2011 41st IEEE International Symposium on , 20110523, P99-104, IEEE *

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013200920A (en) * 2012-03-26 2013-10-03 Tohoku Univ Nonvolatile memory device
WO2014038340A1 (en) * 2012-09-06 2014-03-13 日本電気株式会社 Nonvolatile content addressable memory and method for operating same
US9299435B2 (en) 2012-09-06 2016-03-29 Nec Corporation Nonvolatile content addressable memory and method for operating same
JPWO2014038340A1 (en) * 2012-09-06 2016-08-08 日本電気株式会社 Nonvolatile associative memory and operation method thereof
JPWO2014038341A1 (en) * 2012-09-06 2016-08-08 日本電気株式会社 Non-volatile associative memory
JPWO2014208051A1 (en) * 2013-06-26 2017-02-23 日本電気株式会社 Associative memory cell and associative memory
US10103199B2 (en) 2015-09-15 2018-10-16 Kabushiki Kaisha Toshiba Magnetic memory

Also Published As

Publication number Publication date
JP5907524B2 (en) 2016-04-26

Similar Documents

Publication Publication Date Title
US7187577B1 (en) Method and system for providing current balanced writing for memory cells and magnetic devices
US8462532B1 (en) Fast quaternary content addressable memory cell
Takemura et al. A 32-Mb SPRAM with 2T1R memory cell, localized bi-directional write driver and1'/0'dual-array equalized reference scheme
Van Der Wagt Tunneling-based SRAM
US8274841B2 (en) Semiconductor signal processing device
US8009456B2 (en) Resistance change type memory
JP5096502B2 (en) Read disturbance reduction circuit for spin transfer torque magnetoresistive random access memory
US7161861B2 (en) Sense amplifier bitline boost circuit
JP2010524144A (en) Spin injection torque magnetoresistive random access memory and design method
US20160079517A1 (en) High capacity low cost multi-state magnetic memory
US7742329B2 (en) Word line transistor strength control for read and write in spin transfer torque magnetoresistive random access memory
JP4133149B2 (en) Semiconductor memory device
Kawahara et al. 2 Mb SPRAM (spin-transfer torque RAM) with bit-by-bit bi-directional current write and parallelizing-direction current read
RU2420865C1 (en) Programme-controlled logic circuit using spin-torque transfer magnetoresistive devices
Zhao et al. Spin transfer torque (STT)-MRAM--based runtime reconfiguration FPGA circuit
EP2353164B1 (en) Word line voltage control in stt-mram
KR101263048B1 (en) semiconductor device
US6169419B1 (en) Method and apparatus for reducing standby leakage current using a transistor stack effect
US7835210B2 (en) Magnetic random access memory and data read method of the same
US8503224B2 (en) Spintronic devices with integrated transistors
JP4143644B2 (en) Reconfigurable logic circuit using transistors with spin-dependent transfer characteristics
US6956257B2 (en) Magnetic memory element and memory device including same
US7221600B2 (en) Arithmetic circuit integrated with a variable resistance memory element
US6343032B1 (en) Non-volatile spin dependent tunnel junction circuit
US8295079B2 (en) Nonvolatile SRAM/latch circuit using current-induced magnetization reversal MTJ

Legal Events

Date Code Title Description
RD04 Notification of resignation of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7424

Effective date: 20130315

RD04 Notification of resignation of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7424

Effective date: 20130322

RD04 Notification of resignation of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7424

Effective date: 20130325

RD04 Notification of resignation of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7424

Effective date: 20130321

RD04 Notification of resignation of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7424

Effective date: 20130325

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20141120

RD03 Notification of appointment of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7423

Effective date: 20141120

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20151020

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20151110

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20160108

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20160315

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20160316

R150 Certificate of patent or registration of utility model

Ref document number: 5907524

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250