JP2012176066A - Game machine - Google Patents

Abstract

PROBLEM TO BE SOLVED: To increase security strength by a simple means, and to reduce a processing load of a main control unit.SOLUTION: A game machine 1 includes the main control unit 110 and a peripheral control unit 300. The main control unit 110 includes an inspection value generation unit 500 for generating an error inspection value and adding the error inspection value to a command, and a transmission unit 550 for transmitting the command to the peripheral control unit 300. The inspection value generation unit 500, which is provided between a main CPU 110a and the transmission unit 550, generates the error inspection value of the formerly-generated command, and adds the error inspection value to a command to be currently transmitted. Additionally, an input/output control system between respective means in the inspection value generation unit 500 employs a system different from input/output control systems between the inspection value generation unit and the main CPU 110a and between the inspection value generation unit 500 and the transmission unit 550. The peripheral control unit 300 prestores the error inspection value for verification, inspects validity of the received command, and performs processing based on an inspection result.

Description

  The present invention relates to a gaming machine such as a pachinko gaming machine, a sparrow ball gaming machine, a ball ball gaming machine such as an arrangement ball, and a revolving type gaming machine such as a slot machine installed in a gaming shop such as a pachinko shop.

Main control that controls basic actions associated with the progress of a game, among illegal acts that are performed on a gaming machine and forcibly pays out medals, game balls, etc. (hereinafter referred to as “game media”) regardless of the game content. As for a peripheral control board on which a peripheral control unit that executes a rendering process or the like based on control command information (hereinafter referred to as “control command”) from which the main control board is mounted, There are the following.
(1) Replacing an authorized main control board with an unauthorized main control board (2) A ROM storing a legitimate program executed by the CPU mounted on the main control board and an unauthorized program obtained by falsifying the above program are stored. (3) An illegal board (impersonated board) is provided between the main control board and the peripheral control board, and the ROM of (2) above is replaced.

  In order to prevent such illegal acts, the conventional gaming machines include the following. For example, in the gaming machine described in Patent Document 1, the main control board generates a control command and transmits it to the sub-control board, and checks the control command transmitted by the first transmission means within a predetermined period. Second transmission means for transmitting the thumb as a state monitoring command at a predetermined timing. In addition, the sub-control board verifies the validity of the control command transmitted within the predetermined period by comparing the checksum of the control command received within the predetermined period with the state monitoring command received at the predetermined timing. doing. That is, the gaming machine described in Patent Document 1 attempts to prevent the illegal act by transmitting a state monitoring command for verifying the validity of the control command at a predetermined timing.

JP 2002-18095 A

  However, in the gaming machine described in Patent Document 1, a state monitoring command having a data format or data amount different from that of a normal control command is transmitted alone at a predetermined timing. Therefore, there is a fear that a person who intends to perform an illegal act (hereinafter referred to as “illegal person”) can easily know the timing of sending the state monitoring command and steal it. Further, in the gaming machine described in Patent Document 1, a checksum of a control command transmitted within a predetermined period is used as a state monitoring command. Therefore, there is a possibility that an unauthorized person who knows the transmission timing of the state monitoring command can easily analyze the contents of the state monitoring command by acquiring and comparing the control command and its checksum within a predetermined period. there were.

  In addition, in the gaming machine described in Patent Document 1, in order to realize the addition of the security function, a process different from the normal process of transmitting a state monitoring command is added. It is getting complicated. Therefore, in the gaming machine described in Patent Document 1, the code size of the program executed by the CPU of the main control board increases, and the processing load of the CPU increases. Also, in gaming machines, the ROM and RAM capacities of the main control board are limited due to regulations unique to public games, and more limited resources are allocated to game machine manufacturers for programs related to performance processing. There is a desire to want. Therefore, the problem that the processing load of the CPU of the main control board and the code size of the program increase by adding a security function to the gaming machine cannot be overlooked.

  In addition, when adding security functions by hardware, it is possible to suppress an increase in processing load and code size. However, when a new function is added to the existing main control board by hardware, the configuration of the CPU and peripheral circuits related to the hardware must be changed, which increases the development cost and development time of the gaming machine. Invited, it will be a big burden for game machine manufacturers. For this reason, the conventional technology cannot meet the demands of gaming machine manufacturers who want to add effective security functions to existing gaming machines relatively easily.

  The present invention has been made in view of the above circumstances, and is relatively simple while preventing the above-mentioned fraud by improving the security strength by suppressing the increase in processing load and code size. It is an object to provide a gaming machine having a security function that can be added to the game machine.

  In order to solve the above-described problems, the present invention provides a gaming machine (game) including a main control unit (main control unit 110) that outputs a control command and a peripheral control unit (peripheral control unit 300) that performs processing based on the control command. The main control unit generates a control command by performing a calculation according to predetermined game information, and outputs the generated control command in a predetermined output control method (machine 1). Main CPU 110a), a first check value generation unit (check value generation unit 500) for generating an error check value corresponding to the control command output by the arithmetic processing unit, and outputting the generated error check value, and the control A transmission unit (transmission unit 550) that transmits a command and the error check value to the peripheral control unit, and the peripheral control unit adds the error check value generated by the first check value generation unit to the error check value. A second check value generation unit (check value generation unit 620) for generating a corresponding error check value for verification; an error check value transmitted by the transmission unit; and an error check generated by the second check value generation unit An inspection unit (inspection unit 610) that compares the value and inspects the validity of the control command transmitted by the transmission unit, performs processing based on the control command transmitted by the transmission unit, and And a processing unit (CPU of the peripheral control unit 300) that performs processing according to the result, wherein the first inspection value generation unit inputs the control command output by the arithmetic processing unit, and inputs the control command The buffer means (buffer means 510) for outputting the command at a predetermined timing, and the control command output by the buffer means is input, and the past control command is input. An error checking value corresponding to the control command output by the arithmetic processing unit is generated, and a generating means (generating means 520) for outputting the generated error checking value according to the timing, and the buffer means output A control command and an error check value output by the generating means are input, the input error check value is added to the input control command, and the control command to which the error check value is added And adding means (adding means 530) that outputs in accordance with the timing in the same output control method as the output control method previously determined in the unit, wherein the transmitting unit outputs the error output by the adding means. The control command to which the check value is added is input, and the control command to which the input error check value is added is transmitted to the peripheral control unit. It is a sign.

  According to the present invention, in order to add an authentication function for the main control unit as a security function, the error check value adding function provided in the main control unit is configured by hardware, and the control command to be transmitted is earlier than the control command. An error check value of the generated control command is added and transmitted. By applying such an unprecedented simple method, it becomes difficult for an unauthorized person to analyze the relationship between the control command and the error check value added thereto, and the security strength of the gaming machine is improved by a simple method. be able to. Further, the processing load and code size of the CPU of the main control unit, which increase with the addition of the security function, can be suppressed to the maximum. And a security function can be added comparatively easily with respect to the existing game machine.

It is a front view which shows the external appearance structure of the game machine which concerns on embodiment of this invention. It is a perspective view which shows the external appearance structure of the state which open | released the glass frame of the game machine which concerns on embodiment of this invention. It is a perspective view which shows the external appearance structure of the back surface side of the game machine which concerns on embodiment of this invention. It is a block diagram which shows the internal structure of the game machine which concerns on embodiment of this invention. It is a block diagram which shows the structure regarding the authentication process of the main control part which comprises the game machine which concerns on embodiment of this invention. It is the schematic for demonstrating the addition procedure of the error check value to the control command which the main control part which comprises the game machine which concerns on embodiment of this invention outputs. It is a block diagram which shows the structure regarding the authentication process of the production | presentation control part which comprises the game machine which concerns on embodiment of this invention. It is a figure which shows the classification of the control command transmitted to the production | presentation control part from the main control part which comprises the game machine which concerns on embodiment of this invention. It is a figure which shows the flowchart in the main process by the main control part which comprises the game machine which concerns on embodiment of this invention. It is a figure which shows the flowchart in the interruption process by the main control part which comprises the game machine which concerns on embodiment of this invention. It is a figure which shows the flowchart in the special figure special electricity control process by the main control part which comprises the game machine which concerns on embodiment of this invention. It is a figure which shows the flowchart in the special symbol memory | storage determination process by the main control part which comprises the game machine which concerns on embodiment of this invention. It is a figure which shows the flowchart in the command transmission process by the main control part which comprises the game machine which concerns on embodiment of this invention. It is a figure which shows the flowchart in the main process by the production | presentation control part which comprises the game machine which concerns on embodiment of this invention. It is a figure which shows the flowchart in the interruption process by the production | presentation control part which comprises the game machine which concerns on embodiment of this invention. It is a figure which shows the flowchart in the command analysis process 1 by the presentation control part which comprises the game machine which concerns on embodiment of this invention. It is a figure which shows the flowchart in the command analysis process 2 by the production | presentation control part which comprises the game machine which concerns on embodiment of this invention. It is a figure which shows the flowchart in the error check process by the presentation control part which comprises the game machine which concerns on embodiment of this invention. It is a block diagram which shows the other Example in the structure of the test value production | generation part which comprises the game machine which concerns on embodiment of this invention.

  Hereinafter, embodiments for carrying out the present invention will be described with reference to the drawings. Specifically, a pachinko gaming machine 1 (hereinafter referred to as “gaming machine 1”), which is one of the gaming machines according to the embodiment of the present invention, will be described.

[Composition of gaming machine]
The configuration of the gaming machine 1 according to one embodiment of the present invention will be described below.
FIG. 1 is a front view showing an external configuration of the gaming machine 1 according to the present embodiment. FIG. 2 is a perspective view showing an external configuration of the gaming machine 1 according to the present embodiment in a state where the glass frame is opened. FIG. 3 is a perspective view showing an external configuration of the back side of the gaming machine 1 according to the present embodiment.

  The gaming machine 1 includes an outer frame 60 attached to an island facility of a game store, and a glass frame 50 that is rotatably supported by the outer frame 60 (see FIGS. 1 and 2). In addition, the outer frame 60 is provided with a game board 2 in which a game area 6 in which the game ball 200 flows down is formed. In the glass frame 50, an operation handle 3 for launching a game ball toward the game area 6 by being rotated, an audio output device 32 including a speaker, an effect lighting device 34 having a plurality of lamps, An effect button 35 for changing the effect mode by a pressing operation is provided.

  Further, the glass frame 50 is provided with a tray 40 for storing a plurality of game balls 200, and the tray 40 has a downward slope so that the game balls 200 flow down toward the operation handle 3. (See FIG. 2). A receiving opening (not shown) for receiving a game ball is provided at the end of the downward slope of the tray 40, and the game ball received in the receiving opening is driven by the ball feed solenoid 4b, so that the glass frame One by one is sent to a ball feed opening 41 provided on the back surface of 50. Then, the game ball sent out to the ball feed opening 41 is guided to the end of the downward slope of the launch rail 42 by the launch rail 42 having a downward slope toward the launching member 4c. A stopper 43 for stopping the game ball is provided above the downwardly inclined end portion of the launch rail 42, and the game ball 200 sent out from the ball feed opening 41 is the downwardly inclined end portion of the launch rail 42. Thus, one game ball is stopped (see FIG. 2).

  When the player rotates the operation handle 3, the launch volume 3b (see FIG. 4) directly connected to the operation handle 3 also rotates, and the launch volume of the game ball is adjusted and adjusted by the launch volume 3b. The launching member 4c directly connected to the firing solenoid 4a (see FIG. 4) rotates with the firing strength. By rotating the launch member 4 c, the game ball 200 stored at the end of the downward slope of the launch rail 42 is launched by the launch member 4 c, and the game ball is launched into the game area 6.

  When the game ball fired as described above rises between the rails 5a and 5b from the launch rail 42 and exceeds the ball return prevention piece 5c, the game ball reaches the game area 6 and then falls in the game area 6. At this time, the game ball falls unpredictably by a plurality of nails and windmills provided in the game area 6.

  The game area 6 is provided with a plurality of general winning awards 12. Each of these general winning awards 12 is provided with a general winning opening detecting switch 12a (see FIG. 4). When this general winning opening detecting switch 12a detects the winning of a game ball, a predetermined winning ball (for example, 10) Game balls).

  Further, in the area below the center of the game area 6, there are a first start port 14 and a second start port 15 that constitute a start area into which game balls can enter, and a second large area in which game balls can enter. A winning opening 17 is provided.

  The second starting port 15 has a pair of movable pieces 15b, a mode in which the pair of movable pieces 15b is maintained in a closed state (hereinafter referred to as “first mode”), and a pair of movable pieces. The movement control is performed so that 15b is in an open state (hereinafter referred to as “second aspect”). When the second starting port 15 is controlled in the first mode, the winning member of the second large winning port 17 located immediately above the second starting port 15 becomes an obstacle, and the game ball Is impossible to accept. On the other hand, when the second start port 15 is controlled to the second mode, the pair of movable pieces 15b function as a tray, and it is easy to win a game ball to the second start port 15. That is, when the second start port 15 is in the first mode, there is no game ball winning opportunity, and when it is in the second mode, the game ball winning opportunity is increased.

  Here, the first start port 14 is provided with a first start port detection switch 14a (see FIG. 4) for detecting the entrance of a game ball, and the second start port 15 is a first for detecting the entrance of a game ball. 2 A start port detection switch 15a (see FIG. 4) is provided. When the first start port detection switch 14a or the second start port detection switch 15a detects the entry of a game ball, a special symbol determination random number value is acquired, and a right acquisition lottery (to be described later) Hereinafter, “Lottery for jackpot” is performed. Also, when the first start port detection switch 14a or the second start port detection switch 15a detects the entry of a game ball, a predetermined prize ball (for example, three game balls) is paid out.

  In addition, the second grand prize winning port 17 is configured by an opening formed in the game board 2. Below the second grand prize opening 17, there is a second big prize opening / closing door 17b that can protrude from the game board surface side to the glass plate 52 side. It is controlled to move between an open state protruding to the side and a closed state buried in the game board surface. When the second grand prize opening opening / closing door 17b protrudes from the game board surface, it functions as a tray for guiding the game ball into the second big prize opening 17, and the game ball can enter the second big prize opening 17. Become. The second big prize opening 17 is provided with a second big prize opening detection switch 17a (see FIG. 4). When the second big prize opening detection switch 17a detects the entry of a game ball, it is set in advance. Award balls (for example, 15 game balls) are paid out.

Furthermore, in the area on the right side of the game area 6, there are provided a normal symbol gate 13 constituting a normal area through which game balls can pass and a first grand prize opening 16 through which game balls can enter.
For this reason, if the operation ball 3 is not a game ball which has been greatly rotated and launched with a strong force, the normal design gate 13 and the first big winning opening 16 are configured so that the game ball does not pass or win. Yes.

  The normal symbol gate 13 is provided with a gate detection switch 13a (see FIG. 4) for detecting the passage of the game ball. When the gate detection switch 13a detects the passage of the game ball, the normal symbol determination random number value. Is acquired, and a “normal symbol lottery” to be described later is performed.

  The first grand prize opening 16 is normally kept closed by the first big prize opening opening / closing door 16b, and it is impossible to enter a game ball. In contrast, when a special game, which will be described later, is started, the first grand prize opening opening / closing door 16b is opened, and the first big prize opening opening / closing door 16b puts the game ball in the first big winning opening 16; It functions as a receiving tray that guides the game ball and can enter the first grand prize opening 16. The first big prize opening 16 is provided with a first big prize opening detection switch 16a (see FIG. 4). When the first big prize opening detection switch 16a detects the entry of a game ball, it is set in advance. Prize balls (for example, 15 game balls) are paid out.

  Further, in the lowermost area of the game area 6 and the lowermost area of the game area 6, the general winning opening 12, the first starting opening 14, the second starting opening 15, the first major winning opening 16, and the second large winning opening. An out port 11 is provided for discharging game balls that have not entered any of the winning ports 17.

In addition, a decoration member 7 that affects the flow of the game ball is provided in the center of the game area 6. A liquid crystal display device 31 is provided at a substantially central portion of the decorative member 7, and an effect driving device 33 in the form of a belt is provided above the liquid crystal display device 31.
In this embodiment, the liquid crystal display device 31 is used as a liquid crystal display. However, an organic EL display may be used, a projector, a reel made of an annular structure, a so-called 7-segment LED, a dot matrix. A display device or the like may be used.

The liquid crystal display device 31 displays an image during standby when no game is being performed, or displays an image according to the progress of the game. Among them, three effect symbols 36 for informing the jackpot lottery result, which will be described later, are displayed, and a combination of specific effect symbols 36 (for example, 777) is stopped and displayed as a jackpot lottery result. A jackpot is announced.
More specifically, when a game ball enters the first start port 14 or the second start port 15, the three effect symbols 36 are scroll-displayed, and the scroll is stopped after a predetermined time, The effect design 36 is stopped and displayed. Further, by displaying various images, characters, and the like during the variation display of the effect symbol 36, a high expectation that the player may win a big hit is given to the player.

  The effect driving device 33 gives a player a sense of expectation according to the operation mode. The effect driving device 33 performs, for example, an operation in which the belt moves downward or a rotating member at the center of the belt rotates. Various operational feelings are given to the player depending on the operation mode of the effect driving device 33.

  Furthermore, in addition to the above-described various production devices, the audio output device 32 outputs background music, sound effects, and the like, and produces productions using sound. The production lighting device 34 uses the light irradiation direction of each lamp, The luminescent color is changed to produce lighting.

  The effect button 35 is effective only when, for example, a message for operating the effect button 35 is displayed on the liquid crystal display device 31. The effect button 35 is provided with an effect button detection switch 35a (see FIG. 4). When the effect button detection switch 35a detects the player's operation, a further effect is executed in accordance with this operation.

  In the lower right of the game area 6, a first special symbol display device 20, a second special symbol display device 21, a normal symbol display device 22, a first special symbol hold indicator 23, a second special symbol hold indicator 24, a normal A symbol hold indicator 25 is provided.

  The first special symbol display device 20 is for notifying a lottery result obtained when a game ball enters the first start port 14, and is composed of 7-segment LEDs. That is, a plurality of special symbols corresponding to the jackpot lottery result are provided, and the lottery result is notified to the player by displaying the special symbol corresponding to the jackpot lottery result on the first special symbol display device 20. I am doing so. For example, “7” is displayed when the jackpot is won, and “−” is displayed when the player wins. “7” and “−” displayed in this way are special symbols, but these special symbols are not displayed immediately, but are displayed in a stopped state after being displayed for a predetermined time. .

  Here, the “successful lottery” means that when a game ball enters the first starting port 14 or the second starting port 15, a special symbol determining random number value is acquired, and the acquired special symbol determining random value is acquired. Is a random number value corresponding to “big hit” or a random number value corresponding to “small hit”. The jackpot lottery result is not immediately notified to the player, and the first special symbol display device 20 displays a variation such as blinking of the special symbol, and when the predetermined variation time has passed, the jackpot lottery result The special symbol corresponding to is stopped and displayed so that the player is notified of the lottery result. The second special symbol display device 21 is for notifying a lottery result of a jackpot that is performed when a game ball enters the second start port 15, and the display mode is the above-described first display mode. This is the same as the special symbol display mode in the special symbol display device 20.

  Further, in this embodiment, “big hit” means that a right to win a big hit game is obtained in a big win lottery performed on condition that a game ball has entered the first start port 14 or the second start port 15 Say what you did. In the “hit game”, a round game in which the first big prize opening 16 or the second big prize opening 17 is opened is performed 15 times in total. A predetermined time is set for the maximum opening time of the first grand prize port 16 or the second grand prize port 17 in each round game, and during this time, the first grand prize port 16 or the second grand prize port 17 is set. When a predetermined number of game balls (for example, nine) enter, one round game is completed. In other words, the “big hit game” is a game in which a game ball can enter the first grand prize winning opening 16 or the second big winning prize opening 17 and the player can acquire a winning ball according to the winning prize.

In this embodiment, in the “hit lottery”, two gaming states are set according to the winning probability. That is, the “low probability gaming state” in which the winning probability is set to 1 / 299.5 and the “high probability gaming state” in which the winning probability is set to 1 / 29.95. Also, in the “jackpot game”, a plurality of types of jackpot games are set. For example, in the case of “game per long”, the first grand prize opening 16 is released once (× 15 rounds) for 29.000 seconds for each round game. If it is “short win game”, the second big prize opening 17 is opened for 0.052 seconds × 1 time (× 15 rounds) for each round game. In the case of “game per development”, the second grand prize opening 17 is opened for 0.052 seconds × 3 times in the first round game, and after the second round, 29.000 seconds × 1 for each round game. Times (× 14 rounds).
In the case of “small hit”, one gaming state with a winning probability of 1 / 149.75 is set. In addition, if it is a “small hit game”, although it is not a round game, the second big prize opening 17 is opened for 0.052 seconds × 15 times. In the present embodiment, “big hit game” and “small hit game” are collectively referred to as “special game”.

  The normal symbol display device 22 is for notifying the lottery result of the normal symbol that is performed when the game ball passes through the normal symbol gate 13. As will be described in detail later, when the winning symbol is won by the normal symbol lottery, the normal symbol display device 22 is turned on, and then the second start port 15 is controlled to the second mode for a predetermined time.

  Here, “normal symbol lottery” means that when a game ball passes through the normal symbol gate 13, the normal symbol determination random number value is acquired, and the acquired normal symbol determination random value corresponds to “winning”. A process for determining whether or not the value is a random value. The lottery result of the normal symbol is not always notified immediately after the game ball passes through the normal symbol gate 13, but the normal symbol display device 22 displays a variation such as blinking of the normal symbol. When the fluctuation time elapses, the normal symbol corresponding to the lottery result of the normal symbol is stopped and displayed so that the player is notified of the lottery result.

Furthermore, if a game ball enters the first start port 14 or the second start port 15 during special symbol fluctuation display or a special game to be described later, and if a big win lottery cannot be performed immediately, a certain condition The right to win a jackpot will be withheld. More specifically, the random number value for special symbol determination acquired when the game ball enters the first start port 14 is stored as the first hold, and when the game ball enters the second start port 15 The acquired special symbol determination random number value is stored as the second hold.
For both of these holds, the upper limit hold number is set to 4, and the hold number is displayed on the first special symbol hold indicator 23 and the second special symbol hold indicator 24, respectively. When there is one first hold, the LED on the left side of the first special symbol hold indicator 23 lights up, and when there are two first holds, two LEDs on the first special symbol hold indicator 23 Lights up. In addition, when there are three first holds, the LED on the left side of the first special symbol hold indicator 23 blinks and the right LED is lit, and when there are four first holds, the first special symbol hold. Two LEDs on the display 23 blink. The second special symbol hold indicator 24 also displays the number of second hold on hold in the same manner as described above.
The upper limit reserved number of normal symbols is also set to four, and the reserved number of normal symbols is displayed in the same manner as the first special symbol hold indicator 23 and the second special symbol hold indicator 24. Displayed on the instrument 25.

  The glass frame 50 supports a glass plate 52 that covers the game area 6 in a visible manner in front of the game board 2 (player side). The glass plate 52 is detachably fixed to the glass frame 50.

  The glass frame 50 is connected to the outer frame 60 via a hinge mechanism 51 on one end side in the left-right direction (for example, the left side facing the gaming machine 1), and the left-right direction with the hinge mechanism 51 as a fulcrum. The other end side (for example, the right side facing the gaming machine 1) can be rotated in a direction to release from the outer frame 60. The glass frame 50 covers the game board 2 together with the glass plate 52, and can be opened like a door with the hinge mechanism 51 as a fulcrum to open the inner part of the outer frame 60 including the game board 2. On the other end side of the glass frame 50, a lock mechanism for fixing the other end side of the glass frame 50 to the outer frame 60 is provided. The fixing by the lock mechanism can be released by a dedicated key. The glass frame 50 is also provided with a door opening switch 133 (see FIG. 4) for detecting whether or not the glass frame 50 is opened from the outer frame 60.

  On the back surface of the gaming machine 1, a main control board on which the main control unit 110 is mounted, an effect control board on which the effect control unit 120 is mounted, a payout control board on which the payout control unit 130 is mounted, and a power supply unit 170 are mounted. A power supply board, a game information output terminal board 30 and the like are provided. Further, the power supply unit 170 is provided with a power plug 171 for supplying power to the gaming machine 1 and a power switch (not shown).

[Internal configuration of gaming machine]
Hereinafter, control means for controlling processing related to game progress of the gaming machine 1 according to the embodiment of the present invention will be described.
FIG. 4 is a block diagram showing an internal configuration of the gaming machine 1 according to the present embodiment.

  The main control unit 110 is a main control means for controlling the basic operation of the game, and receives various detection signals from the first start port detection switch 14a, etc., and opens and closes the first special symbol display device 20 and the first grand prize opening. The game is controlled by driving the solenoid 16c and the like.

  The main control unit 110 includes a one-chip microcomputer 110m including at least a main CPU 110a, a main ROM 110b, and a main RAM 110c, an inspection value generation unit 500, a transmission unit 550, an input port and an output port for main control (not shown). At least).

  The main control input port includes a payout control unit 130, a general winning port detecting switch 12a for detecting that a gaming ball has entered the general winning port 12, and a game ball having been inserted into the normal symbol gate 13. Gate detection switch 13a to detect, first start port detection switch 14a to detect that a game ball has entered the first start port 14, and second start to detect that a game ball has entered the second start port 15 The mouth detection switch 15a, the first grand prize opening detection switch 16a that detects that a game ball has entered the first grand prize opening 16, and the second that detects that a game ball has entered the second grand prize opening 17 A big prize opening detection switch 17a is connected. Various signals are input to the main control unit 110 through the input port for main control.

  The main control output port includes a payout control unit 130, a start opening / closing solenoid 15c for opening / closing the pair of movable pieces 15b of the second start opening 15, and a first large winning opening opening / closing door 16b. A special winning opening / closing solenoid 16c, a second large winning opening / closing solenoid 17c for operating the second winning opening / closing door 17b, a first special symbol display device 20 and a second special symbol display device 21 for displaying special symbols, and a normal symbol. A normal symbol display device 22 for displaying a symbol, a first special symbol hold indicator 23 and a second special symbol hold indicator 24 for displaying the number of reserved balls for a special symbol, and a normal symbol hold indicator for displaying the number of reserved balls for a normal symbol 25. A game information output terminal board 30 for outputting an external information signal is connected. Various signals are output from the main control output port.

  The main CPU 110a of the main control unit 110 reads out a program stored in the main ROM 110b based on an input signal from each detection switch or a timer (not shown) incorporated as an internal function, and performs arithmetic processing. Depending on the result, a control instruction (hereinafter referred to as “control signal”) for each component constituting the main control unit 110 and a control command for another control unit other than the main control unit 110 are output.

The main ROM 110b of the main control unit 110 stores in advance a game processing program that describes the content and procedure of processing related to game progress, and fixed data and tables necessary for determining various games.
As an example of the table stored in the main ROM 110b, a jackpot determination table referred to in the jackpot lottery, a hit determination table referred to in the normal symbol lottery, a symbol determination table for determining a special symbol stop symbol, after the jackpot is over End of jackpot game setting data table for determining the gaming state of the game, special electric accessory operating mode determination table for determining the opening / closing conditions of the special winning opening opening door, determining the opening pattern table of the special winning opening, and the variation pattern of the special symbol There is a variation pattern determination table.

  Further, the main ROM 110b is used when executing an authentication processing program describing the content and procedure of processing for transmitting a control command from the transmission unit 550 via the inspection value generation unit 500, and an authentication processing program. Fixed data, unique information that is unique to the gaming machine 1, and the like are stored in advance.

The main RAM 110c of the main control unit 110 functions as a data work area during the arithmetic processing of the main CPU 110a, and has a plurality of storage areas.
As an example of the storage area that the main RAM 110c has, a normal symbol holding number (G) storage area, a normal symbol holding storage area, a normal symbol data storage area, a first special symbol holding number (U1) storage area, a second special symbol Reservation count (U2) storage area, first special symbol random value storage area, second special symbol random value storage area, round game number (R) storage area, number of open times (K) storage area, number of big winning entrances ( C) Storage area, game state storage area (high probability game flag storage area, etc.), high probability game count (X) counter, game state buffer, stop symbol data storage region, transmission data storage region, special symbol time counter, special There are various timer counters such as game timer counters.

  The inspection value generation unit 500 of the main control unit 110 is provided between the main CPU 110a and the transmission unit 550. When the main control unit 110 transmits a control command, the check value generation unit 500 checks the validity of the control command and generates an error check value for authenticating the validity of the main control unit 110. Has a function (hereinafter referred to as “error check value addition function”). Specifically, the inspection value generation unit 500 receives a control command from the main CPU 110a when the main CPU 110a performs a process of transmitting a control command by the transmission unit 550 (hereinafter referred to as “command transmission process”). Then, the check value generation unit 500 performs a process of generating an error check value of the received control command (hereinafter referred to as “check value generation process”). Then, after adding the generated error check value to the control command (hereinafter referred to as “check value adding process”), check value generation unit 500 outputs the control command with the error check value to transmission unit 550.

  Among the output ports for main control, the transmission unit 550 of the main control unit 110 is a control unit (a production control unit 120 or a payout control unit 130, which will be described later), which is determined in particular to perform an authentication function for the main control unit 110. Used to output control commands to Specifically, the transmission unit 550 is provided subsequent to the inspection value generation unit 500, and the control command with an error inspection value output from the inspection value generation unit 500 is transmitted to the effect control unit 120 and the payout control unit 130. Send to etc.

  The game information output terminal board 30 is a board for outputting an external information signal generated by the main control unit 110 to a hall computer or the like of a game store. The game information output terminal board 30 is connected to the main controller 110 by wiring, and is provided with a connector for connecting external information to a hall computer or the like of a game store.

  The power supply unit 170 includes a backup power supply made of a capacitor, supplies a power supply voltage to the gaming machine 1 and monitors a power supply voltage supplied to the gaming machine 1, and when the power supply voltage becomes a set value or less, An electric interruption detection signal is output to the main control unit 110. More specifically, when the power interruption detection signal is at a low level and a certain time has elapsed since the power supply voltage is equal to or lower than a set value, the reset signal is at a low level and the main CPU 110a performs a process of stopping the operation. Thereafter, when the power interruption detection signal becomes a high level because the power supply voltage is equal to or higher than the set value and a predetermined time elapses, the reset signal becomes a high level, and the main CPU 110a performs a process of starting an operation. The backup power source is not limited to a capacitor, and may be a battery, for example, or a capacitor and a battery may be used in combination.

  The effect control unit 120 mainly controls each effect such as during a game or standby. The effect control unit 120 includes a sub CPU 120a, a sub ROM 120b, and a sub RAM 120c, and is connected to the main control unit 110 so as to be communicable in one direction from the main control unit 110 to the effect control unit 120. . The sub CPU 120a reads out the program stored in the sub ROM 120b based on the control command transmitted from the main control unit 110 or the input signal from the effect button detection switch 35a and the timer, performs arithmetic processing, and Based on the processing, the corresponding data is transmitted to the lamp control unit 140 or the image control unit 150. The sub RAM 120c functions as a data work area during the arithmetic processing of the sub CPU 120a.

  For example, when the sub CPU 120a in the effect control unit 120 receives a variation pattern designation command indicating a variation pattern of a special symbol, which is one of the control commands transmitted from the main control unit 110, the contents of the received variation pattern designation command are displayed. Analysis is performed to generate data for causing the liquid crystal display device 31, the audio output device 32, the effect driving device 33, and the effect lighting device 34 to execute a predetermined effect, and the data is used for the image control unit 150 and the lamp control unit 140.

The sub ROM 120b of the effect control unit 120 stores a program for effect control, data necessary for determining various games, and a table.
As an example of the table stored in the sub-ROM 120b, to determine the combination of the effect pattern determination table for determining the effect pattern based on the variation pattern designation command received from the main control unit and the effect symbol 36 to be stopped and displayed. There is a production design determination table.

  When the production control unit 120 is provided with an authentication function for the main control unit 110, the sub ROM 120b includes the contents of the authentication process including the error check process for the received control command performed by the sub CPU 120a. An authentication processing program describing the procedure, fixed data used when executing the authentication processing program, information corresponding to unique information stored in the main ROM 110b of the main control unit 110, and the like are stored in advance. . When the payout control unit 130 has an authentication function for the main control unit 110, a program related to the authentication process of the effect control unit 120 is stored in a payout ROM described later. The configuration related to these authentication processes will be described later.

The sub RAM 120c of the effect control unit 120 functions as a data work area during the arithmetic processing of the sub CPU 120a, and has a plurality of storage areas.
As an example of the storage area that the sub-RAM 120c has, there are a game state storage area, an effect mode storage area, an effect pattern storage area, an effect symbol storage area, and the like.

  The payout control unit 130 controls payout of game balls. The payout control unit 130 includes a one-chip microcomputer including a payout CPU, a payout ROM, and a payout RAM (not shown), and is connected to the main control unit 110 so as to be capable of bidirectional communication. The payout CPU reads out a program stored in the payout ROM based on input signals from the payout ball count switch 132, the door opening switch 133, and the timer that detect whether or not the game ball has been paid out, and performs arithmetic processing. At the same time, the corresponding data is transmitted to the main control unit 110 based on the processing.

  Further, a payout motor 131 of a payout device for paying out a predetermined number of game balls from the game ball storage unit is connected to the output side of the payout control unit 130. The payout CPU reads out a predetermined program from the payout ROM based on a payout number designation command that is one of the control commands transmitted from the main control unit 110, performs arithmetic processing, and controls the payout motor 131 of the payout device. Then, a predetermined game ball is paid out. At this time, the payout RAM functions as a data work area at the time of calculation processing of the payout CPU.

  The lamp control unit 140 controls lighting of the effect lighting device 34 provided on the game board 2 and controls driving of the motor for changing the light irradiation direction. In addition, energization control is performed on a drive source such as a solenoid or a motor that operates the effect driving device 33. The lamp control unit 140 is connected to the effect control unit 120, and performs the above-described controls based on various commands transmitted from the effect control unit 120.

  The image control unit 150 stores a host CPU for performing image display control of the liquid crystal display device 31, a host RAM having a temporary storage area functioning as a work area for the host CPU 150a, a control processing program for the host CPU 150a, and the like. A host ROM, a CGROM storing image data, a VRAM having a frame buffer for drawing image data, a VDP (Video Display Processor) serving as an image processor, and a sound control circuit for controlling sound.

Based on the effect pattern designation command received from the effect control unit 120, the host CPU instructs the liquid crystal display device 31 to display the image data stored in the CGROM in the VDP.
The VDP draws image data stored in the CGROM in the frame buffer of the VRAM based on an instruction from the host CPU. Next, a video signal (RGB signal or the like) is generated based on the image data stored in the display frame buffer in the VRAM, and the generated video signal is output to the liquid crystal display device.

  The sound control circuit includes an audio ROM that stores a large number of audio data. The sound control circuit reads a predetermined program based on a command transmitted from the effect control unit 120 and also outputs the audio output device 32. Audio output control at.

  The launch control unit 160 performs launch control of the game ball. In the firing control unit 160, the touch sensor 3a and the firing volume 3b are connected to the input side, and the firing solenoid 4a and the ball feeding solenoid 4b are connected to the output side. The firing control unit 160 inputs a touch signal from the touch sensor 3a and performs control to energize the firing solenoid 4a and the ball feed solenoid 4b based on the voltage supplied from the firing volume 3b.

  The touch sensor 3a is provided in the inside of the operation handle 3, and is comprised from the electrostatic capacitance type proximity switch using the change of the electrostatic capacitance by the player touching the operation handle 3. When the touch sensor 3a detects that the player has touched the operation handle 3, the touch sensor 3a outputs a touch signal that permits energization of the firing solenoid 4a to the firing control unit 160 (see FIG. 4). The firing control unit 160 is configured so that the game ball 200 is not fired into the game area 6 unless a touch signal is input from the touch sensor 3a.

  The firing volume 3b is provided directly connected to a rotating portion around which the operation handle 3 rotates, and is composed of a variable resistor. The firing volume 3b divides a constant voltage (for example, 5V) applied to the firing volume 3b by a variable resistor, and supplies the divided voltage to the firing control unit 160 (the voltage to be supplied to the firing control unit 160). Variable). The launch controller 160 energizes the launch solenoid 4a based on the voltage divided by the launch volume 3b, and rotates the launch member 4c directly connected to the launch solenoid 4a, thereby playing the game ball 200 in the game. Fire into area 6.

  The launching solenoid 4a is composed of a rotary solenoid, and a launching member 4c is directly connected to the launching solenoid 4a, and the launching member 4c is rotated by rotating the launching solenoid 4a.

  Here, the rotational speed of the firing solenoid 4a is set to about 99.9 (times / minute) based on the frequency based on the output period of the crystal oscillator provided in the firing control unit 160. As a result, the number of games played per minute is about 99.9 (pieces / minute) because one shot is fired every time the firing solenoid rotates. That is, one game ball is fired about every 0.6 seconds.

  The ball feed solenoid 4b is composed of a linear solenoid, and sends out the game balls in the tray 40 one by one toward the launch member 4c directly connected to the launch solenoid 4a.

  Here, based on the control command from the main control unit 110 such as the effect control unit 120, the payout control unit 130, the lamp control unit 140, the image control unit 150, and the launch control unit 160 having the above-described configuration, or based on the control command. Control units that perform control processing of the gaming machine 1 according to commands generated based on the command are collectively referred to as “peripheral control unit 300”. In addition, each control board on which each control unit of the peripheral control unit 300 is mounted, such as an effect control board on which the effect control unit 120 is mounted and a payout control board on which the payout control unit 130 is mounted, is collectively referred to as “peripheral control board” " Note that the lamp control unit 140 and the image control unit 150 can be mounted on the same substrate as the effect control unit 120. Further, the payout control unit 130 and the firing control unit 160 can be mounted on the same substrate as the main control unit 110.

[Internal configuration related to authentication processing of gaming machines]
Hereinafter, control means for realizing the security function that the gaming machine 1 having the above configuration has for preventing fraud will be described.
The security function of the gaming machine 1 according to the present embodiment is realized by the peripheral control unit 300 examining the validity of the control command transmitted from the main control unit 110 and authenticating the main control unit 110. Therefore, the processing executed by the main control unit 110 and the peripheral control unit 300 is referred to as “authentication processing” in a sense that distinguishes it from processing related to normal game progress. In the present embodiment, description will be made assuming that the effect control unit 120 of the peripheral control unit 300 is provided with an authentication function for the main control unit 110.

  Specifically, when the main control unit 110 generates a control command and transmits it to the effect control unit 120, the main control unit 110 generates an error check value of the control command generated before (past) the control command and transmits this time. It is added to the control command to be transmitted. The effect control unit 120 collates the error check value added to the control command received this time with the error check value generated in advance using the control command received before the control command. If the two match, the validity of the control command received this time is authenticated, and it is determined that the main control unit 110 has been successfully authenticated.

FIG. 5 is a functional block diagram showing an internal configuration related to authentication processing of the main control unit 110 according to the present embodiment.
The main control unit 110, in addition to the main CPU 110a, main ROM 110b, and main RAM 110c as described above, a test value generation unit 500 that performs error check value generation processing and addition processing based on a transmission instruction from the main CPU 110a, and effect control And a transmission unit 550 that performs a process of transmitting a control command to the unit 120. Each component of the main control unit 110 is connected by a bus (not shown) so that various data and signals output from the main control unit 110 can be transmitted and received. The bus has at least the functions of an address bus, a data bus, and a control bus, assigns data passing on the bus based on control signals output from each component of the main control unit 110, and does not cause data collision So that it is controlled. In FIG. 5, for convenience, it is not shown in the form of a bus, but is represented as a signal line that connects each component of the main control unit 110, and only the characteristic ones are shown. In addition, a predetermined clock signal output from a clock pulse generation circuit (not shown) is input to each component of the main control unit 110.

  The main CPU 110a executes processing related to game progress as described above, and also executes authentication processing in the gaming machine 1. The main CPU 110a executes various arithmetic processes using the authentication processing program and various fixed data stored in the main ROM 110b, and outputs control signals and control commands according to the results of the various arithmetic processes.

For example, when the main CPU 110a performs command transmission processing of a control command to be transmitted to the effect control unit 120 based on the authentication processing program, the main CPU 110a writes a control signal for writing the control command to the inspection value generation unit 500 ( (Hereinafter referred to as “write signal”), and the control command is transmitted by the transmitter 550 via the test value generator 500.
When the main CPU 110a needs to set unique information (to be described later) in the inspection value generation unit 500 during the initialization process of the main control unit 110, the main CPU 110a reads a unique signal stored in the main ROM 110b ( (Hereinafter referred to as “read signal”) to acquire unique information, and the acquired unique information is set in the test value generation unit 500.

  In addition to the game processing program and data as described above, the main ROM 110b stores in advance authentication processing program, fixed data, and unique information that is information unique to the gaming machine 1. The unique information is not particularly limited as long as it is unique to the gaming machine 1 held by the main control unit 110. The unique information is, for example, data (for example, control command data or program code) stored at a specific address in an area in the main ROM 110b where fixed data is stored, a checksum value of the data, or the main CPU 110a. It is possible to use product information such as an identification number (ID) and a manufacturer code / model code uniquely assigned to the. In addition, dummy data of an error check value determined in advance with the performance control unit 120 can be used. These data may be values obtained by performing four arithmetic operations or logical operations. The unique information may be stored in storage means (memory cell, ROM, etc.) separate from the main ROM 110b.

  When the control command output from the main control unit 110 is transmitted to the effect control unit 120, as shown in FIG. 6, the error check value of the control command generated before (past) the control command to be transmitted this time. Is added. The error check value to be added is stored in a predetermined storage area (a storage circuit 522 of the check value generation unit 500 described later). However, when the main control unit 110 is initialized at the time of resetting the gaming machine 1 such as immediately after the power is turned on, the error check value to be added stored in the storage area is also cleared. At this time, after the error check value to be added is cleared, unique information stored in advance in the main ROM 110b as an error check value (hereinafter referred to as “initial check value”) to be added to the first generated control command or the like Is used. Since the initial inspection values are required by the number N (N; N is a positive integer), which will be described later, the specific information is prepared in advance for at least the necessary number of initial inspection values.

  Here, immediately after the error check value is cleared as described above, the control command generated first is referred to as “control command (1)”, and the error check value generated using the control command (1) is referred to as “control command (1)”. This is referred to as “error check value (1)”. Similarly, the control command generated Pth (P is a positive integer) after the error check value is cleared as described above is called “control command (P)” and is generated using the control command (P). The error check value thus obtained is referred to as “error check value (P)”. The value of P indicates the number of generated control commands immediately after the error check value is cleared as described above, and may be counted by a known counter circuit or the like (hereinafter, P is referred to as “number of generated”). . In the present embodiment, a generated number storage area (P) is provided in the main RAM 110c, and the main CPU 110a updates the value of the generated number function area (P) during command transmission processing.

  In the present embodiment, a control command generated by the main CPU 110a and actually output in the current command transmission process is defined as a control command (P), and a control command generated N times before the control command (P) is used. A control command (PN) is assumed. Then, the error check value (PN) of the control command (PN) generated N times before is added to the control command (P). Then, the control command (P) and the error check value (PN) are transmitted to the effect control unit 120. The value of N is a number determined in advance as to how many error check values of the previously generated control command are added to the control command to be transmitted this time (hereinafter, N is referred to as “retroactive number”). "). If the main control unit 110 generates a control command (P) and transmits it to the effect control unit 120, N is the control command transmitted before how many times the control command is transmitted this time. It can be considered that this is a predetermined number of whether or not to add an error check value. The present invention includes such a concept.

  The inspection value generation unit 500 is provided between the main CPU 110a and the transmission unit 550. The connection between the main CPU 110a and the inspection value generation unit 500 and the connection between the inspection value generation unit 500 and the transmission unit 550 are bus-connected as described above, and the buses used for each connection are the same standard. It has become a bus. That is, a method (hereinafter referred to as “input / output control format”) for controlling data transmission / reception between each of the input interface on the main CPU 110a side of the inspection value generation unit 500 and the input interface on the inspection value generation unit 500 side of the transmission unit 550. “)” Is a method corresponding to the input / output control method set in the output interface on the inspection value generation unit 500 side of the main CPU 110a. As the bus standard, a known standard may be used.

  In the present embodiment, the input / output control method of the output interface on the inspection value generation unit 500 side of the main CPU 110a is referred to as “CPU interface method”. The CPU interface method may use a known input / output control method determined based on the above bus standard, and the bus standard between the main CPU 110a and the transmission unit 550 before the test value generation unit 500 is added. The input / output control method determined based on The output interface on the transmission unit 550 side of the inspection value generation unit 500 is also configured by the CPU interface method.

  The CPU interface system of this embodiment will be specifically described. For example, when the main CPU 110a outputs a control command to the test value generation unit 500, the main CPU 110a uses the control command as the data bus, the address data specifying the predetermined storage area of the test value generation unit 500 as the address bus, and the control bus. Outputs a write signal. This address data is converted into a chip select signal via a decoder and input to the inspection value generation unit 500. When the chip select signal and the write signal become active (hereinafter, when the control signal becomes active is referred to as “control signal is input”), the inspection value generation unit 500 takes in a control command on the data bus. With such an input / output control method, a control command is output from the main CPU 110 a to the inspection value generation unit 500.

  Also, when the test value generation unit 500 outputs a control command to the transmission unit 550, the test value generation unit 500 also includes address data that specifies a control command for the data bus and a predetermined storage area of the transmission unit 550 for the address bus, A write signal is output to the control bus. Then, when the chip select signal and the write signal of the address data are input, the transmission unit 550 takes in the control command on the data bus, and the control command is transferred from the test value generation unit 500 to the transmission unit 550. The same applies when the inspection value generation unit 500 outputs the error inspection value to the transmission unit 550.

  In the present embodiment, the output address data is converted to a chip select signal and then input to a designated component in the main control unit 110. Conversion from address data to a chip select signal Description of is omitted. In this embodiment, a bus having a bit width equal to or greater than the data length of the smaller one of the control command and the error check value may be provided. For example, if the control command is 2-byte data and the error check value is 1-byte data, the bit width of the data bus may be at least 1 byte. In this case, the main CPU 110a and the test value generation unit 500 first output the upper 1 byte of the 2-byte control command to the data bus, and then output the lower 1 byte to the data bus. Subsequently, the check value generation unit 500 outputs a 1-byte error check value to the data bus.

  The inspection value generation unit 500 performs a function of adding an error inspection value to the control command output from the main CPU 110a and outputting the control command to the transmission unit 550. The inspection value generation unit 500 performs the inspection value generation processing, inspection value addition processing, and the like. It is a circuit that executes the overall processing of the main control unit 110 related to security function implementation. Specifically, the test value generation unit 500 includes at least a buffer unit 510, a generation unit 520, and an addition unit 530. Each means of the inspection value generation unit 500 is configured by a wired logic control system. In the present embodiment, the input / output control method between the means in the test value generation unit 500 and between the circuits in each means is referred to as a “wired interface method”. In the wired interface method, when an enable signal or the like is output to a connection destination of data to be output, the connection destination takes in the output data based on the input of the enable signal or the like. Therefore, the wired interface system is different from the CPU interface system that requires address data (chip select signal) and a write signal transmitted via the bus.

  The buffer unit 510 is a circuit that temporarily holds the control command output from the main CPU 110 a and outputs the held control command to the subsequent generation unit 520 and addition unit 530. That is, the buffer unit 510 temporarily holds a control command transmitted from the main CPU 110 a to the effect control unit 120, a command transmission process of the main CPU 110 a, a test value generation process of the subsequent generation unit 520, and an inspection of the addition unit 530. It plays a role of adjusting the execution timing with the value addition processing. Further, data transmission / reception is controlled between the input side of the buffer means 510 and the main CPU 110a by the input / output control method corresponding to the CPU interface method as described above. On the other hand, on the output side of the buffer unit 510, data transmission / reception is controlled between the subsequent generation unit 520 and the addition unit 530 by a wired interface method. That is, the buffer unit 510 has different input / output control methods on its input side and output side, and plays a role of matching the CPU interface method of the main CPU 110a with the wired interface method in the inspection value generation unit 500. Yes.

  The buffer unit 510 includes at least a data buffer 511 and a control circuit 512. The data buffer 511 is a circuit that takes in and holds the control command output from the main CPU 110a via the data bus. The control circuit 512 is a circuit that controls the operation of the data buffer 511 based on a control signal output from the main CPU 110a.

  Specifically, when a write signal for writing the control command output from the main CPU 110a to the data buffer 511 of the buffer unit 510 and address data designating the buffer unit 510 are input, the control circuit 512 receives data An enable signal (hereinafter referred to as an “operation permission signal”) for causing the data buffer 511 to take in a control command on the bus is output. The data buffer 511 takes in a control command on the data bus based on the input of the operation permission signal. Further, the control circuit 512 outputs an operation permission signal for activating the control command fetched by the data buffer 511 to be output to the generation unit 520 and the addition unit 530. The data buffer 511 outputs the captured control command to the generation unit 520 and the addition unit 530 based on the input of the operation permission signal. Then, the control circuit 512 sends the control command output from the data buffer 511 to the control circuit 523 of the generation unit 520 and the control circuit 532 of the addition unit 530 so that the generation unit 520 and the addition unit 530 can input the control command. The operation permission signal is output. Note that the timing at which the control circuit 512 outputs each operation permission signal is determined by each unit to input the control signal and the clock signal from the main CPU 110a while taking into account the operation time of each unit in the test value generation unit 500. The timing is set in advance so that it can operate normally in synchronization with the timing.

  The generation unit 520 is a circuit that generates an error check value of the control command output from the buffer unit 510 and outputs the generated error check value to the subsequent adding unit 530. In other words, the generation unit 520 plays a role of executing the inspection value generation process. The generation unit 520 includes at least a generation circuit 521, a storage circuit 522, and a control circuit 523. The generation circuit 521 is a circuit that performs an arithmetic process on the control command output from the buffer means 510 to generate an error check value. The storage circuit 522 is a circuit that stores the error check value generated by the generation circuit 521. The control circuit 523 is a circuit that controls the operation of the generation circuit 521 and the storage circuit 522 based on the operation permission signal output from the buffer unit 510.

  Specifically, the generation circuit 521 operates the control command output from the buffer unit 510 using a preset calculation method for generating an error check value (hereinafter referred to as “generation method”) and performs error checking. This circuit generates a value and outputs it to the storage circuit 522. More specifically, the generation circuit 521 is connected to the data buffer 511 of the buffer unit 510 via a data line, and is connected to the control circuit 523 via a control line. Then, based on the operation permission signal output from the control circuit 512 of the buffer means 510, the control circuit 523 outputs an operation permission signal for inputting a control command and performing operation processing to the generation circuit 521. The generation circuit 521 receives the control command output from the data buffer 511 when the operation permission signal is input from the control circuit 523. Then, the generation circuit 521 calculates the input control command using a preset generation method, and generates an error check value. Subsequently, the generation circuit 521 outputs the generated error check value to the storage circuit 522.

  The generation method is not particularly limited as long as it is determined in advance between the main control unit 110 and the effect control unit 120. As the generation method, for example, a known method such as a checksum method, a CRC method, an odd parity method, an even parity method, a group count check method, a vertical parity method, a horizontal parity method, or a Hamming code method can be used. The generation circuit 521 can be configured to input and calculate the control command output from the buffer unit 510 as it is, or to input and calculate only a part of the control command output from the buffer unit 510. It can also be configured. For example, the control command is composed of 1-byte “MODE” information and 1-byte “DATA” information as will be described later, but only the “MODE” information of the output control command is input. It can be configured to operate.

  The storage circuit 522 is a circuit that stores the error check value output from the generation circuit 521. More specifically, the storage circuit 522 includes at least N stages of storage circuits (1) to (N) corresponding to the retroactive number N. The storage circuits (1) to (N) of the storage circuit 522 are connected to each other so as to have a pipeline configuration. The first-stage storage circuit (storage circuit (N) in FIG. 5) is connected to the generation circuit 521 by a data line, and the final-stage storage circuit (storage circuit (1) in FIG. 5) is connected to the adding means 530 and the data. Connected with wires. The storage circuits (1) to (N) are connected to the control circuit 523 through control lines, respectively. Then, the control circuit 523 outputs a control signal (hereinafter referred to as “shift processing signal”) for sequentially shifting the data stored in each of the storage circuits (1) to (N). When each storage circuit (1) to (N) receives the shift processing signal from the control circuit 523, each storage circuit (1) to (N) stores the error check value stored in the storage circuit in the next stage. To shift sequentially.

  Thus, the storage circuit 522 has at least the function of an N-stage shift register (FIFO memory) corresponding to the retroactive number N. The storage circuit 522 then controls the N controls from the control command (P) received by the buffer means 510 from the main CPU 110a to the control command (PN) that is N times before the control command (P). Error check values (error check value (P) to error check value (PN)) corresponding to each command can be stored. Then, the storage circuit (N) in the first stage of the storage circuit 522 takes in and stores the error check value output from the generation circuit 521 in response to the input of the shift processing signal, and the storage circuit (1) in the final stage stores The error check value stored by itself is output to the adding means 530. That is, the storage circuit 522 outputs the error check value (PN) of the control command (PN) generated in the past from the control command (P) held in the buffer unit 510 to the adding unit 530. It becomes.

Here, the procedure for adding an error check value will be described with reference to FIG.
In the case of P = 1, that is, when the first control command generated after the error check value stored in the storage circuit 522 is cleared when the main control unit 110 is initialized is transmitted. The main CPU 110a reads all N pieces of unique information from the main ROM 110b, and sends them as initial check values (1) to (N) to the storage circuits (1) to (N) so as to correspond to the generation order of the control commands. Store it.
When P ≦ N, that is, when a control command generated before the Nth time after the error check value stored in the storage circuit 522 is cleared, the control command (P) is transmitted. Initial inspection values (1) to (N) are added.
On the other hand, when P> N, that is, when a control command generated after the Nth time after the error check value stored in the storage circuit 522 is cleared is transmitted, the control command ( An error check value (PN) is added to P). FIG. 6 shows a case where N = 2. Such an error check value addition procedure is determined in advance between the main control unit 110 and the effect control unit 120.

  The possible range of the retroactive number N is limited by the storage capacity of the storage circuit 522 (and the storage unit 622 of the effect control unit 120), but is basically arbitrary. If the value of N is large, it becomes more difficult for an unauthorized person to analyze the relationship between a control command and an error check value added to the control command, and illegal acts can be further prevented. However, if the value of N becomes a value far greater than the number of transmissions of the control command while the gaming machine is operating for one day, for example, all error check values added to the control command become unique information, and the confidentiality of the unique information is reduced. There is a risk of damage. In the present embodiment, the expressions “error check value” and “error check value (P−N)” are initial check values (initial check values) added when P ≦ N, unless otherwise specified. Any one of the values (1) to the initial inspection value (N) will be described.

  The adding unit 530 is a circuit that adds the error check value output from the generating unit 520 to the control command output from the buffer unit 510 and outputs the error check value to the transmitting unit 550. That is, the adding unit 530 plays a role of executing the inspection value adding process. Further, on the input side of the adding unit 530, data transmission / reception is controlled between the buffer unit 510 and the generating unit 520 by a wired interface method. On the other hand, data transmission / reception is controlled between the output side of the adding unit 530 and the subsequent transmission unit 550 by the input / output control method corresponding to the CPU interface method as described above. That is, the adding unit 530 has different input / output control methods on its input side and output side, and an input / output control method corresponding to the wired interface method in the test value generation unit 500 and the CPU interface method of the transmission unit 550. It plays a role to align.

  The adding unit 530 includes at least an input selection circuit 531 and a control circuit 532. The input selection circuit 531 selectively selects the control command output from the buffer means 510 and the error check value output from the generation means 520 so as to be consistent with the predetermined error check value addition procedure. It is a circuit to capture. The control circuit 532 is a circuit that controls the operation of the input selection circuit 531 based on the operation permission signal output from the buffer means 510.

  Specifically, the input selection circuit 531 is connected to the data buffer 511 of the buffer means 510 and the storage circuit at the final stage of the storage circuit 522 of the generation means 520 (storage circuit (1) in FIG. 5) through data lines. ing. The input selection circuit 531 is connected to the control circuit 532 through a control line. The input selection circuit 531 is set in advance so that the connection with the data buffer 511 is valid, and takes in the control command output from the data buffer 511. Then, the control circuit 532 delays a predetermined time based on the operation permission signal output from the control circuit 512 of the buffer means 510, and makes a control signal (valid for connection with the storage circuit 522 of the input selection circuit 531). (Hereinafter referred to as “connection switching signal”) is output to the input selection circuit 531. When the connection switching signal is input from the control circuit 532, the input selection circuit 531 takes in the error check value output from the storage circuit 522.

  Then, the input selection circuit 531 outputs the control command and the error check value taken into the data bus connected to the transmission unit 550. In addition, the control circuit 532 outputs address data for designating a predetermined storage area of the transmission unit 550 to an address bus connected to the transmission unit 550 and a write signal to the control bus. At this time, the timing at which the control circuit 532 outputs the write signal is based on the operation permission signal output from the control circuit 512 of the buffer means 510 while considering the operation time of the generation means 520 and the transmission unit 550. The timing is set in advance so that the error check value is added in accordance with the error check value addition procedure.

  The transmission unit 550 performs a function of transmitting the control command and the error check value output from the inspection value generation unit 500 to the effect control unit 120, and includes at least a transmission buffer 551 and a transmission circuit 552.

  The transmission buffer 551 is a buffer circuit for temporarily holding data to be transmitted to the effect control unit 120. Specifically, when a write signal for writing the control command output from the test value generation unit 500 to the transmission buffer 551 and address data specifying the transmission buffer 551 are input to the transmission buffer 551, the control is performed. Capture commands via the bus. The transmission buffer 551 receives a write signal for writing the error check value to be added to the control command output from the check value generation unit 500 to the transmission buffer 551 and address data designating the transmission buffer 551. Then, the error check value is taken in via the bus. Then, the transmission buffer 551 immediately transfers the fetched control command and error check value to the transmission circuit 552.

  The transmission circuit 552 has a function of converting data to be transmitted to the effect control unit 120 into a data format corresponding to a data transmission format (serial transmission format or parallel transmission format) between the main control unit 110 and the effect control unit 120. It has. Then, the transmission circuit 552 performs the above conversion processing on the data delivered from the transmission buffer 551 to obtain transmission data, and immediately transmits it to the effect control unit 120.

The operation of each component related to the authentication process of the main control unit 110 configured as described above will be outlined.
When the gaming machine 1 is powered on, a system reset occurs in the main control unit 110, and the main CPU 110a performs an initialization process for the main control unit 110. Thereafter, the main CPU 110a performs processing related to game progress based on the game processing program stored in the main ROM 110b. Then, the main CPU 110a performs a command transmission process when it is time to transmit a control command.

  First, the main CPU 110a reads data necessary for constructing a control command from the main ROM 110b. Subsequently, the main CPU 110a configures a control command (P) to be transmitted this time using the read data, and sets it in the transmission data storage area of the main RAM 110c. At this time, the main CPU 110a updates the value of the generated number storage area (P) of the main RAM 110c, and sets the initial inspection value if the control command (P) transmitted this time is the control command (1). The initial test value is set by the main CPU 110a reading the unique information from the main ROM 110b, outputting the read unique information to the test value generating unit 500, and storing it in the storage circuit 522 of the test value generating unit 500.

  Then, the main CPU 110a outputs the control command (P) set in the transmission data storage area to the buffer means 510 of the inspection value generation unit 500 at the transmission timing of the control command. At this time, the main CPU 110 a outputs a write signal and address data to the buffer means 510. The buffer unit 510 takes in the control command (P) based on the input of the write signal and outputs it to the generation unit 520 and the addition unit 530 of the inspection value generation unit 500. At this time, the buffer unit 510 outputs an operation permission signal to the generation unit 520 and the addition unit 530.

  The generation unit 520 generates an error check value using the control command (P) output from the buffer unit 510 based on the input of the operation permission signal output from the buffer unit 510. The generation unit 520 generates an error check value (P) by a preset generation method for the input control command (P). Then, the generated error check value (P) is stored, and the storage circuit 522 is shifted, and the error check value (PN) stored in the past is output to the adding unit 530.

  On the other hand, the adding unit 530 takes in the control command (P) output from the buffer unit 510 based on the input of the operation permission signal output from the buffer unit 510. Then, the adding unit 530 outputs the captured control command (P) to the transmission unit 550. At this time, the adding unit 530 outputs a write signal and address data to the transmission unit 550. Further, the adding unit 530 delays a predetermined time from the input of the operation permission signal output from the buffer unit 510, switches the connection of its own input selection circuit 531, and outputs the error check value (P−) output from the generating unit 520. N). Then, the adding unit 530 outputs the fetched error check value (PN) to the transmission buffer 551 of the transmission unit 550. At this time, the adding unit 530 outputs a write signal and address data to the transmission buffer 551.

  When the write signal output from the adding unit 530 is input, the transmission buffer 551 takes in the control command (P) and the error check value (PN) and immediately transfers them to the transmission circuit 552 of the transmission unit 550. The transmission circuit 552 performs the conversion process on the control command (P) and the error check value (PN) delivered from the transmission buffer 551 to obtain transmission data, and immediately transmits it to the effect control unit 120. In this way, a control command with an error check value is transmitted from the transmission unit 550 of the main control unit 110 to the effect control unit 120.

Thereafter, the control command (P) transmitted from the transmission unit 550 constituting the main control unit 110 is received by the reception unit 600 constituting the effect control unit 120.
In FIG. 7, the functional block regarding the authentication process of the production | presentation control part 120 which concerns on this embodiment is shown.
The effect control unit 120 includes at least a reception unit 600, an inspection unit 610, and an inspection value generation unit 620 as functions related to the authentication process. Further, the check value generation unit 620 has at least functions of a generation unit 621 that generates an error check value and a storage unit 622 that stores the generated error check value.

  The receiving unit 600 has a function of performing a process corresponding to the conversion process on the transmission data from the main control unit 110 to generate a control command (P) and storing it in its own reception buffer. The receiving unit 600 outputs a signal indicating that a control command (P) reception interrupt request has been issued, or sets a flag indicating that reception of the control command (P) is completed, The CPU 120a has a function of enabling detection of completion of reception of the control command (P) transmitted from the main control unit 110.

  The receiving unit 600 has a function of extracting the added error check value (PN) from the received control command (P) with an error check value and outputting the extracted error check value (PN) to the check unit 610. In addition, the receiving unit 600 has a function of outputting the control command (P) after extracting the error check value (PN) to the check value generating unit 620. Note that specific means for realizing the function of the receiving unit 600 include a part of the sub CPU 120a, a part of the sub ROM 120b, a part of the sub RAM 120c, a command receiving input port (not shown), and the like shown in FIG. It can consist of

  The check value generation unit 620 has a function of generating an error check value (P) in the generation unit 621 using the control command (P) output from the reception unit 600. The error check value generated by this function is used to verify the validity of the received control command (P). The check value generation unit 620 has a function of storing the error check value (P) generated by the generation unit 621 in the storage unit 622. Also, the check value generation unit 620, based on the error check value output procedure previously determined with the main control unit 110, the error check value (PN) stored in the storage unit 622 in the past. ) To the inspection unit 610.

  The check value generation unit 620 has a function of outputting an error check value generated in the past and stored in the storage unit 622 to the check unit 610 (hereinafter referred to as “error check value output function”). This is the same as the error check value addition function possessed by. This output procedure is defined by a value corresponding to the retroactive number N of the main control unit 110. The error check value output function of the production control unit 120 is determined in advance between the main control unit 110 and the production control unit 120.

  In particular, the function that the generation unit 621 generates the error check value (P) using the control command (P) output from the reception unit 600 is the same as the function that the generation circuit 521 of the main control unit 110 has. is there. The storage unit 622 also stores the error check value (P) generated by the generation unit 621 and outputs the error check value (PN) stored in the past to the check unit 610. The same function as that of the storage circuit 522 of the main control unit 110 is provided. In addition, when the main control unit 110 or the production control unit 120 is initialized and the past error check value stored in the storage unit 622 is cleared, the sub CPU 120a reads the unique information from the sub ROM 120b and performs the initial check. The function of storing the value in the storage unit 622 is the same as that of the main control unit 110. In order to realize a function of setting unique information as an initial inspection value, the sub RAM 120c is provided with a reception number storage area (P) corresponding to the generation number storage area (P) of the main control unit 110. Note that specific means for realizing the functions of the generation unit 621 and the storage unit 622 can be configured from a part of the sub CPU 120a, a part of the sub ROM 120b, a part of the sub RAM 120c, and the like shown in FIG.

  The checking unit 610 has a function of performing an error checking process for collating the error check value output from the receiving unit 600 with the error check value output from the storage unit 622 of the check value generating unit 620. In the error check process, the error check value output from the receiving unit 600 is compared with the error check value output from the storage unit 622. If both match with the error check value (PN), the check result is If it is determined to be normal and does not match, it is determined that the test result is not normal.

  When the inspection result is determined to be normal, the inspection unit 610 generates the control command (P) to which the currently received error check value (PN) is added and the current error check value (PN) generation source. It is determined that the validity of the N previous control command (PN) is authenticated and the validity of the main control unit 110 can be authenticated. Then, the received control command (P) is output to the reception data storage area of the sub-RAM 120c, and processing according to the control command (P) is performed. When the inspection result is not determined to be normal, the inspection unit 610 determines that there is a possibility that an illegal act or the like has occurred, and outputs a notification signal. Note that specific means for realizing the function of the inspection unit 610 can be configured from a part of the sub CPU 120a, a part of the sub ROM 120b, a part of the sub RAM 120c, and the like shown in FIG.

[Explanation of control commands]
Hereinafter, the types of control commands transmitted from the main control unit 110 to the effect control unit 120 of the gaming machine 1 according to the embodiment of the present invention will be described.
FIG. 8 is a diagram illustrating types of control commands transmitted from the main control unit 110 to the effect control unit 120 configuring the gaming machine 1 according to the present embodiment. The control command shown in FIG. 8 is an example, and the control command according to the present invention is not limited to this.

  The control command transmitted from the main control unit 110 to the production control unit 120 is composed of 1-byte data, and 1-byte “MODE” information for identifying the control command classification, It consists of 1-byte “DATA” information indicating the detailed control contents of the control command. The “MODE” information and the “DATA” information are stored in advance in the main ROM 110b as described above. In this embodiment, an error check value is added to the control command and transmitted to the effect control unit 120 as a control command with an error check value. In the following description, “transmit a control command” The expression includes transmitting the control command with an error check value.

The “designation designating command” indicates the type of the special symbol that is stopped and displayed. The “MODE” information is set as “E0H”, and the “DATA” information is set according to the special symbol type. ing. Since the special symbol type eventually determines the jackpot type and gaming state, the effect symbol designation command can also be said to indicate the jackpot type and gaming state.
In the effect symbol designation command, when various special symbols are determined and the variation display of the special symbol is started, an effect symbol designation command corresponding to the determined special symbol is transmitted to the effect control unit 120. Specifically, when the lottery result of the jackpot is determined, various special symbols are determined, and the variation display of the special symbols is started, an effect designating command corresponding to the determined special symbol is transmitted to the main RAM 110c. Set in the data storage area. Thereafter, the effect designating command set in the transmission data storage area is transmitted to the effect control unit 120 with the error check value added by the command transmission process. Thereafter, other control commands are similarly transmitted to the effect control unit 120.
The process related to the jackpot lottery related to the production symbol designation command will be described later.

  Here, among the effect designating commands, the “losing effect designating command” set with “DATA” information being “00H” is a control for stopping and displaying the result of the losing when the lottery result is losing. It is a command. That is, it is a control command that is surely transmitted from the main control unit 110 to the effect control unit 120 when the lose design symbol designation command is a loss. Hereinafter, the lose effect designating command is also referred to as a “lose command” as a command for executing a process in case of loss.

The “first special symbol memory designation command” indicates the number of reserved memories stored in the first special symbol reservation number (U1) storage area, and the information of “MODE” is set to “E1H”, “DATA” information is set according to the number of memories.
This first special symbol memory designation command is effect-controlled by the first special symbol memory designation command corresponding to the number of reserved memories when the number of reserved memories stored in the first special symbol reservation number (U1) storage area is switched. Is transmitted to the unit 120. Specifically, when the value stored in the first special symbol hold number (U1) storage area is increased or decreased when determining the result of entering the first start port 14 or the big win lottery result, the reserved memory after the increase or decrease is stored. The first special symbol storage designation command corresponding to the number is set in the transmission data storage area of the main RAM 110c.

The “second special symbol memory designation command” indicates the number of reserved memories stored in the second special symbol reservation number (U2) storage area, and the information of “MODE” is set to “E2H”, “DATA” information is set according to the number of memories.
This second special symbol memory designation command is directed by the second special symbol memory designation command corresponding to the number of reserved memories when the number of reserved memories stored in the second special symbol reservation number (U2) storage area is switched. Is transmitted to the unit 120. Specifically, when the value stored in the second special symbol holding number (U2) storage area is increased or decreased in determining the result of entering the second starting port 15 or the jackpot lottery result, the holding storage after the increase / decrease is performed. The second special symbol storage designation command corresponding to the number is set in the transmission data storage area of the main RAM 110c.
In the present embodiment, the “first special symbol memory designation command” and the “second special symbol memory designation command” are collectively referred to as “special symbol memory designation command”.

The “symbol confirmation command” indicates that the special symbol is stopped and displayed, and “MODE” information is set to “E3H” and “DATA” information is set to “00H”.
This symbol confirmation command is transmitted to the effect control unit 120 when the special symbol is stopped and displayed. Specifically, after determining the jackpot lottery result and the special symbol change time has elapsed, when the special symbol is stopped and displayed on the first special symbol display device 20 or the second special symbol display device 21, the symbol confirmation command Is set in the transmission data storage area of the main RAM 110c.

The “power-on designation command” indicates that the gaming machine 1 is powered on, the “MODE” information is set to “E4H”, and the “DATA” information is set to “00H”. ing.
The power-on designation command is transmitted to the effect control unit 120 when the gaming machine 1 is powered on. When the gaming machine 1 is powered on and the initialization process of the main control unit 110 is performed, if the backup information of the main RAM 110c generated when the power is turned off (hereinafter referred to as “power interruption”) is not valid, The work area in the RAM 110c is cleared and a new work area is set. Thereafter, a power-on designation command is set in the transmission data storage area of the main RAM 110c.
The initialization process related to the power-on designation command and the like will be described later.

The “RAM clear designation command” indicates that the information stored in the main RAM 110c has been cleared. The “MODE” information is set to “E4H” and the “DATA” information is set to “01H”. Has been.
A RAM clear button (not shown) is provided on the back side of the gaming machine 1. When the gaming machine 1 is turned on while pressing the RAM clear button, a system reset occurs in the main control unit 110 and initialization processing is performed. . After the work area of the main RAM 110c is cleared and a new work area is set and a power-on designation command is transmitted, the RAM clear designation command is set in the transmission data storage area of the main RAM 110c.

The “power restoration designation command” indicates that the gaming machine 1 is turned on and has been restored normally. The “MODE” information is set to “E4H” and is matched according to the gaming state at the time of power interruption. "DATA" information is set.
This power supply restoration designation command is transmitted to the effect control unit 120 when the gaming machine 1 is turned on and normally restored. Specifically, when the gaming machine 1 is turned on and the initialization process is performed, if the backup information of the main RAM 110c generated at the time of power interruption is valid, the power is restored according to the gaming state indicated by the backup information. A designated command is generated, and the generated power supply restoration designation command is set in the transmission data storage area of the main RAM 110c.

  When the power is turned on, at least one of a power-on designation command, a RAM clear designation command, and a power restoration designation command is transmitted from the main control unit 110 to the effect control unit 120. That is, the above-described control command group in which “MODE” information is set to “E4H” is a command for executing a process at power-on. Hereinafter, the control command group in which the “MODE” information is set to “E4H” is also referred to as “power-on command”.

The “demonstration designation command” indicates that the first special symbol display device 20 or the second special symbol display device 21 is not operating, the information of “MODE” is set to “E5H”, and “DATA” Is set to “00H”.
This demonstration designation command is used for effect control when there is no special symbol hold storage in the first special symbol display device 20 or the second special symbol display device 21 and a non-game state in which there is no operation by the player has elapsed for a predetermined time. Is transmitted to the unit 120. Specifically, when the jackpot lottery, the special electric accessory, and the gaming state are controlled, either the first special symbol hold number (U1) storage area or the second special symbol hold number (U2) storage area In addition, when a state in which one or more data is not set continues for a predetermined time, the demo designation command is set in the transmission data storage area of the main RAM 110c.

  The demonstration designation command may be sent immediately when there is no special symbol holding storage of the first special symbol display device 20 or the second special symbol display device 21. In this case, after receiving the demonstration designation command, the effect control unit 120 executes the demonstration effect when no other control command is received for a predetermined time, that is, when the non-game state has elapsed for a predetermined time.

The “variation pattern designation command for the first special symbol” indicates the variation time (variation mode) of the special symbol in the first special symbol display device 20, the information of “MODE” is set as “E6H”, and various “DATA” information is set in accordance with the fluctuation pattern.
The first special symbol variation pattern designation command is a first special symbol variation pattern corresponding to the variation pattern of the special symbol determined when the special symbol variation display of the first special symbol display device 20 is started. A designation command is transmitted to the effect control unit 120. Specifically, the variation pattern for the first special symbol corresponding to the determined variation pattern of the special symbol when the variation pattern of the special symbol is determined and the variation display of the special symbol is started by judging the lottery result of the jackpot The designated command is set in the transmission data storage area of the main RAM 110c.

The “variable pattern designation command for the second special symbol” indicates the variation time (variation mode) of the special symbol in the second special symbol display device 21, and the information of “MODE” is set to “E7H”. “DATA” information is set in accordance with the fluctuation pattern.
The second special symbol variation pattern designation command is a second special symbol variation pattern corresponding to the variation pattern of the special symbol determined when the special symbol variation display of the second special symbol display device 21 is started. A designation command is transmitted to the effect control unit 120. Specifically, the variation pattern for the second special symbol corresponding to the determined variation pattern of the special symbol when the variation pattern of the special symbol is determined and the variation display of the special symbol is started by judging the lottery lottery result The designated command is set in the transmission data storage area of the main RAM 110c.
In the present embodiment, the “first special symbol variation pattern designation command” and the “second special symbol variation pattern designation command” are collectively referred to as a “variation pattern designation command”.

  Here, among the variation pattern designation commands, the control command group in which the information of “DATA” is set to “01H”, “02H”, “03H”, “04H”, “05H” is a control for executing the reach effect. It is a command. Hereinafter, the control command group in which the “MODE” information is set to “E6H” and the “DATA” information is set to “01H” to “05H” is also referred to as “reach command”.

The “big prize opening opening designation command” indicates the number of rounds of jackpots according to various types of jackpots, and “MODE” information is set as “EAH”, and “DATA” is set according to the number of rounds of jackpots. Information is set.
With respect to the special winning opening opening designation command, when the big hit round is started, the big winning opening opening designation command corresponding to the started round number is transmitted to the effect control unit 120. Specifically, when the first big prize opening opening / closing door 16b (or the second big prize opening opening / closing door 17b) is opened in the big hit game process, the big winning opening opening designation command corresponding to the number of rounds to be opened is It is set in the transmission data storage area of the main RAM 110c.
Note that the command group in which the information of “MODE” is set to “EAH” is a command for executing processing corresponding to each round of jackpot. Hereinafter, a command group in which “MODE” information is set to “EAH” is also referred to as a “hit command”.

The “opening designation command” indicates that various jackpots start, “MODE” information is set as “EBH”, and “DATA” information is set according to the jackpot type.
As for this opening designation command, when various jackpots start, an opening designation command corresponding to the type of jackpot is transmitted to the effect control unit 120. Specifically, at the start of the jackpot game process, an opening designation command corresponding to the jackpot type is set in the transmission data storage area of the main RAM 110c.
Note that the command group in which the information of “MODE” is set to “EBH” is a command for starting the big hit state processing. Hereinafter, a command group in which “MODE” information is set to “EBH” is also referred to as a “big hit start command”.

The “ending designation command” indicates that various types of jackpots have ended, “MODE” information is set as “ECH”, and “DATA” information is set according to the jackpot type.
As for this ending designation command, when various jackpots are finished, an ending designation command corresponding to the jackpot type is transmitted to the effect control unit 120. Specifically, at the start of the jackpot game end process, an ending designation command corresponding to the jackpot type is set in the transmission data storage area of the main RAM 110c.
Note that the command group in which the “MODE” information is set to “ECH” is a command for ending the jackpot state process. Hereinafter, a command group in which “MODE” information is set to “ECH” is also referred to as a “hit end command”.

The “gaming state designation command” indicates the contents of the gaming state, the information of “MODE” is set as “EDH”, and the information of “DATA” is set according to the contents of the gaming state.
As for the gaming state designation command, the gaming state designation command is transmitted to the effect control unit 120 at the start and end of the variation of the special symbol. Specifically, when the value of various storage areas storing data indicating the current gaming state, such as the gaming state storage area and the high probability game number counter, changes due to the start and end of the change of the special symbol A gaming state designation command corresponding to the current gaming state is set in the transmission data storage area of the main RAM 110c.

[Control processing of main control unit]
Hereinafter, the control process of the main control unit 110 of the gaming machine 1 according to the embodiment of the present invention will be described. First, main processing of the main control unit 110 will be described.
FIG. 9 is a flowchart showing main processing by the main control unit 110 according to the present embodiment.

  When the gaming machine 1 is powered on and powered by the power supply unit 170, a system reset occurs in the main control unit 110, and the main CPU 110a performs initialization processing (processing from step S1 to step S17 in FIG. 9). ) And random number value update processing (step S20 and step S30 in FIG. 9).

In step S1, the main CPU 110a performs a boot process as a premise of the initialization process of the main control unit 110. In this boot process, the main CPU 110a performs its own self-diagnosis process, initializes built-in circuits and peripheral circuits, and sets initial values.
In step S2, the main CPU 110a sets permission to access the main RAM 110c.
In step S3, the main CPU 110a determines whether or not the RAM clear switch is on. If it is determined that the RAM clear switch is on, the main CPU 110a shifts the processing to step S10 to perform RAM clear. On the other hand, if the RAM clear switch is not determined to be on, the process proceeds to step S4.

In step S4, the main CPU 110a generates a checksum in a predetermined storage area of the main RAM 110c when the power is turned on.
In step S5, the main CPU 110a compares the generated checksum with the checksum in the predetermined storage area of the main RAM 110c generated at the time of power interruption. If the two match, the main CPU 110a determines that the main CPU 110a is normal, and moves the process to step S6. On the other hand, if the two do not match, the main CPU 110a determines that an error has occurred and moves the process to step S10.
In step S6, the main CPU 110a adjusts the start timing of the operation after activation with the peripheral control unit 300 including the effect control unit 120. Specifically, after all of the peripheral control units 300 are activated and become stable, the system waits for a certain period of time so that the rendering process and the like can be started at substantially the same timing.

In step S7, the main CPU 110a sets an initial value in the work area of the main RAM 110c that requires an initial value upon recovery from power interruption, and performs a RAM setting process when backup is valid.
In step S8, the main CPU 110a reads the backup information of the main RAM 110c generated at the time of power interruption in order to restore the gaming state at the time of power interruption. Specifically, the game state information is read from the game state storage area of the main RAM 110c that is backed up.
In step S9, the main CPU 110a determines a power restoration designation command based on the read gaming state information, and sets the decided power restoration designation command in the transmission data storage area of the main RAM 110c.

In step S10, the main CPU 110a performs timing adjustment with the peripheral control unit 300 in the same manner as in step S6.
In step S11, the main CPU 110a clears the used area of the main RAM 110c.
In step S12, the main CPU 110a sets initial values in the work area of the main RAM 110c that requires initial values when initializing the gaming machine 1, including setting initial values of various random numbers, and backup is not valid. In this case, the main RAM 110c is set.

In step S13, the main CPU 110a generates a power-on designation command, and sets the generated power-on designation command in the transmission data storage area of the main RAM 110c.
In step S <b> 14, the main CPU 110 a performs a command transmission process for transmitting the control command set in the transmission data storage area to the effect control unit 120. That is, a power-on designation command is transmitted to the effect control unit 120. Note that the command transmission processing in steps S14 and S16 involves the inspection value generation processing and the inspection value addition processing. Further, the test value generation process involves a process of setting the unique information as an initial test value in the storage circuit 522. Details of the command transmission process will be described later.

In step S15, the main CPU 110a generates a RAM clear designation command, and sets the generated RAM clear designation command in the transmission data storage area of the main RAM 110c.
In step S16, the main CPU 110a performs a command transmission process for transmitting a control command set in the transmission data storage area of the main RAM 110c to the effect control unit 120. That is, the control command of either the power supply restoration designation command or the RAM clear designation command is transmitted to the effect control unit 120.
In step S <b> 17, the main CPU 110 a sets the interrupt permission and sets the execution period (α, for example, 4 milliseconds) of the timer interrupt program.

  Note that the command transmission processing in step S14 and step S16 may be performed in the timer interrupt processing performed after the interrupt permission in step S17. At this time, it is determined in advance that the transmission order of each control command is not changed.

In step S20, the main CPU 110a performs an effect random number update process for updating the reach determination random number value and the special figure variation random value for determining the variation mode (variation time) of the special symbol.
In step S30, the main CPU 110a performs an initial random number value updating process for updating the special symbol determining initial random number value, the big hit symbol initial random number value, the small hit symbol initial random number value, and the normal symbol determining initial random number value. Thereafter, the processes in steps S20 and S30 are repeated until a predetermined interrupt process is performed.

Next, interrupt processing of the main control unit 110 will be described.
FIG. 10 is a flowchart showing interrupt processing by the main control unit 110 according to the present embodiment.
The main CPU 110a performs timer interruption processing of the main control unit 110 at predetermined intervals (α) based on a clock signal output from a clock pulse generation circuit (not shown) provided in the main control unit 110. Execute.

  First, in step S100, the main CPU 110a saves the information stored in the register of the main CPU 110a to the stack area.

  In step S110, the main CPU 110a updates the special symbol time counter, updates the special game timer counter such as the opening time of the special electric accessory, updates the normal symbol time counter, and updates the normal power release time counter. A time control process for updating various timer counters is performed. Specifically, a process of subtracting 1 from a special symbol time counter, a special game timer counter, a normal symbol time counter, and a general electricity open time counter is performed.

In step S120, the main CPU 110a performs a random number update process for the special symbol determination random number value, the big hit symbol random number value, the small hit symbol random number value, and the normal symbol determination random number value.
Specifically, 1 is added to each random number value and random number counter to be updated. When the added random number counter exceeds the maximum value in the random number range (when the random number counter makes one revolution), the random number counter is returned to 0, and each random number value is newly updated from the initial random number value at that time. .

  In step S130, as in step S30, the main CPU 110a updates the initial random number value for special symbol determination, the initial random number value for jackpot symbol, the initial random number value for small bonus symbol, and the initial random number value for normal symbol determination. Perform numerical value update processing.

  In step S200, the main CPU 110a performs input control processing. In this process, the main CPU 110a includes a general winning opening detection switch 12a, a first large winning opening detection switch 16a, a second large winning opening detection switch 17a, a first starting opening detection switch 14a, a second starting opening detection switch 15a, a gate. An input process for determining whether or not there is an input to each switch of the detection switch 13a is performed.

  Specifically, various detection signals from the general winning opening detecting switch 12a, the first big winning opening detecting switch 16a, the second large winning opening detecting switch 17a, the first starting opening detecting switch 14a, and the second starting opening detecting switch 15a. Is inputted, predetermined data is added to the prize ball counter used for the prize ball provided for each prize opening and updated.

  Furthermore, when a detection signal is input from the first start port detection switch 14a, if the data set in the first special symbol hold number (U1) storage area is less than 4, the first special symbol hold number ( U1) Add 1 to the storage area to obtain special symbol determination random number value, jackpot symbol random number value, small hit symbol random number value, reach determination random value, and special symbol variation random value The random number value is stored in a predetermined storage unit (0th storage unit to 4th storage unit) in the first special symbol random value storage area.

  Similarly, when a detection signal is input from the second start port detection switch 15a, if the data set in the second special symbol hold number (U2) storage area is less than 4, the second special symbol hold number (U2) 1 is added to the storage area, and a special symbol determination random number value, a big hit symbol random number value, a small hit symbol random number value, a reach determination random number value, and a special symbol variation random value are acquired. Various random numbers are stored in a predetermined storage unit (0th storage unit to 4th storage unit) in the second special symbol random number value storage area.

  When a detection signal is input from the gate detection switch 13a, if the data set in the normal symbol hold number (G) storage area is less than 4, the normal symbol hold number (G) storage area is set to 1. It adds, acquires the random number value for normal symbol determination, and memorize | stores the acquired random number value for normal symbol determination in the predetermined memory | storage part (0th memory | storage part-4th memory | storage part) in a normal symbol holding | maintenance storage area.

  Further, when a detection signal is input from the first grand prize opening detection switch 16a or the second big prize opening detection switch 17a, the number of game balls won in the first big prize opening 16 or the second big prize opening 17 is counted. 1 is added to the number of entries (C) storage area for the big winning opening to update.

  In step S300, the main CPU 110a, based on the input control process in step S200, performs a special symbol / special electric accessory control process (hereinafter referred to as “a special jackpot lottery, a special electric accessory, and a gaming state control”. Special figure special electricity control process ”). Details of the special figure special electric control process will be described later with reference to FIG.

In step S400, the main CPU 110a performs a normal symbol / ordinary electric accessory control process (hereinafter referred to as a “general-purpose electric power control process”) for performing the normal symbol lottery and the control of the ordinary electric accessory.
Specifically, it is first determined whether or not 1 or more data is set in the normal symbol hold count (G) storage area, and 1 or more data must be set in the normal symbol hold count (G) storage area. If this is the case, the current ordinary power transmission control process is terminated.

If 1 or more data is set in the normal symbol holding number (G) storage area, after subtracting 1 from the value stored in the normal symbol holding number (G) storage area, the data is in the normal symbol holding storage area. The normal symbol determination random numbers stored in the first storage unit to the fourth storage unit are shifted to the previous storage unit. At this time, the normal symbol determination random value already written in the 0th storage unit is overwritten and erased.
Then, referring to the hit determination table, a process is performed to determine whether or not the normal symbol determination random number value stored in the 0th storage unit of the normal symbol hold storage area is a random value corresponding to “win”. Thereafter, the normal symbol display device 22 displays the fluctuation of the normal symbol. When the fluctuation time of the normal symbol elapses, the normal symbol corresponding to the result of the normal symbol lottery is stopped and displayed. If the random number for normal symbol determination referred to is “winning”, the start opening / closing solenoid 15c is driven to control the second start opening 15 to the second mode for a predetermined opening time.

  In step S500, the main CPU 110a performs a payout control process. In this payout control process, the main CPU 110 a refers to each prize ball counter, generates payout number designation commands corresponding to various winning ports, and transmits the generated payout number designation commands to the payout control unit 130. To do.

  In step S600, the main CPU 110a, external information data, start opening / closing solenoid data, first big prize opening opening / closing solenoid data, second big prize opening opening / closing solenoid data, special symbol display device data, normal symbol display device data, number of stored Performs data creation for the specified command.

In step S700, the main CPU 110a performs output control processing. In this process, port output processing is performed for outputting signals of the external information data, the start opening / closing solenoid data, the first big prize opening / closing solenoid data, and the second big prize opening / closing solenoid data created in step S600.
Further, the special symbol display device data and the normal symbol display device data created in S600 are used to turn on the LEDs of the first special symbol display device 20, the second special symbol display device 21 and the normal symbol display device 22. Display device output processing is performed.

  In step S710, the main CPU 110a performs a command transmission process for transmitting the control command set in the transmission data storage area of the main RAM 110c to the effect control unit 120. The command transmission process in step S710 also involves the test value generation process and the test value addition process, which will be described in detail later.

  In step S800, the main CPU 110a restores the information saved in step S100 to the register of the main CPU 110a.

Next, the special figure special electric control process of the main control unit 110 will be described.
FIG. 11 is a flowchart showing a special figure special power control process by the main control unit 110 according to the present embodiment.

  In step S301, the main CPU 110a reads the value of the special figure special electricity processing data. This “Special Figure Special Electric Processing Data” is a value assigned to the address of the storage area in which each subroutine of the special figure special electric control process is stored, and which subroutine is processed by referring to the special figure special electric processing data. You can identify what to do. The special figure special electricity processing data is set as necessary in each subroutine of the special figure special electricity control processing as will be described later, and the subroutine necessary for the game is appropriately processed.

  In step S302, the main CPU 110a refers to the branch address from the read special figure special processing data, and if special figure special electric treatment data = 0, the main CPU 110a moves the processing to the special symbol storage determination process (step S310). If data = 1, the process moves to the special symbol variation process (step S320), and if the special figure special electricity process data = 2, the process moves to the special symbol stop process (step S330), and the special figure special electricity process data = 3. If there is, the process is transferred to the jackpot game process (step S340). If the special figure special electric processing data = 4, the process is transferred to the jackpot game end process (step S350). The processing is moved to processing (step S360).

  In the special symbol memory determination process in step S310, the main CPU 110a performs a jackpot determination process, a special symbol determination process for determining a special symbol to be stopped and displayed, a variation time determination process for determining a variation time of the special symbol, and the like. Here, the specific content of the special symbol memory determination process will be described with reference to FIG.

  FIG. 12 is a flowchart in the special symbol memory determination process by the main control unit 110 according to the present embodiment.

In step S311, the main CPU 110a determines whether one or more data is set in the first special symbol hold count (U1) storage area or the second special symbol hold count (U2) storage area.
If one or more data is not set in any storage area of the first special symbol hold count (U1) storage area or the second special symbol hold count (U2) storage area, the special figure special electricity processing data = 0. The special symbol variation process of this time is terminated while holding.
On the other hand, if one or more data is set in the first special symbol hold count (U1) storage area or the second special symbol hold count (U2) storage area, the process proceeds to step S312.

In step S312, the main CPU 110a performs a jackpot determination process.
Specifically, when one or more data is set in the second special symbol hold count (U2) storage area, 1 is calculated from the value stored in the second special symbol hold count (U2) storage area. After the subtraction, the various random numbers stored in the first to fourth storage units in the second special symbol random number storage area are shifted to the previous storage unit. At this time, various random values already written in the 0th storage unit are overwritten and deleted. Then, referring to the jackpot determination table, whether the special symbol determination random number value stored in the 0th storage unit of the second special symbol random value storage area is a random value corresponding to “big hit” or “small hit” It is determined whether it is a random value corresponding to.

  In addition, when one or more data is not set in the second special symbol hold number (U2) storage area and one or more data is set in the first special symbol hold number (U1) storage area, Various random numbers stored in the first to fourth storage units in the first special symbol random number storage area after subtracting 1 from the value stored in the first special symbol hold number (U1) storage area Is shifted to the previous storage unit. Also at this time, various random numbers already written in the 0th storage unit are overwritten and deleted. Then, referring to the jackpot determination table, whether the special symbol determination random number value stored in the 0th storage unit of the first special symbol random number storage area is a random value corresponding to “big hit” or “small hit” It is determined whether it is a random value corresponding to.

  In the present embodiment, the random number value stored in the second special symbol random value storage area is shifted (digested) with priority over the first special symbol random value storage area. However, the first special symbol storage area or the second special symbol storage area may be shifted in the order of winning in the starting opening, and the first special symbol storage area is given priority over the second special symbol storage area. You may let them.

In step S313, the main CPU 110a performs a special symbol determination process for determining the type of special symbol to be stopped and displayed.
In this special symbol determination process, when it is determined as “big hit” in the jackpot determination process (step S312), the symbol determination table is referred to and stored in the 0th storage unit of the first special symbol random value storage area. The jackpot symbol (special symbol 1 to special symbol 6) is determined based on the random number value for the jackpot symbol. In addition, when it is determined as “small hit” in the jackpot determination process (step S312), the small hit stored in the 0th storage unit of the first special symbol random value storage area with reference to the symbol determination table Based on the symbol random number value, the small hit symbol (special symbol A, special symbol B) is determined. Further, when it is determined as “losing” in the jackpot determination process (step S312), the symbol determining table (special symbol 0) is determined with reference to the symbol determining table.
Then, stop symbol data corresponding to the determined special symbol is stored in the stop symbol data storage area.

In step S314, the main CPU 110a performs special symbol variation time determination processing.
Specifically, referring to the variation pattern determination table, based on the reach determination random value and the special diagram variation random value stored in the 0th storage unit of the first special symbol random value storage area, the special symbol Determine the variation pattern. Thereafter, the variation time of the special symbol corresponding to the determined variation pattern of the special symbol is determined. Then, a process of setting a counter corresponding to the determined variation time of the special symbol in the special symbol time counter is performed.

In step S315, the main CPU 110a sets, in a predetermined processing area, variation display data for causing the first special symbol display device 20 or the second special symbol display device 21 to perform special symbol variation display (LED blinking). . As a result, when the variable display data is set in the predetermined processing area, the LED lighting / extinguishing data is appropriately created in step S600, and the created data is output in step S700. Variation display of the special symbol display device 20 or the second special symbol display device 21 is performed.
Further, the main CPU 110a, when the special symbol variation display is started, the special symbol variation pattern designation command (the first special symbol variation pattern designation command) corresponding to the variation pattern of the special symbol determined in step S314. Alternatively, the second special symbol variation pattern designation command) is set in the transmission data storage area of the main RAM 110c.

  In step S316, the main CPU 110a sets the special symbol special electricity processing data = 0 to the special symbol special electric treatment data = 1, prepares to move to the special symbol variation processing subroutine, and ends the special symbol memory determination processing.

The description of the special figure special electric control process shown in FIG. 11 will be returned.
In the special symbol variation process of step S320, the main CPU 110a performs a process of determining whether or not the special symbol variation time has elapsed.
Specifically, it is determined whether or not the variation time of the special symbol determined in step S314 has elapsed (special symbol time counter = 0), and if it is determined that the variation time of the special symbol has not elapsed The special symbol variation process is terminated while the special symbol special electricity processing data = 1 is held. Note that the special symbol variation time counter set in step S314 is subtracted in step S110.

If it is determined that the variation time of the special symbol has elapsed, the special symbol determined in step S313 is stopped and displayed on the first special symbol display device 20 or the second special symbol display device 21. Thereby, the special symbol is stopped and displayed on the first special symbol display device 20 or the second special symbol display device 21, and the player is notified of the jackpot determination result.
When the number of high probability games (X)> 0, 1 is subtracted from the high probability game number (X) counter and updated. When the number of high probability games (X) = 0, the high probability game flag is cleared. .
Finally, the special symbol special power processing data = 1 is set to the special symbol special power processing data = 2, preparation is made to move to a special symbol stop processing subroutine, and the special symbol variation processing is terminated.

In the special symbol stop process in step S330, the main CPU 110a performs a process of determining whether the special symbol that is stopped and displayed is a “big hit symbol”, a “small bonus symbol”, or a “losing symbol”. Do.
When it is determined that the game is a jackpot symbol, the data stored in the gaming state storage area is referred to and data indicating the current gaming state is set in the gaming state buffer. Thereafter, the data (high probability game flag) and high probability game count (X) counter stored in the game state storage area (high probability game flag storage area or the like) are cleared. Further, the special figure special power processing data = 2 is set to the special figure special electric processing data = 3, preparation is made to move to the jackpot game processing subroutine, and the special symbol stop processing is ended.

In addition, when it is determined that the small winning symbol, the data stored in the game state storage area is not cleared, and the special figure special electric processing data = 2 to the special figure special electric treatment data = 5 is set. The special symbol stop process is completed by making preparations for transferring to a winning game process subroutine.
On the other hand, if it is determined that the symbol is a lost symbol, the special symbol special electric processing data = 2 is set to special special electric symbol processing data = 0, and the special symbol memory determination processing subroutine is prepared for the special symbol stop processing. finish.

In the jackpot game process of step S340, the main CPU 110a determines which jackpot of the long hit or short hit is executed, and performs a process of controlling the determined jackpot.
Specifically, first, with reference to the special electric accessory operating mode determination table, the jackpot release mode is determined based on the type of jackpot symbol (stop symbol data) determined in step S313.

Next, in order to execute the determined jackpot opening mode, the bonus game opening mode table is referred to, the opening time corresponding to the type of jackpot is set in the special game timer counter, and the first jackpot opening / closing solenoid The drive data of 16c (or the second big prize opening / closing solenoid 17c) is output to open the first big prize opening / closing door 16b (or the second big prize opening / closing door 17b). At this time, 1 is added to the round game count (R) storage area.
When a predetermined number of game balls enter during the opening or when the opening time of the big prize opening has elapsed (the number of the big prize opening (C) = 9 or the special game timer counter = 0), The output of the drive data of the big prize opening / closing solenoid 16c (or the second big prize opening / closing solenoid 17c) is stopped, and the first big prize opening / closing door 16b (or the second big prize opening / closing door 17b) is closed. Thereby, one round game is completed. This round game control is repeated 15 times.

  When the 15 round games are completed (round game count (R) = 15), the data stored in the round game count (R) storage area and the number of winning prize entrance (C) storage areas are cleared, The special figure special electric processing data = 3 is set to the special figure special electric treatment data = 4, preparation is made to move to the big hit game end processing subroutine, and the big hit game processing is ended.

In the jackpot game end process of step S350, the main CPU 110a performs a process of determining a probability game state of either a high probability game state or a low probability game state.
Specifically, with reference to the jackpot game end setting data table, based on the data stored in the game state buffer and the type of jackpot symbol (stop symbol data) determined in step S313, the high probability game Set a flag and set the number of high probability games (X). For example, in the case of the special symbol 1, the high probability game flag is set in the high probability game flag storage area, and the high probability game number (X) counter is set to 10,000 times.
After that, the special symbol special power processing data = 4 is set to the special symbol special power processing data = 0, preparation is made to move to a special symbol memory determination processing subroutine, and the jackpot game end processing is terminated.

In the small hit game process of step S360, the main CPU 110a first refers to the special electric accessory operation mode determination table, and based on the type of small hit symbol (stop symbol data) determined in step S313 above, Determine the opening mode.
Next, in order to execute the determined small winning opening mode, the large winning opening opening mode table is referred to, and the small winning opening time is set in the special game timer counter, and the second large winning port opening / closing solenoid 17c is set. The drive data is output to open the second big prize opening / closing door 17b. At this time, 1 is added to the number-of-releases (K) storage area.
When the small winning opening time elapses (special game timer counter = 0), the drive data output of the second big prize opening / closing solenoid 17c is stopped and the second big prize opening / closing door 17b is closed. The opening / closing control of the second big prize opening opening / closing door 17b is repeated 15 times.

  Then, the opening / closing control of the second grand prize opening / closing door 17b is performed 15 times, or a predetermined number of game balls enter the second big prize opening 17 (the number of times of opening (K) = 15 or the grand prize opening entrance) Number (C) = 9), in order to end the small hit game, the output of the drive data of the second large winning opening / closing solenoid 17c is stopped, the number of times of opening (K) storage area and the number of winning winning holes (C) Clear the data stored in the storage area, set special figure special electricity processing data = 5 to special figure special electricity treatment data = 0, and prepare to move to a special symbol memory judgment processing subroutine. The winning game process is terminated.

[Control processing related to authentication processing of the main control unit]
Hereinafter, the control process regarding the authentication process of the main control unit 110 of the gaming machine 1 according to the embodiment of the present invention will be described. Specifically, a command transmission process of the main control unit 110 including the inspection value generation process and the inspection value addition process will be described.
FIG. 13 is a flowchart showing command transmission processing in the main control unit 110 according to the present embodiment. In each step of FIG. 13, the notation in curly braces {} is provided to outline the processing to the generated number storage area (P) provided in the main RAM 110c.
When the main control unit 110 reaches the execution timing of the command transmission process, the main CPU 110a outputs the control command (P) set in the transmission data storage area of the main RAM 110c to the transmission unit 550 via the inspection value generation unit 500. And transmitted to the effect control unit 120.

In step S71, the main CPU 110a updates the value of the generated number storage area (P) of the main RAM 110c.
In step S72, the main CPU 110a determines whether or not the control command (P) set in the transmission data storage area corresponds to the control command (1). Specifically, the main CPU 110a refers to the value of the generated number storage area (P) and determines whether P = 1. If P = 1, the process proceeds to step S73, and if P = 1, the process proceeds to step S75.
In step S73, the main CPU 110a reads the unique information stored in the main ROM 110b. At this time, if there are N pieces of unique information, N pieces of unique information are read at a time. Then, the main CPU 110a outputs the read unique information to the inspection value generation unit 500.

  In step S74, the test value generation unit 500 stores the unique information output from the main CPU 110a in each of the storage circuits (1) to (N) constituting the storage circuit 522 of the generation unit 520, and sets it as an initial test value. To do. Specifically, the buffer unit 510 of the inspection value generation unit 500 takes in the unique information from the main CPU 110a via the bus to the data buffer 511 and outputs it to the generation unit 520. The generation unit 520 stores the unique information output from the data buffer 511 in its own storage circuit 522. At this time, although omitted in FIG. 5, the data buffer 511 and the storage circuit 522 may be separately connected by a data line, and the unique information may be directly output from the data buffer 511 to the storage circuit 522. Further, the unique information may be output from the data buffer 511 to the storage circuit 522 via the generation circuit 521 via a data line connecting the data buffer 511 and the generation circuit 521 shown in FIG. In this case, the generation circuit 521 may or may not perform arithmetic processing on the unique information, and in any case, the value set as the initial inspection value is consistent with the effect control unit 120. Arrange in advance as follows.

  In step S75, the main CPU 110a writes the control command (P) set in the transmission data storage area to the buffer means 510 of the inspection value generation unit 500. Specifically, the main CPU 110a outputs a write signal and address data for writing the control command (P) to the buffer means 510, and sends the control command (P) set in the transmission data storage area to the data bus. Output. The control circuit 512 of the buffer unit 510 outputs an operation permission signal to the data buffer 511 of the buffer unit 510 based on the input of the write signal output from the main CPU 110a. The data buffer 511 receives the control command (P) on the data bus based on the input of the operation permission signal output from the control circuit 512 and outputs the control command (P) to the generation unit 520 and the addition unit 530. Then, the control circuit 512 outputs an operation permission signal to the generation unit 520 and the addition unit 530 with a predetermined time delay from the input of the write signal.

  In step S76, the generation unit 520 takes in the control command (P) based on the input of the operation permission signal output from the buffer unit 510, and obtains the error check value (P) corresponding to the fetched control command (P). Generate. Specifically, the control circuit 523 of the generation unit 520 outputs an operation permission signal to the generation circuit 521 of the generation unit 520 based on the input of the operation permission signal output from the control circuit 512 of the buffer unit 510. The generation circuit 521 takes in the control command (P) based on the input of the operation permission signal output from the control circuit 523, generates an error check value (P) using the control command (P), and generates the generation unit 520. To the storage circuit 522. Then, the control circuit 523 outputs a shift processing signal to the storage circuit 522 after a predetermined time delay from the input of the operation permission signal output from the control circuit 512.

  In step S 77, the generation unit 520 stores the generated error check value (P) in its own storage circuit 522. Specifically, the storage circuit 522 inputs each error check value stored in each of its storage circuits (1) to (N) to the next stage based on the input of the shift processing signal output from the control circuit 523. Shift sequentially. Accordingly, the storage circuit (N) at the first stage of the storage circuit 522 takes in the error check value (P) output from the generation circuit 521, and the storage circuit (1) at the final stage of the storage circuit 522 The stored error check value (PN) is output to the adding means 530.

  In step S78, the adding means 530 takes in the control command (P) and the error check value (PN) based on the input of the operation permission signal output from the buffer means 510. Then, the adding unit 530 writes the fetched control command (P) and error check value (PN) to the transmission unit 550. Specifically, the input selection circuit 531 of the adding unit 530 receives the control command (P) output from the data buffer 511 of the buffer unit 510 and outputs the acquired control command (P) to the data bus. Further, the control circuit 532 of the adding unit 530 writes a control signal (P) to the transmission buffer 551 of the transmission unit 550 based on the input of the operation permission signal output from the control circuit 512 of the buffer unit 510. And output address data. Further, the control circuit 532 outputs a connection switching signal to the input selection circuit 531 after a predetermined time delay from the output of the write signal. The input selection circuit 531 switches the connection source from the data buffer 511 to the storage circuit 522 based on the input of the connection switching signal output from the control circuit 532. Then, the input selection circuit 531 takes in the error check value (PN) from the storage circuit 522, and outputs the fetched error check value (PN) to the data bus. Further, when the control circuit 532 outputs the connection switching signal and the error check value (PN) is output from the input selection circuit 531 onto the data bus, the error check value (PN) is sent to the transmission buffer 551. A write signal and address data for writing are immediately output.

  In step S79, the transmission unit 550 immediately transmits the control command (P) and the error check value (PN) output from the adding unit 530 to the effect control unit 120. Specifically, the transmission buffer 551 of the transmission unit 550 receives the control command (P) on the data bus based on the input of the write signal of the control command (P) output from the adding unit 530, and takes in the control. The command (P) is immediately output to the transmission circuit 552. The transmission buffer 551 takes in the error check value (PN) on the data bus based on the input of the write signal of the error check value (PN) output from the adding means 530, and takes in the error check. The value (P−N) is immediately output to the transmission circuit 552. The transmission circuit 552 immediately transmits the control command (P) and the error check value (PN) output from the transmission buffer 551 to the effect control unit 120 as a series of transmission data. Therefore, the control command (P) is transmitted to the effect control unit 120 as a control command to which the error check value (PN) is added.

  In step S78, when the control circuit 532 outputs the connection switching signal to the input selection circuit 531, the control command (P) output from the input selection circuit 531 is completely written to the transmission buffer 551. After the elapse of the time required until the error check value (PN), the timing is set such that the writing of the error check value (PN) to the transmission buffer 551 is started. As a result, the error check value (PN) is written into the transmission buffer 551 so that the error check value (PN) is written immediately after the control command (P) written in the transmission buffer 551. The timing will be right.

  By setting the error check value write timing as described above, an overrun or underrun of the transmission buffer 551 occurs, and an error check value (P−) to be added to the control command (P) to be transmitted this time. N) can be prevented from being added appropriately. This is because the error check value actually added and transmitted during the error check process in the production control unit 120 does not match the error check value that should be added originally. The possibility that the inspection result will not be determined to be normal is suppressed, and the accuracy of the error inspection process is improved.

  Also, by setting the error check value write timing as described above, the error check value (PN) to be added this time is written to the transmission buffer 551 and the control command (P) is sent to the transmission buffer 551. The positional relationship of the write timing on the time axis is clarified, and the error check value (PN) is surely added immediately after the control command (P) and transmitted as one transmission data. As a result, the error check value (PN) is not transmitted to the effect control unit 120 as a single error check value (PN). Therefore, it becomes difficult for an unauthorized person to steal transmission data between the main control unit 110 and the production control unit 120, illegally analyze and reuse the error check value (PN), and the gaming machine 1 Security strength can be improved.

[Control processing of production control unit]
Hereinafter, the control processing of the effect control unit 120 of the gaming machine 1 according to the embodiment of the present invention will be described. First, the main process of the production control unit 120 will be described.
FIG. 14 is a flowchart showing main processing by the effect control unit 120 according to the present embodiment.

  In step S1000, the sub CPU 120a performs an initialization process. In this process, the sub CPU 120a reads the program code related to the main process from the sub ROM 120b in response to power-on. At the same time, the sub CPU 120a initializes a flag and the like stored in the sub RAM 120c, and performs a process of setting a setting value. If this process ends, the process moves to a step S1100. In step S1000, a process for setting an error check value output function corresponding to the error check value addition function of the main control unit 110 to the check value generation unit 620 is performed.

  In step S1100, the sub CPU 120a performs an effect random number update process. In this process, the sub CPU 120a performs a process of updating the effect random number value, effect design determining random number, effect mode determining random number and the like stored in the sub RAM 120c. Thereafter, the process of step S1100 is repeated until a predetermined interrupt process is performed.

Next, the interruption process of the production control unit 120 will be described.
FIG. 15 is a flowchart showing interrupt processing by the effect control unit 120 according to the present embodiment.
Based on a clock signal output from a clock pulse generation circuit (not shown) provided in the effect control unit 120, the sub CPU 120a performs timer allocation of the effect control unit 120 at predetermined intervals (for example, 2 milliseconds). Execute the included process.

In step S1200, the sub CPU 120a saves the information stored in the register of the sub CPU 120a to the stack area.
In step S1300, the sub CPU 120a performs update processing of various timer counters used in the effect control unit 120.

  In step S1500, the sub CPU 120a performs command analysis processing. In this process, the sub CPU 120a performs a process of analyzing the type of control command stored in the received data storage area of the sub RAM 120c.

When the receiving unit 600 constituting the effect control unit 120 receives the control command transmitted from the main control unit 110 and stores it in its own reception buffer, the main control unit 110 has received a control command reception interrupt request. The control command reception interrupt process is generated.
Then, the sub CPU 120a performs an error check process for the received control command, and when the validity of the control command is authenticated in the error check value process, the sub CPU 120a receives the control command from the reception buffer and stores the received data in the sub RAM 120c To capture and memorize. Then, the sub CPU 120a analyzes the type of the control command stored in the received data storage area, and performs processing according to the type of the control command. Details of the command analysis process will be described later.

In step S <b> 1700, the sub CPU 120 a checks the signal of the effect button detection switch 35 a, and performs effect input control processing related to input from the effect button 35.
In step S1800, the sub CPU 120a performs an effect output control process that is a process for transmitting the control command and various data set in the transmission data storage area of the sub RAM 120c to the lamp control unit 140 and the image control unit 150. Do.
In step S1900, the sub CPU 120a restores the information saved in step S1200 to the register of the sub CPU 120a.

Next, command analysis processing of the effect control unit 120 will be described.
16 and 17 are flowcharts showing command analysis processing by the effect control unit 120 according to the present embodiment. Note that the command analysis processing 2 in FIG. 17 is performed subsequent to the command analysis processing 1 in FIG.

In step S1501, the sub CPU 120a confirms whether or not a control command is stored in the reception buffer of the reception unit 600 constituting the effect control unit 120, and determines whether or not the control command has been received.
If the control command is stored in the reception buffer, the sub CPU 120a moves the process to step S3000. If the control command is not stored in the reception buffer, the sub CPU 120a ends the command analysis process.

  In step S3000, the sub CPU 120a performs error check processing on the control command stored in the reception buffer, and when the validity of the received control command is authenticated, the received control command is stored in the received data storage area. In order to further analyze the type of fetch and control command, the process proceeds to step S1510. Details of the error checking process will be described later.

In step S1510, the sub CPU 120a checks whether or not the control command stored in the received data storage area is a demo designation command.
If the control command stored in the received data storage area is a demo designation command, the sub CPU 120a moves the process to step S1511. If not, the sub CPU 120a moves the process to step S1520.

In step S1511, the sub CPU 120a performs a demonstration effect pattern determination process for determining a demonstration effect pattern.
Specifically, the demonstration effect pattern is determined, the determined demonstration effect pattern is set in the effect pattern storage area, and information on the determined demonstration effect pattern is transmitted to the image control unit 150 and the lamp control unit 140. An effect pattern designation command based on the demo effect pattern is set in the transmission data storage area of the sub-RAM 120c.

In step S1520, sub CPU 120a checks whether or not the control command stored in the reception data storage area is a special symbol storage designation command.
If the control command stored in the received data storage area is a special symbol storage designation command, the sub CPU 120a moves the process to step S1521, and if it is not a special symbol storage designation command, the sub CPU 120a moves the process to step S1530.

  In step S1521, the sub CPU 120a analyzes the special symbol storage designation command to determine the number of display images of special symbols to be displayed on the liquid crystal display device 31 (hereinafter referred to as “special diagram reserved images”). The special symbol display number designation command corresponding to the display number of the special figure reserved images is transmitted to the image control unit 150 and the lamp control unit 140, and a special symbol storage number determination process is performed.

In step S1530, the sub CPU 120a checks whether or not the control command stored in the received data storage area is an effect designating command.
If the control command stored in the received data storage area is the effect designating command, the sub CPU 120a moves the process to step S1531, and if not the effect designating command, moves the process to step S1540.

In step S1531, the sub CPU 120a performs an effect symbol determination process for determining an effect symbol 36 to be stopped and displayed on the liquid crystal display device 31 based on the content of the received effect symbol designation command.
Specifically, the effect designating command is analyzed, the effect symbol data constituting the combination of the effect symbols 36 is determined according to the presence / absence of jackpot and the type of jackpot, and the determined effect symbol data is stored in the effect symbol storage area In addition, in order to transmit the effect symbol data to the image control unit 150 and the lamp control unit 140, a stop symbol designation command indicating the effect symbol data is set in the transmission data storage area of the sub RAM 120c.

  In step S1532, the sub CPU 120a acquires one random value from the effect mode determination random value updated in step S1100, and based on the acquired effect mode determination random value and the received effect designating command, An effect mode determination process for determining one effect mode from a plurality of effect modes (for example, a normal effect mode and a chance effect mode) is performed. Further, the determined effect mode is set in the effect mode storage area.

In step S1540, the sub CPU 120a checks whether or not the control command stored in the received data storage area is a variation pattern designation command.
If the control command stored in the received data storage area is a variation pattern designation command, the sub CPU 120a proceeds to step S1541. If not, the sub CPU 120a proceeds to step S1550.

In step S1541, the sub CPU 120a acquires one random number value from the effect random number value updated in step S1100, and is set in the acquired effect random number value, the received variation pattern designation command, and effect mode storage area. Based on the effect mode being performed, a variation effect pattern determination process for determining one variation effect pattern from a plurality of variation effect patterns is performed.
Specifically, in the normal effect mode, the variation effect pattern determination table is referred to, one change effect pattern is determined based on the acquired effect random number value, and the determined change effect pattern is stored in the effect pattern storage area. At the same time, in order to transmit the determined variation effect pattern information to the image control unit 150 and the lamp control unit 140, an effect pattern designation command based on the determined variation effect pattern is set in the transmission data storage area of the sub RAM 120c.
Thereafter, based on the effect pattern, the liquid crystal display device 31, the audio output device 32, the effect drive device 33, and the effect illumination device 34 are controlled. Note that the variation mode of the effect symbol 36 is determined based on the variation effect pattern determined here.

In step S1550, the sub CPU 120a checks whether or not the control command stored in the received data storage area is a symbol determination command.
If the control command stored in the received data storage area is the symbol confirmation command, the sub CPU 120a moves the process to step S1551, and if it is not the symbol confirmation command, moves the process to step S1560.

  In step S1551, the sub CPU 120a performs an effect symbol stop display process for setting a stop designation command for stopping the effect symbol in the transmission data storage area of the sub RAM 120c in order to stop the effect symbol 36.

In step S1560, the sub CPU 120a determines whether or not the control command stored in the received data storage area is a gaming state designation command.
If the control command stored in the received data storage area is a gaming state designation command, the sub CPU 120a moves the process to step S1561, and if not a gaming state designation command, moves the process to step S1570.

  In step S1561, the sub CPU 120a sets data indicating the gaming state based on the received gaming state designation command in the gaming state storage area in the sub RAM 120c.

In step S1570, the sub CPU 120a checks whether or not the control command stored in the received data storage area is an opening designation command.
If the control command stored in the received data storage area is an opening designation command, the sub CPU 120a moves the process to step S1571, and if it is not an opening designation command, moves the process to step S1580.

In step S1571, the sub CPU 120a performs a hit start effect pattern determination process for determining a hit start effect pattern.
Specifically, the hit start effect pattern is determined based on the opening designation command, the determined hit start effect pattern is set in the effect pattern storage area, and information on the determined hit start effect pattern is transmitted to the image controller 150 and the lamp. In order to transmit to the control unit 140, an effect pattern designation command based on the determined hit start effect pattern is set in the transmission data storage area of the sub RAM 120c.

In step S1580, the sub CPU 120a confirms whether or not the control command stored in the received data storage area is a special winning opening opening designation command.
If the control command stored in the received data storage area is the big prize opening release designation command, the sub CPU 120a moves the process to step S1581, and if it is not the big prize opening opening designation command, moves the process to step S1590. .

In step S1581, the sub CPU 120a performs a jackpot effect pattern determination process for determining a jackpot effect pattern.
Specifically, the jackpot effect pattern is determined based on the big prize opening opening designation command, the determined jackpot effect pattern is set in the effect pattern storage area, and information on the determined jackpot effect pattern is transmitted to the image controller 150 and the lamp. In order to transmit to the control unit 140, an effect pattern designation command based on the determined jackpot effect pattern is set in the transmission data storage area of the sub RAM 120c.

In step S1590, the sub CPU 120a checks whether or not the control command stored in the received data storage area is an ending designation command.
If the control command stored in the received data storage area is an ending designation command, the sub CPU 120a shifts the process to step S1591, and if not, terminates the command analysis process.

In step S1591, the sub CPU 120a performs a hit end effect pattern determination process for determining a hit end effect pattern.
Specifically, the winning end effect pattern is determined based on the ending designation command, the determined hit end effect pattern is set in the effect pattern storage area, and information on the determined hit end effect pattern is stored in the image control unit 150 and the lamp. In order to transmit to the control unit 140, an effect pattern designation command based on the determined winning end effect pattern is set in the transmission data storage area of the sub RAM 120c. When this process ends, the command analysis process ends.

Next, the error checking process of the effect control unit 120 will be described.
FIG. 18 is a flowchart showing an error checking process by the effect control unit 120 according to the present embodiment. In each step of FIG. 18, the notation in curly braces {} is provided to outline the process to the received number storage area (P) provided in the sub RAM 120c.

In step S3010, when the sub CPU 120a outputs a signal indicating that there has been a control command reception interrupt request from the receiving unit 600 of the effect control unit 120, the sub CPU 120a sets the value of the received number storage area (P) of the sub RAM 120c. Update.
In step S3020, the sub CPU 120a determines whether or not the control command (P) stored in the reception buffer of the reception unit 600 corresponds to the control command (1). Specifically, the sub CPU 120a refers to the value of the received number storage area (P) and determines whether P = 1. If P = 1, the process proceeds to step S3030, and if P = 1, the process proceeds to step S3050.

In step S3030, the sub CPU 120a reads the unique information stored in the sub ROM 120b. At this time, if there are N pieces of unique information, N pieces of unique information are read at a time. Then, the sub CPU 120a outputs the read unique information to the inspection value generation unit 620.
In step S3040, the sub CPU 120a stores the unique information output to the inspection value generation unit 620 in the storage unit 622 in the inspection value generation unit 620 and sets it as an initial inspection value.

In step S3050, the sub CPU 120a extracts the error check value (PN) added to the control command (P) from the control command (P) stored in the reception buffer of the reception unit 600.
In step S3060, the sub CPU 120a outputs the extracted error check value (PN) to the check unit 610, and outputs a control command (P) after extracting the error check value (PN) to the check value generation unit 620. Output to.

In step S3070, the sub CPU 120a generates the error check value (P) of the control command (P) output from the reception unit 600 in the generation unit 621 of the check value generation unit 620.
In step S3080, the sub CPU 120a stores the error check value (P) generated by the generation unit 621 in the storage unit 622 of the check value generation unit 620.

In step S <b> 3090, the sub CPU 120 a outputs the error check value (PN) stored in the storage unit 622 in the past to the check unit 610.
In step S <b> 3100, the sub CPU 120 a compares the error check value (PN) output from the receiving unit 600 with the error check value (PN) output from the storage unit 622. The sub CPU 120a determines that the inspection result of the error check is normal when both match with the error check value (PN). On the other hand, if the two do not match, the sub CPU 120a determines that the inspection result is not normal.

In step S3110, the sub CPU 120a determines in the inspection unit 610 whether or not the inspection result is determined to be normal. If the sub CPU 120a determines that the inspection result is normal, the sub CPU 120a receives the control command (P) to which the currently received error check value (PN) is added and the current error check value (PN). It is determined that the validity of the main control unit 110 has been authenticated because the validity of the N previous control command (PN) as the generation source has been authenticated. Then, the sub CPU 120a determines that the gaming machine 1 is operating normally, outputs the received control command (P) to the received data storage area of the sub RAM 120c, and performs processing according to the control command (P). The error checking process is terminated so that On the other hand, if the sub CPU 120a determines that the test result is not normal, the sub CPU 120a determines that the validity of the main control unit 110 could not be authenticated. Then, the sub CPU 120a determines that there is a possibility that an illegal act or the like has occurred in the gaming machine 1, and moves the process to step S3120.
In step S3120, when the sub CPU 120a determines that there is a possibility that an illegal act or the like has occurred in the gaming machine 1, the sub CPU 120a outputs a notification signal to notify that fact and ends the error checking process.

  The sub CPU 120a transmits the generated notification signal to, for example, the lamp control unit 140, the image control unit 150, or a hall computer that manages the gaming machine 1. Based on the received notification signal, the lamp control unit 140, the image control unit 150, and the like perform an effect that notifies that there is a possibility that an illegal act has occurred in the gaming machine 1. This effect is, for example, causing a character that does not normally appear on the liquid crystal display device 31 to appear, or causing a character that normally appears to appear by a method different from normal. In addition, the brightness of the liquid crystal display device 31 may be changed, the color may be changed, or the lamp controller 140 may be controlled to display a predetermined lamp. In any case, when the employee of the game shop passes in front of the gaming machine 1, it is only necessary to notice the state. This effect may be an effect that the customer does not notice the state or an effect that the customer can easily notice. If the production is easily noticed by the customer, fraud can be efficiently suppressed.

  Moreover, you may include the information regarding the gaming state or jackpot type of the gaming machine 1 in the notification signal. Based on these pieces of information, it may be determined whether a fraudulent act is being performed by a hall computer or the like that manages the gaming machine 1. For example, the “high probability gaming state” may be normal even if prize balls are concentrated. Therefore, during the high-probability gaming state, it is preferable to determine whether or not there is a risk of cheating under different conditions from the other states. Moreover, you may make it output the information regarding a gaming state or jackpot type as a separate signal without including it in a notification signal. In this case, the employee determines whether or not there is a risk of fraud based on both the notification signal and the information regarding the gaming state and the jackpot type.

  The authentication process between the main control unit 110 and the other control units of the peripheral control unit 300 is performed in substantially the same procedure as the authentication process between the main control unit 110 and the effect control unit 120. Is omitted.

  As described above, in the present embodiment, as a security function, the validity of the main control unit 110 is authenticated by checking the validity of the control command output from the main control unit 110. The main control unit 110 generates and stores an error check value for the control command. The main control unit 110 adds the error check value of the control command generated before (past) to the control command to be transmitted this time and transmits the control command to the effect control unit 120. On the other hand, the production control unit 120 generates and stores an error check value for the received control command. Then, the production control unit 120 checks the error check value added to the control command received this time with the error check value of the control command generated before (past) the control command received this time. Do.

  Normally, an error check value such as a checksum is added to the control command of the generation source and used for a communication error check. In contrast, in the present embodiment, as described above, the error check value of the control command generated in the past is added to the control command to be transmitted this time. By using such a new and simple method that has not been used in the past, even if an unauthorized person steals a control command and an error check value, the relationship between the control command and the error check value cannot be easily known. it can. Therefore, according to this embodiment, fraud can be prevented and the security strength of the gaming machine 1 can be improved.

  In addition, the error check value of the control command generated in the past by the main control unit 110 is added to the control command to be transmitted this time and transmitted, and the production control unit 120 performs the error check process of the control command and has received this time. In addition to authenticating the validity of the control command, it is also possible to authenticate the validity of the control command generated in the past, that is, the control command from which the error check value added this time is generated. That is, it is possible to authenticate the continuity of the control command, and it becomes easier to detect fraud, and the security strength of the gaming machine 1 can be improved.

  In the present embodiment, the error check value is set to a value unique to the gaming machine 1 by adding unique information unique to the gaming machine 1 to the control command transmitted when P ≦ N. Can do. As a result, even if an unauthorized person who does not know the specific information steals a part of the control command, the error check value cannot be analyzed, and the security strength of the gaming machine 1 can be further improved.

  In this embodiment, an error check value that is normally used for communication error check is used as a check value for detecting fraud. In this way, by using an error check value conventionally used for communication error check, it is possible to detect fraud without separately providing test value generation means for detecting fraud. Can be improved. That is, in a situation where the resources of the main control unit of the gaming machine are limited, an increase in processing load on the main control unit 110 can be suppressed while improving the security strength.

  In the present embodiment, the test value generation unit 500 added as a specific aspect of the security function added to the main control unit 110 is configured with a wired logic control type hardware, and includes the main CPU 110a, the transmission unit 550, and the like. It is provided between. At this time, the input / output control method between the inspection value generation unit 500 and the main CPU 110a and the input / output control method between the inspection value generation unit 500 and the transmission unit 550 are each a CPU interface method. The input / output control method between the means in the inspection value generation unit 500 is a wired interface method. Therefore, in this embodiment, the test value generation unit 500 that does not increase the processing load and code size of the main CPU 110a is added while maintaining the input / output control method between the main CPU and the transmission unit of the existing gaming machine. Can do. Therefore, according to the present embodiment, while the gaming machine 1 has the security function, the processing load and code size of the CPU of the main control unit 110, which increase by having the security function, can be suppressed to the maximum. At the same time, according to the present embodiment, a security function having such a feature can be added to an existing gaming machine relatively easily.

  In this embodiment, the data buffer 511 of the buffer unit 510 and the generation circuit 521 of the generation unit 520 are connected, and the storage circuit 522 is provided on the output side of the generation circuit 521. Therefore, the object to be stored in the storage circuit 522 is the error check value generated by the generation circuit 521. However, the present invention is not limited to this, and a storage circuit 522 may be provided on the input side of the generation circuit 521 as shown in FIG. Note that the direction in which data is shifted in the storage circuit 522 in FIG. 5 (the direction from the storage circuit (N) to the storage circuit (1)) and the direction in which data is shifted in the storage circuit 522 in FIG. ) To the storage circuit (N)) are in the opposite directions because the symbols of the storage circuits (1) to (N) are given in the same order for convenience of explanation. Any of the storage circuits 522 functions as a FIFO memory, and the embodiment in FIGS. 5 and 19 does not require a different configuration. In the production control unit 120, the object stored in the storage unit 622 may be an error check value or a control command. In addition, the storage target in the main control unit 110 and the storage target in the effect control unit 120 may be different.

  In the present embodiment, when P ≦ N, the main control unit 110 adds an initial inspection value to the control command (P) and transmits it, and the effect control unit 120 outputs the corresponding initial inspection value. However, the present invention is not limited to this, and the production control unit 120 does not perform error check processing when P ≦ N, and does not perform error check until P> N. Processing may be performed.

  In the present embodiment, the production control unit 120 has an error check value output function that is the same function as the error check value addition function of the main control unit 110, and the specific control stored in the past in the storage unit 622. The error check value is output to the inspection unit 610. Then, the error check process is performed by comparing the specific error check value output from the storage unit 622 with the error check value added to the received control command. However, the present invention is not limited to this, and the error check process may be performed by comparing the error check value added to the received control command with all the error check values stored in the storage unit 622. In this case, the effect control unit 120 authenticates the validity of the received control command and the validity of the main control unit 110, assuming that the inspection result is normal if it matches any error check value in the storage unit 622. That's fine.

  In the present embodiment, the initial inspection value used in the case of P ≦ N is the unique information stored in advance in the main ROM 110b, but the present invention is not limited to this. For example, the main control unit 110 is provided with time measuring means, or using the time measuring means provided in the main control unit 110 in advance, the elapsed time from the power-on to the transmission timing of the control command is acquired as time-lapse information and acquired. Time information may be used as an initial inspection value. Since the value of the acquired time-lapse information is a fluctuation value having randomness, it is difficult to reuse the initial inspection value generated by using this, and the security strength of the gaming machine 1 is further improved. Can do. At this time, the effect control unit 120 may not perform the error checking process when P ≦ N as described above.

  At this time, if it is determined that N ≧ 2 in advance, the effect control unit 120 determines whether or not the temporal information transmitted continuously as the initial inspection value has continuity in time series, that is, continuously. The error check process may be performed by confirming whether or not the value of the time-dependent information transmitted in this way increases according to the transmission order. The time information may be an absolute time acquired by using a time measuring means as a real time clock circuit or the like, or may be a relative time counted from the reset time. In any case, the time-lapse information changes to various values as the timing of acquisition is irregular, so that it can be regarded as information inherent to the gaming machine 1 substantially. Further, when N ≧ 2, the time information may be obtained from the time measuring means for each control command transmission timing, or a plurality of time information acquired at the transmission timing of the first generated control command may be used. It may be used as an initial check value for a control command. In addition, for example, the initial inspection value added to the control command generated first uses the identification number (ID) of the main CPU 110a which is a fixed value, and the subsequent initial inspection value uses time-lapse information which is a variation value. It is also possible to combine fixed values and variable values.

  In this embodiment, the timing for writing the error check value to the transmission buffer 551 of the transmission unit 550 is controlled by adjusting the output timing of the connection switching signal output from the control circuit 532 of the adding unit 530. However, the present invention is not limited to this, and the control circuit 512 of the buffer means 510 can be controlled by adjusting the output timing of the operation permission signal output to the control circuit 532. In addition, the control circuit 523 of the generation unit 520 can also perform control by adjusting the output timing of the operation permission signal output to the generation circuit 521. This is because the output timing of the connection switching signal output from the control circuit 532 is based on the input of the operation permission signal output from the control circuit 512. This is because the timing at which the error check value is input to the input selection circuit 531 to which the connection switching signal is input is based on the input of the operation permission signal output from the control circuit 523.

  Note that the output timing of the operation permission signal output from the control circuit 523 is also based on the input of the operation permission signal output from the control circuit 512, and the output timing of the operation permission signal output from the control circuit 512 is the main timing. This is based on the input of a write signal to the buffer means 510 output by the CPU 110a. The write signal output from the main CPU 110a is specified in advance by the execution timing of the command transmission process originally defined in the existing game processing program. As described above, in the present invention, the timing at which the test value generation unit 500 writes the error test value to the transmission unit 550 is uniquely determined based on the execution timing of the command transmission process defined by the existing game processing program. Well, timing design is relatively easy. Therefore, according to the present invention, a security function can be added to an existing gaming machine relatively easily, and a relatively large margin can be secured in the design of the write timing of the error check value. It is easy to ensure the accuracy of processing.

  In this embodiment, the inspection value generation unit 500 has a circuit configuration separate from the one-chip microcomputer 110m. However, the present invention is not limited to this, and the inspection value generation unit 500 is a circuit integrated with the one-chip microcomputer 110m. It is good also as a structure, and it is good also as a circuit structure integrated with the transmission part 550. Furthermore, in the present invention, all of the inspection value generation unit 500, the one-chip microcomputer 110m, and the transmission unit 550 may be integrated into a circuit configuration.

  Moreover, in this embodiment, although the example which applies this invention to a pachinko game machine was shown, it is not limited to this, This invention is a ball game machine other than pachinko game machines, such as a sparrow ball game machine and an arrangement ball. It can also be applied to other gaming machines such as slot machines such as slot machines. Even in these gaming machines, the same effects as in the present embodiment can be obtained by configuring in the same manner as in the present embodiment. Moreover, this embodiment can divert each other's technology as long as there is no particular contradiction or problem in its purpose and configuration.

1 gaming machine 110 main control unit 110a main CPU
110b Main ROM
110c Main RAM
110m One-chip microcomputer 120 Production control unit 120a Sub CPU
120b Sub ROM
120c sub RAM
DESCRIPTION OF SYMBOLS 130 Discharge control part 140 Lamp control part 150 Image control part 160 Launch control part 170 Power supply part 300 Peripheral control part 500 Test value generation part 510 Buffer means 520 Generation means 521 Generation circuit 522 Storage circuit 530 Additional means 550 Transmission part 600 Reception part 610 Inspection unit 620 Inspection value generation unit 621 generation unit 622 storage unit

Claims (7)

A gaming machine including a main control unit that outputs a control command and a peripheral control unit that performs processing based on the control command,
The main control unit
An arithmetic processing unit that performs an operation according to predetermined game information to generate the control command, and outputs the generated control command in a predetermined output control method;
A first check value generation unit that generates an error check value corresponding to the control command output by the arithmetic processing unit and outputs the generated error check value;
A transmission unit for transmitting the control command and the error check value to the peripheral control unit;
With
The peripheral control unit
A second check value generator for generating an error check value for verification corresponding to the error check value generated by the first check value generator;
An inspection unit that compares the error check value transmitted by the transmission unit with the error check value generated by the second check value generation unit and checks the validity of the control command transmitted by the transmission unit;
A processing unit that performs processing based on the result of the inspection while performing processing based on the control command transmitted by the transmission unit;
With
The first inspection value generation unit
Buffer means for inputting a control command output by the arithmetic processing unit and outputting the input control command at a timing specified in advance;
The control command output by the buffer means is input, an error check value corresponding to the control command output by the arithmetic processing unit in the past is generated from the input control command, and the generated error check value is set at the timing. Generating means for outputting in response,
The control command output by the buffer means and the error check value output by the generating means are input, the error check value input is added to the input control command, and the error check value is added An adding means for outputting a control command according to the timing in the same output control method as the output control method determined in advance in the arithmetic processing unit;
Have
The transmission unit inputs the control command to which the error check value output by the adding unit is added, and transmits the input control command to which the error check value is added to the peripheral control unit. A gaming machine.   The generation means is a means having a first storage circuit for storing the generated error check value, and outputs the error check value stored in the first storage circuit to the addition means according to the timing. The gaming machine according to claim 1.   The generation means further includes a second storage circuit that stores unique information indicating information unique to the gaming machine, and the error check value generated by the generation means is not stored in the first storage circuit. 3. The gaming machine according to claim 2, wherein the unique information stored in the second storage circuit is output to the adding means as the error check value.   The generating means is a means having a third storage circuit for storing a control command output by the arithmetic processing unit in the past from a control command output by the buffer means, and the control stored in the third storage circuit. 2. The gaming machine according to claim 1, wherein an error check value corresponding to the command is generated, and the generated error check value is output to the adding unit according to the timing.   The generating means further includes a fourth storage circuit that stores unique information indicating information unique to the gaming machine, and the arithmetic processing process is performed in the past in the third storage circuit from the control command output by the buffer means. When the control command output by the control unit is not stored, the unique information stored in the fourth storage circuit is output to the adding means as an error check value corresponding to the control command. Item 5. The gaming machine according to item 4. The buffer means outputs the input control command in a predetermined output control method different from the output control method determined in advance in the arithmetic processing unit,
The gaming machine according to any one of claims 1 to 5, wherein the generation unit outputs the generated error check value by the same output control method as the predetermined output control method used by the buffer unit. The first inspection value generation unit is provided between the arithmetic processing unit and the transmission unit,
The connection between the arithmetic processing unit and the first inspection value generation unit and the connection between the first inspection value generation unit and the transmission unit are connected by a bus of the same standard.
The gaming machine according to any one of claims 1 to 6, wherein the output control method determined in advance in the arithmetic processing unit is a method determined based on the standard.

Images