JP2012164892A - Solid-state image sensor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a solid-state image sensor having high performance global shutter function and reduced rolling shutter-like noise.SOLUTION: A solid-state image sensor comprises a plurality of unit pixel cells arranged in two dimension with global shutter function. Each of the plurality of unit pixel cells 23 includes: photoelectric conversion film 16 formed above a semiconductor substrate for converting incident light into signal charge; a pixel electrode 15 formed on one surface of the photoelectric conversion film near to the semiconductor substrate; and a global charge accumulation diffusion layer 7 formed on the semiconductor substrate for accumulating signal charge transferred from the photoelectric conversion film 16 using the global shutter. The function of the global shutter is to transfer signal charge from the photoelectric conversion film 16 in the plurality of unit cells simultaneously. The pixel electrode 15 is formed of metal impervious to light.

Description

  The present invention relates to a solid-state imaging device, a driving method of the solid-state imaging device, and an electronic apparatus, and more particularly to a solid-state imaging device having a global shutter function and a camera having the solid-state imaging device.

  Solid-state imaging devices include XY address type solid-state imaging devices represented by CMOS (Complementary Metal Oxide Semiconductor) image sensors and charge transfer type solid-state imaging devices represented by CCD (Charge Coupled Device) image sensors. Broadly divided. Here, the CMOS image sensor is capable of random access of pixel signals, and further has a feature that pixel signals are read out at a higher speed and consumes less power than a CCD image sensor.

  By the way, many CMOS image sensors transfer the signal charge accumulated in the photoelectric conversion unit to the charge voltage conversion unit, and use the obtained voltage as an output. The electronic shutter function is realized by periodically resetting the charge voltage conversion unit. The shutter system of the electronic shutter function of the CMOS image sensor is a so-called rolling shutter (also called a focal plane shutter) system in which the start and end of exposure are set for each pixel row for a large number of two-dimensionally arranged pixels. .

  Therefore, unlike a global shutter CCD image sensor that exposes all pixels at the same timing, a rolling shutter CMOS image sensor has a different (different) exposure period for each pixel row. If the exposure period shifts for each pixel row, the captured image is distorted when a moving object is captured.

  There are several means for realizing the global shutter function. For example, as shown in FIG. 2 of Patent Document 1 in FIG. 14, a new global storage capacitor (TSA), global transfer gate (TX1A) and There is a method of providing an overflow function (overflow gate OA and overflow drain are also used as power supply VDD). A simple operation method is as follows. The charges stored in the photodiode (PDA) are simultaneously transferred to the global storage capacitor (TSA) by turning on the global transfer gate in all the arranged pixels. Thereafter, the signal of the global storage capacity is sequentially read out for each column on the same principle as the conventional CMOS sensor.

US Patent Application Publication No. 2007/0013798

  When the prior art described in Patent Document 1 is actually applied to a camera, the global storage capacity TSA is sensitive to incident light although it has a slight amount. Then, the signal photoelectrically converted by the photodiode PDA functions as a global shutter, but the electric charge photoelectrically converted by the global storage capacitor TSA is detected by a rolling shutter operation. That is, the rolling shutter noise detected by the global storage capacitor TSA is superimposed on the global shutter operation signal detected by the photodiode PDA. This rolling shutter noise is mainly generated when a part of incident light enters the global detection capacitor TSA. The dark current generated in the global detection capacitor TSA also becomes rolling shutter noise.

  If the sensitivity of the global storage capacity is 1/100 of the sensitivity of the photodiode, 1/100 rolling shutter noise is superimposed on the global shutter signal. Although it seems that it is not a large noise, if the storage time of the global shutter is shortened, the signal is reduced and the S / N ratio is deteriorated. The accumulation time of the rolling shutter is determined by the time for reading one frame signal. When a global shutter of 1/100 of the time of one frame is applied, the signal level of the global shutter and the noise level like a rolling shutter become the same, and it can be said that the effect of the global shutter is almost lost. Since the global shutter is effective when the shutter time is short, the rolling shutter noise caused by the global storage capacity sensitivity becomes a big problem. This becomes a problem when a bright dynamic subject whose shutter time of the global shutter is shortened is imaged. There is also a problem when a bright subject is imaged while moving the camera.

  The photosensitivity ratio between the actually required photodiode and the global storage capacity is said to be 10000000: 1 for digital single lens reflex camera applications. In the interline CCD image sensor, the photosensitivity ratio of the photo diode and the vertical transfer CCD adjacent to the photo diode is about 3000000: 1 for broadcasting camera applications. It is difficult to realize the method by forming the diode and the global storage capacitor in the same semiconductor substrate.

  In addition, since the global storage capacitor stores electric charge for a long time until a signal is read out of the sensor, a low dark current structure similar to a photodiode is required.

  Therefore, an object of the present invention is to provide a solid-state imaging device and a camera having a high-performance global shutter function with reduced rolling shutter noise.

  In order to solve the above-described problem, a solid-state imaging device according to an aspect of the present invention is a solid-state imaging device including a plurality of unit pixel cells arranged two-dimensionally and having a global shutter function, and the plurality of unit pixels Each of the cells is formed above the semiconductor substrate, converts the incident light into a signal charge, a pixel electrode formed on the surface of the photoelectric conversion film on the semiconductor substrate side, and on the semiconductor substrate And a global charge accumulation diffusion layer that accumulates signal charges transferred from the photoelectric conversion film by a global shutter, and the global shutter simultaneously transfers signal charges from the photoelectric conversion film in the plurality of unit cells. In addition, the pixel electrode is formed of a light-shielding metal.

  According to this configuration, since light that cannot be absorbed by the photoelectric conversion film is shielded by the pixel electrode, the light sensitivity of the global charge storage diffusion layer can be reduced by reducing the incidence of light on the global charge storage diffusion layer. Can do. Thereby, rolling shutter noise can be reduced and a high-performance global shutter function can be realized.

  Here, the solid-state imaging device may further include a light-shielding metal layer having a width larger than the gap below the gap between adjacent pixel electrodes.

  According to this configuration, the light that cannot be absorbed by the photoelectric conversion film and is transmitted through the gap between the pixel electrodes is blocked by the metal layer, so that the incidence of light on the global charge storage diffusion layer can be further reduced. .

  Here, the area of the pixel electrode may be larger than that of the global charge storage diffusion layer, and the pixel electrode may cover the global charge storage diffusion layer.

  According to this configuration, light that cannot be absorbed by the photoelectric conversion film and transmitted through the gap between the pixel electrodes is made difficult to enter the global charge storage diffusion layer.

  Here, the solid-state imaging device further includes a contact connected to the pixel electrode, a charge integration diffusion layer that is formed on the semiconductor substrate and accumulates signal charges transferred from the pixel electrode through the contact, A global transfer gate electrode for transferring a signal charge during global shutter from the charge integration diffusion layer to the global charge storage diffusion layer, the global transfer gate electrode covering a region of the global charge storage diffusion layer, A negative voltage may be applied to the global transfer gate electrode 6 in the signal accumulation period in which the signal charge of the global charge accumulation diffusion layer is maintained.

  According to this configuration, by applying a negative voltage to the global transfer gate electrode, the dark current generated at the interface of the global charge storage diffusion layer is suppressed, and the dark current can be dramatically reduced. Thereby, rolling shutter noise due to dark current can be reduced.

  Here, the global transfer gate electrode may include a polysilicon layer and a metal layer formed on the polysilicon layer.

  According to this configuration, since the global transfer gate electrode includes the metal layer and covers the region of the global charge storage diffusion layer, light incident on the global charge storage diffusion layer can be further reduced.

  Here, the solid-state imaging device further includes a contact connected to the pixel electrode, a charge integration diffusion layer that is formed on the semiconductor substrate and accumulates signal charges transferred from the pixel electrode through the contact, A global transfer gate electrode for transferring a signal charge from the charge integration diffusion layer to the global charge storage diffusion layer at the time of the global shutter, the global transfer gate electrode between the charge integration diffusion layer and the global charge storage diffusion layer A diode barrier layer having a conductivity type opposite to that of the global charge storage diffusion layer may be provided on the semiconductor substrate surface side of the global charge storage diffusion layer.

  According to this configuration, a dark current generated at the interface of the global charge storage diffusion layer is provided on the semiconductor substrate surface side of the global charge storage diffusion layer by providing a diode barrier layer having a conductivity type opposite to that of the global charge storage diffusion layer. Is suppressed and the dark current can be dramatically reduced. Thereby, rolling shutter noise due to dark current can be reduced.

  Here, the charge integration diffusion layer is of a first conductivity type, and the solid-state imaging device is further opposite to the first conductivity type formed on the semiconductor substrate surface side of the charge integration diffusion layer. An interface barrier layer of a second conductivity type and a charge collection diffusion layer of a first conductivity type formed on the surface of the interface barrier layer and connected to the contact electrode 14 may be provided.

  Here, the solid-state imaging device is further formed in a region adjacent to the charge collection diffusion layer on the surface of the semiconductor substrate and a charge collection diffusion layer of the first conductivity type connected to the contact, A channel diffusion layer serving as a transfer path, and a first conductive layer that is formed in a region adjacent to the channel diffusion layer on the surface of the semiconductor substrate and accumulates signal charges transferred from the charge collection diffusion layer through the channel diffusion layer Type charge integration diffusion layer, an end portion of the charge collection diffusion layer, the channel diffusion layer, and a barrier electrode that covers the charge integration diffusion layer, and the global transfer gate electrode includes a charge integration diffusion layer And a negative voltage may be applied to the barrier electrode during the exposure period of the photoelectric conversion film.

  Here, the global charge accumulation diffusion layer and the charge integration diffusion layer may be formed as an integral region, and the global transfer gate electrode and the barrier electrode may be formed as an integral electrode.

  Here, the charge integration diffusion layer is of a first conductivity type, and the solid-state imaging device is further opposite to the first conductivity type formed on the semiconductor substrate surface side of the charge integration diffusion layer. It may be configured to include a second conductivity type interface barrier layer and a first conductivity type charge collection diffusion layer formed on the surface of the interface barrier layer and connected to the contact electrode 14.

  Here, the solid-state imaging device further includes a first conductivity type charge collection diffusion layer connected to the contact and a first conductivity type charge integration diffusion for accumulating signal charges transferred from the charge collection diffusion layer. Layer, a barrier electrode formed between the charge collection diffusion layer and the charge integration diffusion layer, and a conductivity opposite to the charge integration diffusion layer on the semiconductor substrate surface side of the charge integration diffusion layer. It is good also as a structure provided with a type | mold diode barrier layer.

  Here, the global charge storage diffusion layer is of a first conductivity type, and the solid-state imaging device is further formed on the semiconductor substrate surface side of the global charge storage diffusion layer and a contact connected to the pixel electrode. An interface barrier layer of a second conductivity type opposite to the first conductivity type, a charge collection diffusion layer of a first conductivity type formed on the surface of the interface barrier layer and connected to the contact electrode; It is good also as a structure provided with.

  Here, the solid-state imaging device further includes a contact connected to the pixel electrode, a charge collection diffusion layer of a first conductivity type connected to the contact, the charge collection diffusion layer, and the global charge storage diffusion layer. And a barrier electrode formed on the semiconductor substrate surface side of the global charge storage diffusion layer and a diode barrier layer having a conductivity type opposite to that of the global charge storage diffusion layer. .

  Moreover, the camera in one form of this invention which solves the said subject is provided with said solid-state imaging device.

  According to the present invention, the light sensitivity of the global charge storage diffusion layer can be reduced by reducing the incidence of light on the global charge storage diffusion layer. Thereby, rolling shutter noise can be reduced and a high-performance global shutter function can be realized.

  In addition, since light that cannot be absorbed by the photoelectric conversion film and transmitted through the gap between the pixel electrodes is shielded by the metal layer, the incidence of light on the global charge storage diffusion layer can be further reduced.

  Furthermore, light that cannot be absorbed by the photoelectric conversion film and transmitted through the gap between the pixel electrodes is made difficult to enter the global charge storage diffusion layer.

  Further, the dark current generated at the interface of the global charge storage diffusion layer is suppressed, and the dark current can be dramatically reduced. Thereby, rolling shutter noise due to dark current can be reduced.

It is sectional drawing of the unit pixel cell which concerns on 1st Embodiment. 1 is a system configuration diagram showing an outline of a configuration of a CMOS image sensor to which a first embodiment is applied. 6 is a timing chart for explaining the circuit operation according to the first embodiment. It is sectional drawing of the unit pixel cell which concerns on 2nd Embodiment. It is sectional drawing of the unit pixel cell which concerns on 3rd Embodiment. It is sectional drawing of the unit pixel cell which concerns on 4th Embodiment. It is electric potential explanatory drawing of the electronic shutter by a laminated film. It is sectional drawing of the unit pixel cell which concerns on 5th Embodiment. It is sectional drawing of the unit pixel cell which concerns on 5th Embodiment. It is sectional drawing of the unit pixel cell which concerns on 5th Embodiment. It is a system block diagram which shows the outline of a structure of the CMOS image sensor to which 6th Embodiment is applied. It is a timing chart with which it uses for description of the circuit operation | movement which concerns on 7th Embodiment. It is a block diagram which shows the structural example of the imaging device by this invention. FIG. 6 is a sensor circuit diagram of Patent Document 1.

(First embodiment)
FIG. 1 is a sectional view of a pixel cell according to the first embodiment. The solid-state imaging device shown in the figure is a solid-state imaging device having a plurality of unit pixel cells 23-1, 23-2, 23-3, and 23-4 arranged in a two-dimensional manner and having a global shutter function. In the drawing, four unit pixel cells are shown for convenience, but there are actually many unit pixel cells. Further, when the four unit pixel cells 23-1, 23-2, 23-3, and 23-4 are not particularly distinguished, they are simply referred to as a unit pixel cell 23.

  The unit pixel cell 23 is formed above the semiconductor substrate 1. The unit pixel cell 23 converts incident light into signal charges. The pixel conversion cell 16. The pixel electrode 15 formed on the surface of the photoelectric conversion film 16 on the semiconductor substrate 1 side. A global charge storage diffusion layer 7 that is formed on the substrate 1 and stores signal charges transferred from the photoelectric conversion film 16 by the global shutter is mainly provided. The global shutter means that signal charges are simultaneously transferred from the photoelectric conversion film 16 in a plurality of unit cells.

  Specifically, on an N-type semiconductor substrate 1 having a P-type well 2, an N-type charge collecting diffusion layer 3, an P-type interface barrier layer 4, and an N-type that integrate and accumulate photoelectrically converted signal charges. Charge integration diffusion layer 5, N-type global charge storage diffusion layer 7 for temporarily storing signal charges transferred from charge integration diffusion layer 5 by global transfer gate electrode 6, and pixel amplifiers for signal charges in global charge storage diffusion layer 7 A line transfer gate electrode 10 for transferring to the floating diffusion layer 9 electrically connected to the gate electrode of the transistor 8, and a reset gate electrode 12 for discharging signal charges from the floating diffusion layer 9 to the power source diffusion layer 11 connected to the power source of the pixel amplifier transistor 8. A pixel electrode 15 is provided on the upper part of the pixel circuit comprising a contact electrode 14 that penetrates the buffer insulating film 13 and has electrical contact with the charge collection diffusion layer 3. And photoelectric conversion layer 16, a transparent electrode 17 formed on the top.

  The adjacent pixel circuits are separated by STI 18 (Shallow Trench Isolation). An overflow path 19 is provided below the charge integration diffusion layer 5 so that charges in the charge integration diffusion layer 5 can be discharged to the semiconductor substrate 1 serving as an overflow drain.

  The pixel electrode 15 is made of a light-shielding metal. In order to provide light shielding properties, the film thickness of the pixel electrode 15 is desirably about 500 nm or more. Alternatively, it is preferable that the total thickness of the pixel electrode 15 and the other metal wiring layer is substantially 500 nm or more. As a result, light that cannot be absorbed by the photoelectric conversion film is shielded by the pixel electrode, so that the light sensitivity of the global charge storage diffusion layer can be reduced by reducing the incidence of light on the global charge storage diffusion layer. Thereby, rolling shutter noise can be reduced and a high-performance global shutter function can be realized.

  Further, a light-shielding metal layer 21 having a width larger than the gap is provided below the gap between adjacent pixel electrodes 25. According to this configuration, the light that cannot be absorbed by the photoelectric conversion film and is transmitted through the gap between the pixel electrodes is blocked by the metal layer, so that the incidence of light on the global charge storage diffusion layer can be further reduced. .

  The area of the pixel electrode 15 is larger than that of the global charge storage diffusion layer 7. The pixel electrode 15 is formed so as to cover the global charge storage diffusion layer 7. This makes it difficult for light that cannot be absorbed by the photoelectric conversion film and transmitted through the gap between the pixel electrodes to enter the global charge storage diffusion layer.

  The solid-state imaging device further includes a contact 14 connected to the pixel electrode 15, a charge integration diffusion layer 5 that is formed on the semiconductor substrate and accumulates signal charges transferred from the pixel electrode 15 via the contact 14, A global transfer gate electrode 6 for transferring a signal charge at the time of global shutter is provided from the charge integration diffusion layer 5 to the global charge storage diffusion layer 7. Here, the global transfer gate electrode 6 covers the region of the global charge storage diffusion layer 7, and a negative voltage is applied to the global transfer gate electrode 6 in the signal storage period in which the signal charge of the global charge storage diffusion layer 7 is maintained. The By applying a negative voltage to the global transfer gate electrode, the dark current generated at the interface of the global charge storage diffusion layer is suppressed, and the dark current can be dramatically reduced. Thereby, rolling shutter noise due to dark current can be reduced.

  Furthermore, the global transfer gate electrode 6 includes a polysilicon layer and a metal layer formed on the polysilicon layer. This metal layer may be at least one of Ti, Co, Ni, etc., for example.

  Next, the principle of operation will be described. First, a positive voltage pulse is applied to the semiconductor substrate 1 to completely discharge charges (electrons) inside the charge integration diffusion layer 5 and then return to the original voltage. At this timing, accumulation of signal charges is started with the electronic shutter opened. Light incident from above the transparent electrode 17 to which a negative voltage is applied in the drawing is converted into signal charges (electrons) by the photoelectric conversion film 16, and collected by the charge collection diffusion layer 3 through the pixel electrode 15 and the lifting contact electrode 14. .

  Due to this signal charge (electrons), the charge collection diffusion layer 3 becomes a negative voltage and is forward-biased, so that it accumulates in the charge integration diffusion layer 5 through the interface barrier layer 4.

  Next, a positive pulse voltage is applied to the global transfer gate electrode 6 to transfer the signal charge of the charge integration diffusion layer 5 to the global charge storage diffusion layer 7. This timing is the time when the electronic shutter is closed. Although the signal charge stays in the global charge storage diffusion layer for a certain period, the overflow path 19 is excessive so that the charge overflowing the charge integration diffusion layer 5 due to strong incident light does not leak into the global charge storage diffusion layer 7 during this period. It also has a function of discharging charges to the semiconductor substrate 1. Thereafter, the line transfer gate electrode 10 is turned on, the signal charge is transferred to the floating diffusion layer 9, the voltage is converted, and read out to the outside of the pixel by the pixel amplifier transistor. The signal charge that has been read out is discharged by turning on the reset gate electrode 12.

  The light incident on the photoelectric conversion film 16 is photoelectrically converted here, but cannot absorb all the light. When a part of this light reaches the global charge storage diffusion layer 7, the rolling shutter noise described above is generated. This light needs to be shielded to 1 / 10,000,000. First, a metal having a high light shielding property is used for the pixel electrode 15. Further, the metal wiring 22 of the pixel circuit used in the lower part is disposed on the global charge storage diffusion layer 7. Since the metal wiring layer of the pixel circuit has a multilayer structure of two or more layers, it is also effective to completely cover the global charge storage diffusion layer 7 in a plan view seen from above. Further, an inter-pixel light shield electrode 21 is also provided under a gap between the pixel electrodes 20 of adjacent pixels. This may also be used as the metal wiring of the pixel circuit. It is also effective to use a salicide electrode for the global transfer gate electrode 6. As the material of the pixel electrode 15, Al, Cu, Ti, TiN, Ag, Au, or the like can be considered. As a material of the inter-pixel light shield electrode 21 and the metal wiring 22, Al, Cu, or the like can be considered. As the photoelectric conversion film, a semiconductor such as a compound semiconductor such as selenium, amorphous silicon or GaAs, or an organic photoconductive film can be considered. In particular, an avalanche multiplication type photoelectric conversion film having a sensitizing function by avalanche multiplication is effective.

  The global charge storage diffusion layer 7 stores signal charges for a long time required for signal readout. It is very important to reduce the dark current in this part. Here, it is effective to apply a negative voltage so that holes are accumulated in the semiconductor interface of the global charge accumulation diffusion layer 7 in the global transfer gate electrode 6 during the signal accumulation period. A broken line in the region of the global charge storage diffusion layer 7 in FIG. 1 shows a state in which holes are accumulated from the surface of the semiconductor substrate 1 by applying the negative voltage. By doing so, the dark current generated at the semiconductor interface is suppressed and the dark current is dramatically reduced. It is also effective to introduce a p-type impurity above the global charge storage diffusion layer 7 so that a hole layer is easily formed at the interface.

  FIG. 2 shows a configuration example of the sensor chip. Here, the unit pixel cells 23-1, 2, 3, and 4 are arranged in a matrix 2 × 2. The description of the same part as in FIG. 1 is omitted. The gate electrodes of the line transfer transistor 24 and the reset transistor 25 correspond to the line transfer gate electrode 10 and the reset gate electrode 12 of FIG. The pixel amplifier transistor 26 is the same as the pixel amplifier transistor 8 of FIG. 1, and is a source follower in combination with a load transistor 38 at one end of the vertical signal line 37 via a selection transistor 27 for selecting pixels in one column. A signal is read out to a column signal processing unit 39 that constitutes a circuit and is provided at the other end of the vertical signal line 37. Here, after performing signal processing such as noise suppression and AD conversion, the column selection unit 41 sequentially reads out to the output unit 42 via the column selection transistor 40-1.

  A line transfer control line 28-1, a reset control line 29-1, and a row selection control line for operating a line transfer transistor 24, a reset transistor 25, and a selection transistor 27 that drive pixels arranged in a two-dimensional matrix for each column. Reference numeral 30-1 is connected to the row selection unit 31.

  The substrate control line 33 and the global transfer control line 34 for operating the semiconductor substrate 1 and the global transfer gate electrode 6 that drive all pixels simultaneously are connected to the global control unit 36. Although the transparent electrode 17 performs DC operation here, it is also possible to perform pulse operation, so the transparent electrode control line 35 is also connected to the global control unit 36. A sensor control unit 43 that controls the entire sensor chip is also mounted.

  The overall operation is shown in the timing chart of FIG. A negative DC voltage is applied to the transparent electrode control line 35. At time t <b> 1, a positive pulse is applied to the substrate control line 33, and all charges in the charge integration diffusion layer 5 are discharged to the semiconductor substrate 1. This is the timing for opening the electronic shutter. At this time, the signal of the previous frame is still read, and the signal charges of the previous frame are still stored in some of the global charge storage diffusion layers 7. After t1, the signal charge photoelectrically converted by the photoelectric conversion film 16 is accumulated in the charge integration diffusion layer 5 as described above. After all of the signals of the previous frame have been read and the global charge storage diffusion layer 7 of all the pixels has become empty, a pulse is applied to the global transfer control line 34 at time t2, and the signal of the charge integration diffusion layer 5 of all the pixels is The charge is transferred to the global charge storage diffusion layer 7. This is the timing for closing the electronic shutter. Between t1 and t2 is a sensitive electronic shutter time. This electronic shutter time is the same for all the pixels, and a global shutter operation is performed. As described above, the low level of the pulse applied to the global transfer gate electrode 6 in order to reduce the dark current in the global charge storage diffusion layer 7 is desirably a negative voltage.

  The subsequent signal readout method is the same as the conventional CMOS sensor readout method. Briefly, a selection pulse is applied to the row selection control line 30-1 of the first row so that only the first row is read out. A reset pulse is applied to the reset control line 29-1 to read out noise in the absence of a signal, and the noise is stored in the column signal processing unit 39 in FIG. A line transfer pulse is applied to the line transfer control line 28-1, the signal charge is read out to the column signal processor 39 through the pixel amplifier transistor 26, and difference processing from the noise that has already been read out is performed. Also, AD conversion may be performed. A pulse is applied to the column selection transistor 40-1 to output a signal of the unit pixel cell 23-1. A pulse is applied to the column selection transistor 40-2 to output a signal of the unit pixel cell 23-2. Similarly, the signals in the first column are read out.

  When the signals of the global charge storage diffusion layer 7 are sequentially read out, the electronic shutter can be opened and signal storage for the next frame can be started. This operation is suitable for moving image shooting. Of course, it can also be applied to still image shooting.

(Second Embodiment)
FIG. 4 shows a second embodiment. The difference from the first embodiment is the structure of the global charge storage unit. Hereinafter, description of the same points will be omitted, and different points will be mainly described.

  In the solid-state imaging device of FIG. 4, a dark current is suppressed by providing a p-type buried diode barrier layer 44 on the global charge storage diffusion layer 7. Therefore, the global transfer gate electrode 6 is not necessary on the global charge storage diffusion layer 7. In the first embodiment, a low voltage of the pulse applied to the global transfer gate electrode 6 is desired to be a negative voltage, but in the second embodiment, this is not necessary. In order to completely transfer charges from the charge integration diffusion layer 5 to the global charge storage diffusion layer 7, the potential of the global charge storage diffusion layer 7 needs to be higher than the potential of the charge integration diffusion layer 5.

  The solid-state imaging device of FIG. 4 includes a contact 14 connected to the pixel electrode 15, a charge integration diffusion layer 5 formed on the semiconductor substrate 1 for accumulating signal charges transferred from the pixel electrode 15 through the contact, A global transfer gate electrode 6 is provided for transferring signal charges from the charge integration diffusion layer 5 to the global charge storage diffusion layer 7 during shutter.

  The global transfer gate electrode 6 is formed between the charge integration diffusion layer 5 and the global charge storage diffusion layer 7. A diode barrier layer 44 having a conductivity type opposite to that of the global charge storage diffusion layer 7 is provided on the semiconductor substrate surface side of the global charge storage diffusion layer 7.

  Further, the solid-state imaging device has a second conductivity type (here, P type) opposite to the first conductivity type, which is formed on the semiconductor substrate surface side of the charge integration diffusion layer 5 of the first conductivity type (here, N type). ) Interface barrier layer 4, and a charge collection diffusion layer 3 of the first conductivity type formed on the surface of the interface barrier layer 4 and connected to the contact electrode 14.

  With this configuration, a dark current generated at the interface of the global charge storage diffusion layer is provided on the semiconductor substrate surface side of the global charge storage diffusion layer by providing a diode barrier layer having a conductivity type opposite to that of the global charge storage diffusion layer. Is suppressed and the dark current can be dramatically reduced. Thereby, rolling shutter noise due to dark current can be reduced.

(Third embodiment)
FIG. 5 shows a third embodiment. In this configuration, the charge collection diffusion layer 3 of the second embodiment is exposed outside the interface barrier layer 4. Hereinafter, description of the same points will be omitted, and different points will be mainly described. The solid-state imaging device of FIG. 5 includes a first conductivity type charge collection diffusion layer 3 connected to a contact, a first conductivity type charge integration diffusion layer 5 that accumulates signal charges transferred from the charge collection diffusion layer 3, and The barrier electrode 45 formed between the charge collection diffusion layer 3 and the charge integration diffusion layer 5 and the surface of the charge integration diffusion layer 5 on the surface of the semiconductor substrate have a conductivity type opposite to that of the charge integration diffusion layer 5. The diode barrier layer 4 is mainly provided.

  As a result, a barrier electrode 45 is provided adjacently, a constant voltage is applied, a channel is formed at the upper surface interface of the P-type well 2 immediately below the barrier electrode 45, and the charges collected in the charge collection diffusion layer 3 flow into the charge integration diffusion layer 5. To do. Secondly, the degree of integration is inferior to that of the embodiment, but it is not necessary to form the charge collection diffusion layer 3 inside the interface barrier layer 4 and the manufacturing process becomes easy.

(Fourth embodiment)
FIG. 6 shows a fourth embodiment. The structure of the global charge storage portion including the global charge storage diffusion layer 7 and the global transfer gate electrode on the global charge storage diffusion layer 7 is the same as in the first embodiment. Hereinafter, description of the same points will be omitted, and different points will be mainly described.

  The solid-state imaging device of FIG. 6 is formed in a region adjacent to the charge collection diffusion layer 3 on the surface of the semiconductor substrate and the charge collection diffusion layer 3 of the first conductivity type connected to the contact, and serves as a signal charge transfer path. A channel diffusion layer 46 and a charge of the first conductivity type that is formed in a region adjacent to the channel diffusion layer 46 on the surface of the semiconductor substrate and accumulates signal charges transferred from the charge collection diffusion layer 3 through the channel diffusion layer 46 The integration diffusion layer 5, the end of the charge collection diffusion layer 3, the channel diffusion layer 46, and the barrier electrode 45 that covers the charge integration diffusion layer 5 are provided.

  The global transfer gate electrode 6 covers the end of the charge integration diffusion layer 5 and the global charge storage diffusion layer 7. A negative voltage is applied to the barrier electrode 45 during the exposure period of the photoelectric conversion film 16.

  In this manner, the barrier electrode 45 is extended on the charge integration diffusion layer 5 in order to suppress the dark current at the interface in the same manner as the interface barrier layer 4 so that a hole accumulation layer is formed at the interface above the charge integration diffusion layer 5. A constant negative voltage is applied to. When a negative voltage is applied, a channel cannot be formed at the upper surface interface of the P-type well 2 between the charge collection diffusion layer 3 and the charge integration diffusion layer 5, so that a channel diffusion layer 46 for channel formation is required.

(Fifth embodiment)
In the above-described embodiment, an example in which a constant voltage is applied to the transparent electrode 17 has been described. However, in the following, a global shutter is realized by driving the transparent electrode 17 in pulses. Hereinafter, description of the same points will be omitted, and different points will be mainly described.

  FIG. 7 shows a potential diagram in the XY direction shown in FIG. The light incident from the outside on the photoelectric conversion film 16 in the light detection state by the transparent electrode 17 to which a negative voltage is applied generates electrons and holes. Holes are absorbed by the transparent electrode. Electrons are collected in the charge collection diffusion layer 3 as signal charges through the pixel electrode 15 and the contact electrode. Since the charge collection diffusion layer 3 is biased to a negative voltage, the charge collection diffusion layer 3 is forward-biased with the interface barrier layer 4, gets over the interface barrier layer 4, reaches the charge integration diffusion layer 5, and is accumulated there.

  When a positive voltage is applied to the transparent electrode 17, electrons flow to the transparent electrode 17 side. Holes flow to the charge collection diffusion layer 3 side, but are reverse-biased with the interface barrier layer, and have no effect on the charge integration diffusion layer side. It can be seen that this has the effect of closing the electronic shutter. It can be seen that even if strong light is incident in this state, no charge flows in the charge integration diffusion layer, so that it also has an overflow drain effect. As described above, by driving the transparent electrode 17 in a pulsed manner, the global charge storage diffusion layer 7 necessary for the function of closing the electronic shutter becomes unnecessary. In addition, an overflow drain structure is not required.

  FIG. 8 shows a fifth embodiment in which the global charge storage diffusion layer 7 and the global transfer gate electrode 6 are omitted from the fourth embodiment of FIG. Alternatively, from another viewpoint, the global charge storage diffusion layer 7 and the charge integration diffusion layer 5 are formed as an integral region, and the global transfer gate electrode 6 and the barrier electrode 45 are formed as an integral electrode.

  Also, since the overflow drain structure is unnecessary, the semiconductor substrate 47 is a P-type substrate, and the P-type well 2 is unnecessary. Further, the overflow path 19 is not necessary. The structure becomes very simple. The charge integration diffusion layer 5 needs to have high light shielding properties like the global charge storage diffusion layer 7. It is also necessary to suppress the dark current to a low level.

  FIG. 9 shows the sensor configuration. Although the global transfer control line 34 connected to the global transfer gate electrode 6 in FIG. 2 is connected to the barrier electrode 45, it does not need to be controlled from the global control unit 36 because a constant voltage is applied. The same applies to the substrate control line 33. On the other hand, as will be described later, the gate electrodes of the line transfer transistor 24 and the reset transistor 25 need to transfer and reset all the pixels at the same time. Therefore, the line transfer control lines 28-1 and 28-2 and the reset control lines 29-1 and 29 -2 is also connected to the global control unit 36. The row selection unit 31 may partially have the same function as the global control unit 36.

  FIG. 10 shows a timing chart. A constant voltage is applied to the global transfer control line 34 connected to the barrier electrode 45. A low level with photosensitivity is applied to the transparent electrode control line 35 to which a high level voltage without photosensitivity has been applied. Next, a pulse is applied to the reset control lines 29-1 and 29-2 of all the columns and the line transfer control lines 28-1 and 28-2 of all the columns to discharge all charges in the charge integration diffusion layer 5 and The state is again set to the low level at time t3. This timing is the time when the electronic shutter is opened. Next, at time t4, the transparent electrode control line 35 is set to a high level without photosensitivity. This timing is the timing when the electronic shutter is closed. There is photosensitivity only between t3 and t4. Thereafter, the signal charges accumulated in the charge integration diffusion layer 5 are sequentially read out. The subsequent steps are the same as those described with reference to FIG.

  This operation differs greatly from the operation of FIG. 3 in that no signal is read while receiving incident light and accumulating signal charges. Although this moving image has no problem for still image shooting, it is slightly disadvantageous for moving image shooting. This is because there is no sensitivity of incident light during the signal reading period. Moving images can be taken by repeating signal accumulation and signal readout. However, compared to a type having a global charge storage diffusion layer, the structure and operation are very simple, and there is an advantage that the cost can be reduced with low power consumption.

(Sixth embodiment)
A sixth embodiment is shown in FIG. The charge integration diffusion layer 5, the interface barrier layer 4, and the overflow drain function are omitted from FIGS. Hereinafter, description of the same points will be omitted, and different points will be mainly described. The solid-state imaging device of FIG. 11 includes a contact 14 connected to the pixel electrode 15 and an interface barrier of a second conductivity type opposite to the first conductivity type, which is formed on the semiconductor substrate surface side of the global charge storage diffusion layer 7. The layer 4 and the charge collection diffusion layer 3 of the first conductivity type formed on the surface of the interface barrier layer 4 and connected to the contact electrode 14 are provided. Also with this configuration, a global shutter can be realized by driving the transparent electrode 17 in a pulsed manner as shown in FIG.

(Seventh embodiment)
A seventh embodiment is shown in FIG. The charge integration diffusion layer 5 and the overflow drain function are omitted from FIG. Hereinafter, description of the same points will be omitted, and different points will be mainly described. 11 includes a contact 14 connected to the pixel electrode 15, a charge collection diffusion layer 3 of the first conductivity type connected to the contact, the charge collection diffusion layer 3, and the global charge storage diffusion layer 7. A barrier electrode 45 formed above and a diode barrier layer 4 having a conductivity type opposite to that of the global charge storage diffusion layer 7 is provided on the semiconductor substrate surface side of the global charge storage diffusion layer 7. Also with this configuration, a global shutter can be realized by driving the transparent electrode 17 in a pulsed manner as shown in FIG.

  FIG. 13 shows a configuration example of an imaging apparatus (camera) using the solid-state imaging apparatus of the present invention. The imaging apparatus 100 in FIG. 1 includes a lens 101, a shutter 102, a solid-state imaging apparatus 103, a DSP (Digital Signal Processor) 104, a display element 105, a memory 106, a control unit 107, and a power supply unit 108. The shutter 102 may not be provided. The solid-state imaging device 103 has been described in any one of the first to seventh embodiments. The light incident through the lens 101 is converted into an electrical signal by the solid-state imaging device 103, subjected to image processing by the DSP 104, and stored in a memory. Conventionally, a shutter control signal is output from the control unit 107 to the mechanical shutter 102, but in this embodiment, a shutter control signal is given to the solid-state imaging device 103 having an electronic shutter function. In addition, the camera is configured by including a display unit 105 and a power supply unit 108.

  As described above, the present invention is suitable for a solid-state imaging device and a camera, and can be applied to, for example, a MOS solid-state imaging device, a digital still camera, a movie camera, a mobile phone with a camera, a surveillance camera, and the like.

DESCRIPTION OF SYMBOLS 1 Semiconductor substrate 2 P-type well 3 Charge collection diffusion layer 4 Interface barrier layer 5 Charge integration diffusion layer 6 Global transfer gate electrode 7 Global charge storage diffusion layer 8 Pixel amplifier transistor 9 Floating diffusion layer 10 Line transfer gate electrode 11 Power supply diffusion layer 12 Reset gate electrode 13 Buffer insulating film 14 Contact electrode 15 Pixel electrode 16 Photoelectric conversion film 17 Transparent electrode 18 STI
19 Overflow path 20 Pixel electrode 21 of adjacent pixel 21 Inter-pixel light shield electrode 22 Metal wiring 23-1,2,3,4 Unit pixel cell 24 Line transfer transistor 25 Reset transistor 26 Pixel amplifier transistor 27 Select transistor 28-1,2 Line transfer control line 29-1,2 Reset control line 30-1,2 Row selection control line 31 Row selection unit 33 Substrate control line 34 Global transfer control line 35 Transparent electrode control line 36 Global control unit 37 Vertical signal line 38 Load transistor 39 column signal processing unit 40-1,2 column selection transistor 41 column selection unit 42 output unit 43 sensor control unit 44 buried diode barrier layer 45 barrier electrode 46 channel diffusion layer 47 semiconductor substrate

Claims (14)

A solid-state imaging device having a plurality of unit pixel cells arranged two-dimensionally and having a global shutter function,
Each of the plurality of unit pixel cells is
A photoelectric conversion film that is formed above the semiconductor substrate and converts incident light into signal charges;
A pixel electrode formed on a surface of the photoelectric conversion film on the semiconductor substrate side;
A global charge storage diffusion layer that is formed on the semiconductor substrate and stores signal charges transferred from the photoelectric conversion film by a global shutter;
The global shutter is to simultaneously transfer signal charges from the photoelectric conversion film in the plurality of unit cells,
The pixel electrode is a solid-state imaging device formed of a light-shielding metal. The solid-state imaging device further includes:
The solid-state imaging device according to claim 1, further comprising a light-shielding metal layer having a width larger than the gap below a gap between adjacent pixel electrodes. The area of the pixel electrode is larger than the global charge storage diffusion layer,
The solid-state imaging device according to claim 1, wherein the pixel electrode covers an upper portion of the global charge storage diffusion layer. The solid-state imaging device further includes:
A contact connected to the pixel electrode;
A charge integration diffusion layer that is formed in the semiconductor substrate and accumulates signal charges transferred from the pixel electrode via the contact;
A global transfer gate electrode for transferring a signal charge at the time of global shutter from the charge integration diffusion layer to the global charge storage diffusion layer;
The global transfer gate electrode covers a region of the global charge storage diffusion layer,
4. The solid-state imaging device according to claim 1, wherein a negative voltage is applied to the global transfer gate electrode 6 in a signal accumulation period in which the signal charge of the global charge accumulation diffusion layer is maintained. The solid-state imaging device according to claim 4, wherein the global transfer gate electrode includes a polysilicon layer and a metal layer formed on the polysilicon layer. The solid-state imaging device further includes:
A contact connected to the pixel electrode;
A charge integration diffusion layer that is formed in the semiconductor substrate and accumulates signal charges transferred from the pixel electrode via the contact;
A global transfer gate electrode for transferring a signal charge from the charge integration diffusion layer to the global charge storage diffusion layer at the time of a global shutter;
The global transfer gate electrode is formed above the charge integration diffusion layer and the global charge storage diffusion layer,
The solid-state imaging device according to claim 1, further comprising a diode barrier layer having a conductivity type opposite to that of the global charge storage diffusion layer on the semiconductor substrate surface side of the global charge storage diffusion layer. The charge integration diffusion layer is of a first conductivity type;
The solid-state imaging device further includes:
An interface barrier layer of a second conductivity type opposite to the first conductivity type formed on the semiconductor substrate surface side of the charge integration diffusion layer;
The solid-state imaging device according to claim 4, further comprising: a first-conductivity-type charge collection / diffusion layer formed on a surface of the interface barrier layer and connected to the contact electrode 14. The solid-state imaging device further includes:
A charge collection diffusion layer of a first conductivity type connected to the contact;
A channel diffusion layer formed in a region adjacent to the charge collection diffusion layer on the surface of the semiconductor substrate and serving as a signal charge transfer path;
A charge integration diffusion layer of a first conductivity type that is formed in a region adjacent to the channel diffusion layer on the surface of the semiconductor substrate and accumulates signal charges transferred from the charge collection diffusion layer through the channel diffusion layer;
An end portion of the charge collection diffusion layer, the channel diffusion layer, and a barrier electrode covering the charge integration diffusion layer; and
The global transfer gate electrode covers an end of the charge integration diffusion layer and the global charge storage diffusion layer,
The solid-state imaging device according to claim 4, wherein a negative voltage is applied to the barrier electrode during an exposure period of the photoelectric conversion film. The global charge storage diffusion layer and the charge integration diffusion layer are formed as an integral region,
The solid-state imaging device according to claim 8, wherein the global transfer gate electrode and the barrier electrode are formed as an integrated electrode. The charge integration diffusion layer is of a first conductivity type;
The solid-state imaging device further includes:
An interface barrier layer of a second conductivity type opposite to the first conductivity type formed on the semiconductor substrate surface side of the charge integration diffusion layer;
The solid-state imaging device according to claim 6, further comprising: a first-conductivity-type charge collection diffusion layer formed on a surface of the interface barrier layer and connected to the contact electrode 14. The solid-state imaging device further includes:
A charge collection diffusion layer of a first conductivity type connected to the contact;
A charge integration diffusion layer of a first conductivity type for accumulating signal charges transferred from the charge collection diffusion layer;
A barrier electrode formed between the charge collection diffusion layer and the charge integration diffusion layer;
The solid-state imaging device according to claim 6, further comprising a diode barrier layer having a conductivity type opposite to the charge integration diffusion layer on the semiconductor substrate surface side of the charge integration diffusion layer. The global charge storage diffusion layer is of a first conductivity type,
The solid-state imaging device further includes:
A contact connected to the pixel electrode;
An interface barrier layer of a second conductivity type opposite to the first conductivity type formed on the semiconductor substrate surface side of the global charge storage diffusion layer;
The solid-state imaging device according to claim 1, further comprising: a first-conductivity-type charge collection / diffusion layer formed on a surface of the interface barrier layer and connected to the contact electrode 14. The solid-state imaging device further includes:
A contact connected to the pixel electrode;
A charge collection diffusion layer of a first conductivity type connected to the contact;
A barrier electrode formed between the charge collection diffusion layer and the global charge storage diffusion layer;
The solid-state imaging device according to claim 1, further comprising a diode barrier layer having a conductivity type opposite to the global charge storage diffusion layer on the semiconductor substrate surface side of the global charge storage diffusion layer.   A camera comprising the solid-state imaging device according to claim 1.

Images