JP2012160798A - Image receiver - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an image receiver capable of avoiding the delay of start of decoding even when a bit rate is low.SOLUTION: An image receiver 4 includes: a buffer memory 11 for temporarily storing a transport stream S1 including multiple transport packets TP to which time stamps 50 are respectively added; a voltage control oscillator (VCO) 18 for generating a reference clock; a time-stamped transport stream (TTS) counter 16 for performing a count operation, based on the reference clock; a TTS gate 12 for controlling the outputs of the respective transport packets TP from the buffer memory 11, based on the values of the time stamps 50 added to the respective transport packets TP and the count value of the TTS counter 16; and an adjustment part 17 for adjusting the frequency of the reference clock, based on the residence time of the transport packets TP input to the buffer memory 11.

Description

  The present invention relates to a video receiving apparatus.

  In a communication protocol using MPEG (Moving Picture Experts Group) 2-TS (Transport Stream), an encoder on the transmission side adds a PCR (Program Clock Reference) for each transport packet at a predetermined interval. The decoder on the receiving side detects the PCR included in the transport packet and regenerates the encoder clock based on the detected PCR. In MPEG2-TS, meaningless transport packets (null packets) are included in the transport stream in order to adjust the communication speed. In the encoder, PCR is added to the transport stream including a null packet.

  In retransmission services such as terrestrial digital broadcasting and BS digital broadcasting, it is desirable to transmit a transport stream after deleting null packets in order to reduce the amount of communication data. In this case, the position of the transport packet including the PCR differs before and after the null packet is deleted. Therefore, also in the transport stream received by the decoder, the position of the transport packet including the PCR is different from the original position (position in the transport stream before the null packet is deleted). Therefore, the decoder cannot accurately reproduce the encoder clock only by the detected PCR.

  Patent Documents 1 and 2 below disclose techniques for converting MPEG2-TS into MPEG2-TTS (Time-stamped Transport Stream) by adding a time stamp to each MPEG2-TS transport packet. Even when the null packet is deleted in the encoder, the decoder can restore the original position of the transport packet including the PCR based on the time stamp. Therefore, the decoder can regenerate the encoder clock based on the PCR included in the transport packet restored to the original position.

  FIG. 8 is a block diagram showing a part of the configuration of a decoder that handles MPEG2-TTS (see, for example, Patent Document 3 below). The TTS decoder 330 operates based on the reference clock generated by the clock generation unit 334, reads the TTS packet from the TTS packet buffer 332 according to the time stamp added to each TTS packet, and sends it to the MPEG decoder 340 as a TS packet. input.

  The TTS decoder 330 has a function of adjusting the frequency of the reference clock as follows. The TTS packet buffer 332 stores a predetermined amount (for example, about half of the capacity of the buffer memory) of TTS packets before starting decoding. The TTS decoder 330 monitors the occupation amount of the TTS packet buffer 332, and raises the frequency of the reference clock when the occupation amount exceeds the specified range. This speeds up the pace at which TTS packets are read from the TTS packet buffer 332. On the other hand, when the occupation amount falls below the specified range, the frequency of the reference clock is lowered. This slows down the pace at which TTS packets are read from the TTS packet buffer 332. Thus, the method of reproducing the clock on the encoder side by monitoring the increase / decrease tendency of the buffer memory is called a buffer memory method. Generally, the clock recovery by the buffer memory system is applied to a system (CBR: Constant Bit Rate) in which the bit rate of the encoder is fixed.

JP 2008-35197 A JP 2008-35198 A JP 2007-104085 A

  However, in the method of changing the bit rate of the encoder (VBR: Variable Bit Rate) according to the situation of video and audio, the buffer memory tends to overflow when the bit rate is high, and the buffer when the bit rate is low. Memory tends to underflow. Therefore, when trying to expand the buffer memory system to VBR, it is necessary to set the prescribed amount of TTS packets stored in the buffer memory before starting decoding to a certain extent depending on the assumed fluctuation range of the bit rate.

  Therefore, when the bit rate is low, it takes a long time to store a prescribed amount of TTS packets in the buffer memory, so that there is a problem that the start of decoding is delayed and accordingly the start of video reproduction is also delayed.

  The present invention has been made to solve such a problem, and an object of the present invention is to obtain a video receiver capable of avoiding a delay in starting decoding even when the bit rate is low. It is.

  The video reception device according to the first aspect of the present invention includes a storage unit that temporarily stores a transport stream including a plurality of packets each having a time stamp added thereto, a clock generation unit that generates a reference clock, Control the output of each packet from the storage unit based on the counter unit that performs a counting operation based on the reference clock, the value of the time stamp added to each packet, and the count value of the counter unit A gate unit; and an adjustment unit that adjusts a frequency of the reference clock based on a residence time of the packet input to the storage unit.

  According to the video receiving apparatus according to the first aspect, the adjustment unit adjusts the frequency of the reference clock based on the residence time of the packet input to the storage unit. That is, when the packet residence time is larger than the target value, the reference clock frequency is increased, and when the packet residence time is smaller than the target value, the reference clock frequency is decreased. Thereby, the reference clock of the encoder in the video transmission device can be reproduced in the video reception device. Moreover, regardless of the bit rate of the encoder, each packet is output from the storage unit at a timing when a predetermined residence time has elapsed after being input to the storage unit. Therefore, it is possible to avoid delaying the start of decoding even when the bit rate is low.

  The video reception device according to the second aspect of the present invention is the video reception device according to the first aspect, in particular, the adjustment unit includes a time stamp value added to a packet input to the storage unit, The dwell time is calculated based on a difference from a time stamp value added to a packet output from the storage unit.

  According to the video reception device of the second aspect, the adjustment unit includes the time stamp value added to the packet input to the storage unit and the time stamp value added to the packet output from the storage unit. Based on the difference from the value, the residence time is calculated. In this way, by calculating the residence time using the time stamp added to each packet, it is not necessary to provide an additional timing means for managing the residence time, so that the configuration and processing are simplified. be able to.

  The video reception device according to the third aspect of the present invention is the video reception device according to the second aspect, in particular, the gate unit after the leading packet included in the transport stream is input to the storage unit. , At the timing when a packet in which a time stamp equal to or greater than a value corresponding to the target residence time is added to the time stamp value added to the first packet is input to the storage unit The output of the head packet from the unit is started.

  According to the video reception device of the third aspect, the gate unit corresponds to the target residence time in the time stamp value added to the first packet after the first packet is input to the storage unit. At the timing when a packet to which a time stamp equal to or greater than the value added is added is input to the storage unit, output of the first packet from the storage unit is started. As a result, since the output of the first packet from the storage unit can be started at the timing when the target residence time has elapsed since the first packet was input to the storage unit, an amount of packets corresponding to the target residence time is stored in the storage unit. If it accumulates, the output can be started.

  The video reception device according to the fourth aspect of the present invention further includes an information addition unit for adding predetermined time information to the packet input to the storage unit, particularly in the video reception device according to the first aspect. The adjustment unit is based on a difference between a value of time information added to the packet input to the storage unit and a value of time information added to the packet output from the storage unit. The residence time is calculated.

  According to the video reception device of the fourth aspect, the adjustment unit includes the value of the time information added to the packet input to the storage unit and the time information added to the packet output from the storage unit. Based on the difference from the value, the residence time is calculated. Therefore, the error can be reduced as compared with the case where the residence time is calculated using a time stamp which is a discrete value, so that the reproduction accuracy of the reference clock can be improved.

  The video reception device according to a fifth aspect of the present invention is the video reception device according to the fourth aspect, in particular, the gate unit after the leading packet included in the transport stream is input to the storage unit. The output of the first packet from the storage unit is started at the timing when the dwell time has elapsed from the time indicated by the time information added to the first packet.

  According to the video reception device of the fifth aspect, the gate unit receives the time indicated by the time information added to the first packet after the first packet included in the transport stream is input to the storage unit. Then, the output of the first packet from the storage unit is started at the timing when the target residence time has elapsed. As a result, since the output of the first packet from the storage unit can be started at the timing when the target residence time has elapsed since the first packet was input to the storage unit, an amount of packets corresponding to the target residence time is stored in the storage unit. If it accumulates, the output can be started.

  The video reception device according to a sixth aspect of the present invention is the video reception device according to any one of the first to fifth aspects, in particular, the adjustment unit is an average of a plurality of residence times obtained within a predetermined period. The frequency of the reference clock is adjusted based on the value.

  According to the video reception device of the sixth aspect, the adjustment unit adjusts the frequency of the reference clock based on the average value of the plurality of residence times obtained within the predetermined period. Therefore, even if the arrival time of the packet from the encoder to the video reception device fluctuates due to the influence of jitter, shaping, etc., and the input timing of the packet to the storage unit fluctuates due to this, the frequency of the reference clock is frequently It is possible to avoid the situation of being changed.

  According to the present invention, it is possible to avoid delaying the start of decoding even when the bit rate is low.

It is a figure which shows the whole structure of a video communication system. It is a block diagram which simplifies and shows the structure of the video receiver which concerns on embodiment of this invention. It is a figure which extracts and shows a part of transport stream which a video receiver receives. It is a figure which shows the structure of a transport packet. It is a timing chart which shows the relationship between the transport stream input into a TTS gate, and the transport stream output from a TTS gate. It is a block diagram which simplifies and shows the structure of the video receiver which concerns on a modification. It is a figure which shows the structure of the transport packet memorize | stored in the buffer memory. It is a block diagram which extracts and shows a part of structure of a decoder.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In addition, the element which attached | subjected the same code | symbol in different drawing shall show the same or corresponding element.

  FIG. 1 is a diagram showing an overall configuration of the video communication system 1. The video transmission device 2 is installed in a transmission station that transmits video, and is a transmission server for providing a terrestrial digital broadcast or BS digital broadcast retransmission service and the like. The video transmission apparatus 2 converts MPEG2-TS into MPEG2-TTS (Time-stamped Transport Stream) by adding a time stamp to each transport packet of MPEG (Moving Picture Experts Group) 2-TS (Transport Stream). To do. The time stamp is a 4-byte count value generated by a counter operation using a 27 MHz clock in the encoder in the video transmission apparatus 2. The video transmission apparatus 2 transmits the MPEG2-TTS transport stream after adding a time stamp, deleting null packets included in the MPEG2-TS transport stream in order to reduce the amount of communication data. To do.

  The video receiver 4 is a set-top box installed at a user's home, for example. The video receiver 4 receives the MPEG2-TTS transport stream transmitted from the video transmitter 2 via a communication network 3 such as an IP (Internet Protocol) network. Then, the television 5 reproduces the video by decoding the received transport stream.

  FIG. 2 is a block diagram showing a simplified configuration of the video reception device 4 according to the embodiment of the present invention. As shown in FIG. 2, the video reception device 4 includes a buffer memory 11, a TTS gate 12, a decoding circuit 13, extraction units 14 and 15, a TTS counter 16, an adjustment unit 17, and a VCO (Voltage Control Oscillator) 18. . The video receiver 4 adjusts the frequency of the reference clock generated by the VCO 18 based on the residence time of the packet input to the buffer memory 11.

  The buffer memory 11 (storage unit) receives the transport stream S1 received by the receiving unit (not shown) from the video transmission device 2, and the buffer memory 11 temporarily stores the transport stream S1.

  The VCO 18 (clock generation unit) generates a 27 MHz reference clock. As will be described later, the frequency of the reference clock generated by the VCO 18 can be adjusted by the adjustment unit 17.

  The TTS counter 16 (counter unit) performs a counting operation based on the reference clock generated by the VCO 18.

  In this example, the TTS gate 12 (gate unit) is connected to the decoding circuit 13 from the buffer memory 11 based on the time stamp value added to each transport packet and the count value of the TTS counter 16. Controls the output of each transport packet.

  The extraction unit 14 extracts a time stamp value added to a transport packet (for example, a transport packet that is about to pass through the entrance to the buffer memory 11) input to the buffer memory 11.

  The extraction unit 15 extracts the value of the time stamp added to the transport packet output from the buffer memory 11 (for example, the transport packet that is about to pass through the TTS gate 12).

  The adjustment unit 17 adjusts the frequency of the reference clock generated by the VCO 18 based on the residence time in the buffer memory 11 of the transport packet input to the buffer memory 11. Details of the adjustment method will be described later.

  FIG. 3 is a diagram illustrating a part of the transport stream S1 received by the video reception device 4. The transport stream S1 includes a plurality of transport packets TP. In FIG. 3, only eight transport packets TP <b> 1 to TP <b> 8 that are consecutive in this order are shown for simplicity of explanation. It is assumed that the first transport packet among the plurality of transport packets TP included in the transport stream S1 is the transport packet TP1.

  FIG. 4 is a diagram illustrating the structure of the transport packet TP. The transport packet TP has a header part and a payload part, and the total data length thereof is 188 bytes. A time stamp 50 having a data length of 4 bytes is added to the transport packet TP.

  Hereinafter, the operation of the video reception device 4 will be described. The video receiver 4 receives the MPEG2-TTS transport stream S 1 transmitted from the video transmitter 2 via the communication network 3. Then, the received transport stream S1 is temporarily stored in the buffer memory 11. Referring to FIG. 2, transport stream S1 is read from buffer memory 11, and is output from TTS gate 12 to decode circuit 13 as transport stream S2.

  FIG. 5 is a timing chart showing the relationship between the transport stream S1 input to the TTS gate 12 and the transport stream S2 output from the TTS gate 12. Regarding the transport stream S1, transport packets TP1 to TP8 are successively read from the buffer memory 11 in this order and input to the TTS gate 12.

  First, the extraction unit 15 extracts the value of the time stamp 50 (time stamp value ST (1)) added to the first transport packet TP1 from the transport stream S1 read from the buffer memory 11. The time stamp value ST (1) is input to the TTS gate 12.

  The TTS counter 16 performs a counting operation based on the reference clock generated by the VCO 18, and the count value output from the TTS counter 16 is input to the TTS gate 12. When the difference between the time stamp value of the transport packet read from the buffer memory 11 and the count value of the TTS counter 16 exceeds a predetermined threshold, the time stamp value of the transport packet is set to the TTS counter 16. Set to As a result, the TTS counter 16 initializes the count value and restarts the count operation.

  In the video reception device 4, a target value (hereinafter referred to as “target residence time”) regarding the residence time of the transport packet TP in the buffer memory 11 is set in advance. The target dwell time is set to the maximum value and minimum value of the assumed bit rate when the storage capacity of the buffer memory 11 and the encoder in the video transmission device 2 adopt the VBR (Variable Bit Rate) method. Accordingly, an appropriate value (for example, 100 to 500 msec) is set.

  The extraction unit 14 extracts the time stamp value added to the transport packet input to the buffer memory 11 and inputs the value to the TTS gate 12.

  The TTS gate 12 receives a time stamp value that is equal to or greater than a value obtained by adding a time stamp value corresponding to the target residence time to the time stamp value ST (1) input from the extraction unit 15. Open the gate at that timing. As a result, output of the transport packet TP1 from the TTS gate 12 toward the decode circuit 13 is started. When the transport packet TP1 completes passing through the TTS gate 12, the gate is closed again. When passing through the TTS gate 12, the time stamp 50 added to the transport packet TP1 is deleted, so that conversion from MPEG2-TTS to MPEG2-TS is performed.

  Next, the extracting unit 15 extracts the value of the time stamp 50 (time stamp value ST (2)) added to the transport packet TP2 following the transport packet TP1, and uses the time stamp value ST (2). Input to the TTS gate 12.

  When a count value equal to the time stamp value ST (2) is input from the TTS counter 16, the TTS gate 12 opens the gate at that timing. As a result, output of the transport packet TP2 from the TTS gate 12 toward the decode circuit 13 is started. Similarly to the above, when the transport packet TP2 completes passing through the TTS gate 12, the gate is closed again. Further, when passing through the TTS gate 12, the time stamp 50 added to the transport packet TP2 is deleted, whereby conversion from MPEG2-TTS to MPEG2-TS is performed.

  The transport stream S2 is input from the TTS gate 12 to the decode circuit 13 by repeating the same operation as described above for the transport packet TP3 and thereafter.

  Referring to FIG. 5, for transport stream S2, for example, transport packet TP2 is input to decode circuit 13 continuously with transport packet TP1. This is due to the fact that the null packet does not exist between the transport packet TP1 and the transport packet TP2 in the encoder in the video transmission device 2. Strictly speaking, an interval of 4 bytes corresponding to the time stamp 50 deleted in the TTS gate 12 exists between the end of the transport packet TP1 and the start of the transport packet TP2. In FIG. 5, the intervals are ignored.

  Further, for example, the transport packet TP3 is input to the decoding circuit 13 with a delay from the transport packet TP2. The delay amount is a time WT1 corresponding to two transport packets TP in comparison between the heads. This is because one null packet that existed between the transport packet TP2 and the transport packet TP3 is deleted in the encoder in the video transmission device 2.

  Further, for example, the transport packet TP6 is input to the decoding circuit 13 with a delay from the transport packet TP5. The delay amount is a time WT2 corresponding to three transport packets TP in comparison between the heads. This is due to the fact that two null packets that existed between the transport packet TP5 and the transport packet TP6 have been deleted in the encoder in the video transmission device 2.

  Next, reference clock adjustment processing by the adjustment unit 17 will be described.

  A time stamp value added to a transport packet input to the buffer memory 11 (hereinafter referred to as “input time stamp value”) is input from the extraction unit 14 to the adjustment unit 17. Further, the time stamp value added to the transport packet output from the buffer memory 11 at the same time (hereinafter referred to as “output time stamp value”) is input to the adjustment unit 17 from the extraction unit 15. .

  The adjustment unit 17 obtains a difference value between the two by subtracting the output time stamp value from the input time stamp value, and the residence time of the transport packet TP in the buffer memory 11 is obtained by converting the difference value into time. calculate. Then, for example, the frequency of the reference clock generated by the VCO 18 is adjusted so that the dwell time becomes equal to (or approaches) the target dwell time. Specifically, the adjustment unit 17 increases the frequency of the reference clock when the calculated residence time is larger than the target residence time, and decreases the frequency of the reference clock when the calculated residence time is smaller than the target residence time.

  Here, in the communication network 11 such as an IP network, the arrival time of the transport packet TP from the video transmission device 2 to the video reception device 4 fluctuates due to the influence of jitter, shaping, etc. The input timing of the transport packet TP may vary. Therefore, the adjustment unit 17 calculates a residence time based on the time stamp value for each transport packet TP output from the TTS gate 12, and calculates a plurality of times obtained within a predetermined period (for example, several minutes to several tens of minutes). It is desirable to adjust the frequency of the reference clock by comparing the average value of the residence time with the target residence time. Similarly to the above, the adjusting unit 17 increases the frequency of the reference clock when the average value of the residence time is larger than the target residence time, and decreases the frequency of the reference clock when the average value of the residence time is smaller than the target residence time. .

<Modification>
FIG. 6 is a block diagram showing a simplified configuration of the video reception device 4 according to a modification of the present embodiment. As shown in the connection relationship of FIG. 6, the video reception device 4 includes a buffer memory 11, a TTS gate 12, a decoding circuit 13, an extraction unit 15, a TTS counter 16, an adjustment unit 17, a VCO 18, and a time information addition unit 21. Configured. Hereinafter, differences from the above embodiment will be described.

  The time information adding unit 21 adds predetermined time information to the transport packet TP input to the buffer memory 11. A clock is provided in the video receiver 4, and the time information adding unit 21 adds the time counted by this clock to the transport packet TP as time information.

  FIG. 7 is a diagram showing the structure of the transport packet TP stored in the buffer memory 11. In addition to the time stamp 50, time information 51 is added to the transport packet TP.

  Referring to FIG. 6, time information adding unit 21 inputs the value of time information 51 (time information value SQ (1)) added to the first transport packet TP1 of transport stream S1 to TTS gate 12. . The TTS gate 12 opens the gate at the timing when the target residence time has elapsed from the time indicated by the time information value SQ (1) input from the time information adding unit 21. As a result, output of the transport packet TP1 from the TTS gate 12 toward the decode circuit 13 is started. When the transport packet TP1 completes passing through the TTS gate 12, the gate is closed again. When passing through the TTS gate 12, the time stamp 50 added to the transport packet TP1 is deleted, so that conversion from MPEG2-TTS to MPEG2-TS is performed.

  The extraction unit 15 extracts the value of the time information 51 added to the transport packet output from the buffer memory 11 and inputs the value to the adjustment unit 17.

  The adjusting unit 17 includes a value of time information 51 added by the time information adding unit 21 to the transport packet input to the buffer memory 11 (that is, a time information value indicating the current time. Hereinafter, “input time information value”). Is input from the time information adding unit 21. Further, the value of time information 51 (hereinafter referred to as “output time information value”) added to the transport packet output from the buffer memory 11 at the same time is input to the adjustment unit 17 from the extraction unit 15. The

  The adjusting unit 17 obtains a difference value between the two by subtracting the output time information value from the input time information value, and calculates the residence time of the transport packet TP in the buffer memory 11 as the difference value. Then, the frequency of the reference clock generated by the VCO 18 is adjusted so that the dwell time becomes equal to (or approaches) the target dwell time. Specifically, the adjustment unit 17 increases the frequency of the reference clock when the calculated residence time is larger than the target residence time, and decreases the frequency of the reference clock when the calculated residence time is smaller than the target residence time.

  Here, in the communication network 11 such as an IP network, the arrival time of the transport packet TP from the video transmission device 2 to the video reception device 4 fluctuates due to the influence of jitter, shaping, etc. The input timing of the transport packet TP may vary. Therefore, the adjustment unit 17 calculates the residence time for each transport packet TP output from the TTS gate 12 based on the time information value, and calculates a plurality of times obtained within a predetermined period (for example, several minutes to several tens of minutes). It is desirable to adjust the frequency of the reference clock by comparing the average value of the residence time with the target residence time. Similarly to the above, the adjusting unit 17 increases the frequency of the reference clock when the average value of the residence time is larger than the target residence time, and decreases the frequency of the reference clock when the average value of the residence time is smaller than the target residence time. .

<Summary of this embodiment>
As described above, according to the video reception device 4 according to the present embodiment, the adjustment unit 17 adjusts the frequency of the reference clock based on the residence time of the transport packet TP input to the buffer memory 11. That is, when the dwell time of the transport packet TP is larger than the target dwell time, the reference clock frequency is increased, and when the dwell time of the transport packet TP is smaller than the target dwell time, the reference clock frequency is lowered. Thereby, the reference clock of the encoder in the video transmission device 2 can be reproduced in the video reception device 4. Moreover, regardless of the bit rate of the encoder, each transport packet TP is output from the buffer memory 11 at a timing when a predetermined residence time has elapsed after being input to the buffer memory 11. Therefore, it is possible to avoid delaying the start of decoding even when the bit rate is low.

  Further, according to the video reception device 4 according to the present embodiment, the adjustment unit 17 outputs the time stamp value added to the transport packet TP input to the buffer memory 11 and the buffer memory 11. The residence time is calculated based on the difference from the time stamp value added to the transport packet TP. As described above, since the residence time is calculated using the time stamp added to each transport packet TP, it is not necessary to provide an additional timing means for managing the residence time, so that the configuration and processing are simplified. Can be achieved.

  Further, according to the video reception device 4 according to the present embodiment, the TTS gate 12 receives the time stamp 50 added to the transport packet TP1 after the first transport packet TP1 is input to the buffer memory 11. The transport packet TP1 output from the buffer memory 11 is output at the timing when the transport packet TP added with a time stamp equal to or greater than the value corresponding to the target residence time is input to the buffer memory 11. Start. Thus, since the output of the transport packet TP1 from the buffer memory 11 can be started at the timing when the target residence time has elapsed since the transport packet TP1 was input to the buffer memory 11, an amount of transformer corresponding to the target residence time can be started. When the port packet accumulates in the buffer memory 11, the output can be started.

  Further, according to the video reception device 4 according to the modification of the present embodiment, the adjustment unit 17 determines the time information value to be added to the transport packet TP input to the buffer memory 11 and the buffer memory 11. The residence time is calculated based on the difference from the time information value added to the transport packet TP to be output. Therefore, the error can be reduced as compared with the case where the residence time is calculated using a time stamp which is a discrete value, so that the reproduction accuracy of the reference clock can be improved.

  In addition, according to the video reception device 4 according to the modification of the present embodiment, the TTS gate 12 receives the time added to the transport packet TP1 after the first transport packet TP1 is input to the buffer memory 11. The output of the transport packet TP1 from the buffer memory 11 is started at the timing when the target residence time has elapsed from the time indicated by the information 51. Thus, since the output of the transport packet TP1 from the buffer memory 11 can be started at the timing when the target residence time has elapsed since the transport packet TP1 was input to the buffer memory 11, an amount of transformer corresponding to the target residence time can be started. When the port packet accumulates in the buffer memory 11, the output can be started.

  Further, according to the video reception device 4 according to the present embodiment and the modification thereof, the adjustment unit 17 adjusts the frequency of the reference clock based on the average value of the plurality of residence times obtained within a predetermined period. Accordingly, the arrival time of the transport packet TP from the video transmission device 2 to the video reception device 4 fluctuates due to the influence of jitter, shaping, etc., and the input timing of the transport packet TP to the buffer memory 11 varies accordingly. Even so, it is possible to avoid a situation in which the frequency of the reference clock is frequently changed.

  The embodiment disclosed this time should be considered as illustrative in all points and not restrictive. The scope of the present invention is defined not by the above-mentioned meaning but by the scope of claims for patent, and is intended to include all modifications within the scope and meaning equivalent to the scope of claims for patent.

4 Video receiver 11 Buffer memory 12 TTS gate 13 Decode circuit 14, 15 Extraction unit 16 TTS counter 17 Adjustment unit 18 VCO
21 Time information addition part

Claims (6)

A storage unit for temporarily storing a transport stream including a plurality of packets each having a time stamp added thereto;
A clock generator for generating a reference clock;
A counter unit that performs a counting operation based on the reference clock;
A gate unit for controlling the output of each packet from the storage unit based on the value of the time stamp added to each packet and the count value of the counter unit;
An adjustment unit that adjusts the frequency of the reference clock based on the residence time of the packet input to the storage unit;
A video receiving device.   The adjustment unit is configured to perform the stay based on a difference between a time stamp value added to the packet input to the storage unit and a time stamp value added to the packet output from the storage unit. The video receiving device according to claim 1, wherein time is calculated.   After the first packet included in the transport stream is input to the storage unit, the gate unit adds a value corresponding to the target residence time to the time stamp value added to the first packet. The video reception device according to claim 2, wherein output of the first packet from the storage unit is started at a timing when a packet to which a time stamp greater than a value is added is input to the storage unit. An information adding unit for adding predetermined time information to the packet input to the storage unit;
The adjustment unit is configured to perform the stay based on a difference between a value of time information added to the packet input to the storage unit and a value of time information added to the packet output from the storage unit. The video receiving device according to claim 1, wherein time is calculated.   The gate unit is a timing at which the target residence time has elapsed from the time indicated by the time information added to the leading packet after the leading packet included in the transport stream is input to the storage unit. The video reception device according to claim 4, wherein output of the head packet from the storage unit is started.   The video receiver according to claim 1, wherein the adjustment unit adjusts the frequency of the reference clock based on an average value of a plurality of residence times obtained within a predetermined period.

Images