JP2012143071A - Power supply and electronic apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce a penetration current that occurs at the start of a resonance type power supply.SOLUTION: A control circuit 7 generates a drive signal which alternately drives a high-side FET 8 and a low-side FET 9, with an output voltage on the secondary side of a transformer 11 used as a feedback. A comparator 6 compares a both-end voltage of a current resonance capacitor 14 with a reference voltage. The control circuit 7 especially generates a drive signal corresponding to the comparison result of the comparator 6 during the period from when the power supply starts operation up to when a series resonant circuit transitions to a normal state. Meanwhile during the period after the series resonant circuit has transitioned to the normal state, the control circuit 7 generates a drive signal corresponding to the output voltage on the secondary side, with no use of the comparison result of the comparator 6. The reference voltage should be, for example, a half of the power source voltage that is supplied from a DC power supply.

Description

  The present invention relates to a power supply device, and more particularly to a circuit that reduces a through current that flows when the power supply device is started.

  The resonance type switching power supply device is excellent in power conversion efficiency, and has features such as low noise due to the waveform of the switching operation being a sine wave and a small number of components. In particular, in a current resonance type converter, a half bridge method is often adopted. In this half-bridge system, a switching circuit in which two switching elements are connected in series is connected in parallel to a DC input voltage.

  However, in the switching power supply device, since the resonance circuit does not operate stably immediately after the operation starts, a through current that flows through one switching element and the body diode of the other switching element is generated. The through current may damage the switching element. The body diode is a diode provided between the gate and the source in order to prevent electrostatic breakdown, and is sometimes called a parasitic diode or a built-in diode.

  Therefore, in Patent Document 1, in order to solve this problem, the current flowing through the body diode is detected by the current state detection circuit, and the two switching elements are switched on / off while the current flows through the body diode. It has been proposed not to do so.

JP 2005-051918 A

  However, in the invention described in Patent Document 1, switching from one switching element to the other switching element is performed as soon as no current flows through the body diode. At the timing immediately after no current flows through the body diode, the current flowing through the capacitor and the leakage inductance is small. For this reason, switching the switching element on and off at this timing requires a lot of time to charge and discharge the switching element output capacitance and the voltage resonance capacitor connected in parallel to the switching element. That is, it is necessary to ensure a long standby time (dead time) from when one switching element is switched off to when the other switching element is switched on.

  In view of the above, an object of the present invention is to reduce a through current generated when a resonance type power supply device is started.

  A power supply device of the present invention is a circuit connected in parallel to a DC power supply, and includes a circuit in which a first switching element and a second switching element are connected in series, a series resonant circuit, a rectifying / smoothing circuit, and a drive A signal generation circuit and a comparison circuit are provided. The series resonant circuit is a circuit that is connected in parallel to the second switching element and is formed by a primary winding of the transformer and a resonant capacitor. The rectifying and smoothing circuit is a circuit that rectifies and smoothes a voltage generated in the secondary winding of the transformer during a period in which the first switching element or the second switching element is turned on. The drive signal generation circuit is a circuit that generates a drive signal for alternately driving the first switching element and the second switching element by feeding back the output voltage of the rectifying and smoothing circuit. The comparison circuit compares the voltage across the resonance capacitor with a predetermined reference voltage. In particular, the drive signal generation circuit generates a drive signal corresponding to the comparison result of the comparison circuit during a period from when the power supply device starts operating until the series resonance circuit shifts to a steady state. On the other hand, the drive signal generation circuit generates a drive signal corresponding to the output voltage of the rectifying / smoothing circuit without using the comparison result of the comparison circuit during the period after the series resonance circuit shifts to the steady state. The reference voltage is, for example, a voltage having a half of the power supply voltage supplied from the DC power supply.

  According to the present invention, the drive signal generation circuit generates a drive signal corresponding to the comparison result of the comparison circuit during a period from when the power supply device starts operating until the series resonance circuit shifts to a steady state. Thereby, the through current generated when the power supply device is activated can be reduced. Further, if a voltage having a half of the power supply voltage is set as the reference voltage, the dead time at the time of switching switching can be set short, so that controllability is improved. For example, in the power supply device of the present invention, since the followability to the switching frequency is improved, it is easy to increase the switching frequency.

The circuit diagram explaining the 1st example. FIG. 3 is a timing chart for explaining the first embodiment. The circuit diagram explaining the 2nd example. The timing diagram explaining the 2nd example. The circuit diagram explaining a comparative example. The block diagram explaining a comparative example. The timing diagram explaining a comparative example.

[Example 1]
Embodiments of the invention will be described. FIG. 1A shows a current resonance type power supply device adopting a half-bridge method. In FIG. 1A, an AC voltage supplied from a commercial AC power source 1 is rectified by a full-wave rectifier circuit 2 and output to a smoothing capacitor 3. The smoothing capacitor 3 smoothes the full-wave rectified voltage, whereby a DC voltage Vdc is obtained. Here, the commercial AC power source 1, the full-wave rectifier circuit 2, and the smoothing capacitor 3 constitute a DC power source.

  Resistors 4 and 5 are connected in series to both ends of the smoothing capacitor 3. The resistors 4 and 5 form a voltage dividing circuit that divides the DC voltage Vdc in accordance with the resistance ratio. Here, since the resistance values of the resistors 4 and 5 are the same, a voltage of Vdc × 0.5 is generated at the connection point A of the resistors 4 and 5. The output of the dividing circuit, 0.5 Vdc, is input to the comparator 6. As described above, the resistors 4 and 5 function as a voltage dividing circuit that divides the power supply voltage supplied from the DC power supply and outputs a voltage having a size that is ½ of the power supply voltage Vdc of the DC power supply as a reference voltage.

  The control circuit 7 variably controls the frequency of drive signals for driving the high-side FET 8 and the low-side FET 9 that are switching elements in accordance with the signals input from the comparator 6 and the photocoupler 21. A drive signal input to the drive terminal (gate) of the high-side FET 8 is referred to as VQ1. A drive signal input to the drive terminal (gate) of the low-side FET 9 is referred to as VQ2. As shown in FIG. 1A, the high-side FET 8 and the low-side FET 9 are connected in a half-bridge form. That is, a circuit is formed in which a high-side FET 8 that is a first switching element and a low-side FET 9 that is a second switching element are connected in series, and this circuit is connected in parallel to a DC power supply. . One end of the voltage resonance capacitor 10 is connected to the drain of the low-side FET 9 and the other end is connected to the source.

  In FIG. 1A, a transformer 11 is an insulating transformer in which a primary side and a secondary side are insulated. Here, the transformer 11 is shown by an equivalent circuit of an excitation inductance 12 and a leakage inductance 13. The current resonance capacitor 14 forms a series resonance circuit with the leakage inductance 13 that is the primary winding of the transformer. This series resonant circuit is connected in parallel to the low-side FET 9 that is the second switching element.

  The diodes 15 </ b> A and 15 </ b> B are diodes that constitute a rectifier circuit that rectifies the voltage generated in the secondary winding of the transformer 11. The capacitor 16 is a capacitor as a smoothing circuit for smoothing the voltage rectified by the diodes 15A and 15B. As described above, the diodes 15A and 15B and the capacitor 16 are rectifying and smoothing circuits that rectify and smooth the voltage generated in the secondary winding of the transformer 11 during the period when the first switching element or the second switching element is turned on. Is functioning as A load resistor 17 indicates a load connected to the power supply device of the present invention.

  The shunt regulator 19 includes a voltage source that generates a reference voltage, a comparator, and a transistor. The shunt regulator 19 compares the internal reference voltage with the voltage generated on the secondary side of the transformer 11 and outputs a current (error signal) corresponding to the difference between the two. Here, the output voltage Vout of the rectifying and smoothing circuit is adopted as the voltage generated on the secondary side. The photocoupler 21 constitutes a circuit that transmits the error signal output from the shunt regulator 19 to the control circuit 7 provided on the primary side of the transformer 11. Thus, the output voltage Vout of the rectifying / smoothing circuit is converted into an error signal and fed back to the control circuit 7. A limiting resistor 20 for limiting the current flowing through the light emitting element is provided on the light emitting element side of the photocoupler 21.

  FIG. 1B shows a block diagram of the control circuit 7. The control circuit 7 is an example of a drive signal generation circuit that generates a drive signal for alternately driving the first switching element and the second switching element using the output voltage of the rectifying and smoothing circuit as feedback. The control circuit 7 outputs a drive signal so that the first switching element and the second switching element are alternately turned on. That is, when the high side FET 8 is on, the low side FET 9 is always off. When the low side FET 9 is on, the high side FET 8 is always off. However, in this embodiment, a dead time during which both FETs are turned off is secured.

  In FIG. 1B, the comparator 6 functions as a comparison circuit that compares the voltage across the resonant capacitor with a predetermined reference voltage. The comparator 6 compares the voltage value 0.5 Vdc input from the connection point A with the voltage value Vcr of the current resonance capacitor 14 and outputs the comparison result to the counter 27 and the mode SW 28. The counter 27 functions as a counting circuit that counts the number of times the output of the comparator 6 is switched (the number of times that the voltage value Vcr matches 0.5 Vdc). The count value of the counter 27 is input to the count comparator 30. The count comparator 30 compares the set value preset and held in the set value holding unit 29 with the count value input from the counter 27, and outputs the comparison result to the mode SW. The set value is a value corresponding to the length of the period from when the power supply device starts operating until the series resonant circuit transitions to a steady state. During this period, the output of the comparator 6 changes by the same number as the set value. That is, the set value is the number of times determined by obtaining the number of times that the voltage value Vcr matches 0.5 Vdc in this period by experiment or simulation. When the number of times that the voltage value Vcr matches 0.5 Vdc becomes the set value, the control circuit 7 can recognize that the series resonant circuit has shifted to the steady state.

  The mode SW28 is turned on while the comparison result of the count comparator 30 indicates that the two inputs do not match. That is, the mode SW 28 outputs a signal indicating the comparison result of the comparator 26 to the gate driver 31 through. The mode SW28 is turned off when the comparison result in the count comparator 30 indicates that the two inputs match. That is, the mode SW 28 disconnects the connection between the comparator 6 and the gate driver 31. The gate driver 31 outputs drive signals to the gates of the high-side FET 8 and the low-side FET 9. When there is an input signal from the mode SW 28, the gate driver 31 outputs a drive signal corresponding to the input signal from the mode SW 28 to the high-side FET 8 and the low-side FET 9. When there is no input signal from the mode SW 28, the gate driver 31 outputs a drive signal corresponding to the input signal of the oscillator 32. The gate driver 31 refers to the initial pulse setting time set in the initial pulse setting holding unit 33 only for the first time when the power supply device is activated, and outputs a drive signal corresponding to the initial pulse setting time to the high-side FET 8. When the driving of the initial pulse is completed, the mode SW 28 is turned on, and the output of the comparator 6 is connected to the gate driver 31.

  The operation of the power supply apparatus according to this embodiment will be described with reference to FIG. In particular, the control circuit 7 according to the first embodiment generates a drive signal corresponding to the comparison result of the comparison circuit during a period from when the power supply device starts operating until the series resonance circuit shifts to a steady state. On the other hand, during a period after the series resonant circuit shifts to a steady state, the control circuit 7 generates a drive signal corresponding to the output voltage of the rectifying / smoothing circuit without using the comparison result of the comparison circuit.

  At time H, the power supply device is activated. Note that the low side FET 9 may be turned on for the purpose of resetting the resonance circuit before turning on the high side FET 8 at time H. In that case, the control of this embodiment can be applied after the low-side FET 9 is turned off. After time H, the control circuit 7 maintains the output state of the gate driver 31 over the initial pulse set value time. At this time, the current path is high-side FET 8 → transformer 11 → current resonant capacitor 14. The voltage of the current resonance capacitor 14 gradually increases. The control circuit 7 measures the elapsed time from the time H using a counter or a timer.

  This is a period from time H to time N until the series resonance circuit shifts to a steady state after the power supply device starts operating. Therefore, in the first embodiment, the control circuit 7 is driven to alternately turn on the first switching element and the second switching element at every timing when the voltage Vcr across the current resonance capacitor 14 matches the reference voltage. Generate a signal. That is, the timing at which the voltage Vcr at both ends coincides with the reference voltage is the switching timing between the high-side FET 8 and the low-side FET 9.

  At time I, the control circuit 7 switches off the high-side FET 8. When the elapsed time from time I reaches a predetermined dead time, the control circuit 7 switches the low-side FET 9 on. The length of the period from time H to time I is an arbitrary time shorter than the resonance period of the resonance circuit formed by the leakage inductance 13 and the current resonance capacitor 14. Further, the control circuit 7 switches on the mode SW 28 at time I. As a result, the gate driver 31 outputs a drive signal according to the output of the comparator 6. At the timing when the voltage value Vcr of the current resonance capacitor 14 exceeds 0.5 of Vdc, the gate driver 31 switches off the high-side FET 8 and switches on the low-side FET 9. Further, the gate driver 31 switches the high side FET 8 on and switches the low side FET 9 off at the timing when the voltage value Vcr of the current resonance capacitor 14 falls below 0.5 of Vdc.

  During the period from time I to time J, the resonance current Ires changes between two states. First, the voltage Vcr of the current resonance capacitor 14 continues to rise as a current flows through the transformer 11 → the current resonance capacitor 14 → the low-side FET 9. When the energy stored in the transformer 11 is released, the direction of the resonance current Ires is reversed, a current flows through the current resonance capacitor 14 → the transformer 11 → the high side FET 8, and the voltage Vcr of the current resonance capacitor 14 gradually decreases. .

  When the voltage Vcr of the current resonance capacitor 14 falls below 0.5 of the voltage Vdc at time J, the output signal of the comparator 6 is switched. In response to switching of the output signal of the comparator 6, the gate driver 31 switches the low-side FET 9 off. Further, the gate driver 31 switches on the high-side FET 8 at the timing when the dead time has elapsed from time J.

  Here, the fact that the voltage Vcr of the current resonance capacitor 14 once exceeds 0.5 of Vdc and again coincides with 0.5 of Vdc means that the direction of the resonance current Ires changes so that the current resonance capacitor 14 is discharged. Means that. That is, the resonance current Ires flows in the direction of the current resonance capacitor 14 → the transformer 11 → the low side FET 9. Therefore, when the low-side FET 9 is switched off at time J and the dead time elapses, the resonance current Ires flows through the path of the current resonance capacitor 14 → the transformer 11 → the body diode of the high-side FET 8. In this state, by switching on the high-side FET 8, ZVS (zero voltage switching) can be achieved without the occurrence of a through current.

  After time J, the resonance current Ires flows from the current resonance capacitor 14 → the transformer 11 → the high-side FET 8, so that the voltage Vcr of the current resonance capacitor 14 continues to decrease. When the energy stored in the transformer 11 is released, the direction of the resonance current Ires is reversed, the high-side FET 8 → the transformer 11 → the current resonance capacitor 14 and the resonance current Ires flow, and the voltage Vcr of the current resonance capacitor 14 increases. .

  When the voltage Vcr of the current resonance capacitor 14 exceeds 0.5 of the voltage Vdc at time K, the output signal of the comparator 6 is switched. In response to the switching of the output signal of the comparator 6, the gate driver 31 switches the high-side FET 8 off. Further, when the dead time elapses from time K, the gate driver 31 switches the low-side FET 9 on. Thereafter, the control circuit 7 repeats the same control until time N.

  At time N, the series resonant circuit shifts to a steady state. Therefore, after time N, the control circuit 7 switches the switching element at a frequency at which the oscillator 32 oscillates according to the error signal from the secondary side of the transformer 11 input via the photocoupler 21. After time N, the switching frequency, which is the reciprocal of the cycle for switching on / off of the high-side FET 8 and off / on of the low-side FET 9, is higher than the resonance frequency of the series resonance circuit.

  Time N is a timing at which the switching number of switching elements based on the output signal of the comparator 6 counted by the counter 27 coincides with the set value held in the set value holding unit 29. The count comparator 30 functions as a determination circuit that determines whether the series resonant circuit has shifted to a steady state based on whether the number of times counted by the counting circuit has reached a predetermined set value.

  When the number of switching times of the switching element coincides with the set value, the output signal of the count comparator 30 is switched, and the mode SW 28 is switched off. Therefore, the input signal to the gate driver 31 is only the input signal from the oscillator 32, and the gate driver 31 switches the drive signal according to the frequency at which the oscillator 32 oscillates. The oscillator 32 is an example of an oscillation circuit that oscillates at a frequency corresponding to the output voltage of the rectifying and smoothing circuit. As described above, the control circuit 7 outputs a drive signal corresponding to the signal output from the oscillator 32 during the period after the series resonant circuit shifts to the steady state.

  The control circuit 7 according to the first embodiment generates a drive signal corresponding to the comparison result of the comparison circuit during a period from when the power supply device starts operating until the series resonance circuit shifts to a steady state. On the other hand, during a period after the series resonant circuit shifts to a steady state, the control circuit 7 generates a drive signal corresponding to the output voltage of the rectifying / smoothing circuit without using the comparison result of the comparison circuit. Thereby, in Example 1, it becomes possible to suppress the through current flowing in the half-bridge type switching element and the diode generated at the time of starting the power supply device. Therefore, stress on the switching element can be alleviated, and as a result, the reliability of the power supply device can be improved. Furthermore, switching is performed when a relatively large amount of resonance current Ires flows by controlling the voltage based on a voltage of 0.5 of Vdc. Therefore, the charge / discharge time of the voltage resonant capacitor 10 can be shortened. As a result, the dead time can be set short.

  The frequency of the signal output from the oscillator 32 corresponds to the switching frequency between the high-side FET 8 and the low-side FET 9. The switching frequency after the resonance circuit has shifted to a stable state (steady state) is preferably a frequency higher than the resonance frequency of the resonance circuit constituted by the leakage inductance 13 of the transformer 11 and the current resonance capacitor 14 by experiment. I know that.

[Example 2]
The second embodiment is a modification of the first embodiment, and the internal configuration of the control circuit 7 and the peripheral circuit configuration thereof are different. For this reason, the same reference numerals are assigned to portions that have already been described with respect to the first embodiment to simplify the description.

  3A and 3B, the control circuit 7 includes a functional unit that can be configured by a CPU or a DSP. The resistor 23 is a resistor inserted into the series resonance circuit and functions as a resistor that converts a current flowing through the series resonance circuit into a voltage. That is, the resistor 23 is a resistor that detects the resonance current Ires that flows through the resonance circuit. The current value of the resonance current flowing through the resonance circuit is converted into a voltage by the resistor 23, and the voltage value is integrated by the integrator 24. The integrated value output from the integrator 24 is input to one terminal of the comparator 26. The other terminal of the comparator 26 receives a divided voltage value obtained by dividing the DC input voltage Vdc by a voltage dividing circuit. The comparator 26 compares the integrated value input from the integrator 24 with the divided voltage value, and outputs the comparison result to the counter 27 and the mode SW 28. In this way, the comparator 26 functions as a comparison circuit that compares the reference voltage with the voltage detected by the resistor 23 as the voltage across the current resonance capacitor 14. Since the resistors 4 and 5 forming the voltage dividing circuit have the same resistance value, the divided voltage value is 0.5 · Vdc.

  The counter 27 counts the number of switching of the output value of the comparator 26. The count value of the counter 27 is input to one input terminal of the count comparator 30. The set value held in the set value holding unit 29 is input to the other terminal of the count comparator 30. The count comparator 30 compares the count value with the set value and outputs the comparison result to the mode SW28. The mode SW 28 switches whether to pass the comparison result of the comparator 26 to the gate driver 31 according to the comparison result of the count comparator 30. For example, the mode SW 28 is turned on until the count value matches the set value, and the output result of the comparator 26 is passed to the gate driver 31. When the comparison result in the count comparator 30 becomes a value indicating that the count value matches the set value, the mode SW 28 is turned off and the connection between the comparator 26 and the gate driver 31 is disconnected. That is, the output value of the comparator 26 is not output to the gate driver 31. As described above, the gate driver 31 outputs drive signals to the gates of the high-side FET 8 and the low-side FET 9. The gate driver 31 receives signals from the mode SW 28 and the oscillator 32, but gives priority to the input signals from the mode SW 28. When a signal is input from the mode SW 28, the gate driver 31 switches on / off of the high side FET 8 and off / on of the low side FET 9 based on this signal. When the signal from the mode SW 28 is not input, the gate driver 31 switches on / off of the high-side FET 8 and off / on of the low-side FET 9 according to the input signal from the oscillator 32.

(Description of operation)
FIG. 4 shows the circuit operation in the second embodiment over time. At time O, the power supply device starts operating. The control circuit 7 drives the high side FET 8 through the gate driver 31. The comparator 26 starts comparison between the output of the integrator 24 and 0.5Vdc which is a divided voltage value. When the high side FET 8 is turned on, the resonance current Ires flows through the path of the high side FET 8 → the transformer 11 → the current resonance capacitor 14. At time P, the integrated value of the resonance current Ires matches 0.5 Vdc. As a result, the output of the comparator 26 is inverted from low to high. The inverted output value of the comparator 26 is input to the gate driver 31 via the mode SW28. The gate driver 31 switches the high-side FET 8 off by outputting a drive signal corresponding to the signal input from the comparator 26. When the dead time elapses from time P, the gate driver 31 outputs a drive signal so that the low-side FET 9 is switched on. The output of the comparator 26 is also input to the counter 27, and the count value of the counter 27 advances from 0 to 1.

  In the period from time P to time Q, the resonance current Ires is inverted. The resonance current Ires flows through the path of the current resonance capacitor 14 → the transformer 11 → the low-side FET 9. Therefore, the integral value of the integrator 24 gradually decreases.

  At time Q, in the comparator 26, the integrated value of the resonance current Ires and the divided voltage value of 0.5 Vdc coincide with each other. As a result, the output of the comparator 26 is inverted from high to low. The inverted output of the comparator 26 is input to the gate driver 31 via the mode SW28. The gate driver 31 switches the low-side FET 9 off by outputting a drive signal corresponding to the signal of the comparator 26. Further, when the dead time elapses from time Q, the gate driver 31 outputs a drive signal to the gate of the high side FET 8 so that the high side FET 8 is turned on. Since the output of the comparator 26 is also input to the counter 27, the count value of the counter 27 advances from 1 to 2.

  In the period from time Q to time R, the resonance current Ires is inverted. Therefore, the resonance current Ires flows through the path of the high side FET 8 → the transformer 11 → the current resonance capacitor. Therefore, the integrated value of the integrator 24 gradually increases. At time R, since the integral value of the integrator 24 again matches the divided voltage value, the output of the comparator 26 is inverted from low to high. The output of the comparator 26 is input to the gate driver 31 via the mode SW28. The gate driver 31 outputs a drive signal corresponding to the signal from the comparator 26 to the high side FET 8 to switch the high side FET 8 off. When the dead time elapses from time R, the gate driver 31 outputs a drive signal so that the low-side FET 9 is switched on. The output of the comparator 26 is also input to the counter 27, and the count value of the counter 27 advances from 2 to 3.

  Thereafter, until the count value of the counter 27 coincides with the set value (for example, 5) at time S, the gate driver 31 outputs the drive signal corresponding to the output of the comparator 26 to the high-side FET 8 and the low-side FET 9. To do.

  When the count value of the counter 27 matches the set value at time S, the count comparator 30 switches the mode SW 28 from on to off by switching the output from low to high. From time O to time S is a period in which the operation of the resonance circuit is unstable. Therefore, from time O to time S, the gate driver 31 switches between the high-side FET 8 and the low-side FET 9 based on the comparison result between the resonance current Ires flowing through the resonance circuit and the divided value that is half of the input voltage.

  When the mode SW 28 is turned off, only the signal from the oscillator 32 is input to the gate driver 31. After time S, the gate driver 31 drives the high-side FET 8 and the low-side FET 9 so that the high-side FET 8 and the low-side FET 9 are alternately turned on and off according to the output signal of the oscillator 32. The period after time S is a period during which the resonant circuit operates stably. Therefore, in the period after time S, the high-side FET 8 and the low-side FET 9 are switched according to the signal from the oscillator 32 that operates by feedback of the voltage on the output side of the transformer 11.

  In the second embodiment, the switching of the two switching elements is controlled based on the voltage of the current resonance capacitor 14 being ½ of Vdc. When the voltage of the current resonance capacitor 14 is ½ of Vdc, the resonance current Ires flows through the body diode of the switching element to be turned on. Therefore, the through current flowing through one of the two switching elements connected in a half-bridge form at the start of the operation of the power supply device and the body diode of the other switching element is suppressed. Furthermore, the charging / discharging time of the voltage resonant capacitor 10 can be shortened by using a voltage that is 1/2 of the DC input voltage Vdc as a reference. Therefore, the dead time can be set short.

[Comparative example]
A circuit diagram of a resonance type switching power supply device as a comparative example is shown in FIG. The same reference numerals are assigned to portions common to the first embodiment and the second embodiment, and description thereof is omitted. When FIG. 1 is compared with FIG. 5A, the operation of the peripheral circuit of the control circuit 7 is different. As soon as the switching power supply device is activated, the control circuit 7 performs switching control according to the error signal of the output voltage Vout with respect to the reference voltage fed back by the shunt regulator 19 and the photocoupler 21. That is, the control circuit 7 changes the oscillation frequency of an oscillator (not shown) that can be incorporated in the control circuit 7 in proportion to the amount of current flowing through the phototransistor that is the light receiving element of the photocoupler 21. As the oscillation frequency changes, the switching frequency between the high-side FET 8 and the low-side FET 9 also changes, and the amount of energy transmitted from the primary side to the secondary side of the transformer 11 also changes. As a result, the level of the output voltage Vout on the secondary side is variably controlled. The switching frequency is the reciprocal of the period in which the high-side FET 8 and the low-side FET 9 are turned on alternately.

  FIG. 5B shows a portion constituting the primary side resonance circuit in the power supply circuit shown in FIG. 5A. In FIG. 5B, the body diode D1 is a body diode for the high-side FET 8, and the body diode D2 is a body diode for the low-side FET 9.

<Stable operation state>
FIG. 6 shows operation waveforms of the resonance circuit shown in FIG. 5B. The resonance current Ires is a current flowing through the resonance circuit. The drive signal VQ1 is a signal input to the gate in order to drive the high side FET 8. The drive signal VQ2 is a signal input to the gate for driving the low-side FET 9. The current IQ1 is a current that flows through the high-side FET 8. The current IQ2 is a current that flows through the low-side FET 9. The voltage Vcr indicates the voltage across the current resonance capacitor 14.

  First, the period A is a period in which the high-side FET 8 is turned on and the low-side FET 9 is turned off. The resonance current Ires flows through the path of the high-side FET 8 → the leakage inductance 13 → the current resonance capacitor 14. Therefore, energy is stored in the current resonance capacitor 14 via the excitation inductance 12 and the leakage inductance 13 of the primary winding of the transformer 11, and the voltage Vcr of the current resonance capacitor 14 increases.

  The period B is a dead time when both the high-side FET 8 and the low-side FET 9 are turned off. In the period B, the current flows through the path of the body diode D 2 → the leakage inductance 13 → the current resonance capacitor 14 of the low-side FET 9. ZVS is realized by turning on the low-side FET 9 while a current is flowing through the body diode D2.

  The period C is a period in which the high side FET 8 is turned off and the low side FET 9 is turned on. In period C, when the current resonance capacitor 14 continues to be charged and the leakage inductance 13 has finished releasing the energy, the direction of the resonance current changes. That is, a current flows through the path of the current resonance capacitor 14 → the leakage inductance 13 → the low-side FET 9. At this time, the voltage of the current resonance capacitor 14 decreases.

  The period D is a dead time when both the high-side FET 8 and the low-side FET 9 are turned off. In the period D, the current flows through the path of the current resonant capacitor 14 → leakage inductance 13 → D 1. ZVS is realized by turning on the high-side FET 8 in a state where a current flows through the body diode D1.

  As described above, in the steady state where the operation of the power supply circuit is stable, the switching inductances of the high-side FET 8 and the low-side FET 9 are variably controlled while the leakage inductance 13 and the current resonance capacitor 14 perform the resonance operation. As a result, the voltage applied to the primary winding of the transformer 11 changes, and the energy transmitted to the secondary side of the transformer 11 is controlled.

<Unstable operation state>
By the way, in the resonance type switching power supply of the comparative example, the resonance circuit shown in FIG. 5B does not operate stably immediately after the operation starts. Therefore, a through current that flows through one switching element and the body diode of the other switching element is generated, which may cause damage to the switching element.

  The operation immediately after the start of the operation of the switching power supply device will be described with reference to FIG. Immediately after the start of operation, at time E, the control circuit 7 turns on the high-side FET 8 and keeps the low-side FET 9 off. At this time, since the current flows through the path of the high-side FET → leakage inductance 13 → current resonance capacitor 14, the voltage Vcr of the current resonance capacitor 14 gradually increases. As shown in FIG. 7, the voltage Vcr of the current resonance capacitor 14 is zero before the operation starts. Therefore, a high voltage is applied to the leakage inductance 13. Therefore, as shown in FIG. 7, the gradient of the resonance current Ires is increased.

  At time F, the control circuit 7 turns off the high-side FET 8 and turns on the low-side FET 9 after a dead time. After time F, current flows through a path of leakage inductance 13 → current resonant capacitor 14 → D2.

  At time G, the control circuit 7 turns off the low-side FET 9 and turns on the high-side FET 8 after a dead time. At this time, since the energy stored in the leakage inductance 13 is not completely discharged, the current continues to flow along the path of the leakage inductance 13 → the current resonance capacitor 14 → the body diode D2. Therefore, if the high-side FET 8 is turned on at time G, the input voltage Vdc and the ground terminal (on the path from the high-side FET 8 to the body diode D2 (reverse recovery) until the carriers in the body diode D2 disappear. A current that short-circuits GND) flows. This current has a large slope per time di / dt. For this reason, the parasitic transistor configured inside the switching element is turned on, and a great deal of stress is applied to the switching element. This can lead to destruction of the switching element. This is a through current.

  Therefore, as described in the first and second embodiments, the control circuit 7 monitors the resonance current Ires flowing through the resonance circuit, and controls the switching frequency based on about half of the input voltage Vdc. It will not flow. In the first embodiment and the second embodiment, 1/2 of the input voltage Vdc is used as a reference. However, a flow-through current that does not cause destruction of the switching element may flow. For this reason, how much the reference voltage is set depends on the breakdown voltage of the switching element. Therefore, the reference voltage may be determined within a range of about ± α with respect to 0.5 Vdc. Here, α is a coefficient depending on the breakdown voltage of the switching element employed.

  The power supply apparatus according to the present invention may be used as a power supply apparatus for supplying constant voltage to various electronic devices such as an image forming apparatus, a copying machine, a multifunction peripheral, an image reading apparatus, and an information processing apparatus. In this case, a controller that controls the operation of these electronic devices and motors as drive units operate with power supplied from the power supply device.

Claims (8)

A circuit connected in parallel to the direct current power source and connecting the first switching element and the second switching element in series;
A series resonant circuit connected in parallel to the second switching element and formed by a primary winding of the transformer and a resonant capacitor;
A rectifying and smoothing circuit for rectifying and smoothing a voltage generated in the secondary winding of the transformer during a period in which the first switching element or the second switching element is turned on;
A drive signal generation circuit for generating a drive signal for alternately driving the first switching element and the second switching element by feeding back an output voltage of the rectifying and smoothing circuit;
A comparison circuit for comparing a voltage across the resonant capacitor and a reference voltage;
The drive signal generation circuit generates the drive signal corresponding to the comparison result of the comparison circuit during a period from when the power supply device starts operating until the series resonance circuit shifts to a steady state, and the series resonance circuit A power supply apparatus that generates the drive signal corresponding to the output voltage of the rectifying / smoothing circuit without using the comparison result of the comparison circuit during a period after the circuit shifts to a steady state. The power supply apparatus according to claim 1, wherein the reference voltage is a voltage having a half of a power supply voltage supplied from the DC power supply. A voltage dividing circuit that divides a power supply voltage supplied from the DC power supply and outputs a voltage having a half of the power supply voltage as the reference voltage;
In the period from when the power supply device starts operating until the series resonant circuit transitions to a steady state, the drive signal generation circuit is configured at each timing when the voltage across the resonant capacitor matches the reference voltage. The power supply device according to claim 1, wherein the drive signal is generated so that the first switching element and the second switching element are alternately turned on. The drive signal generation circuit includes:
An oscillation circuit that oscillates at a frequency corresponding to the output voltage of the rectifying and smoothing circuit;
4. The drive signal corresponding to a signal output from the oscillation circuit is output during a period after the series resonant circuit has shifted to a steady state. 5. Power supply. A counting circuit that counts the number of times the voltage across the resonant capacitor matches the reference voltage;
5. A determination circuit for determining whether or not the series resonant circuit has shifted to a steady state based on whether or not the number of times counted by the counting circuit has reached a predetermined set value. The power supply device according to any one of the above. A resistor inserted into the series resonant circuit, further comprising a resistor that converts a current flowing through the series resonant circuit into a voltage;
6. The power supply device according to claim 1, wherein the comparison circuit compares the reference voltage with the voltage detected by the resistor as a voltage across the resonance capacitor. 6.   During the period after the series resonant circuit transitions to a steady state, the switching frequency, which is the reciprocal of the cycle for switching on / off of the first switching element and off / on of the second switching element, is the series frequency. The power supply device according to any one of claims 1 to 6, wherein the power supply device has a frequency higher than a resonance frequency of the resonance circuit.   An electronic device that operates with power supplied from the power supply device according to claim 1.

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