JP2012134702A - Impedance matching circuit, impedance matching method, and bidirectional transmission circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To perform high-speed communication without malfunction by matching an impedance in bidirectional transmission between open drain output buffers.SOLUTION: An impedance matching circuit has: a detection circuit to whose first terminal an open drain output buffer is connected and to whose second terminal a bidirectional transmission line is connected, and detecting a first output signal from the open drain output buffer and a second output signal from the bidirectional transmission line; and a resistance connection circuit connecting a load resistance to the first output signal and outputting the signal to the bidirectional transmission line in the case that it is detected that the change in a voltage of the first output signal is in a first direction, connecting a damping resistance to the first output signal and outputting the signal to the bidirectional transmission line in the case that it is detected that the change in the voltage of the first output signal is in a second direction opposite to the first direction, and outputting the second signal to the open drain output buffer without connecting either the load resistance or the damping resistance to the second output signal in the case that the change in a voltage of the second output signal is detected.

Description

  The present invention relates to an impedance matching circuit, an impedance matching method, and a bidirectional transmission circuit, and more particularly to an impedance matching circuit, an impedance matching method, and a bidirectional transmission circuit for performing bidirectional transmission between open drain output buffers.

  In on-chip debugging communication, the number of terminals for low-cost microcomputers has been reduced, the number of terminals for debugging has become one pin, and it has become necessary to increase the transmission speed of debugging data as the operating frequency increases.

  On-chip debug communication is for communicating debug commands and debug data between a microcomputer and an ICE (In-Circuit Emulator). Generally, communication using JTAG (Joint Test Action Group) is known as on-chip debug communication. However, the number of debug terminals necessary for the on-chip debug communication is required for control, clock, data input, and data output. Therefore, since it is not suitable for a low-cost microcomputer with a small number of terminals, it is necessary to make the terminals into one pin.

  Here, as a feature of the on-chip debug communication, it is necessary to forcibly stop the operation of the microcomputer from the ICE even when the microcomputer transmits data. Therefore, when the terminal is made into one pin, it is necessary to use an open drain output buffer capable of data transmission even when both terminals are in an output state. However, the open drain output buffer is limited to low-speed data transmission of 20 MHz or less because impedance matching is difficult and it is not suitable for high-speed transmission.

  In addition, low-cost microcomputers are required to improve the operation speed, and the demand (necessity) of technology for high-speed signal transmission using an open drain output buffer has also increased.

  Patent Document 1 aims to provide a bidirectional transmission circuit and a bus system that facilitate impedance matching and are suitable for increasing the signal transmission speed.

  FIG. 16 is a block diagram showing a configuration of a bidirectional transmission circuit according to Patent Document 1. As shown in FIG. In FIG. 16, a bidirectional transmission line 105 is a bidirectional transmission line (characteristic impedance is Zo) for transmitting a signal bidirectionally. FIG. 16 shows a portion related to one line in a bidirectional bus such as a data bus connecting the semiconductor elements IC1 and IC2.

  The input / output circuit 120 is provided in the semiconductor element IC1. The input / output circuit 120 is an input / output circuit (also referred to as a transceiver) that inputs and outputs signals. The input / output circuit 120 includes an output buffer (also referred to as a driver) 101 (an on-resistance value is Ro1) and an input buffer (also referred to as a receiver) 102. The input / output circuit 121 is provided inside the semiconductor element IC2. The input / output circuit 121 is an input / output circuit that inputs and outputs signals. The input / output circuit 121 includes an output buffer 103 (an on-resistance value is Ro2) and an input buffer 104.

  The switching unit 106 is a switching unit that switches whether the bidirectional transmission line 105 and the input / output circuit 120 are terminated in series or short-circuited. The switching unit 106 includes a series terminating resistor 108 (resistance value is Rs 1), a short wire (hereinafter referred to as a short line) 109, and a switch 107. The switch 107 connects the resistor 108 when the input / output circuit 120 is output, and connects the short line 109 when the input / output circuit 120 is input (or other than during output).

  The switching unit 110 is a switching unit that switches whether the bidirectional transmission line 105 and the input / output circuit 121 are serially terminated or short-circuited. The switching unit 110 includes a series termination resistor 112 (the resistance value is Rs2), a shorting short line 113, and a switch 111. The switch 111 connects the resistor 112 when the input / output circuit 121 outputs, and connects the short line 113 when the input / output circuit 121 is input (or other than when outputting).

  Here, it is assumed that the resistor 108 has a resistance value determined by Rs1 = Zo−Ro1. Thereby, the impedance can be matched at the left end of the bidirectional transmission line 105 when the input / output circuit 120 is output (when the input / output circuit 121 is input). Similarly, it is assumed that the resistor 112 has a resistance value determined by Rs2 = Zo−Ro2. Further, the short lines 109 and 113 may be resistors having a pattern on the printed circuit board or a resistance value of 0Ω.

  In Patent Document 1, when the output buffer 101 is in operation, the switch 107 of the switching unit 106 selects the resistor 108, thereby inserting the resistor 108 as a damping resistor between the output buffer and the bidirectional transmission line 105. Further, when the input buffer 102 is in operation, the switch 107 of the switching unit 106 selects the short line 109 so that the input buffer 102 and the bidirectional transmission line are directly connected, so that the bidirectional transmission with the output buffer 101 is performed during the output buffer operation. The impedance of the line 105 is matched, signal reflection is prevented, and malfunction is prevented.

JP 2001-007742 A

  In Patent Document 1, the impedance matching is realized in the bidirectional transmission line 105 by setting the output impedance to Ro1 + Rs1 by inserting the damping resistor 108 when the output buffer 101 outputs. Here, in Patent Document 1, when there is a need to output both output buffers simultaneously, such as on-chip debug communication, it is necessary to use an open drain output buffer for the output buffer 101. However, in Patent Document 1, when an open drain output buffer is used as the output buffer 101, there is a problem that impedance matching cannot be maintained, signal reflection occurs, and malfunction occurs.

  The reason will be described below. First, when an open drain output buffer is used as the output buffer 101, the output impedance when the output buffer 101 rises becomes infinite. Therefore, it is common to connect a pull-up resistor of about 50Ω (not shown in FIG. 16) in parallel with the output buffer 101 and output the signal 131 as “high”.

  That is, when the output signal of the output buffer 101 rises, an infinite output impedance and a 50Ω pull-up resistor are connected in parallel. Therefore, the output impedance when the signal 131 rises becomes the resistance value (50Ω) of the pull-up resistor itself.

  On the other hand, when the output signal of the output buffer 101 falls, the impedance Ro1 (20Ω) and the pull-up resistor (50Ω) are connected in parallel. Therefore, the output impedance when the signal 131 falls is about 14Ω.

  Here, in Patent Document 1, as described above, the damping resistor 108 is inserted in series when the output buffer 101 outputs. Further, the impedance of the bidirectional transmission line 105 is set to 50Ω, for example. In order to match the impedance of the bidirectional transmission line 105, the output impedance when the signal 131 falls is about 14Ω. Therefore, it is necessary to connect a 36Ω resistor 108 to make the total 50Ω. . In this case, since the impedance of the bidirectional transmission line 105 is matched, signal reflection does not occur.

  However, in this case, since the output impedance at the rising edge of the signal 131 is 50Ω, when the 36Ω resistor 108 is connected, the total becomes 86Ω. Therefore, the output impedance of the signal 131 becomes higher than the impedance of the bidirectional transmission line 105, and impedance mismatching occurs.

  From the above, when an open drain output buffer is used as the output buffer 101 in Patent Document 1, the output impedance differs between the rising edge and the falling edge of the signal 131. Therefore, the above-described problem occurs.

  An impedance matching circuit according to a first aspect of the present invention is an impedance matching circuit in which an open drain output buffer is connected to a first terminal, and a bidirectional transmission line is connected to a second terminal, the load matching resistor , A damping resistor, a resistor connection circuit that connects or does not connect either the load resistor or the damping resistor, a first output signal from the open drain output buffer, and a second resistor from the bidirectional transmission line. And detecting the output signal of the first output signal when the change of the voltage of the first output signal is detected in the first direction by the detection circuit. The load resistance is connected to the output signal of 1 and output to the bidirectional transmission line, and the change in the voltage of the first output signal is changed to the first direction by the detection circuit. When it is detected that the second direction is opposite, the damping resistor is connected to the first output signal and output to the bidirectional transmission line, and the voltage of the second output signal is detected by the detection circuit. When a change is detected, the second output signal is output to the open drain output buffer without connecting either the load resistor or the damping resistor.

  An impedance matching method according to a second aspect of the present invention is an impedance matching method for a bidirectional transmission circuit that performs bidirectional transmission between a first open drain output buffer and a second open drain output buffer. The bidirectional transmission circuit includes a load resistor and a damping resistor. In the bidirectional transmission circuit, the first output signal from the first open drain output buffer and the second open drain output buffer. When the second output signal is detected and the change in the voltage of the first output signal is detected in the first direction, the load resistor is connected to the first output signal and the second output signal is connected. When output to an open drain output buffer and detecting that the change in voltage of the first output signal is in the second direction opposite to the first direction, the first output signal And connecting the damping resistor to the second open drain output buffer, and detecting a change in the voltage of the second output signal, the load resistor and the damping resistor are included in the second output signal. None of them are connected and output to the first open drain output buffer.

  A bidirectional transmission circuit according to a third aspect of the present invention is a bidirectional transmission circuit that performs bidirectional transmission between a first open drain output buffer and a second open drain output buffer. A transmission line; a first terminal connected to the first open drain output buffer; a second terminal connected to the bidirectional transmission line; a first load resistor; and a first damping resistor. A first impedance matching circuit having a third terminal connected to the bidirectional transmission line; a fourth terminal connected to the second open drain output buffer; a second load resistor; A second impedance matching circuit having a damping resistor, wherein the first impedance matching circuit includes the first output signal from the first open drain output buffer and the dual impedance circuit. When the second output signal from the directional transmission line is detected and the change in the voltage of the first output signal is detected in the first direction, the first load resistance is added to the first output signal. When connected and output to the bidirectional transmission line, it is detected that the change in the voltage of the first output signal is the second direction opposite to the first direction. When the first damping resistor is connected and output to the bidirectional transmission line and a change in the voltage of the second output signal is detected, the first output resistor and the second load signal are included in the second output signal. Output to the first open drain output buffer without connecting any of the first damping resistors, and the second impedance matching circuit outputs the third output signal from the bidirectional transmission line and the second open Fourth output signal from drain output buffer Detecting and detecting that the change in the voltage of the fourth output signal is in the first direction, connecting the second load resistor to the first output signal and outputting to the bidirectional transmission line When the change in the voltage of the fourth output signal is detected in the second direction, the second output resistor is connected to the fourth output signal and output to the bidirectional transmission line. When a change in the voltage of the third output signal is detected, the second open drain output without connecting the second load resistor or the second damping resistor to the third output signal. Output to buffer.

  According to the first to third aspects of the present invention described above, even when the output impedance is changed by using the open drain output buffer, the resistance value is adjusted according to the voltage change of the signal output from the open drain output buffer. Thus, the impedance in bidirectional transmission can be matched.

  INDUSTRIAL APPLICABILITY According to the present invention, impedance matching circuit, impedance matching method, and both for matching impedance when performing bidirectional transmission between open drain output buffers, eliminating signal reflection, and enabling high-speed communication without malfunction A bidirectional transmission circuit can be provided.

It is a block diagram which shows the structure of the on-chip debug apparatus concerning Embodiment 1 of this invention. It is a block diagram which shows the structure of the impedance matching circuit concerning Embodiment 1 of this invention. It is a block diagram which shows the structure of the impedance matching circuit concerning Embodiment 1 of this invention. It is a block diagram which shows the structure of the voltage change detection circuit concerning Embodiment 1 of this invention. It is a block diagram which shows the structure of the current direction detection circuit concerning Embodiment 1 of this invention. 1 is a block diagram showing a configuration of a decoder circuit according to a first exemplary embodiment of the present invention. It is a block diagram which shows the structure of the pull-up resistance selection circuit concerning Embodiment 1 of this invention. It is a block diagram which shows the structure of the damping resistance selection circuit concerning Embodiment 1 of this invention. It is a figure which shows the example of the pull-up resistance damping resistance selection table concerning Embodiment 1 of this invention. 6 is a timing chart when a signal is output from the microcomputer side to the ICE side according to the first exemplary embodiment of the present invention; It is a timing chart when the signal is output from the ICE side to the microcomputer side according to the first exemplary embodiment of the present invention. It is a figure for demonstrating the setting state of the impedance matching circuit concerning Embodiment 1 of this invention. It is a figure for demonstrating the setting state of the impedance matching circuit concerning Embodiment 1 of this invention. It is a figure for demonstrating the setting state of the impedance matching circuit concerning Embodiment 1 of this invention. It is a figure for demonstrating the setting state of the impedance matching circuit concerning Embodiment 1 of this invention. It is a block diagram which shows the structure of the bidirectional | two-way transmission circuit concerning related technology.

  Hereinafter, specific embodiments to which the present invention is applied will be described in detail with reference to the drawings. In the drawings, the same elements are denoted by the same reference numerals, and redundant description will be omitted as necessary for the sake of clarity.

<Embodiment 1 of the Invention>
FIG. 1 is a block diagram showing the configuration of the on-chip debugging apparatus according to the first embodiment of the present invention. The on-chip debug device according to the first embodiment includes a microcomputer 25, an ICE 226, and a bidirectional transmission circuit 302. A microcomputer 25 and an ICE 226 are connected to the bidirectional transmission circuit 302.

  The microcomputer 25 includes a CPU (Central Processing Unit) 24, an on-chip debug circuit 23, an input buffer 102, and an open drain output buffer 10. The bidirectional transmission circuit 302 includes an impedance matching circuit 300, the bidirectional transmission line 105, and the impedance matching circuit 301. The detailed configuration of the impedance matching circuits 300 and 301 will be described later with reference to FIGS. The ICE 226 includes a debug processing circuit 227, an input buffer 104, and an open drain output buffer 210.

  The circuit configuration of the microcomputer 25 will be described below. The CPU 24 and the on-chip debug circuit 23 mutually input / output control signals and trace data. Thereby, the on-chip debug circuit 23 performs program debugging of the CPU 24. The on-chip debug circuit 23 receives data from the input buffer 102 and outputs data to the open drain output buffer 10. The input buffer 102 receives data from the impedance matching circuit 300 according to the input signal 12. The open drain output buffer 10 outputs data to the impedance matching circuit 300 according to the output signal 11.

  The circuit configuration of the ICE 226 will be described below. The debug processing circuit 227 inputs data from the input buffer 104 and outputs data to the open drain output buffer 210. The input buffer 104 receives data from the impedance matching circuit 301 as an input signal 212. The open drain output buffer 210 outputs data to the impedance matching circuit 301 according to the output signal 211.

  The bidirectional transmission circuit 302 performs bidirectional transmission via the directional transmission line 105 between the microcomputer 25 including the open drain output buffer 10 and the ICE 226 including the open drain output buffer 210. The bidirectional transmission circuit 302 uses the impedance matching circuits 300 and 301 to match the change in output impedance caused by using the open drain output buffer 10 and the open drain output buffer 210.

  FIG. 2 is a block diagram showing a configuration of the impedance matching circuit 300 according to the first exemplary embodiment of the present invention. In the impedance matching circuit 300, a microcomputer 25 including the open drain output buffer 10 is connected to a first terminal (not shown), and a bidirectional transmission line 105 is connected to a second terminal (not shown). The impedance matching circuit 300 includes a pull-up resistor (for example, a resistor 52 in FIG. 7 to be described later), a damping resistor (for example, a resistor 53 in FIG. 8 to be described later), a detection circuit 35, and a resistance connection circuit 36. With. The pull-up resistor is an example of a load resistor. For example, the load resistor may be a pull-down resistor.

  The detection circuit 35 detects the input / output signal 34 that is the first output signal from the open drain output buffer 10 and the signal 22 that is the second output signal from the bidirectional transmission line 105. The resistance connection circuit 36 connects either a pull-up resistor or a damping resistor, or neither a pull-up resistor nor a damping resistor is connected according to the detection result by the detection circuit 35.

  Specifically, when the rising edge of the first output signal is detected by the detection circuit 35, the resistor connection circuit 36 connects the resistor 52, which is a pull-up resistor, to the first output signal. Output to the transmission line 105. The resistor connection circuit 36 connects a resistor 53, which is a damping resistor, to the first output signal when the detection circuit 35 detects the falling edge of the first output signal. To 105. Further, when the detection circuit 35 detects the rising or falling edge of the second output signal, the resistance connection circuit 36 connects neither the pull-up resistor nor the damping resistor to the second output signal. To the open drain output buffer 10.

  The detection circuit 35 includes a voltage change detection circuit 20, a current direction detection circuit 21, a decoder circuit 17, and a pull-up resistor damping resistance selection table 15. The resistance connection circuit 36 includes a pull-up resistance selection circuit 13 and a damping resistance selection circuit 33.

  The voltage change detection circuit 20 receives the signal 28 and, if the signal 28 is a rising signal, outputs the voltage change detection signal 18 as High. Further, if the signal 28 falls, the voltage change detection circuit 20 outputs the voltage change detection signal 18 as Low. That is, the voltage change detection circuit 20 detects a change in voltage for the first output signal and the second output signal. The voltage change detection circuit 20 outputs the detected voltage change as a voltage change detection signal 18.

  The current direction detection circuit 21 receives the signal 28 and the signal 22, and outputs a current direction detection signal 19 as High when a current flows from the signal 28 to the signal 22. Further, when a current flows from the signal 22 to the signal 28, the current direction detection circuit 21 outputs the current direction detection signal 19 as Low. That is, the current direction detection circuit 21 detects the direction in which the current flows for the first output signal and the second output signal. The current direction detection circuit 21 outputs the detected current direction as a current direction detection signal.

  The decoder circuit 17 receives the voltage change detection signal 18 and the current direction detection signal 19, and receives a decode signal (ST1) 29, a decode signal (ST2) 30, a decode signal (ST3) 31, and a decode signal (ST4). 32 is output. That is, the decoder circuit 17 supplies the decode signal representing the changes in the current direction detection signal 19 and the voltage change detection signal 18 input from the current direction detection circuit 21 and the voltage change detection circuit 20 to the pull-up resistor damping resistor selection table 15. Output.

  The pull-up resistor damping resistor selection table 15 is based on the direction of the current detected by the current direction detection circuit 21 and the change in voltage detected by the voltage change detection circuit 20. A selection signal for controlling the selection is output to the resistance connection circuit 36.

  Here, the pull-up resistor damping resistor selection table 15 detects that the direction of the current detected by the current direction detection circuit 21 is the bidirectional transmission line 105 from the open drain output buffer 10, and the voltage change detection circuit 20 When it is detected that the voltage change is rising for the first output signal, a selection signal is output to select the pull-up resistor. The pull-up resistor damping resistor selection table 15 detects that the direction of the current detected by the current direction detection circuit 21 is from the bidirectional transmission line 105 to the open drain output buffer 10, and the voltage change detection circuit 20 When it is detected that the change in voltage is falling for one output signal, a selection signal is output so that the damping resistor is selected. Further, the pull-up resistor damping resistor selection table 15 detects that the direction of the current detected by the current direction detection circuit 21 is the bidirectional transmission line 105 from the open drain output buffer 10, and the voltage change detection circuit 20 detects the first direction. When it is detected that the voltage change is falling for one output signal, the selection signal is output so that neither the pull-up resistor nor the damping resistor is selected. Further, the pull-up resistor damping resistor selection table 15 detects that the direction of the current detected by the current direction detection circuit 21 is from the bidirectional transmission line 105 to the open drain output buffer 10, and the voltage change detection circuit 20 When it is detected that the voltage change is rising for one output signal, the selection signal is output so that neither the pull-up resistor nor the damping resistor is selected.

  The pull-up resistor damping resistor selection table 15 determines whether or not the pull-up resistor selection signal 14 which is the first connection presence / absence signal indicating whether or not the pull-up resistor is connected and whether or not the damping resistor is connected according to the decode signal. A damping resistance selection signal 16 which is a second connection presence / absence signal shown is output as a selection signal.

  That is, the pull-up resistor damping resistor selection table 15 receives the decode signal (ST1) 29, the decode signal (ST2) 30, the decode signal (ST3) 31, and the decode signal (ST4) 32. A high or low signal is output to the damping resistance selection signal 16.

  The resistance connection circuit 36 makes a connection for each of the pull-up resistor and the damping resistor based on the direction of the current detected by the current direction detection circuit 21 and the change in the voltage detected by the voltage change detection circuit 20. Select whether or not. Further, the resistance connection circuit 36 selects whether or not to connect each of the pull-up resistor and the damping resistor according to the selection signal.

  Here, the resistor connection circuit 36 includes a pull-up resistor selection circuit 13 that selects whether or not to connect a pull-up resistor according to the pull-up resistor selection signal 14, and a damping that operates according to the damping resistance selection signal 16. A damping resistance selection circuit 33 for selecting whether or not to connect the resistor.

  The pull-up resistor selection circuit 13 receives the pull-up resistor selection signal 14 and pulls up the signal 34 when the pull-up resistor selection signal 14 is High. The damping resistance selection circuit 33 receives the damping resistance selection signal 16 and inserts a damping resistance between the signal 28 and the signal 34 when the damping resistance selection signal 16 is High.

  Returning to FIG. The bidirectional transmission line 105 uses the signal 22 as an input signal and the signal 222 as an output signal when the microcomputer 25 is outputting. The bidirectional transmission line 105 uses the signal 222 as an input signal and the signal 22 as an output signal when the microcomputer 25 is input.

  FIG. 3 is a block diagram showing a configuration of the impedance matching circuit 301 according to the first exemplary embodiment of the present invention. In the impedance matching circuit 301, the bidirectional transmission line 105 is connected to a third terminal (not shown), and an ICE 226 including an open drain output buffer 210 is connected to a fourth terminal (not shown). The impedance matching circuit 301 includes a pull-up resistor (for example, a resistor 252 in FIG. 14 to be described later), a damping resistor (for example, a resistor 253 in FIG. 15 to be described later), a detection circuit 235, and a resistance connection circuit 236. With.

  The detection circuit 235 includes a voltage change detection circuit 220, a current direction detection circuit 221, a decoder circuit 217, and a pull-up resistor damping resistance selection table 215. The resistance connection circuit 236 includes a pull-up resistance selection circuit 213 and a damping resistance selection circuit 233.

  The circuit configuration of the impedance matching circuit 301 is the same as that of the impedance matching circuit 300, and the components are arranged symmetrically with respect to the bidirectional transmission line 105, and detailed description thereof is omitted.

  Further, the signal 222, the signal 228, and the input / output signal 234 correspond to the signal 22, the signal 28, and the input / output signal 34 of FIG. The voltage change detection signal 218 and the current direction detection signal 219 correspond to the voltage change detection signal 18 and the current direction detection signal 19 of FIG. Also, the decode signal (ST1) 229, the decode signal (ST2) 230, the decode signal (ST3) 231 and the decode signal (ST4) 232 are the decode signal (ST1) 29, the decode signal (ST2) 30, and the decode signal shown in FIG. This corresponds to (ST3) 31 and decode signal (ST4) 32. The pull-up resistance selection signal 214 and the damping resistance selection signal 216 correspond to the pull-up resistance selection signal 14 and the damping resistance selection signal 16 shown in FIG.

  FIG. 4 is a block diagram showing an example of the configuration of the voltage change detection circuit 20 according to the first exemplary embodiment of the present invention. The voltage change detection circuit 20 includes resistors 60, 61 and 62, a capacitor 63, and an amplifier 64. The resistor 60 has a high resistance value of about 10 KΩ. The voltage change detection circuit 20 pulls up the signal 28 with the resistor 60. Thereby, when the open drain output buffer 10 outputs High, a rising signal is input to the signal 28. A current flows from the resistor 61 toward the capacitor 63. Thereafter, the voltage of the signal 65 becomes higher than that of the signal 66, and the voltage change detection circuit 20 outputs High to the voltage change detection signal 18.

  When a falling signal is input to the signal 22, a current flows from the capacitor 63 toward the resistor 61. Then, the voltage of the signal 66 becomes higher than that of the signal 65, and the voltage change detection circuit 20 outputs Low to the voltage change detection signal 18. Since the voltage change detection circuit 220 has the same circuit configuration, illustration and description are omitted.

  FIG. 5 is a block diagram showing an example of the configuration of the current direction detection circuit 21 according to the first exemplary embodiment of the present invention. The current direction detection circuit 21 includes resistors 70 and 71 and an amplifier 72. The current direction detection circuit 21 receives the signal 28 and the signal 22. The current direction detection circuit 21 generates a potential difference in the resistor 70 when a current flows from the signal 28 to the signal 22. Thereafter, the potential of the signal 74 becomes higher than that of the signal 73, and the current direction detection circuit 21 outputs High to the signal 19. When the current flows in the reverse direction, the operation reverse to the above operation is performed, and the current direction detection circuit 21 outputs Low. Since the current direction detection circuit 221 has the same circuit configuration, illustration and description thereof are omitted.

  FIG. 6 is a block diagram showing an example of the configuration of the decoder circuit 17 according to the first exemplary embodiment of the present invention. The decoder circuit 17 includes inverters 80 and 81 and AND gates 82 to 85. The decoder circuit 17 receives the voltage change detection signal 18 and the current direction detection signal 19. When the voltage change detection signal 18 is High and the current direction detection signal 19 is High, the decoder circuit 17 outputs the decode signal (ST1) 29 as High. When the voltage change detection signal 18 is Low and the current direction detection signal 19 is Low, the decoder circuit 17 outputs the decode signal (ST2) 30 as High. When the voltage change detection signal 18 is High and the current direction detection signal 19 is Low, the decoder circuit 17 outputs the decode signal (ST3) 31 as High. When the voltage change detection signal 18 is Low and the current direction detection signal 19 is High, the decoder circuit 17 outputs the decode signal (ST3) 32 as High. Since the decoder circuit 217 has the same circuit configuration, illustration and description are omitted.

  FIG. 7 is a block diagram showing an example of the configuration of the pull-up resistor selection circuit 13 according to the first exemplary embodiment of the present invention. The pull-up resistor selection circuit 13 includes an inverter 90, a resistor 52, and a transistor 91. The pull-up resistor selection circuit 13 inputs a pull-up resistor selection signal 14. When High is input to the pull-up resistor selection signal 14, the signal is inverted by the inverter 90. Thus, Low is input to the transistor 91, and the transistor 91 is turned on. Thereafter, the pull-up resistor selection circuit 13 pulls up the input / output signal 34 with the resistor 52. When Low is input to the pull-up resistor selection signal 14, the operation reverse to the above operation is performed. In this case, the transistor 91 is turned off and the pull-up of the input / output signal 34 is released. Since the pull-up resistor selection circuit 213 has the same circuit configuration, illustration and description thereof are omitted.

  FIG. 8 is a block diagram showing an example of the configuration of the damping resistance selection circuit 33 according to the first embodiment of the present invention. The damping resistance selection circuit 33 includes a resistor 53, a switch including transistors 95 and 96, and an inverter 97. In the damping resistance selection circuit 33, when High is input to the damping resistance selection signal 16, the switch including the transistors 95 and 96 is turned off. As a result, a damping resistor 53 is inserted between the input / output signal 34 and the signal 28. When Low is input to the damping resistance selection signal 16, the switch composed of the transistors 95 and 96 is turned on. As a result, the input / output signal 34 and the signal 28 are short-circuited by the transistors 95 and 96. Note that the damping resistor selection circuit 233 has the same circuit configuration, and thus illustration and description thereof are omitted.

  FIG. 9 is a diagram showing an example of the pull-up resistor damping resistor selection table 15 according to the first embodiment of the present invention. Here, first, it is assumed that the operation of the decoder circuit 17 is as follows. Specifically, the decoder circuit 17 outputs only the decode signal (ST1) 29 as High when the voltage change detection signal 18 is High and the current direction detection signal 19 is High. Further, when the voltage change detection signal 18 is Low and the current direction detection signal 19 is Low, the decoder circuit 17 outputs only the decode signal (ST2) 30 as High. Further, when the voltage change detection signal 18 is High and the current direction detection signal 19 is Low, the decoder circuit 17 outputs only the decode signal (ST3) 31 as High. When the voltage change detection signal 18 is Low and the current direction detection signal 19 is High, only the decode signal (ST4) 32 is output as High.

  In the example of FIG. 9, when the decode signal (ST1) 29 is High, the pull-up resistor selection signal 14 is output as High and the damping resistor selection signal 16 is output as Low. When the decode signal (ST2) 30 is High, the pull-up resistor selection signal 14 is output as Low and the damping resistor selection signal 16 is output as High. When the decode signal (ST3) 31 is High, the pull-up resistor selection signal 14 is output as Low and the damping resistor selection signal 16 is output as Low. When the decode signal (ST4) 32 is High, the pull-up resistor selection signal 14 is output as Low and the damping resistor selection signal 16 is output as Low. That is, when either the decode signal (ST3) 31 or the decode signal (ST4) 32 is High, the signal input to the impedance matching circuit 300 is not connected to the pull-up resistor and the damping resistor, and is directly used. Is output. Since the pull-up resistor damping resistor selection table 215 has the same configuration, illustration and description thereof are omitted.

  By having the circuit configuration as described above, the bidirectional transmission circuit 302 according to the first embodiment of the present invention can be easily realized.

  Next, the operation according to the first exemplary embodiment of the present invention will be described with reference to the timing charts of FIGS. 10 and 11 and FIGS. The timing charts of FIGS. 10 and 11 show a certain state during program debugging of the CPU 24.

  FIG. 10 is a timing chart when a signal is output from the microcomputer 25 side to the ICE 226 side according to the first embodiment of the present invention. At times T1 to T19, the on-chip debug circuit 23 outputs debug data to the debug processing circuit 227 via the open drain output buffer 10, the impedance matching circuit 300, the bidirectional transmission line 105, the impedance matching circuit 301, and the input buffer 104. Indicates the elapsed time of the status. Next, the operation at each time will be described.

  At time T1, the open drain output buffer 10 is outputting Low. At time T2, when the open drain output buffer 10 outputs High, the rising signal propagates to the input / output signal 34, the damping resistor selection circuit 33, and the signal 28, and is input to the voltage change detection circuit 20 and the current direction detection circuit 21. To propagate to the signal 22.

  At time T <b> 3, when a rising signal is input as the signal 28, the voltage change detection circuit 20 outputs High to the voltage change detection signal 18. Since the rising signal is propagated, the voltage of the signal 28 becomes higher than that of the signal 22. Then, a current flows from the signal 28 to the signal 22, and the current direction detection circuit 21 outputs High to the current direction detection signal 19.

  At time T <b> 4, the decoder circuit 17 inputs High to the voltage change detection signal 18 and High to the current direction detection signal 19. Then, the decoder circuit 17 outputs High to the decode signal (ST1) 29. Subsequently, the pull-up resistor damping resistor selection table 15 inputs High of the decode signal (ST1) 29. Then, the pull-up resistor damping resistance selection table 15 outputs High to the pull-up resistor selection signal 14 set in the table, and outputs Low to the damping resistor selection signal 16. Thereafter, the pull-up resistor selection circuit 13 pulls up the signal 34 with the pull-up resistor 52 when High is input to the pull-up resistor selection signal 14. Further, the damping resistance selection circuit 33 indicates that Low is input to the damping resistance selection signal 16 and sets the damping resistor 53 to a short circuit.

  At time T <b> 5, the signal 22 passes through the bidirectional transmission line 105, propagates to the signal 222, and propagates to the signal 228 via the current direction detection circuit 221.

  At time T6, since the rising signal is propagated to the signal 228, the voltage change detection circuit 220 outputs High to the voltage change detection signal 218. Since the voltage of the signal 222 is higher than that of the signal 228, current flows from the signal 222 to the signal 228, indicating that the current direction detection circuit 221 outputs Low to the current direction detection signal 219.

  At time T7, the decoder circuit 217 receives the voltage change detection signal 218 and the current direction detection signal 219. Then, the decoder circuit 217 outputs High to the decode signal (ST3) 231. The pull-up resistor damping resistance selection table 215 inputs High of the decode signal (ST3) 231 and outputs Low to the pull-up resistor selection signal 214 and Low to the damping resistor selection signal 216 set in the table. The pull-up resistor selection circuit 213 receives the pull-up resistor selection signal 214 and sets the signal 234 not to be pulled up. Further, the damping resistance selection circuit 233 receives the damping resistance selection signal 216 and indicates that the damping resistor 253 is short-circuited.

  The impedance matching units 300 and 301 are set as shown in FIG. 12 by the above operation. FIG. 12 is a diagram for explaining a setting state of the impedance matching circuit according to the first embodiment of the present invention.

  At time T8, when the open drain output buffer 10 outputs Low, the falling signal is propagated to the input / output signal 34, the damping resistance selection circuit 33, and the signal 28, and then to the voltage change detection circuit 20 and the current direction detection circuit 21. Indicates that the signal is input and propagated to the signal 22.

  At time T <b> 9, when a falling signal is input to the signal 28, the voltage change detection circuit 20 outputs Low to the voltage change detection signal 18. Since the falling signal is propagated, the voltage of the signal 22 becomes higher than the signal 28, current flows from the signal 22 to the signal 28, and the current direction detection circuit 21 outputs Low to the current direction detection signal 19. .

  At time T <b> 10, the decoder circuit 17 receives Low as the voltage change detection signal 18 and Low as the current direction detection signal 19. Then, the decoder circuit 17 outputs High to the decode signal (ST2) 30. The pull-up resistor damping resistance selection table 15 inputs High of the decode signal (ST2) 30, outputs Low to the pull-up resistor selection signal 14 set in the table, and outputs High to the damping resistor selection signal 16 To do. The pull-up resistor selection circuit 13 sets the signal 34 not to be pulled up when Low is input to the pull-up resistor selection signal 14. Further, the damping resistance selection circuit 33 indicates that High is input to the damping resistance selection signal and the resistor 52 for damping is inserted.

  At time T <b> 11, the signal 22 passes through the bidirectional transmission line 105, propagates to the signal 222, and propagates to the signal 228 via the current direction detection circuit 221.

  At time T <b> 12, since the falling signal is propagated in the signal 228, the voltage change detection circuit 220 outputs Low to the voltage change detection signal 218. Since the voltage of the signal 228 is higher than that of the signal 222, current flows from the signal 228 to the signal 222, indicating that the current direction detection circuit 221 outputs High to the current direction detection signal 219.

  At time T13, the decoder circuit 217 receives the voltage change detection signal 218 and the current direction detection signal 219. Then, the decoder circuit 217 outputs High to the decode signal (ST4) 232. The pull-up resistor damping resistance selection table 215 inputs High of the decode signal (ST4) 232, and outputs Low to the pull-up resistor selection signal 214 and Low to the damping resistor selection signal 216 set in the table. The pull-up resistor selection circuit 213 receives the pull-up resistor selection signal 214 and sets the signal 234 not to be pulled up. Further, the damping resistance selection circuit 233 receives the damping resistance selection signal 216 and indicates that the damping resistor 253 is short-circuited.

  The impedance matching units 300 and 301 are set as shown in FIG. 13 by the above operation. FIG. 13 is a diagram for explaining a setting state of the impedance matching circuit according to the first embodiment of the present invention.

  Note that the times T14 to T19 are the same as the times T2 to T7, and thus description thereof is omitted.

  Next, FIG. 11 is a timing chart when a signal is output from the ICE side to the microcomputer side according to the first embodiment of the present invention. At times T20 to T31, the debug processing circuit 227 outputs a debug command to the on-chip debug circuit 23 via the open drain output buffer 210, the impedance matching circuit 301, the bidirectional transmission line 105, the impedance matching circuit 300, and the input buffer 102. Indicates the elapsed time of the status.

  At time T20, when the open drain output buffer 210 outputs Low, the falling signal is propagated to the input / output signal 234, the damping resistance selection circuit 233, and the signal 228, and to the voltage change detection circuit 220 and the current direction detection circuit 221. Indicates that the signal is input and propagated to the signal 222.

  At time T <b> 21, when a falling signal is input to the signal 228, the voltage change detection circuit 220 outputs Low to the voltage change detection signal 218. Since the falling signal is propagated, the voltage of the signal 222 becomes higher than the signal 228, the current flows from the signal 222 to the signal 228, and the current direction detection circuit 221 outputs Low to the current direction detection signal 219. Show.

  At time T22, the decoder circuit 217 inputs Low as the voltage change detection signal 218 and Low as the current direction detection signal 219. Then, the decoder circuit 217 outputs High to the decode signal (ST2) 230. The pull-up resistor damping resistance selection table 215 inputs High of the decode signal (ST2) 230, outputs Low to the pull-up resistor selection signal 214 set in the table, and sets the damping resistor set in the table High is output to the selection signal 216. The pull-up resistor selection circuit 213 sets the signal 234 not to be pulled up when Low is input to the pull-up resistor selection signal 214. The damping resistance selection circuit 233 indicates that the damping resistor 253 is inserted when High is input to the damping resistance selection signal.

  At time T23, the signal 222 passes through the bidirectional transmission line 105, propagates to the signal 22, and propagates to the signal 28 via the current direction detection circuit 21.

  At time T24, since the falling signal is propagated to the signal 28, the voltage change detection circuit 20 outputs Low to the voltage change detection signal 18. Since the voltage of the signal 28 is higher than that of the signal 22, current flows from the signal 28 to the signal 22, indicating that the current direction detection circuit 21 outputs High to the current direction detection signal 19.

  At time T25, the decoder circuit 17 receives the voltage change detection signal 18 and the current direction detection signal 19. Then, the decoder circuit 17 outputs High to the decode signal (ST4) 32. The pull-up resistor damping resistor selection table 15 receives the High of the decode signal (ST4) 32, and outputs Low to the pull-up resistor selection signal 14 and Low to the damping resistor selection signal 16 set in the table. . The pull-up resistor selection circuit 13 receives the pull-up resistor selection signal 14 and sets the signal 34 not to be pulled up. The damping resistance selection circuit 33 inputs the damping resistance selection signal 16 and indicates that the damping resistor 53 is short-circuited.

  With the above operation, the impedance matching units 300 and 301 are set as shown in FIG. FIG. 14 is a diagram for explaining a setting state of the impedance matching circuit according to the first embodiment of the present invention.

  At time T26, when the open drain output buffer 210 outputs High, the rising signal propagates to the input / output signal 234, the damping resistance selection circuit 233, and the signal 228, and is input to the voltage change detection circuit 220 and the current direction detection circuit 221. And propagate to signal 222.

  At time T <b> 27, when a rising signal is input to the signal 228, the voltage change detection circuit 220 outputs High to the voltage change detection signal 218. Since the rising signal is propagated, the voltage of the signal 228 becomes higher than the signal 222, the current flows from the signal 228 to the signal 222, and the current direction detection circuit 221 indicates that the current direction detection signal 219 outputs High. .

  At time T28, the decoder circuit 217 receives the voltage change detection signal 218 as High and the current direction detection signal 219 as High. Then, the decoder circuit 217 outputs High to the decode signal (ST1) 229. The pull-up resistor damping resistance selection table 215 inputs High of the decode signal (ST1) 229, outputs High to the pull-up resistor selection signal 214 set in the table, and sets the damping resistor set in the table Low is output to the selection signal 216. The pull-up resistor selection circuit 213 pulls up the signal 234 with the pull-up resistor 52 when High is input to the pull-up resistor selection signal 214. Further, the damping resistance selection circuit 233 indicates that the damping resistor 253 is set to be short-circuited by inputting Low to the damping resistance selection signal 216.

  At time T <b> 29, the signal 222 passes through the bidirectional transmission line 105, propagates to the signal 22, and propagates to the signal 28 via the current direction detection circuit 21.

  At time T <b> 30, since the rising signal is propagated to the signal 28, the voltage change detection circuit 20 outputs High to the voltage change detection signal 18. Since the voltage of the signal 22 is higher than that of the signal 28, current flows from the signal 22 to the signal 28, indicating that the current direction detection circuit 21 outputs Low to the current direction detection signal 19.

  At time T31, the decoder circuit 17 receives the voltage change detection signal 18 and the current direction detection signal 19. Then, the decoder circuit 17 outputs High to the decode signal (ST3) 31. The pull-up resistor damping resistance selection table 15 receives High of the decode signal (ST3) 31 and outputs Low to the pull-up resistor selection signal 14 and Low to the damping resistor selection signal 16 set in the table. . The pull-up resistor selection circuit 13 receives the pull-up resistor selection signal 14 and sets the signal 34 not to be pulled up. The damping resistance selection circuit 33 inputs the damping resistance selection signal 16 and indicates that the damping resistor 53 is short-circuited.

  The impedance matching units 300 and 301 are set as shown in FIG. 15 by the above operation. FIG. 15 is a diagram for explaining a setting state of the impedance matching circuit according to the first embodiment of the present invention.

  The first embodiment of the present invention can also be expressed as follows. That is, it can be said that the invention relates to a bidirectional transmission circuit that is a bidirectional transmission circuit that inputs / outputs signals to / from the bidirectional transmission line and that outputs signals simultaneously from both output circuits. The bidirectional transmission circuit inputs a signal output from one side, inputs a first impedance matching unit that matches the impedance of the bidirectional transmission line, and a signal output simultaneously from the other side, and inputs the bidirectional signal. A second impedance matching unit that matches the impedance of the transmission line.

  Here, the first and second impedance matching units are the same as the current direction detection circuit that detects the direction of the current flowing to each side when signals are output from both output circuits to the bidirectional transmission line simultaneously. A voltage change detection circuit for detecting a change in voltage on each side, a voltage change detection signal output from the current direction detection circuit and the voltage change detection circuit, and a current direction detection signal are input. A decoder circuit that outputs a decode signal representing a change in the output signal, and a pull-up resistor that inputs the decode signal output from the decoder circuit and outputs a selection signal that controls selection of a damping resistor and a pull-up resistor Damping resistor selection table and pull-up resistor selection controlled by the selection signal to select the pull-up resistor Having a damping resistance selection circuit for inserting the circuit and the damping resistor.

  Each of the first and second impedance matching units monitors changes in both output signals. The first impedance matching unit connects a pull-up resistor to the output signal when the rising edge of the output signal on one side (the microcomputer 25 side in FIG. 1) is detected, and inserts a damping resistor when the falling edge is detected. When the rising or falling edge of the output signal on the ICE 226 side of 1 is detected, the pull-up resistor and the damping resistor are not inserted. When the impedance matching unit connected to the other (ICE 226 side in FIG. 1) detects the rising edge of the output signal on the other side (ICE 226 side in FIG. 1), it connects a pull-up resistor to the output signal and detects the falling edge. When a damping resistor is inserted and one of the output signals (on the microcomputer 25 side in FIG. 1) detects rising or falling, the pull-up resistor and the damping resistor are not inserted.

  As a result, when an open drain is used for the output buffer in Patent Document 1, the problem of signal reflection and malfunction can be solved. The reason for solving the above problem will be described below with reference to FIGS.

  First, signal changes of two output circuits connected to the bidirectional transmission line are monitored. When the signal rises, the pull-up resistor 52 and the resistor 252 are inserted as shown in FIGS. 12 and 14 according to the pull-up resistor damping resistor selection table, and the damping resistor 53 and the resistor are inserted. Short 253. As a result, the resistance value 50Ω of the pull-up resistor 52 and the resistor 252 is connected in parallel to the output impedance (infinite Ω) of the open drain output buffer 10. In this case, the output impedance is 50Ω, and impedance matching with the bidirectional transmission line 105 can be obtained. Therefore, the input signal 212 does not cause signal reflection and does not malfunction.

  When the signal falls, the pull-up resistor 52 and the resistor 252 are removed as shown in FIGS. 13 and 15 according to the above table, and the damping resistor 53 and the resistor 253 are set to 30Ω. insert. Thereby, the resistance value 30Ω of the damping resistor 53 and the resistor 253 is connected in series to the output impedance (about 20Ω) of the open drain output buffer 10. In this case, impedance matching with the bidirectional transmission line 105 can be obtained by setting the resistance value to 50Ω. Therefore, the input signal 212 does not cause signal reflection, and high-speed communication is possible without causing malfunction. Therefore, the problem caused by Patent Document 1 can be solved.

  From the above, the effect of the first embodiment of the present invention is that no malfunction occurs even in a bidirectional transmission line using an open drain having a high communication speed. The reason is that it has a current direction detection circuit, a voltage change detection circuit, a decoder circuit, a pull-up resistor damping resistor selection table, a pull-up resistor selection circuit, and a damping resistor selection circuit. This is because a 50Ω pull-up resistor is inserted on the output side and a 30Ω damping resistor is inserted at the time of falling so that the output impedance matches the impedance of the bidirectional transmission line.

<Other embodiments of the invention>
As described above, the pull-up resistor according to the first embodiment of the present invention may be replaced with a pull-down resistor. In that case, the position where the change direction of the voltage for the first output signal is detected as “rising” is referred to as “falling”, and the change direction of the voltage for the first output signal is set to “rise”. A portion that has been detected as “falling” may be regarded as “rising”. Furthermore, the pull-up resistor according to the first embodiment of the present invention may be at least a load resistor. In this case, “rise” can be expressed as a first direction, and “fall” can be expressed as a second direction opposite to the first direction. That is, when the detection circuit 35 detects that the change in the voltage of the first output signal is in the first direction, the resistance connection circuit 36 connects the load resistor to the first output signal and performs bidirectional processing. Output to the transmission line 105. In addition, when the detection circuit 35 detects that the change in the voltage of the first output signal is in the second direction, the resistance connection circuit 36 connects the damping output to the first output signal and performs bidirectional processing. Output to the transmission line 105. Further, when a change in the voltage of the second output signal is detected by the detection circuit 35, the resistance connection circuit 36 is connected to the second output signal without connecting either a load resistor or a damping resistor. Output to the output buffer 10.

  Further, the present invention may be as follows. An impedance matching method for a bidirectional transmission circuit that performs bidirectional transmission between a first open drain output buffer and a second open drain output buffer, the bidirectional transmission circuit comprising: a load resistor; a damping resistor; In the bidirectional transmission circuit, the first output signal from the first open drain output buffer and the second output signal from the second open drain output buffer are detected, and the first output signal is detected. When it is detected that the change in the voltage of the output signal is in the first direction, the load resistor is connected to the first output signal and output to the second open drain output buffer, and the first output signal Is detected in a second direction opposite to the first direction, the damping resistor is connected to the first output signal and the second open circuit is connected. When output to an in-output buffer and a change in the voltage of the second output signal is detected, the first open drain output is performed without connecting either the load resistor or the damping resistor to the second output signal. Output to buffer.

  The present invention also relates to a bidirectional transmission circuit for inputting / outputting signals to / from a bidirectional transmission line, and more particularly to an on-chip debugging technique for debugging a microcomputer program.

  Furthermore, the present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the gist of the present invention described above.

10, 210 Open drain output buffer 11, 211 Output signal 12, 212 Input signal 13, 213 Pull-up resistor selection circuit 14, 214 Pull-up resistor selection signal 15, 215 Pull-up resistor damping resistor selection table 16, 216 Damping resistor selection signal 17, 217 Decoder circuit 18, 218 Voltage change detection signal 19, 219 Current direction detection signal 20, 220 Voltage change detection circuit 21, 221 Current direction detection circuit 22, 222 Signal 23 On-chip debug circuit 24 CPU
25 Microcomputer 226 ICE
227 Debug processing circuit 28, 228 Signal 29, 229 Decode signal (ST1)
30, 230 Decode signal (ST2)
31,231 Decode signal (ST3)
32, 232 decode signal (ST4)
33, 233 Damping resistor selection circuit 34, 234 Input / output signal 35, 235 Detection circuit 36, 236 Resistor connection circuit 52, 53 Resistor 252, 253 Resistor 60, 61, 62 Resistor 63 Capacitor 64 Amplifier 65, 66 Signal 70 , 71 Resistor 72 Amplifier 73, 74 Signal 80, 81 Inverter 82, 83, 84, 85 AND gate 90 Inverter 91 Transistor 95, 96 Transistor 97 Inverter 101, 103 Output buffer 102, 104 Input buffer 105 Bidirectional transmission line 106, 110 switching unit 107, 111 switch 108, 112 resistor 109, 113 short line 120, 121 input / output circuit 131 signal 300, 301 impedance matching circuit 302 bidirectional transmission circuit IC1, IC2 half Conductor elements T1 to T31 Time Ro1, Ro2 Resistance value Rs1, Rs2 Resistance value Zo Characteristic impedance

Claims (10)

An impedance matching circuit having an open drain output buffer connected to a first terminal and a bidirectional transmission line connected to a second terminal,
Load resistance,
Damping resistance,
A resistor connection circuit that connects either the load resistor or the damping resistor or none of them,
A detection circuit for detecting a first output signal from the open drain output buffer and a second output signal from the bidirectional transmission line;
The resistance connection circuit is:
When the detection circuit detects that the voltage change of the first output signal is in the first direction, the load resistor is connected to the first output signal and output to the bidirectional transmission line,
When the detection circuit detects that the voltage change of the first output signal is in the second direction opposite to the first direction, the damping resistor is connected to the first output signal. Output to the bidirectional transmission line,
When a change in the voltage of the second output signal is detected by the detection circuit, the second output signal is output to the open drain output buffer without connecting either the load resistor or the damping resistor. Impedance matching circuit characterized by The load resistor is a pull-up resistor,
The resistance connection circuit is:
When the rising edge of the first output signal is detected by the detection circuit, the pull-up resistor is connected to the first output signal and output to the bidirectional transmission line,
When the detection circuit detects a fall of the first output signal, the damping resistor is connected to the first output signal and output to the bidirectional transmission line,
When the rising or falling edge of the second output signal is detected by the detection circuit, the second output signal is output to the open drain output buffer without connecting either the pull-up resistor or the damping resistor. The impedance matching circuit according to claim 1, wherein: The detection circuit includes:
A current direction detection circuit for detecting a direction in which a current flows with respect to the first output signal and the second output signal;
A voltage change detection circuit for detecting a change in voltage with respect to the first output signal and the second output signal,
Whether the resistance connection circuit performs connection for each of the load resistance and the damping resistance based on the direction of the current detected by the current direction detection circuit and the change of the voltage detected by the voltage change detection circuit. The impedance matching circuit according to claim 1, wherein whether or not to select is selected. The detection circuit includes:
Based on the direction of the current detected by the current direction detection circuit and the change in voltage detected by the voltage change detection circuit, a selection signal for controlling selection of each of the damping resistor and the load resistor is sent to the resistor connection circuit A selection table to output to
The impedance matching circuit according to claim 3, wherein the resistance connection circuit selects whether or not to connect each of the load resistance and the damping resistance in accordance with the selection signal. The selection table is
The direction of the current detected by the current direction detection circuit is detected from the open drain output buffer to the bidirectional transmission line, and the voltage change detection circuit detects a change in voltage for the first output signal. If it is detected that the direction is 1, the selection signal is output to select the load resistance;
The direction of the current detected by the current direction detection circuit is detected from the open drain output buffer to the bidirectional transmission line, and the voltage change detection circuit detects a change in voltage for the first output signal. If the direction of 2 is detected, the selection signal is output to select the damping resistor,
When the direction of the current detected by the current direction detection circuit is detected as the open drain output buffer from the bidirectional transmission line, the selection signal is selected so that neither the load resistor nor the damping resistor is selected. The impedance matching circuit according to claim 4, wherein: The current direction detection circuit outputs the detected current direction as a current direction detection signal,
The voltage change detection circuit outputs the detected voltage change as a voltage change detection signal,
The detection circuit includes:
A decoder circuit for outputting to the selection table a decode signal representing a change in the current direction detection signal and the voltage change detection signal input from the current direction detection circuit and the voltage change detection circuit;
The selection table outputs, as the selection signal, a first connection presence / absence signal indicating whether or not the load resistor is connected and a second connection presence / absence signal indicating whether or not the damping resistor is connected according to the decode signal. ,
The resistance connection circuit is:
A load resistance selection circuit that selects whether or not to connect the load resistance according to the first connection presence / absence signal;
6. The impedance matching circuit according to claim 4, further comprising: a damping resistance selection circuit that selects whether to connect the damping resistor according to the second connection presence / absence signal. An impedance matching method for a bidirectional transmission circuit that performs bidirectional transmission between a first open drain output buffer and a second open drain output buffer,
The bidirectional transmission circuit has a load resistor and a damping resistor,
In the bidirectional transmission circuit,
Detecting a first output signal from the first open drain output buffer and a second output signal from the second open drain output buffer;
If it is detected that the voltage change of the first output signal is in the first direction, the load resistor is connected to the first output signal and output to the second open drain output buffer;
When it is detected that the change in the voltage of the first output signal is in the second direction opposite to the first direction, the damping resistor is connected to the first output signal and the second open signal is connected. Output to the drain output buffer,
When a change in the voltage of the second output signal is detected, the second output signal is output to the first open drain output buffer without connecting either the load resistor or the damping resistor. Impedance matching method. The load resistor is a pull-up resistor,
When the rising edge of the first output signal is detected, the pull-up resistor is connected to the first output signal and output to the second open drain output buffer;
When the falling edge of the first output signal is detected, the damping resistor is connected to the first output signal and output to the second open drain output buffer;
When the rising or falling edge of the second output signal is detected, the second output signal is output to the first open drain output buffer without connecting either the pull-up resistor or the damping resistor. The impedance matching method according to claim 7. A bidirectional transmission circuit that performs bidirectional transmission between a first open drain output buffer and a second open drain output buffer,
A bidirectional transmission line;
The first open drain output buffer is connected to a first terminal, the bidirectional transmission line is connected to a second terminal, and includes a first load resistor and a first damping resistor. An impedance matching circuit;
The second transmission line is connected to a third terminal, the second open drain output buffer is connected to a fourth terminal, and a second load resistor and a second damping resistor are included. An impedance matching circuit;
With
The first impedance matching circuit includes:
Detecting a first output signal from the first open drain output buffer and a second output signal from the bidirectional transmission line;
When it is detected that the voltage change of the first output signal is in the first direction, the first load resistor is connected to the first output signal and output to the bidirectional transmission line,
When it is detected that the change in the voltage of the first output signal is in the second direction opposite to the first direction, the first damping resistor is connected to the first output signal and the both Output to the transmission line
When detecting a change in the voltage of the second output signal, the first open drain output buffer without connecting either the first load resistor or the first damping resistor to the second output signal. Output to
The second impedance matching circuit includes:
Detecting a third output signal from the bidirectional transmission line and a fourth output signal from the second open drain output buffer;
When it is detected that the change in the voltage of the fourth output signal is in the first direction, the second load resistor is connected to the first output signal and output to the bidirectional transmission line,
If it is detected that the change in the voltage of the fourth output signal is in the second direction, the second damping resistor is connected to the fourth output signal and output to the bidirectional transmission line,
If a change in the voltage of the third output signal is detected, the second open drain output buffer without connecting the second load resistor and the second damping resistor to the third output signal. A bidirectional transmission circuit characterized by output to The first load resistor is a first pull-up resistor;
The first impedance matching circuit includes:
When the rising edge of the first output signal is detected, the first pull-up resistor is connected to the first output signal and output to the bidirectional transmission line,
When detecting the fall of the first output signal, connect the first damping resistor to the first output signal and output to the bidirectional transmission line,
When the rising or falling edge of the second output signal is detected, neither the first pull-up resistor nor the first damping resistor is connected to the second output signal. Output to the output buffer,
The first load resistor is a second pull-up resistor;
The second impedance matching circuit includes:
When detecting the rise of the fourth output signal, connect the second pull-up resistor to the fourth output signal and output to the bidirectional transmission line,
When the falling of the fourth output signal is detected, the second output resistor is connected to the fourth output signal and output to the bidirectional transmission line,
When the rising or falling edge of the third output signal is detected, the second open drain is connected to the third output signal without connecting any of the second pull-up resistor and the second damping resistor. The bidirectional transmission circuit according to claim 9, wherein the bidirectional transmission circuit outputs to an output buffer.

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