JP2012133675A - Image processing device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an image processing device capable of more safely configuring a programmable logic circuit.SOLUTION: A control unit 104 selects a configuration method for loading circuit data into a programmable logic circuit 100 among plural methods. A data transmission route change unit 101 selects any transmission route among plural transmission routes transmitting the circuit data according to the method selected by the control unit 104. The control unit 104 monitors configuration operation of the programmable logic circuit 100, and when configuration by a first method fails, selects a second method.

Description

  The present invention relates to an image processing apparatus that includes a programmable logic circuit such as an FPGA (Field Programmable Gate Array) and performs a configuration for reading circuit data into the programmable logic circuit.

  A programmable logic circuit such as an FPGA can realize a desired function by an operation called “configuration” that reads circuit data (hereinafter referred to as “configuration data”) held in a recording device outside the chip. it can. Such a programmable logic circuit is often used in medical image processing apparatuses such as electronic endoscopes. In medical devices that require high reliability, it is a very important issue to ensure normal circuit operation. However, there is a problem in that a desired function cannot be obtained if the configuration data read into the programmable logic circuit is damaged or some failure occurs in the process of reading the configuration data.

  As a method for solving such a problem, a configuration apparatus for a programmable logic device described in Patent Document 1 is disclosed. In this configuration apparatus, data sets of configuration data (1) to configuration data (n), which are the same data, are stored in a memory. The configuration device sequentially detects errors in the data read from the memory during configuration.

  When an error is detected, the configuration device reads the corresponding data from the other configuration data set and performs configuration. For example, when the configuration data (1) is used as the configuration data, if there is an error in the read data, the configuration device transmits data corresponding to the data in which the error is detected from the configuration data (2). read out. The error occurrence position is stored and is overwritten with normal data after the configuration is completed. As a result, even when the data in the memory changes due to some factor, a normal configuration is possible.

JP 2007-265056 A

  Japanese Patent Application Laid-Open No. 2004-228561 does not describe any troubles other than the damage of some data in the memory. Other factors that hinder normal configuration include failure of the memory itself, disconnection on the board, or temporary disturbance, and countermeasures against these are also required.

  SUMMARY An advantage of some aspects of the invention is that it provides an image processing apparatus that can more safely configure a programmable logic circuit.

  The present invention has been made to solve the above problems, and is an image processing apparatus using a programmable logic circuit, and a configuration method for reading circuit data into the programmable logic circuit is selected from a plurality of methods. A path control unit that selects one of a plurality of transmission paths for transmitting the circuit data in accordance with the selected method, and the path control unit includes a configuration of the programmable logic circuit; The image processing apparatus is characterized in that the operation is monitored and the second method is selected when the configuration by the first method fails.

  In the image processing apparatus of the present invention, a slave method is used for the second method.

  In the image processing apparatus of the present invention, a serial method is used for the second method.

  In the image processing apparatus of the present invention, a JTAG (Joint Test Action Group) method is used for the second method.

  In the image processing apparatus of the present invention, the path control unit selects the second method when the configuration by the first method fails a plurality of times.

  In the image processing apparatus of the present invention, the path control unit performs control to notify a warning message to the user when the configuration by the first method fails.

  In the image processing apparatus according to the aspect of the invention, the path control unit may determine whether the configuration according to the first method is performed immediately after the power is turned on, or the configuration is already completed with some circuit data. If the configuration according to the first method fails immediately after power-on including the reconfiguration, the programmable logic circuit is not activated. A warning message is notified, and if the configuration by the first method fails when the programmable logic circuit is already configured by some circuit data, the configuration by the second method is performed. It is characterized by .

  In the image processing apparatus according to the aspect of the invention, the path control unit may determine whether the configuration according to the first method is performed immediately after the power is turned on, or the configuration is already completed with some circuit data. A determination circuit for determining whether or not the configuration according to the second method has been performed immediately after power-on, and when the failure has occurred, the programmable logic circuit is not normally activated and a warning message is displayed, In a state where the programmable logic circuit is already configured with some circuit data and the configuration by the second method is failed, a configuration for reading emergency circuit data is performed.

  In the image processing apparatus of the present invention, the emergency circuit data is circuit data that realizes only essential basic functions different from the circuit data used in the first and second methods. To do.

  In the image processing apparatus of the present invention, the emergency circuit data is the same data as the circuit data read into the programmable logic circuit before performing the configuration according to the first method. And

  According to the present invention, it is possible to more safely configure a programmable logic circuit by switching a plurality of configuration schemes and a plurality of circuit data transmission paths.

1 is a block diagram illustrating a configuration of an image processing apparatus according to a first embodiment of the present invention. It is a flowchart which shows the procedure of operation | movement of the image processing apparatus by 1st embodiment of this invention. It is a flowchart which shows the procedure of operation | movement of the image processing apparatus by 1st embodiment of this invention. It is a block diagram which shows the structure of the image processing apparatus by 2nd embodiment of this invention. It is a block diagram which shows the structure of the image processing apparatus by 3rd embodiment of this invention. It is a block diagram which shows the structure of the image processing apparatus by 4th embodiment of this invention. It is a block diagram which shows the structure of the image processing apparatus by 5th embodiment of this invention.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

(First embodiment)
First, a first embodiment of the present invention will be described. FIG. 1 shows the configuration of the image processing apparatus according to the present embodiment. The image processing apparatus shown in FIG. 1 includes a programmable logic circuit 100, a data transmission path switching unit 101, a dedicated ROM 102, a shared ROM 103, and a control unit 104.

  The programmable logic circuit 100 performs various image processing on an image signal (not shown) according to the processing content of the configuration data. The dedicated ROM 102 stores configuration data for configuring the programmable logic circuit 100 using the first configuration method. The shared ROM 103 stores various data used by the control unit 104 and data used when the programmable logic circuit 100 is configured by the second configuration method.

  The control unit 104 determines the configuration method of the programmable logic circuit 100 from among a plurality of configuration methods, and outputs various control signals to the programmable logic circuit 100. Furthermore, the control unit 104 plays other roles such as control of the entire system after the configuration is completed. The data transmission path switching unit 101 selects one of the configuration data from the dedicated ROM 102 and the configuration data from the shared ROM 103 input via the system bus 108 to select the configuration data of the programmable logic circuit 100. Input to the input terminal. That is, the data transmission path switching unit 101 has a function of switching the transmission path of configuration data. The data transmission path switching unit 101 can be realized by a simple means such as a tristate buffer or wired OR.

  At the time of configuration, the control unit 104 outputs a mode instruction signal 107, which is a control signal for instructing the first configuration method, to the programmable logic circuit 100 and the data transmission path switching unit 101. Direct the configuration of The control unit 104 monitors the configuration operation of the programmable logic circuit 100, and does nothing if the configuration ends normally, but changes the configuration method to the second configuration method if the configuration ends abnormally. Outputs the mode instruction signal 107 to the programmable logic circuit 100 and the data transmission path switching unit 101 to instruct the configuration in the second configuration method

  FIG. 2 shows an operation at the time of configuration in the present embodiment. Hereinafter, the operation of this embodiment will be described with reference to FIGS.

  The configuration method of the programmable logic circuit is roughly classified as follows: Master parallel, 2. 2. Master serial, 3. Slave parallel; Slave serial, 5. There is JTAG (Joint Test Action Group). The master method is a method in which a programmable logic circuit spontaneously acquires configuration data from an external storage device, and the slave method is a method in which an external device inputs configuration data to the programmable logic circuit. The parallel system is a system for supplying configuration data as a multi-bit signal, and the serial system is a system for supplying configuration data as a 1-bit signal.

  In the present embodiment, the first configuration method is “master parallel” and the second configuration method is “slave parallel”.

  Prior to execution of configuration performed immediately after power-on or the like, the control unit 104 sets the configuration method to “master parallel” and outputs a mode instruction signal 107 to the data transmission path switching unit 101 and the programmable logic circuit 100. The data transmission path switching unit 101 uses the configuration data supplied to the programmable logic circuit 100 as data from the dedicated ROM 102 based on the mode instruction signal 107.

  When the configuration is started (step S100), the control unit 104 refers to the configuration status signal 106 of the programmable logic circuit 100 and confirms whether the configuration has been completed normally (step S101). When normal end is confirmed, the operation shifts to normal operation. When the normal end cannot be confirmed, the control unit 104 instructs the configuration by the first configuration method again. Thereafter, the above process is repeated until the normal end is confirmed or the predetermined number of times is executed (step S102). In the configuration using the master parallel method, the programmable logic circuit 100 starts the configuration spontaneously when the power is turned on, but the configuration is set in the programmable logic circuit 100 by the configuration control signal 105 from the control unit 104. It is also possible to start.

  Since the time required for the configuration is self-evident, for example, if the configuration is not completed even after a predetermined time has elapsed since the start of the configuration, it can be considered that some abnormality has occurred. When the control unit 104 is realized by a CPU, the presence or absence of an abnormality can be easily determined by using a timer function.

  In addition to physical failures such as ROM failures and signal line breaks, electrical failures due to disturbances can be considered as factors that hinder normal configuration. It should be noted that an abnormality due to a disturbance or the like is not constant and is likely to be resolved after a while. On the other hand, the second configuration method, which will be described later, requires a longer configuration time than the first configuration method. By not switching to the second configuration method immediately after a single failure, the configuration time is unnecessarily prolonged due to a sensitive response to temporary configuration abnormalities caused by disturbances, etc. This can be prevented.

  If the end of normal configuration cannot be confirmed even after repeating the configuration in the first configuration method a predetermined number of times, the control unit 104 changes the configuration method to “slave parallel”, and the data transmission path switching unit 101 and A mode instruction signal 107 is output to the programmable logic circuit 100. Based on the mode instruction signal 107, the data transmission path switching unit 101 switches configuration data supplied to the programmable logic circuit 100 from data from the dedicated ROM 102 to data from the shared ROM 103.

  In the slave system, it is necessary to input a control signal to the programmable logic circuit. Therefore, the control unit 104 performs configuration in slave parallel by outputting the configuration control signal 105 to the programmable logic circuit 100 in parallel with the reading of the configuration data from the shared ROM 103 (step S103). ).

  The control unit 104 monitors the configuration state of the programmable logic circuit 100 based on the configuration status signal 106, and confirms whether the configuration has been completed normally (step S104). When the normal end is confirmed, the control unit 104 outputs a warning message for prompting the user to check (step S105). Regardless of which configuration method is used, if the desired function is finally obtained, it appears to the user as operating normally. However, the situation that the configuration by the first configuration method has failed is not preferable, and some countermeasure should be taken immediately. Therefore, by warning the user at the stage where the configuration using the first configuration method has failed, the possibility of a problem occurring in the future can be reduced.

  The warning message is notified to the user via a monitor (not shown) or a user interface on the apparatus. The control signal that triggers the output of the warning message is generated by the control unit 104, but another function (not shown) may be in charge of notification to the actual user. If the completion of normal configuration cannot be confirmed by the confirmation in step S104, the operation changes depending on the situation where the configuration is executed.

  The timing for performing the configuration is as follows: At startup, 2. There are two ways to change the function of the programmable logic circuit after startup. If a problem occurs during startup, it is desirable not to let the user use the device itself in order to prevent problems caused by continuing to use the device. On the other hand, in a state where the apparatus is already activated, it may be a problem that the operation of the apparatus is suddenly stopped. In particular, it is not desirable to stop the image display during observation with an electronic endoscope.

  Therefore, the control unit 104 determines whether the state when the configuration is performed is a start-up state or is operating (step S107), and performs different control depending on the determination result. If the configuration is performed at the time of activation, the control unit 104 outputs a warning message that prompts the user to check and repair, and then stops the activation (step S106).

  On the other hand, if the configuration is performed during the operation after starting, the control unit 104 outputs a warning message for prompting the user to check and repair (step S109), and then the emergency (emergency) Configuration is performed and the system is shifted to a safe state (step S108). Note that configuration during operation is performed to add new image processing while maintaining essential basic image processing, and normal image display is maintained during configuration operation. It is assumed that

  The control unit 104 has a determination circuit (not shown) that monitors the status of configuration, and whether the status at the time of configuration is at the time of startup immediately after power-on or during operation. Is determined by this determination circuit. This determination is performed based on, for example, a flag indicating that the configuration has been completed normally. When the configuration status signal 106 from the programmable logic circuit 100 indicates normal end, the control unit 104 sets a normal end flag.

  Thereafter, when reconfiguration is performed according to FIG. 2 to change the function of the programmable logic circuit 100, it is determined in step S107 that it is operating. On the other hand, when the reconfiguration is performed according to FIG. 2 at the time of activation, it is determined that it is at the time of activation because the normal end flag is not set in step S107.

  As an example of an emergency configuration: 1. Return to the original configuration For example, a simple configuration that performs the minimum processing can be considered. Even if the configuration with new data cannot be performed due to some reason, the configuration that has been operating until then may operate. If the original configuration data can be set, it can be avoided from an abnormal state for the time being, and the user can take appropriate actions.

  If there is a problem that some logic elements of a programmable logic circuit are physically damaged and the logic elements cannot be used, they may operate without using the logic elements. There is. Therefore, a small circuit having a minimum function may be mounted by configuration. Even in this case, it is possible to perform an appropriate action by the user by maintaining the minimum functions. The emergency configuration method may be either the first configuration method or the second configuration method.

  In FIG. 2, the configuration by the second configuration method (step S103) and the emergency configuration (step S108) are each performed only once. Of course, these configurations may be performed a plurality of times. Good.

  The control unit 104 can be realized by a CPU or the like, and the mode instruction signal 107 and the configuration control signal 105 may be generated using a general-purpose port. Of course, the control unit 104 can also be realized by a dedicated circuit.

  The process shown in FIG. 2 may be as shown in FIG. In FIG. 3, before starting the configuration in the second configuration method (step S103), it is determined whether it is activated or in operation (step S107). If the processing shown in FIG. 3 is followed, the device will not start if the configuration fails at startup. Compared with the process shown in FIG. 2, the criterion for not starting is stricter.

  According to the present embodiment, even if the configuration by the master parallel fails, the configuration by the slave parallel can be executed to cause the programmable logic circuit to perform a predetermined process. By enabling switching of a plurality of configuration schemes and a plurality of configuration data transmission paths as in this embodiment, the programmable logic circuit can be configured more safely. In particular, it is possible to cope with disconnection on the substrate by changing the transmission path of the configuration data. In addition, by changing the configuration data supply source together with the change of the transmission path, it is possible to cope with the problem of the recording apparatus that holds the configuration data.

  The slave parallel configuration is an emergency backup function, and the lower the cost, the better. In the present embodiment, the configuration data for backup is held in the shared ROM 103, which is an existing ROM accessible from the control unit 104, so there is no need to add a dedicated ROM for the backup function. Therefore, generation | occurrence | production of an additional cost can be suppressed.

  The cause of the configuration failure may be the influence of disturbance due to temporary electrical noise. In this case, if the configuration is executed again, the possibility of success is high. On the other hand, the second configuration method requires a longer configuration time than the first configuration method, so it is not desired to use it as much as possible. In this embodiment, it is possible to prevent the configuration time from becoming unnecessarily long by repeatedly switching for a while without switching the configuration method in one failure.

  Even if the configuration by the second configuration method is successful, the situation in which the configuration by the first configuration method has failed is not a situation that can be left unattended. In this embodiment, when the configuration by the first configuration method fails, it is possible to prevent the occurrence of a malfunction by outputting a warning prompting the user to check regardless of the result. it can.

  Further, in the process shown in FIG. 2, the control unit 104 determines that the configuration has been performed at the time of startup as a result of the determination when the configuration by the second configuration method has failed. A warning message is displayed to prevent the user from starting up normally. In addition, as a result of the determination when the configuration by the second configuration method has failed, if the configuration has already been performed with some data, the control unit 104 determines that the failure is in operation, and the emergency configuration is performed. The image data is configured so that image output can be secured continuously. For this reason, even if a failure occurs at the time of activation, the apparatus can be activated by an avoidance measure.

  In the process shown in FIG. 3, the control unit 104 records the implementation of the configuration immediately after the power is turned on, and when the configuration by the first configuration method fails, the configuration is turned on including the retry. It is determined whether it was performed at the time of starting immediately after that, or whether it was already performed with some data. As a result of the determination when the configuration by the first configuration method has failed, if the configuration has been performed at the time of startup, the control unit 104 displays a warning message and does not start normally, but is used by the user Do not let it. In addition, as a result of the determination when the configuration by the first configuration method has failed, if the configuration has already been made with some data, the control unit 104 determines that the failure is in operation, and the second configuration The configuration is performed by the configuration method, and control is performed so that image output can be secured continuously. For this reason, if a failure is found at the time of startup, it is possible to prevent the user from continuing to use the device while it is broken, and image output can be continued if a failure occurs during inspection.

  Further, in this embodiment, when the configuration in the first and second configuration methods fails, an emergency is made so that the circuit is limited to the minimum functions necessary for displaying the captured image on the monitor. Configuration for is done. Even if the configuration failure in the first configuration method is due to a failure in the programmable logic device, a small circuit with a low usage rate of elements in the programmable logic device can operate without problems. there is a possibility. In addition, since only the basic functions operate, it is possible to prevent the user from continuing to use the device while it is broken.

  In this embodiment, when configuration using the first and second configuration methods fails, it is also possible to perform configuration using the original configuration data that was operating normally before the configuration failed. It is. Even if the configuration with new configuration data fails, the original configuration data may operate normally.

(Second embodiment)
Next, a second embodiment of the present invention will be described. FIG. 4 shows the configuration of the image processing apparatus according to the present embodiment. 4, components having the same functions as those shown in FIG. 1 are given the same reference numerals and description thereof is omitted. 4, a control unit 201 is provided instead of the control unit 104 shown in FIG. 1, and a data transmission path switching unit 202 is provided instead of the data transmission path switching unit 101. In the present embodiment, the first configuration method is master parallel, and the second configuration method is slave serial.

  When the configuration in the first configuration method (master parallel) fails, the control unit 201 changes the configuration method to slave serial and outputs the mode instruction signal 107. In response to this, the data transmission path switching unit 202 switches the configuration data supplied to the programmable logic circuit 100 to the 1-bit serial data 200 from the shared ROM 103.

  However, since the data output of the dedicated ROM 102 is a parallel signal, only one bit among them can be switched. Therefore, as shown in FIG. 4, it is not always necessary to pass all the configuration data from the dedicated ROM 102 through the data transmission path switching unit 202. When the programmable logic circuit 100 has a terminal dedicated for serial input, the data transmission path switching unit 202 is not necessary.

  When reading the configuration data from the shared ROM 103, the control unit 201 performs parallel / serial conversion and generates serial data. The generated serial data is output as serial data 200 in synchronization with the configuration control signal 105 generated by the control unit 201. The programmable logic circuit 100 performs configuration using the serial data 200.

  When the control unit 201 is realized by a CPU, the serial data 200 may be output using a general-purpose port. Further, as in the first embodiment, the control unit 201 may be realized by a dedicated circuit.

  The serial method is inferior in data transfer capability and requires time for configuration as compared with the parallel method, but the number of necessary signal lines is overwhelmingly small. Therefore, in this embodiment, it is possible to reduce the number of terminals of the programmable logic circuit necessary for realizing the configuration function by the serial method. In addition, since the wiring cost of the substrate can be reduced, the cost for manufacturing the substrate can be reduced. Furthermore, the probability that a disconnection failure will be reduced.

(Third embodiment)
Next, a third embodiment of the present invention will be described. FIG. 5 shows the configuration of the image processing apparatus according to the present embodiment. 5, components having the same functions as those shown in FIGS. 1, 3, and 4 are given the same reference numerals and description thereof is omitted. In FIG. 5, a control unit 301 is provided instead of the control unit 104 shown in FIG. 1, and the data transmission path switching unit 101 is not provided. In the present embodiment, the first configuration method is the master parallel, and the second configuration method is the JTAG method.

  When the configuration in the first configuration method (master parallel) fails, the control unit 301 changes the configuration method to JTAG. In general, in a programmable logic circuit, since the JTAG terminal is a dedicated terminal, a data transmission path switching unit is unnecessary. Furthermore, JTAG is a configuration method that is implemented with the highest priority regardless of the configuration mode to be set, and does not require mode setting. Therefore, the control unit 301 outputs neither a mode instruction signal nor a configuration control signal.

  When the configuration data is read from the shared ROM 103, the control unit 301 performs parallel / serial conversion and generates serial data. The generated serial data is output to the JTAG terminal of the programmable logic circuit 100 as a JTAG signal 300 together with other control signals, and is input to the programmable logic circuit 100.

  When the control unit 301 is realized by a CPU, the JTAG signal 300 may be output using a general-purpose port. Further, as in other embodiments, the control unit 301 may be realized by a dedicated circuit.

  The programmable logic circuit is provided with a port for configuring an internal circuit with a JTAG standard signal, mainly for use in the trial production examination stage. Only five signals are required for JTAG, and in this embodiment, the mounting cost can be reduced. In addition, since the input terminal for supplying data to the programmable logic circuit is also different from the input terminal used in the first configuration method, the data series used in the first configuration method is completely disconnected. Is also available. Further, it is possible to eliminate the data transmission path switching unit, and the mounting cost can be further reduced.

(Fourth embodiment)
Next, a fourth embodiment of the present invention will be described. FIG. 6 shows the configuration of the image processing apparatus according to the present embodiment. In FIG. 6, components having the same functions as those shown in FIGS. 1, 3, 4, and 5 are given the same reference numerals and description thereof is omitted. In FIG. 6, a control unit 400 is provided instead of the control unit 104 shown in FIG. 1, a data transmission path switching unit 401 is provided instead of the data transmission path switching unit 101, and no dedicated ROM 102 is provided. In the present embodiment, the first configuration method is slave parallel, and the second configuration method is slave serial.

  The configuration in the slave parallel system is as follows. The control unit 400 outputs the mode instruction signal 107 to the data transmission path switching unit 401 and the programmable logic circuit 100 to set the mode, and then reads the configuration data from the shared ROM 103 and generates the configuration control signal 105. And output to the programmable logic circuit 100. The data transmission path switching unit 401 outputs configuration data from the shared ROM 103 input via the system bus 108 to the programmable logic circuit 100. The programmable logic circuit 100 is configured by configuration data from the shared ROM 103 selected by the data transmission path switching unit 401 and the configuration control signal 105.

  When the configuration in the first configuration method (slave parallel) fails, the control unit 400 changes the configuration method to slave serial and outputs the mode instruction signal 107. Thereafter, the control unit 400 reads the configuration data from the shared ROM 103 and executes parallel / serial conversion, outputs the execution result to the data transmission path switching unit 401 as serial data 402, and generates the configuration control signal 105. To the programmable logic circuit 100. The programmable logic circuit 100 is configured by serial data 402 and a configuration control signal 105.

  In the present embodiment, since the configuration data is supplied from the same ROM, it is not possible to deal with damage to the ROM itself, but it is possible to deal with disconnection on the substrate. It is difficult to change the function after startup in the master method, in which case the slave method is used. This embodiment is effective as a backup function in function change after activation.

  Of course, a storage unit other than the shared ROM 103 may be provided, and data for the second configuration method (slave serial) may be held in this storage unit. In that case, it is possible to deal with the above-mentioned problems of the ROM itself.

(Fifth embodiment)
Next, a fifth embodiment of the present invention will be described. FIG. 7 shows the configuration of the image processing apparatus according to the present embodiment. 7, components having the same functions as those shown in FIG. 1, FIG. 3, FIG. 4, FIG. 5, and FIG. In FIG. 7, a control unit 500 is provided instead of the control unit 104 shown in FIG. 1, and the data transmission path switching unit 101 and the dedicated ROM 102 are not provided. In the present embodiment, the first configuration method is a slave parallel and the second configuration method is a JTAG method.

  In the configuration by the first configuration method (slave parallel), the programmable logic circuit 100 is configured by the configuration data from the shared ROM 103 and the configuration control signal 105. When the configuration in the slave parallel fails, the control unit 500 performs parallel / serial conversion on the configuration data from the shared ROM 103, and outputs it as a JTAG signal 501 to the JTAG terminal of the programmable logic circuit 100 together with other control signals. The programmable logic circuit 100 is configured by a JTAG signal 501.

  As in the fourth embodiment, this embodiment is effective as a backup for function changes after startup. If there is no problem in terms of cost, adding a dedicated ROM will improve safety.

  As described above, the embodiments of the present invention have been described in detail with reference to the drawings. However, the specific configuration is not limited to the above-described embodiments, and includes design changes and the like without departing from the gist of the present invention. .

  100: Programmable logic circuit, 101, 202, 401 ... Data transmission path switching unit (path control unit), 102 ... Dedicated ROM, 103 ... Shared ROM, 104, 201, 301, 400, 500 ... Control unit (route control unit)

Claims (10)

An image processing apparatus using a programmable logic circuit,
Select a configuration method for reading circuit data into the programmable logic circuit from a plurality of methods, and select one of the transmission routes for transmitting the circuit data according to the selected method. A route control unit that
The path control unit monitors the configuration operation of the programmable logic circuit, and selects the second method when the configuration by the first method fails.   The image processing apparatus according to claim 1, wherein a slave method is used for the second method.   The image processing apparatus according to claim 1, wherein a serial system is used for the second system.   The image processing apparatus according to claim 1, wherein a JTAG (Joint Test Action Group) method is used for the second method.   The image processing apparatus according to claim 1, wherein the path control unit selects the second method when the configuration using the first method fails a plurality of times.   The image processing apparatus according to claim 1, wherein the path control unit performs control for notifying a user of a warning message when configuration by the first method fails. The path control unit determines whether the configuration according to the first method has been performed immediately after power-on or whether the configuration has already been completed with some circuit data. With
If the configuration by the first method is performed immediately after power-on including the configuration again and fails, a warning message is notified without starting the programmable logic circuit,
The configuration according to the second method is performed when the configuration by the first method fails when the programmable logic circuit is already configured by some circuit data. Item 8. The image processing apparatus according to Item 1. The path control unit determines whether the configuration according to the first method has been performed immediately after power-on or whether the configuration has already been completed with some circuit data. With
If configuration by the second method is performed immediately after power-on and fails, a warning message is displayed without starting the programmable logic circuit normally,
When the programmable logic circuit has already been configured with some circuit data and the configuration by the second method fails, a configuration for reading emergency circuit data is performed. The image processing apparatus according to claim 1.   9. The image processing apparatus according to claim 8, wherein the emergency circuit data is circuit data that realizes only essential basic functions different from the circuit data used in the first and second methods. .   9. The image processing according to claim 8, wherein the emergency circuit data is the same data as the circuit data read into the programmable logic circuit before performing the configuration according to the first method. apparatus.

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