JP2012120083A - Radio communication system equipped with dc off-set correction function - Google Patents

Abstract

PROBLEM TO BE SOLVED: To solve the problem in which a DC off-set correction that uses a conventional ΔΣ type A/D converter oscillates at an excessive input, and no correct A/D conversion ia available, and to cope with it, the off-set is measured by setting the gain of a gain amplifier to be minimum, only to cause low precision, and further, a digital low pass filter is required after A/D conversion for measuring a DC value, only to cause lower speed and larger circuit scale.SOLUTION: By using a quantizer inside a ΔΣ type A/D converter 308 at the time of DC off-set correction, a correct A/D conversion result is available at a high speed with no oscillation even under an excessive input, with a larger gain of a gain amplifier 305. Since no digital low pass filter is required on the output side of the A/D converter 308, only a small-scale extra circuit is required.

Description

  The present invention relates to a wireless communication system having a function of correcting a DC offset.

  In various wireless communication reception systems, mixers, gain amplifiers, and the like have DC offsets due to manufacturing variations. These DC components are amplified by a subsequent gain amplifier, which causes problems such as reducing the dynamic range of the signal processing circuit thereafter. For this reason, usually, means for removing the DC component or detecting and correcting the DC offset is taken.

  In a wireless communication system according to a certain prior art, a DC offset generated by a mixer or a gain amplifier is converted into a digital value by an A / D converter, and a digital value calculated so as to cancel the DC offset by an offset correction control unit is converted into a D / D By setting the A converter, the DC offset is corrected (see Patent Document 1).

Japanese Patent No. 4072061

  In the above conventional wireless communication system, if the DC value is too large, the input of the A / D converter may be saturated, so the gain of the gain amplifier needs to be sufficiently small. For this reason, the detection accuracy of the DC value is low.

  In many cases, a ΔΣ type is used for the A / D converter, and the ΔΣ type A / D converter oscillates and cannot be normally A / D converted when there is an excessive input. In addition, since a digital low-pass filter is required to obtain a DC value from a ΔΣ type A / D converter, the circuit scale is increased, and it takes time to obtain the DC value.

  An object of the present invention is to realize high-precision and high-speed DC offset correction with a small circuit.

  In order to solve the above problems, the present invention has taken the following solutions. In other words, the ΔΣ A / D converter has a quantizer inside, and this quantizer is a low-resolution high-speed A / D converter, and this quantization is used for DC value detection. By using the device, there is no oscillation problem and A / D conversion can be performed at high speed. For the low resolution problem, it is possible to increase the detection accuracy by increasing the gain of the gain amplifier. In other words, the gain of the gain amplifier is set large enough, and the input to the A / D converter is directly connected to the internal quantizer for A / D conversion, and the controller corrects the offset based on the conversion result. Therefore, the D / A converter is controlled so that the DC offset value approaches zero. According to this method, high-precision and high-speed DC offset detection can be performed, and a digital low-pass filter is not required and the circuit scale can be reduced.

  In order to flexibly cope with the offset fluctuation, the following solution is taken. That is, an LNA (Low Noise Amplifier) that receives and amplifies an RF signal, a mixer that mixes a signal input from the LNA with a signal from a local oscillator and converts the signal into an intermediate frequency signal, and a signal that is frequency-converted by the mixer A first gain amplifier that amplifies a signal, a filter that passes only a signal in a desired band among output signals of the first gain amplifier, a second gain amplifier that amplifies a signal input from the filter, An A / D converter for converting an output signal from the second gain amplifier into a digital signal, and a DC offset generated in these signal paths are connected to the output of the A / D converter, and DC A configuration including a first offset correction control unit for setting an initial offset correction value and a second offset correction control unit for correcting a DC offset as needed is adopted. Use. In the correction of the DC offset, first, the first offset correction control unit sets an initial correction value in the first gain amplifier, and then the second offset correction control unit performs the second offset as needed. When a correction value is set in the gain amplifier and the correction to the second gain amplifier is greater than a certain reference value, the second offset correction control unit changes the initial correction value of the first gain amplifier. .

  Alternatively, in the correction of the DC offset, first, the first offset correction control unit sets an initial correction value in the mixer, and then the second offset correction control unit corrects the second gain amplifier as needed. When the value is set and the correction to the second gain amplifier exceeds a certain reference value, the second offset correction control unit changes the initial correction value of the mixer.

  Alternatively, in the correction of the DC offset, first, the first offset correction control unit sets a first initial correction value in the mixer, and then the first offset correction control unit sets the first gain. A second initial correction value is set in the amplifier, and thereafter, the second offset correction control unit sets a correction value in the second gain amplifier as needed, and there is a reference for correction to the second gain amplifier. When the value is equal to or greater than the value, the second offset correction control unit changes the second initial setting value of the first gain amplifier, and further, the second reference value has a correction to the second gain amplifier. In the above case, the second offset correction control unit changes the first initial setting value of the mixer.

  Alternatively, in the correction of the DC offset, first, the first offset correction control unit sets an initial correction value in the mixer, and then the second offset correction control unit corrects the second gain amplifier as needed. If the value is set and the correction to the second gain amplifier is greater than a certain reference value, the second offset correction control unit sets the correction value to the first gain amplifier, and further When the correction to the gain amplifier of 2 is greater than or equal to the second reference value, the second offset correction control unit changes the initial setting value of the mixer.

  According to the present invention, high-accuracy and high-speed DC offset correction can be realized with a small circuit in a wireless reception system.

1 is a block diagram of a wireless communication system according to a first embodiment of the present invention. It is a block diagram which shows the internal structural example of the A / D converter in FIG. It is a flowchart figure which shows the offset correction control procedure in the radio | wireless communications system of FIG. It is a block diagram which shows the modification of FIG. It is a block diagram of the radio | wireless communications system which concerns on the 2nd Embodiment of this invention. FIG. 6 is a circuit diagram illustrating an internal configuration example of a first gain amplifier in FIG. 5. It is a block diagram which shows the modification of FIG. It is a block diagram of the radio | wireless communications system which concerns on the 3rd Embodiment of this invention. It is a block diagram which shows the modification of FIG. It is a block diagram of the radio | wireless communications system which concerns on the 4th Embodiment of this invention. It is a block diagram which shows the modification of FIG. It is a block diagram of the radio | wireless communications system which concerns on the 5th Embodiment of this invention. It is a block diagram which shows the modification of FIG.

  Hereinafter, a wireless communication system according to an embodiment of the present invention will be described in detail with reference to the drawings.

<< First Embodiment >>
FIG. 1 is a block diagram of a radio communication system according to the first embodiment of the present invention. According to FIG. 1, an RF signal is received by an antenna 301 and amplified by an LNA 302, mixed with a signal of a local oscillator 303 by a mixer 304, converted into an intermediate frequency (IF) signal, and amplified by a first gain amplifier 305. And sent to the filter 306. The filter 306 limits the signal to only a desired band, and the A / D converter 308 converts the signal into a digital signal.

  FIG. 2 is a diagram showing the internal structure of the A / D converter 308. The A / D converter 308 in FIG. 2 is a ΔΣ type A / D converter, and the switch 407 is connected to the output side of the operational amplifier 402 and disconnected from the input side of the A / D converter 308 during normal operation. Has been. The input signal passes through an integrator 408 composed of an operational amplifier 402, is converted into a digital value by a quantizer 401, is fed back through a current type D / A converter 404, and a difference from the input signal is obtained. Realize modulation. Note that the feed forward path 400 may be provided, and in this case, most of the input signal passes through the feed forward path 400.

  In FIG. 2, when the switch 407 is switched so as to use the DC offset correction measurement path 406, the input signal of the A / D converter 308 is directly input to the quantizer 401. Reference numeral 405 denotes a current type D / A converter.

  The DC offset is controlled by the offset correction control unit 311 in FIG. 1 according to the control procedure in FIG. That is, first, the A / D converter 308 is set to the DC offset control mode (601). This means that the switch 407 is connected to the input of the A / D converter 308 and the input signal is directly input to the quantizer 401. Next, the D / A converter 312 is set to the maximum negative value so that the DC offset is always negative in the initial state (602). Next, the gain of the first gain amplifier 305 is set (603), waits for a fixed time until the state after the setting change is stabilized (604), and the quantizer 401 determines whether or not the DC measurement value is positive (605). If the value remains negative, the set value of the D / A converter 312 is incremented in the positive direction (606) and returns to the standby state for a predetermined time (604). It is determined whether or not the current DC value is close to 0 by comparing with the measured value (607). If it is close, the current set value of the D / A converter 312 is held (608). The set value of the A converter 312 is held (609). By controlling in this way, the DC offset is minimized and correction is possible.

  Note that the A / D converter 308 may have the feedforward path 400 as described above. In this case, in the procedure (601) for setting the A / D converter 308 to the DC offset control mode, FIG. By stopping the operation without operating the operational amplifier 502 and the current type D / A converters 504 and 505 in the integrator 508 by the operation stop control signal 509, the input signal passes through the feedforward path 500 as shown in FIG. Then, it can be directly input to the quantizer 501. According to this configuration, the switch 407 existing in the signal path becomes unnecessary, and it is possible to prevent performance degradation due to the parasitic resistance and parasitic capacitance caused by the switch 407 during normal operation.

<< Second Embodiment >>
FIG. 5 shows a configuration according to the second embodiment of the present invention. In this configuration, a signal gain is further increased by adding a second gain amplifier 707 to the output of the filter 706 corresponding to the filter 306 in FIG. In particular, in the configuration of the present invention, the first offset correction is performed in order to suppress the DC offset remaining in the signal path, which is caused by the manufacturing process in the direct conversion type receiver or the like and causes the reception quality to deteriorate. A control unit 711 and a second offset correction control unit 723 are provided. For the antenna 701, LNA 702, local oscillator 703, mixer 704, first gain amplifier 705, filter 706, and A / D converter 708, the antenna 301, LNA 302, local oscillator 303, mixer 304, first gain of FIG. Since the configuration is the same as that of the amplifier 305, the filter 306, and the A / D converter 308, description thereof is omitted.

  Here, the DC offset correction method of the wireless communication system in the present invention will be described. First, the DC offset generated in the mixer 704 and the first gain amplifier 705 is amplified in the subsequent circuit, and the dynamic range of the subsequent circuit is reduced, or the distortion in the input unit of the subsequent circuit is increased. The first offset correction control unit detects a DC offset of the mixer 704 and the first gain amplifier 705 using a ΔΣ type A / D converter 708 at the time of initial setting of the system. The correction value is set in the first D / A converter 712 via the initial value setting path 716 from 711, and the initial correction is performed by applying feedback to the first gain amplifier 705. Next, during normal operation of the system, the output of the A / D converter 708 is passed through the digital low-pass filter 710, and the second offset correction control unit 723 detects the DC offset with high accuracy based on the output. At the same time, a correction value is set in the second D / A converter 713 and feedback is applied to the second gain amplifier 707. Further, when a DC offset of a certain value or more is detected, addition is made to the initial correction value of the first D / A converter 712, feedback is applied to the first gain amplifier 705, and the second D / A The correction value of the A converter 713 is set again from 0, and feedback is applied to the second gain amplifier 707. That is, during normal operation of the system, the second offset correction control unit 723 is used, the feedback to the second D / A converter 713 is the lower bit, and the feedback to the first D / A converter 712 is the upper bit. As described above, offset correction is performed using one correction loop 717.

By using such a configuration of the present invention, first, the output of the mixer 704 is monitored, DC offset correction of the mixer 704 is performed, and then, the output of the first gain amplifier 705 is monitored to obtain the first gain. A DC offset correction loop is performed for each circuit such that the DC offset correction of the amplifier 705 is performed, and then the output of the second gain amplifier 707 is monitored and the DC offset correction of the second gain amplifier 707 is performed. The problem with the rotating configuration, that is,
(1) Since a plurality of detection units are necessary, the configuration of DC offset detection becomes large.
(2) Since multiple loops must be stable, it takes time for the signal to stabilize.
The problem is solved.

  Specifically, in the configuration of the present invention, the detection of the initial correction value can be performed by using the ΔΣ type A / D converter 708 that is conventionally provided in the wireless communication system. The circuit configuration can be made small. Furthermore, by performing the initial correction, it is possible to reduce the correction time, the correction range, and the correction circuit of the subsequent circuit that is performed during system operation. Also, only when the DC offset correction value to be set in the second gain amplifier 707 is n digits larger than the set digit number (m digits), the upper k digits (n = m) of the n digits are changed. By adopting a configuration for adding to the DC offset correction value of the first gain amplifier 705, it is not necessary to remeasure the DC offset of the first gain amplifier 705 when there is no significant change in the usage conditions. The offset correction time can be shortened. On the other hand, when the DC offset of the mixer 704 and the first gain amplifier 705 varies greatly due to changes in the set gain, set temperature, and set frequency, it is possible to perform appropriate DC offset correction.

  FIG. 6 shows an example of the first gain amplifier 705 when DC offset correction is performed using the first D / A converter 712. The gain amplifier 705 of FIG. 6 includes a transimpedance composed of an input transistor M801, M802, a current source I801, I802, I803, I804, a variable resistor R801, a gm amplifier 801, an operational amplifier 803, and variable resistors R802, R803. This is a variable gain amplifier composed of an amplifier 802. The D / A converter 712 includes current sources I805 and I806. When performing DC offset correction, a D / A converter 712 is connected to the connection between the gm amplifier 801 and the transimpedance amplifier 802, current is extracted from one signal line of the differential signal, and the other signal line is connected. By adding a current, the current flowing through the variable resistors R802 and R803 of the transimpedance amplifier 802 is changed, and the DC voltage is changed.

  Note that the second gain amplifier 707 in FIG. 5 and the gain amplifier 305 in FIG. 3 may have the same configuration as in FIG. However, the configuration of the gain amplifiers 305, 705, and 707 is not limited to the configuration of FIG. 6, and a DC voltage may be changed by connecting a resistor and a D / A converter to the input unit. Any configuration may be used as long as the configuration can be changed to a desired value.

  Further, as a first modification of the second embodiment, when an initial correction value is detected, switches 720 and 721 are provided and switched as shown by a dotted line in FIG. 5 to switch the filter 706 and the second gain amplifier 707. It is also possible to detect the DC offset value of only the mixer 704 and the first gain amplifier 705. In this configuration, addition of the minimum configuration such as the switches 720 and 721 and the bypass path 715 is necessary, but the influence due to the DC offset generated in the filter 706 and the second gain amplifier 707 can be completely reduced, and the mixer 704 Thus, it is possible to detect an accurate DC offset value of only the first gain amplifier 705.

  Further, as a second modification of the second embodiment, any initial correction value for the DC offset can be used as long as the DC offset value generated in the mixer 704 and the first gain amplifier 705 can be detected and set in the initial setting state. Therefore, instead of using the A / D converter 708 for setting, an offset correction initial value setting circuit 718 may be provided separately as shown in FIG. As an example of the offset correction initial value setting circuit 718, a configuration such as having a value measured in advance as a table is conceivable. The number of components increases, but feed-forward control is performed to further increase the speed. It is also possible to set the DC offset correction value according to the initial setting gain and the set frequency.

<< Third Embodiment >>
FIG. 8 shows a configuration according to the third embodiment of the present invention. Since the basic configuration of this configuration is the same as that in FIG. 5, the same reference numerals are given to the same configuration, and the description is omitted.

  In this configuration, the initial correction value of the DC offset set in the first gain amplifier 705 from the first D / A converter 712 using the A / D converter 708 in the configuration of FIG. The configuration is changed so that the D / A converter 714 of 3 is set to the mixer 704. Thereafter, the offset correction value is set to the second gain amplifier 707 as a lower bit and the change of the offset correction value to the mixer 704 is set as an upper bit, and offset correction is performed using one correction loop 717.

  By using this configuration, the DC offset at the time of initial setting can be corrected by the mixer 704. Therefore, the distortion characteristics are deteriorated at the input portion of the subsequent circuit from the mixer 704, or the generated DC offset is the circuit at the subsequent stage. So that the input of the A / D converter 708 is not saturated.

  Here, as a first modification of the third embodiment, when the initial correction value is detected, as shown by the dotted line in FIG. 8, the switches 720 and 721 are provided and switched so that the filter 706 and the second gain amplifier are switched. It is also possible to detect the DC offset value of only the mixer 704 and the first gain amplifier 705 by bypassing 707. In this configuration, addition of the minimum configuration such as the switches 720 and 721 and the bypass path 715 is necessary, but the influence due to the DC offset generated in the filter 706 and the second gain amplifier 707 can be completely reduced, and the mixer 704 Thus, it is possible to detect an accurate DC offset value of only the first gain amplifier 705.

  In addition, as a second modification of the third embodiment, any initial correction value for the DC offset can be used as long as the DC offset value generated in the mixer 704 and the first gain amplifier 705 can be detected and set in the initial setting state. Therefore, instead of using the A / D converter 708 for setting, an offset correction initial value setting circuit 718 may be provided separately as shown in FIG. As an example of the offset correction initial value setting circuit 718, a configuration such as having a value measured in advance as a table is conceivable. The number of components increases, but feed-forward control is performed to further increase the speed. It is also possible to set the DC offset correction value according to the initial setting gain and the set frequency.

<< Fourth Embodiment >>
FIG. 10 shows a configuration according to the fourth embodiment of the present invention. Since the basic configuration of this configuration is the same as that in FIG. 5, the same reference numerals are given to the same configuration, and the description is omitted.

  In this configuration, the initial correction value of the DC offset set in the first gain amplifier 705 from the first D / A converter 712 using the A / D converter 708 in the configuration of FIG. / D converter 708 is operated twice. First, the first initial correction value is set from the third D / A converter 714 to the mixer 704, and then from the first D / A converter 712 to the second The second initial correction value is set in one gain amplifier 705. After that, setting the offset correction value to the second gain amplifier 707 as the lower bit, changing the offset correction value to the first gain amplifier 705 as the middle bit, and changing the offset correction value to the mixer 704 as the upper bit Offset correction is performed using one correction loop 717.

  By using this configuration, after the DC offset generated at the input node of the mixer 704 and the first gain amplifier 705 is corrected by the mixer 704 during the initial correction, the residual DC generated in the first gain amplifier 705 is further corrected. The offset can be corrected by the first gain amplifier 705, the distortion characteristics are deteriorated at the input part of the subsequent circuit from the first gain amplifier 705, or the generated DC offset is amplified by the subsequent circuit, and the A / D converter 708. No longer saturates the input.

  Here, as a first modification of the fourth embodiment, when the initial correction value is detected, the switches 720 and 721 are provided and switched as shown by the dotted line in FIG. 10 to switch the filter 706 and the second gain amplifier. It is also possible to detect the DC offset value of only the mixer 704 and the first gain amplifier 705 by bypassing 707. In this configuration, addition of the minimum configuration such as the switches 720 and 721 and the bypass path 715 is necessary, but the influence due to the DC offset generated in the filter 706 and the second gain amplifier 707 can be completely reduced, and the mixer 704 Thus, it is possible to detect an accurate DC offset value of only the first gain amplifier 705.

  Further, as a second modification of the fourth embodiment, the first initial correction value or the second initial correction value of the DC offset is the DC offset value generated in the mixer 704 and the first gain amplifier 705 in the initial setting state. Any means can be used as long as it can be detected and set, and instead of using the A / D converter 708, an offset correction initial value setting circuit 718 is provided as shown in FIG. You may carry out. As an example of the offset correction initial value setting circuit 718, a configuration such as having a value measured in advance as a table is conceivable. The number of components increases, but feed-forward control is performed to further increase the speed. It is also possible to set the DC offset correction value according to the initial setting gain and the set frequency.

  Furthermore, as a third modification of the fourth embodiment, an initial correction value is set only from the third D / A converter 714 to the mixer 704 in accordance with the required accuracy, and then the second gain amplifier 707 is supplied. Using one correction loop 717, the offset correction value is set to the lower bit, the offset correction value setting to the first gain amplifier 705 is set to the middle bit, and the change of the offset correction value to the mixer 704 is set to the upper bit. A DC offset method obtained by simplifying a part of the fourth embodiment, such as performing offset, may be used.

<< Fifth Embodiment >>
12 and 13 show a configuration according to the fifth embodiment of the present invention. Since the basic configuration of this configuration is the same as that in FIG. 5, the same reference numerals are given to the same configuration, and the description is omitted.

  In this configuration, an AGC (Automatic Gain Control) control unit 719 is added to the output of the A / D converter 708 having the configurations shown in FIGS. 5 and 7 to 11. The AGC control unit 719 includes an LNA 702, a mixer 704, a first gain amplifier 705, and a second gain amplifier 707 so that each circuit is not saturated and a desired gain characteristic can be realized in various communication states of the wireless communication system. Set the gain to. At this time, in each circuit, the DC offset value fluctuates as the gain is changed. Therefore, a D / A converter 712, 714 is configured by sending a gain variation signal from the AGC control unit 719 to the first offset correction control unit 711 in advance and setting the variation amount of the DC offset value linked to the gain. To shorten the convergence time of the set value.

  By using this configuration, the correction value to the first gain amplifier 705 and the mixer 704 can be changed before the second offset correction control unit 723 detects the correction amount. Therefore, the second gain amplifier The correction range of 707 can be reduced, and the convergence time of the correction loop can be shortened.

  The DC offset correction according to the present invention has a ΔΣ type A / D converter, and can achieve high-speed and high-accuracy DC offset correction with a small-scale circuit in a radio reception system in which DC offset is a problem. Is useful.

301 Antenna 302 LNA
303 Local Oscillator 304 Mixer 305 Gain Amplifier 306 Filter 308 A / D Converter 311 Offset Correction Control Unit 312 D / A Converter 400 Feedforward Path 401 Quantizer 402 Operational Amplifier 404, 405 D / A Converter 406 DC Offset Correction Measurement Path 407 DC offset correction measurement changeover switch 408 integrator 500 feedforward path 501 quantizer 502 operational amplifier 504, 505 D / A converter 508 integrator 509 operation stop control signal 701 antenna 702 LNA
703 Local oscillator 704 Mixer 705 First gain amplifier 706 Filter 707 Second gain amplifier 708 A / D converter 710 Digital low-pass filter 711 First offset correction controller 712, 713, 714 D / A converter 715 Bypass path 716 Offset correction initial value setting path 717 Offset correction path 718 Offset correction initial value setting circuit 719 AGC control units 720 and 721 Path changeover switch 723 Second offset correction control unit 801 gm amplifier 802 transimpedance amplifier 803 operational amplifiers I801 to I806 Current source R801 to R803 Variable resistance M801, M802 Input transistor

Claims (10)

A wireless communication system having a DC offset correction function,
When measuring the DC offset of the receiving system,
A direct input path of a signal to be measured is provided to a quantizer inside a ΔΣ type A / D converter, and a DC offset is measured by the quantizer via the direct input path. Wireless communication system. The wireless communication system according to claim 1, wherein
Has a toggle switch at the input of the quantizer,
A wireless communication system, wherein a direct input path is formed by connecting the toggle switch to an input of an A / D converter during the DC offset measurement. The wireless communication system according to claim 1, wherein
By stopping the driving of the feedback D / A converter and the quantizer driving unit in the ΔΣ type A / D converter, the feed forward path in the ΔΣ type A / D converter is directly used as the input path. A wireless communication system characterized by being used. An LNA that receives and amplifies the RF signal;
A mixer that mixes a signal input from the LNA with a signal from a local oscillator and converts the signal into an intermediate frequency signal;
A first gain amplifier that amplifies the signal frequency-converted by the mixer;
A filter that passes only a signal in a desired band among output signals of the first gain amplifier;
A second gain amplifier for amplifying the signal input from the filter;
An A / D converter for converting an output signal from the second gain amplifier into a digital signal;
In order to correct the DC offset generated in these signal paths, a first offset correction control unit that is connected to the output of the A / D converter and sets an initial correction value of the DC offset, and the DC offset is corrected as needed. A second offset correction control unit for
In the correction of the DC offset, first, the first offset correction control unit sets an initial correction value in the first gain amplifier, and then the second offset correction control unit performs the second gain amplifier as needed. When the correction value is set to be equal to or greater than a certain reference value, the second offset correction control unit changes the initial correction value of the first gain amplifier. A wireless communication system. An LNA that receives and amplifies the RF signal;
A mixer that mixes a signal input from the LNA with a signal from a local oscillator and converts the signal into an intermediate frequency signal;
A first gain amplifier that amplifies the signal frequency-converted by the mixer;
A filter that passes only a signal in a desired band among output signals of the first gain amplifier;
A second gain amplifier for amplifying the signal input from the filter;
An A / D converter for converting an output signal from the second gain amplifier into a digital signal;
In order to correct the DC offset generated in these signal paths, a first offset correction control unit that is connected to the output of the A / D converter and sets an initial correction value of the DC offset, and the DC offset is corrected as needed. A second offset correction control unit for
In the correction of the DC offset, first, the first offset correction control unit sets an initial correction value in the mixer, and then the second offset correction control unit sends a correction value to the second gain amplifier as needed. The wireless communication system according to claim 1, wherein the second offset correction control unit changes the initial correction value of the mixer when the second gain amplifier is set and exceeds a certain reference value. An LNA that receives and amplifies the RF signal;
A mixer that mixes a signal input from the LNA with a signal from a local oscillator and converts the signal into an intermediate frequency signal;
A first gain amplifier that amplifies the signal frequency-converted by the mixer;
A filter that passes only a signal in a desired band among output signals of the first gain amplifier;
A second gain amplifier for amplifying the signal input from the filter;
An A / D converter for converting an output signal from the second gain amplifier into a digital signal;
In order to correct the DC offset generated in these signal paths, a first offset correction control unit that is connected to the output of the A / D converter and sets an initial correction value of the DC offset, and the DC offset is corrected as needed. A second offset correction control unit for
In the correction of the DC offset, first, the first offset correction control unit sets a first initial correction value in the mixer, and then the first offset correction control unit sets the first gain amplifier. A second initial correction value is set, and thereafter, the second offset correction control unit sets a correction value to the second gain amplifier as needed, and further correction to the second gain amplifier exceeds a certain reference value. In this case, the second offset correction control unit changes the second initial setting value of the first gain amplifier, and further the correction to the second gain amplifier exceeds a second reference value. In this case, the second offset correction control unit changes the first initial setting value of the mixer. An LNA that receives and amplifies the RF signal;
A mixer that mixes a signal input from the LNA with a signal from a local oscillator and converts the signal into an intermediate frequency signal;
A first gain amplifier that amplifies the signal frequency-converted by the mixer;
A filter that passes only a signal in a desired band among output signals of the first gain amplifier;
A second gain amplifier for amplifying the signal input from the filter;
An A / D converter for converting an output signal from the second gain amplifier into a digital signal;
In order to correct the DC offset generated in these signal paths, a first offset correction control unit that is connected to the output of the A / D converter and sets an initial correction value of the DC offset, and the DC offset is corrected as needed. A second offset correction control unit for
In the correction of the DC offset, first, the first offset correction control unit sets an initial correction value in the mixer, and then the second offset correction control unit sends a correction value to the second gain amplifier as needed. And when the correction to the second gain amplifier is more than a certain reference value, the second offset correction control unit sets the correction value to the first gain amplifier, and further The wireless communication system, wherein the second offset correction control unit changes the initial setting value of the mixer when the correction to the gain amplifier is equal to or greater than a second reference value. In the radio | wireless communications system provided with the DC offset correction function of any one of Claims 4-7,
The initial correction value of the DC offset set in the first gain amplifier or the mixer is a DC offset using a ΔΣ A / D converter in the wireless communication system according to claim 1. A wireless communication system, which is set by a correction method. A radio communication system having a DC offset correction function according to claim 8,
4. When performing a DC offset correction method using a ΔΣ type A / D converter in the wireless communication system according to claim 1, the filter and the second gain amplifier are passed. A wireless communication system, wherein a path is cut off and a path that can be directly input from the first gain amplifier to the A / D converter is formed. In the radio | wireless communications system provided with the DC offset correction function of any one of Claims 4-9,
A wireless communication system, wherein when changing an initial correction value of the mixer or the first gain amplifier, the changed value is made to follow a gain setting of the mixer or the first gain amplifier.

Images