JP2012059641A - Light emitting panel, manufacturing method thereof, light emitting device, and electronic apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a light emitting panel, a manufacturing method thereof, a light emitting device, and an electronic apparatus capable of achieving excellent image quality and improving manufacturing yield and quality.SOLUTION: A light-shielding adhesive part 30 having a continuous plane pattern corresponding to a plane pattern of a partition 25 and bonded to an element substrate 11 (the partition 25) and a counter substrate 12 to bond the element substrate 11 and the counter substrate 12, is provided on the partition 25 between adjacent pixels PIX disposed in a pixel array 111. The light-shielding adhesive part 30 has a laminated structure with a light-shielding spacer layer 31 disposed on the counter substrate 12 and having light shielding properties, and an adhesive layer 32 disposed between the light-shielding spacer layer 31 and the element substrate 11 (the partition 25), made from a cured photo-curing or thermosetting resin material, and bonding the element substrate 11 and the counter substrate 12.

Description

  The present invention relates to a light-emitting panel, a method for manufacturing the same, a light-emitting device, and an electronic device, and in particular, a light-emitting panel having a sealing structure in which a sealing substrate is bonded to an element substrate on which a light-emitting element is formed, and the manufacture thereof. The present invention relates to a method, a light-emitting device including the light-emitting panel, and an electronic device in which the light-emitting device is mounted.

  2. Description of the Related Art In recent years, a display panel (light emitting element type display panel) in which light emitting elements such as organic electroluminescence elements (hereinafter abbreviated as “organic EL elements”) are two-dimensionally arranged as display devices for electronic devices such as mobile phones and portable music players. ) Is known. In particular, a light-emitting element type display panel to which an active matrix driving method is applied has a faster display response speed and less viewing angle dependency than a widely used liquid crystal display device. And the display image quality can be increased. In addition, the light emitting element type display panel does not require a backlight or a light guide plate unlike a liquid crystal display device, and thus has a feature that it can be further reduced in thickness and weight.

  An organic EL element, which is a typical example of a light emitting element applied to such a light emitting element type display panel, is roughly composed of a pair of electrodes (anode (anode electrode) and cathode (cathode electrode)) arranged to face each other. It has an element structure in which an organic EL layer composed of a hole transport layer, a light emitting layer, and an electron transport layer is laminated therebetween. An organic EL element is generally formed on one side of an insulating element substrate, and is protected from an external environment such as deterioration of element characteristics and physical impact caused by outside air (moisture, oxygen, etc.). A configuration in which the sealing substrate is bonded (bonded) so as to face the one surface side or a configuration in which the one surface side of the element substrate is sealed with a sealing resin is employed. The element structure and sealing structure of the organic EL element are described in Patent Document 1, for example.

  In light-emitting element type display panels to which such organic EL elements are applied, so-called top emission type and bottom emission type light emitting structures are known. In the element structure of the organic EL element described above, the top emission type is configured such that one of the pair of electrodes disposed on the element substrate side is formed of a reflective metal electrode and disposed on the sealing substrate side. The other electrode is formed of a transparent electrode, and the light emitted from the organic EL layer is emitted to the visual field side of the display panel through the transparent electrode and the sealing substrate to display an image.

  In the bottom emission type, in the element structure of the organic EL element, one electrode disposed on the element substrate side is formed of a transparent electrode, and the other electrode disposed on the sealing substrate side is reflective. It is formed by a metal electrode, and the light emitted from the organic EL layer is emitted to the view side of the display panel (the other side of the element substrate) through the transparent electrode and the element substrate to display an image. . The light emitting structure of such an organic EL element is described in Patent Document 2, for example.

JP 2010-080307 A JP 2008-218044 A

  By the way, in the light emitting element type display panel as described above, signal wirings and active elements (thin film transistors and the like) are formed on the element substrate in order to drive pixels including light emitting elements such as organic EL elements. Here, the signal wiring and the electrode of the active element are generally formed of a reflective conductive material such as a metal material in order to reduce electric resistance and improve element characteristics.

  In the display panel having such a panel structure, in particular, in the case of having the above-described top emission type light emitting structure, the light (external light) incident on the display panel through the sealing substrate from the visual field side is Reflected by the electrode of the signal wiring or active element and viewed from the view side, there is a problem that the image quality of the display image is deteriorated.

  Moreover, in the sealing structure in which the sealing substrate is bonded to the one surface side of the element substrate as described above, the sealing substrate and the element substrate are usually bonded to each other at the peripheral portion of the sealing substrate via a sealing material. . Here, there is a certain amount of space between the inner surface of the sealing substrate, the organic EL element formed on the element substrate, and the active element (thin film transistor) for driving the organic EL element to emit light and the upper surface of the signal wiring. The gap (gap between substrates) is provided.

  In a display panel having such a sealing structure, when the sealing substrate is pressed to the element substrate side in a manufacturing process in which the sealing substrate is bonded to the element substrate, or when an electronic device equipped with the display panel is used, When a pressing force is applied from above, or when the display panel itself is distorted due to heat or the like, the gap between the element substrate and the sealing substrate may become non-uniform. Therefore, a display panel having a top emission type light emitting structure has a problem in that the optical axis of light emitted from the light emitting element is shifted to cause blurring and blurring in the image, resulting in deterioration of image quality.

  In addition, when the above-described pressing force and strain are excessive, the inner surface of the sealing substrate contacts the element substrate side, for example, element damage of the thin film transistor formed on the element substrate side, transistor characteristic fluctuation, organic There is a problem in that defects such as peeling of layers, wiring layers, interlayer insulating films, short-circuiting between wirings, and sealing damage are caused, resulting in a decrease in manufacturing yield and quality.

  Therefore, in view of the above-described problems, the present invention can achieve an excellent image quality by preventing the influence due to the non-uniformity of the external light and the gap between the substrates, and is defective due to the pressing force and distortion to the substrate. An object of the present invention is to provide a light-emitting panel, a method for manufacturing the light-emitting panel, a light-emitting device, and an electronic device that can suppress the generation of light and improve the manufacturing yield and quality.

  The light-emitting panel according to the first aspect of the present invention includes a plurality of pixels each having a light-emitting element and a partition wall continuously provided in a boundary region that partitions the light-emitting element formation region of each pixel. A first substrate provided on a side of the first substrate, a second substrate having one surface facing the one surface of the first substrate, and sealing the one surface of the first substrate; and the partition wall A light-shielding spacer layer having a planar pattern corresponding to the planar pattern and in close contact with the one surface side of the second substrate and having a light-shielding property; and the first light-shielding spacer layer It is characterized by comprising an adhesive layer bonded to a surface side facing the one surface side of the substrate and the one surface side of the first substrate.

According to a second aspect of the present invention, in the light-emitting panel according to the first aspect, the light-emitting element includes a light-emitting layer and a pair of electrodes facing each other through the light-emitting layer, and one of the pair of electrodes. One electrode layer is provided extending on the partition, and the adhesive layer is provided in a region corresponding to the opening from which at least a part of the electrode layer extending on the partition is removed. It is characterized by being.
According to a third aspect of the present invention, in the light-emitting panel according to the first or second aspect, the light-shielding spacer layer has a continuous flat pattern corresponding to the flat pattern of the partition walls.
According to a fourth aspect of the present invention, in the light-emitting panel according to any one of the first to third aspects, the light-emitting element has a top emission structure, and each of the pixels is configured to drive at least the light-emitting element. A plurality of thin film transistors are provided, and each thin film transistor has a bottom gate structure in which a gate electrode is provided below a semiconductor layer.

  According to a fifth aspect of the present invention, there is provided a light emitting panel manufacturing method, comprising: a plurality of pixels each having a light emitting element on one surface side of a first substrate; and a boundary region that partitions the light emitting element forming region of each pixel. A step of forming a partition wall continuously provided on the substrate, a step of preparing a second substrate for sealing the one surface side of the first substrate, and a planar pattern corresponding to the planar pattern of the partition wall And having a light-shielding spacer layer having a light-shielding property in close contact with the one surface side of the second substrate, and a surface of the light-shielding spacer layer facing the one surface side of the first substrate. A step of forming an adhesive layer having a resin material having adhesiveness, and the one surface side of the second substrate is opposed to the one surface side of the first substrate, a pressing force is applied, and the light shielding is performed. The first substrate through the adhesive spacer layer and the adhesive layer. And bonding the second substrate, and in the state where the first substrate and the second substrate are bonded together, the adhesive layer is cured under predetermined conditions to form an adhesive layer, Adhering a surface side of the light-shielding spacer layer corresponding to the one surface side of the first substrate and the one surface side of the first substrate through the adhesive layer. .

  According to a sixth aspect of the present invention, in the method for manufacturing a light-emitting panel according to the fifth aspect, the light-emitting element includes a light-emitting layer and a pair of electrodes facing each other with the light-emitting layer interposed therebetween. The step of forming the pixel on the one surface side of the substrate includes a step of forming an electrode layer forming one of the pair of electrodes of the light emitting element on the partition, and extending on the partition. Forming an opening from which a part of the electrode layer is removed, wherein the step of forming the adhesive layer is a surface facing the one surface side of the first substrate of the light-shielding spacer layer A step of forming the adhesive layer at a position corresponding to at least the opening.

  According to a seventh aspect of the present invention, a light emitting device includes a plurality of pixels each having a light emitting element, a plurality of selection lines and a plurality of data lines connected to the plurality of pixels, and the light emitting elements of the pixels. A partition wall continuously provided in a boundary region partitioning the formation region; a first substrate provided on one surface side; and a first surface side facing the one surface side of the first substrate; A second substrate that seals the one surface side of the first substrate, and a flat pattern corresponding to the planar pattern of the partition wall, is provided in close contact with the one surface side of the second substrate, and is shielded from light A light-shielding spacer layer having a property, and an adhesive layer bonded to a surface side of the light-shielding spacer layer facing the one surface side of the first substrate and the one surface side of the first substrate. The light emitting panel, and the pixels through the selection lines. A selection drive circuit for applying a selection signal for setting to a selection state, a signal drive circuit for writing a gradation signal corresponding to image data to the pixels set to the selection state via the data lines; It is characterized by having.

According to an eighth aspect of the present invention, in the light emitting device according to the seventh aspect, the light emitting element has a light emitting layer and a pair of electrodes facing each other through the light emitting layer, and one of the pair of electrodes. One electrode layer is provided to extend on the partition, and the adhesive layer is provided in a region corresponding to the opening from which a part of the electrode layer extending on the partition is removed. It is characterized by that.
According to a ninth aspect of the present invention, in the light emitting device according to the seventh or eighth aspect, the light-shielding spacer layer has a continuous plane pattern corresponding to the plane pattern of the partition wall.
According to a tenth aspect of the present invention, in the light emitting device according to any one of the seventh to ninth aspects, the light emitting element has a top emission structure, and each of the pixels at least drives the light emitting element to emit light. A plurality of thin film transistors are provided, and each thin film transistor has a bottom gate structure in which a gate electrode is provided below a semiconductor layer.
According to an eleventh aspect of the present invention, an electronic apparatus includes the light emitting device according to any one of the seventh to tenth aspects.

  According to the light-emitting panel, the manufacturing method thereof, the light-emitting device, and the electronic apparatus according to the present invention, it is possible to realize a good image quality and to improve the manufacturing yield and quality.

1 is a schematic plan view showing a first embodiment of a display panel of a display device to which a light emitting device according to the present invention is applied. It is a schematic sectional drawing which shows an example of the principal part structure of the display panel applied to the display apparatus which concerns on 1st Embodiment. It is process sectional drawing which shows an example of the manufacturing method of the display panel which concerns on 1st Embodiment. It is explanatory drawing which shows the effect in the display apparatus which concerns on 1st Embodiment. It is a schematic sectional drawing which shows the principal part structure of the display panel applied to the display apparatus which concerns on 2nd Embodiment. It is process sectional drawing which shows an example of the manufacturing method of the display panel which concerns on 2nd Embodiment. It is explanatory drawing which shows the effect in the display apparatus which concerns on 2nd Embodiment. It is a schematic block diagram which shows the 1st specific example of the display apparatus to which the display panel (light emission panel) which concerns on this invention is applied. It is a plane layout figure which shows an example of the pixel which concerns on a 1st application example. It is principal part sectional drawing of the pixel which concerns on a 1st application example. It is a schematic block diagram which shows the 2nd specific example of the display apparatus to which the display panel which concerns on this invention is applied. It is a plane layout figure which shows an example of the pixel which concerns on a 2nd application example. It is principal part sectional drawing of the pixel which concerns on a 2nd application example. It is a perspective view which shows the structural example of the digital camera to which the light-emitting device which concerns on this invention is applied. It is a perspective view which shows the structural example of the thin-type television to which the light-emitting device based on this invention is applied. It is a perspective view which shows the structural example of the personal computer to which the light-emitting device based on this invention is applied. It is a figure which shows the structural example of the mobile telephone to which the light-emitting device which concerns on this invention is applied.

DESCRIPTION OF EMBODIMENTS Hereinafter, a light-emitting panel, a manufacturing method thereof, a light-emitting device, and an electronic device according to the present invention will be described in detail with reference to embodiments.
<First Embodiment>
First, the light emitting device according to the present invention will be described. Here, a case where the light emitting device according to the present invention is applied as a display device and an organic EL element is applied as a light emitting element will be described.

(Display device)
FIG. 1 is a schematic plan view showing a first embodiment of a display panel of a display device to which a light emitting device according to the present invention is applied. For convenience of illustration, the display of the counter substrate is omitted in FIG. FIG. 2 is a schematic cross-sectional view showing an example of a main configuration of a display panel applied to the display device according to the present embodiment. FIG. 2A shows the IIA-IIA line in the display panel shown in FIG. 1 (in this specification, “II” is used as a symbol corresponding to the Roman numeral “2” shown in FIG. 1 for convenience). It is a figure which shows the cross section along. FIG. 2B is a schematic cross-sectional view showing another example of the main configuration of the display panel applied to the display device according to the present embodiment.

  A display panel (light emitting panel) 110 applied to the display device according to the first embodiment of the present invention includes an insulating element substrate (first glass plate) as shown in FIGS. 1 and 2A, for example. 1 substrate) 11 and a counter substrate (second substrate) 12 are oppositely bonded (bonded). A pixel array in which a plurality of pixels PIX each having an organic EL element OEL as a light emitting element are two-dimensionally arranged on one surface side (the front side in FIG. 1 and the upper surface side in FIG. 2A) of the element substrate 11. 111 is provided.

  For example, as shown in FIG. 2A, the organic EL element OEL provided in each pixel PIX includes a pixel electrode 21 serving as an anode electrode, an organic EL layer (light emitting layer) 22, and a counter electrode 23 serving as a cathode electrode. Has an element structure in which are sequentially stacked. Further, in an area (boundary area) between the pixels PIX arranged adjacent to each other, an active element TR such as a thin film transistor, a signal wiring LN, an insulating film 24 covering the active element TR such as the thin film transistor and the signal wiring LN, and a partition wall ( Bank) 25 is formed, and at least the pixel electrode 21 and the organic EL layer 22 constituting each organic EL element OEL are isolated so as to be electrically insulated from adjacent pixels PIX.

  The element substrate 11 and the counter substrate 12 arranged so as to face each other are bonded through a seal portion (sealing portion) 40 provided in the outer peripheral region of the pixel array 111 as shown in FIGS. Thus, the pixel array 111 is sealed in the sealed space 50 and protected so as not to be affected by the external environment.

  For example, as shown in FIG. 2A, the seal portion 40 is composed of an adhesive layer (sealing material) 42 containing a filler 41, and the seal portion 40 is continuously provided in the outer peripheral region of the pixel array 111. The element substrate 11 and the counter substrate 12 made of flat glass are bonded and sealed. Specifically, the seal portion 40 includes a filler 41 made of non-conductive (insulating) resin beads having a predetermined particle size, and an adhesive layer having a non-conductive photo-curable or thermo-setting resin material. What diffused to 42 is applied.

  Further, as another structure of the seal portion 40, for example, as shown in FIG. 2B, the edge portion of the flat glass (the region corresponding to the outer peripheral region of the pixel array 111 described above) is continuously left. The processed counterbore glass may be used as the counter substrate 12, and the element substrate 11 and the counter substrate 12 may be bonded and sealed at the counterbore portion 12 z through the adhesive layer (sealing material) 42. In each of the embodiments described below, the structure of the display panel 110 is opposed to the element substrate 11 and the flat glass through the adhesive layer 42 with the filler 41 shown in FIG. The case where the panel structure which joined the board | substrate 12 is used is demonstrated. For example, a desiccant or a dry sheet (not shown) may be provided on the bonding surface (corresponding to an adhesive surface described later, FIG. 2 (a) lower surface side) side of the counter substrate 12 in the sealing space 50. . In this case, moisture (humidity) or corrosive gas in the sealed space 50 is removed or reduced by a desiccant or a dry sheet, so that element characteristics of the pixel array 111 (particularly, the organic EL element OEL) are deteriorated or poorly connected. Can be suppressed.

  In the display panel 110 according to the present embodiment, in particular, as shown in FIG. 2A, the pixel array 111 (in the sealed space 50 formed by the counter substrate 12 and the seal portion 40) ( A light-shielding adhesive portion 30 is provided between the partition wall 25 between the adjacent pixels PIX) and the counter substrate 12. Here, the light-shielding adhesive portion 30 has a single-layer structure including at least a light-shielding spacer layer having a light-shielding property or a laminated structure including a plurality of layers including the light-shielding spacer layer. The light-shielding adhesive portion 30 is bonded to both the upper surface of the partition wall 25 on the element substrate 11 side and the bonding surface (lower surface in the drawing) of the counter substrate 12 to bond the element substrate 11 and the counter substrate 12; The gap between the element substrate 11 and the counter substrate 12 (inter-substrate gap) is provided to be uniform. Further, as shown in FIG. 1, the light-shielding adhesive portion 30 is provided with a lattice-like planar pattern surrounding the pixels PIX, for example, corresponding to the planar pattern of the partition walls 25. Here, in FIG. 1, as an example, the light-shielding adhesive portion 30 is continuously provided with a grid-like plane pattern surrounding each pixel PIX corresponding to the plane pattern of the partition wall 25. The light-shielding adhesive portion 30 is preferably provided continuously as described above. However, the present invention is not limited to this, and a portion of the planar pattern corresponding to the planar pattern of the partition wall 25 is missing. It may be provided with a continuous plane pattern.

  Specifically, for example, as shown in FIG. 2A, the light-shielding adhesive portion 30 is provided on the counter substrate 12 side, and has a light-shielding spacer layer 31 having light shielding properties and the element substrate 11 (partition wall 25) side. And has a structure in which an adhesive layer 32 having a photocurable or thermosetting resin material is laminated. Here, the light-shielding spacer layer 31 may be made of a material having low adhesiveness, but has at least light-shielding properties and can control the thickness with relatively high accuracy. A material capable of arbitrarily setting a gap with 12 (gap between substrates) is applied. Specifically, for example, a metal oxide film such as chromium oxide can be applied to the light-shielding spacer layer 31. In addition, the material of the light-shielding spacer layer 31 applied to the present invention is not particularly limited to metal oxide, and it is non-conductive even if it is a conductive film as long as it is an opaque film having a light-shielding property. This film may be used. On the other hand, the adhesive layer 32 is highly adhesive to both the element substrate 11 (strictly speaking, the counter electrode 23 on the partition wall 25) and the counter substrate 12 (strictly, the light-shielding spacer layer 31), and is firmly bonded. Materials that can be applied are applied. Specifically, the adhesive layer 32 is formed with, for example, a photocurable or thermosetting resin material.

  With such a panel structure, in the display panel 110 according to the present embodiment, the gap between one surface side (the upper surface side in FIG. 2A) of the element substrate 11 and the bonding surface side (lower surface side) of the counter substrate 12 is In a region where the element substrate 11 and the counter substrate 12 of the display panel 110 face each other in a region where the seal portion 40 and the light shielding adhesive portion 30 are not provided, the counter substrate 12 does not contact the upper surface of the element substrate 11 (pixel array 111). As described above, the predetermined value is set to be substantially uniform.

  Note that a signal wiring LN and a thin film transistor for driving each pixel PIX (specifically, the organic EL element OEL emits light) are provided below the insulating film 24 or the partition wall 25 provided between the pixels PIX (boundary region). An active element TR such as is provided. The positional relationship between the light-shielding adhesive portion 30 provided in the boundary region between the pixels PIX and the active element TR such as the signal wiring LN and the thin film transistor will be described in detail in an application example to a display device described later.

  Further, as shown in FIG. 1, in the peripheral region of the pixel array 111 on the element substrate 11, a lead-out line Lr for supplying a signal and power for driving each pixel PIX is provided. The lead wire Lr has one end connected to the pixel array 111 (each pixel PIX) and the other end connected to a connection terminal TM provided at an end of the element substrate 11, for example. The connection terminal TM is, for example, various drivers (for example, a selection driver 120 and a data driver 130; details will be described later) provided outside the element substrate 11 via a film substrate (flexible printed circuit board) FPC or the like. Are connected to a driver chip having each driver function.

  2A and 2B show an element structure in which the pixel electrode 21 of the organic EL element OEL is directly formed on the element substrate 11, but the present invention is not limited to this. Absent. The organic EL element OEL may have, for example, an element structure in which the pixel electrode 21 is formed on the element substrate 11 via an insulating film (not illustrated) such as a gate insulating film or an interlayer insulating film. 2A and 2B show the panel structure sealed by the counter substrate 12 with the counter electrode 23 of the organic EL element OEL on the element substrate 11 being exposed. Is not limited to this. The display panel 110 opposes the counter substrate 12 to the element substrate 11 in a state where the pixel array 111 including the organic EL element OEL is covered with a sealing layer (protective insulating film) made of, for example, a silicon oxide film or a silicon nitride film. It may have a structure joined and bonded as described above. In that case, the light-shielding adhesive portion 30 described above is provided so as to adhere to the sealing layer on the element substrate 11.

(Display panel manufacturing method)
Next, a display panel manufacturing method applied to the display device according to the present embodiment will be described.
FIG. 3 is a process cross-sectional view illustrating an example of a method for manufacturing a display panel according to the present embodiment. Here, a manufacturing method for the display panel having the cross-sectional structure shown in FIG.

  In the manufacturing method of the display panel 110 described above, first, as shown in FIG. 3A, the organic EL element OEL included in each pixel PIX of the pixel array 111 is formed on one surface side (upper surface side of the drawing) of the element substrate 11. And active element TR (thin film transistor etc.) and signal wiring LN for light-emitting operation of this organic EL element OEL are formed. The organic EL element OEL is formed by sequentially laminating a pixel electrode 21, an organic EL layer (light emitting layer) 22 composed of, for example, a hole transport layer, a light emitting layer, and an electron transport layer, and a counter electrode 23 on the element substrate 11. It is formed. The active element TR and the signal wiring LN are formed on the element substrate 11 prior to the step of forming the organic EL element OEL on the element substrate 11. Here, the process of forming the active element TR and the signal wiring LN may be partially used, for example, with the process of forming the pixel electrode 21 constituting the organic EL element OEL.

  Specifically, in the formation process of the pixel array 111, the pixel electrode 21 that becomes the anode electrode of the organic EL element OEL is formed on one surface side of the element substrate 11 for each formation region of the pixel PIX. Next, in order to electrically insulate the organic EL elements OEL of the adjacent pixels PIX from each other and set individual light emission characteristics, an insulating film 24, an active element TR, a signal wiring LN, and a boundary region between the pixels PIX A partition wall 25 is formed. Here, the insulating film 24 may be applied as a gate insulating film or an interlayer insulating film for forming the active element TR and the signal wiring LN described above. The partition 25 is formed of, for example, a polyimide resin material that is a photosensitive insulating material so as to protrude from the surface of the element substrate 11 toward the counter substrate 12. As a result, the partition wall 25 prevents the organic compound-containing liquid from leaking out and getting over between adjacent pixels PIX in the formation process of the organic EL layer 22 described later, thereby preventing color mixing between adjacent pixels.

  Next, in the formation region of each pixel PIX, an organic polymer hole transporting material is formed on the pixel electrode 21 exposed without being covered with the insulating film 24 and the partition wall 25 by using an inkjet method, a nozzle printing method, or the like. A solution (organic compound-containing solution) containing is applied and dried by heating to form a hole transport layer. Next, on the pixel electrode 21 on which the hole transport layer is formed, a solution (organic compound-containing solution) containing an organic polymer-based light emitting material is applied using the same method as described above, and is heated and dried to emit light. Form a layer. Further, a solution containing an organic polymer electron transporting material (an organic compound-containing solution) is applied onto the pixel electrode 21 on which the light emitting layer is formed, using the same technique as described above, and dried by heating to dry the electrons. A transport layer is formed. By this series of steps, the organic EL layer 22 in which the hole transport layer, the light emitting layer, and the electron transport layer are stacked is formed.

  Next, the counter electrode 23 composed of a single electrode layer (solid electrode) is formed so as to be common to the pixels PIX arranged in the pixel array 111. Here, as shown in FIG. 3A, the counter electrode 23 extends not only on the formation region of the organic EL element OEL of each pixel PIX but also on the partition wall 25 formed in the boundary region between the pixels PIX. It is provided to do.

  Here, in this embodiment, since the organic EL element OEL has a top emission type light emitting structure, the pixel electrode 21 is formed of a metal film having a high light reflectance such as aluminum, and the counter electrode 23. Is formed of a transparent electrode film made of, for example, tin-doped indium oxide (ITO) or the like.

  On the other hand, a light-shielding film made of chromium oxide or the like is formed in close contact with the fixed surface of the counter substrate 12 by using a sputtering method or a vapor deposition method. Thereafter, the light-shielding film is etched using a photolithography method to form the partition walls 25 in the pixel array 111 formed on the element substrate 11 side as shown in FIGS. The light-shielding film is formed only in the region corresponding to the region (that is, the boundary region between the pixels PIX). As a result, a light-shielding spacer layer 31 having a predetermined thickness and having a lattice-like planar pattern corresponding to the planar pattern of the partition walls 25 is formed on the bonding surface side of the counter substrate 12. Next, an adhesive layer 32x made of a photocurable or thermosetting resin material is applied to the surface of the light-shielding spacer layer 31 (corresponding to the lower surface in FIG. 3B) using a printing method, a transfer method, or the like. Form. Further, as shown in FIGS. 1 and 3B, a sealing material layer 42x made of an adhesive in which a filler 41 having a predetermined particle size is diffused in the outer peripheral region of the pixel array 111 formed on the element substrate 11. Is formed by coating.

  Here, the adhesive layer 32x formed on the surface of the light-shielding spacer layer 31 may be formed in the same region as the planar pattern of the light-shielding spacer layer 31, or the light-shielding spacer layer 31. A part of the plane pattern may be periodically formed (regularly arranged) at a specific position or region, for example. The thickness of the light-shielding spacer layer 31 and the adhesive layer 32x formed on the upper surface of the light-shielding spacer layer 31 is the dimension from the surface of the counter substrate 12 to the upper surface of the adhesive layer 32x, and the element substrate 11. The sum of the dimensions from the surface to the upper surface of the counter electrode 23 on the partition wall 25 is equal to the particle diameter (diameter) of the filler 41 diffused in the sealing material layer 42x formed in the outer peripheral region of the pixel array 111, or , And appropriately set according to the protruding height of the partition wall 25 so as to be slightly larger than the particle size of the filler 41.

  Next, as shown in FIG. 3B, the counter substrate 12 is bonded to the one surface side of the element substrate 11 so as to face each other. At this time, the opposing substrate 12 is pressed against the element substrate 11 with a predetermined force, whereby the filler 41 in the sealing material layer 42x formed in the outer peripheral region of the pixel array 111, and the inside of the pixel array 111 The adhesive layer 32x formed corresponding to the partition wall 25 is bent. As a result, in the outer peripheral region of the pixel array 111, the sealing material layer 42 x is bonded to both the one surface side of the element substrate 11 and the bonding surface side of the counter substrate 12. At the same time, the adhesive layer 32x is bonded to both the surfaces of the counter electrode 23 on the partition wall 25 in the pixel array 111 and the end surface of the light-shielding spacer layer 31 on the bonding surface side of the counter substrate 12.

  Next, in a state where the bending of the filler 41 in the sealing material layer 42x formed in the outer peripheral region of the pixel array 111 is eliminated (or the state where the counter substrate 12 is pressed with a force that eliminates the bending), FIG. As shown in (c), the element substrate 11 to which the counter substrate 12 is bonded is irradiated with light (for example, ultraviolet rays) UV having a predetermined wavelength, or is subjected to heat treatment at a predetermined temperature, whereby a pixel array is obtained. The sealing material layer 42x in the outer peripheral region 111 and the adhesive material layer 32x in the pixel array 111 are cured. Thereby, the sealing material layer 42x and the adhesive material layer 32x are bonded and cured to both the element substrate 11 and the counter substrate 12, respectively. Such a sealing step is performed, for example, in an inert gas atmosphere at a predetermined atmospheric pressure.

  That is, as shown in FIG. 2A, in the outer peripheral region of the pixel array 111 of the element substrate 11, the adhesive layer 42 in which the filler 41 is diffused is interposed, and in the pixel array 111, on the partition wall 25. The counter substrate 12 is bonded to the element substrate 11 through a light-shielding adhesive portion 30 having a laminated structure including a light-shielding spacer layer 31 having a light-shielding property and a photocurable or thermosetting adhesive layer 32. Thereby, the pixel array 111 on the element substrate 11 is sealed in the sealing space 50 formed by the counter substrate 12 and the adhesive layer 42 including the filler 41.

  At this time, the gap (inter-substrate gap) between the element substrate 11 and the counter substrate 12 is set based on the particle size of the filler 41 in the outer peripheral region of the pixel array 111, and the light shielding is performed in the pixel array 111. It is set based on the thickness of the conductive spacer layer 31. Here, as described above, the thickness of the adhesive layer 32 x that becomes the light-shielding spacer layer 31 and the adhesive layer 32 is set based on the particle size of the filler 41 applied to the outer peripheral region of the pixel array 111. Since the light-shielding spacer layer 31 is formed of a metal oxide film such as chromium oxide, the light-shielding spacer layer 31 is less bent than the adhesive layer 32 made of a resin layer. Therefore, in the light-shielding adhesive portion 30 in the pixel array 111, the gap between the element substrate 11 and the counter substrate 12 in the pixel array 111 (inter-substrate gap) is equal to the gap in the outer peripheral region (that is, the particle size of the filler 41). In addition, the thickness of the adhesive layer 32 is adjusted and cured so as to be substantially uniform. That is, the element substrate 11 and the counter substrate 12 have a substantially uniform gap (inter-substrate gap) in the outer peripheral region and the inside of the pixel array 111 and are firmly bonded.

(Function and effect)
Next, the effects of the display device according to the present embodiment will be verified.
FIG. 4 is an explanatory diagram illustrating the operational effects of the display device according to the present embodiment.
As described above, in the display device according to the present embodiment, the signal wiring LN and the active element TR for driving (light emitting operation) the organic EL element OEL of each pixel PIX arranged in the pixel array 111 are formed. A light-shielding adhesive portion 30 is formed in the region (the boundary region between the pixels PIX). Specifically, as shown in FIG. 4, the signal wiring LN and the active element TR formed in the lower layer of the partition wall 25 overlap in a plan view when viewed from the view side (upper side in the drawing), and the signal wiring LN and the active element TR. A light shielding adhesive portion 30 including a light shielding spacer layer 31 having a light shielding property is formed on the partition wall 25 so that the element TR is not visually recognized.

  According to the display panel 110 having such a panel structure, as shown in FIG. 4, even if the signal wiring LN and the electrode of the active element TR are formed of a reflective metal layer, The light (external light) LTx incident from the outside of 110 or the light incident on the inside of the display panel 110 and reflected by the electrode of the signal wiring LN or the active element TR is included in the light-shielding adhesive portion 30 on the partition wall 25. Is blocked or absorbed by the light-shielding spacer layer 31 having the property, and emission to the visual field side is suppressed.

  That is, in the display panel 110 having a top emission type light emitting structure, only the light hν emitted from the organic EL element OEL (organic EL layer 22) of each pixel PIX is emitted to the visual field side through the counter substrate 12. Thus, reflection of external light by the signal wiring LN and the electrode of the active element TR is suppressed. Accordingly, only the light hν related to the image display is visually recognized, and the image quality can be improved. In FIG. 4, the light hν is emitted from the organic EL layer 22 of the organic EL element OEL, directly emitted to the visual field side via the counter electrode 23 and the counter substrate 12, and reflected by the pixel electrode 21. Then, it is a combined light of light emitted to the field of view through the counter substrate 12.

  In particular, when the active element TR such as a thin film transistor has a bottom gate structure in which the gate electrode is provided below the semiconductor layer, external light easily enters the semiconductor layer serving as the channel region through the partition wall 25. It is known that when external light is incident on a semiconductor layer in this manner, a leak current or the like is generated, and element characteristics (operation characteristics) are changed or deteriorated, or malfunction occurs. According to the display panel 110 according to the present embodiment, the light shielding adhesive portion 30 having light shielding properties is formed so as to cover a region where the active element TR is formed (a boundary region between the pixels PIX). Incidence of external light LTx to the semiconductor layer of the thin film transistor can be suppressed, and deterioration of display quality due to change or deterioration of element characteristics or malfunction can be suppressed.

  Further, according to the present embodiment, the element substrate 11 and the counter substrate 12 are firmly bonded not only in the outer peripheral area of the pixel array 111 but also in the pixel array 111 via the light-shielding adhesive portion 30. In the step of bonding the counter substrate 12 to the element substrate 11, when the counter substrate 12 is pressed toward the element substrate 11, or in an electronic device equipped with the display panel 110 according to the present embodiment, the display panel 110 is externally applied during use. Even when a pressing force is applied or when the display panel itself is distorted due to heat or the like, the gap between the element substrate 11 and the counter substrate 12 (inter-substrate gap) is maintained substantially constant. be able to. Therefore, the path (angle and distance) of the emitted light from the organic EL element OEL can be made uniform to suppress the occurrence of blurring and blurring of the image, and a good image quality can be realized.

  Further, according to the present embodiment, even when the pressing force as described above is excessive, it is possible to avoid the counter substrate 12 from coming into direct contact with the pixel array 111 of the element substrate 11, so that the organic EL It is possible to prevent or suppress the occurrence of breakage, characteristic deterioration, and sealing breakage of the element OEL, other active elements TR, wirings, and the like, and the production yield and quality can be improved. The operational effects of the present embodiment as described above are effective in all display panels having a panel structure in which the counter substrate 12 is bonded to the element substrate 11, but the substrate is likely to be deformed, and a large-sized display whose strength is important. This is particularly effective for display panels.

  In the present embodiment, a light shielding property made of chromium oxide or the like is provided on the bonding surface side of the counter substrate 12 so as to correspond to a formation region of the partition wall 25 provided on the element substrate 11 (a boundary region between the pixels PIX). A method for manufacturing a display panel in which the element substrate 11 and the counter substrate 12 are bonded via the adhesive layer 32 after the light-shielding spacer layer 31 is formed has been described. The reason for applying such a manufacturing procedure is as follows. That is, generally, a sputtering method or a vapor deposition method used for forming a metal oxide film such as chromium oxide has a feature that the film forming temperature is high. On the other hand, the element substrate 11 on which the organic EL element OEL is formed needs to avoid processing at a high temperature as much as possible in order to prevent deterioration of the organic EL layer and damage such as delamination. Therefore, in the present embodiment, as described above, the light-shielding spacer layer 31 made of a metal oxide film is formed on the counter substrate 12 side where the organic EL element OEL is not formed using a sputtering method or a vapor deposition method. Can prevent deterioration of the characteristics of the organic EL element OEL formed on the element substrate 11 and can form the light-shielding spacer layer 31 having a desired thickness without being restricted by the film formation conditions. It is.

<Second Embodiment>
Next, a second embodiment of the display panel applied to the display device according to the present invention will be described.
(Display panel)
FIG. 5 is a schematic cross-sectional view showing a main configuration of a display panel applied to the display device according to the second embodiment. 5 is a diagram showing a cross section taken along the line IIA-IIA in the display panel shown in FIG. 1, similarly to FIGS. 2 (a) and 2 (b). Here, about the structure equivalent to 1st Embodiment mentioned above, the same code | symbol is attached | subjected and description is simplified.

  In the first embodiment described above, reflection of external light on the display panel 110 is suppressed, and the element substrate 11 and the counter substrate 12 are firmly bonded to make the gap (inter-element gap) uniform. The panel structure in which the light-shielding spacer layer 31 and the adhesive layer 32 are directly bonded to the upper surface of the counter electrode 23 on the partition wall 25 formed on the element substrate 11 side has been described. In the display panel 110 according to the second embodiment, as shown in FIG. 5, the light-shielding spacer layer 31 and the adhesive layer 32 are partially formed on the counter electrode 23 on the partition wall 25 formed on the element substrate 11 side. The panel structure is directly removed and bonded directly to the upper surface of the exposed partition wall 25.

  That is, in the present embodiment, as shown in FIG. 5A, the element substrate 11 and the counter substrate 12 are filled with the filler 41 in the outer peripheral region of the pixel array 111 as in the first embodiment described above. The adhesive layer 42 is adhered. On the other hand, in the pixel array 111, as shown in FIG. 5A, the element substrate 11 and the counter substrate 12 have a partition wall 25 exposed in an opening 23c formed by partially removing the counter electrode 23. It is adhered via a light-shielding adhesive portion 30 that is directly adhered to the upper surface of the substrate. As in the first embodiment described above, the light-shielding adhesive portion 30 is provided on the adhesive surface side of the counter substrate 12, and has a light-shielding spacer layer 31 having light shielding properties, and one surface side (partition wall 25) on the element substrate 11 side. And an adhesive layer 32 made of a photo-curing or thermosetting resin material.

  Here, the light-shielding spacer layer 31 having a light-shielding property is provided in a lattice shape, for example, corresponding to the planar pattern of the partition walls 25. In the boundary region between the pixels PIX where the partition walls 25 are provided, signal wirings LN and active elements TR for driving the pixels PIX are provided below the insulating film 24 or the partition walls 25. In such a light-shielding adhesive portion 30, the surface of the light-shielding spacer layer 31 provided in close contact with the adhesive surface side of the counter substrate 12 corresponding to the planar pattern of the partition wall 25 is opposed to the element substrate 11 side. The element substrate 11 and the counter substrate 12 are bonded to each other through the adhesive layer 32 so that the upper surface of the partition wall 25 exposed in the opening 23c from which the electrode 23 is partially removed is bonded.

  In the configuration shown in FIG. 5A, the adhesive layer 32 is provided in the opening 23c. However, the present invention is not limited to this, and as shown in FIG. 32 may be provided in a region wider than the opening 23c, and the adhesive layer 32 may be directly bonded to the upper surface of the partition wall 25 in a region corresponding to a part of the opening 23c of the adhesive layer 32. .

(Display panel manufacturing method)
Next, a display panel manufacturing method applied to the display device according to the present embodiment will be described.
FIG. 6 is a process cross-sectional view illustrating an example of a method for manufacturing a display panel according to the present embodiment. Here, the description of the steps equivalent to those in the first embodiment (see FIG. 3) described above will be simplified.

  In the manufacturing method of the display panel 110 having the cross-sectional structure shown in FIG. 5, first, as shown in FIG. 6A, the organic EL element OEL and the signal wiring LN, the active element TR, the insulating film 24, the partition walls are formed on one side. In the element substrate 11 on which the pixel array 111 including 25 and the like is formed, the counter electrode 23 on the partition wall 25 in the pixel array 111 is partially removed using a laser ablation method, a lift-off method, or the like, An opening 23c exposing the upper surface is formed. Here, in the laser ablation method, by irradiating the surface of the counter electrode 23 made of inorganic, organic matter, metal, or the like with a laser having a high intensity, a short pulse, and a short wavelength, the surface phase is accompanied with evaporation or plasma due to absorbed heat. Is peeled off. Further, in the lift-off method, after the counter electrode 23 is formed on the partition wall 25 formed by laminating the light separating material, the light having a predetermined wavelength is irradiated from the back surface side (other surface side) of the element substrate 11. Gas is generated from the release material, and the counter electrode 23 in the region where the light release material is formed is removed. Here, when irradiating light from the back side of the element substrate 11, the pixel PIX formation region (specifically, the EL element formation region Rel) is shielded and protected by a light shielding mask.

  In the case where the openings 23c are formed in a lattice like the planar pattern of the partition walls, the counter electrode formed by a single electrode layer (solid electrode) so as to be common to the organic EL elements OEL of the respective pixels PIX. 23 is disconnected at the boundary region between the pixels PIX, a predetermined voltage is not supplied to each organic EL element OEL, and the light emission operation cannot be performed. Therefore, in the present embodiment, the counter electrode 23 on the partition wall 25 is partially removed at an arbitrary position and an arbitrary shape (for example, a spot shape or a line shape) in the lattice-like planar pattern of the partition wall 25. A plurality of openings 23c spaced from each other are formed. Here, it is desirable that the plurality of openings 23c formed on the element substrate 11 side are periodically formed (regularly arranged).

  On the other hand, similarly to the above-described first embodiment, a light-shielding film made of chromium oxide or the like is formed in close contact with the bonding surface side of the counter substrate 12 in advance using a sputtering method, a vapor deposition method, or the like. Thereafter, by using a photolithography method, as shown in FIGS. 1 and 6B, a light-shielding film is left only in a region corresponding to the planar pattern of the partition wall 25 formed on the element substrate 11 side. A light shielding spacer layer 31 is formed. Next, corresponding to the planar pattern of the partition walls 25 in the pixel array 111, the surface of the light-shielding spacer layer 31 formed on the adhesion surface side of the counter substrate 12 (corresponding to the lower surface in FIG. 6B) The adhesive layer 32x is formed using a printing method, a transfer method, or the like. Further, as shown in FIG. 6B, a sealing material layer 42x containing a filler 41 is formed on the outer peripheral region of the pixel array 111 of the element substrate 11 by coating.

  Here, the adhesive layer 32x is formed so as to correspond to the positions and shapes of the plurality of openings 23c formed in the counter electrode 23 on the element substrate 11 side in the planar pattern of the light-shielding spacer layer 31. . In this case, the thickness of the light-shielding spacer layer 31 and the adhesive layer 32x formed on the upper surface of the light-shielding spacer layer 31 is the dimension from the surface of the counter substrate 12 to the upper surface of the adhesive layer 32x, and the element substrate. 11 is equal to the particle diameter (diameter) of the filler 41 diffused in the sealing material layer 42x formed in the outer peripheral region of the pixel array 111, or the sum of the dimensions from the surface 11 to the upper surface of the partition wall 25 is the same. It is appropriately set according to the protruding height of the partition wall 25 so as to be slightly larger than the particle size of the partition wall 25.

  Note that when the thickness of the adhesive layer 32x to be the adhesive layer 32 is sufficiently larger than the thickness of the counter electrode 23 and has high elasticity, the adhesive layer 32x has the above-described light-shielding spacer. It may be formed in the same region as the planar pattern (lattice pattern) of the layer 31, or may be formed in a region including a position corresponding to the opening 23c.

  Next, as shown in FIG. 6B, the counter substrate 12 is bonded to the one surface side of the element substrate 11 so as to face each other, and as shown in FIG. By applying, the sealing material layer 42x in the outer peripheral region of the pixel array 111 and the adhesive layer 32x in the pixel array 111 are cured. As a result, in the outer peripheral region of the pixel array 111, the light-blocking spacer layer 31 having a light-blocking property on the partition wall 25 and the photo-curing property or in the pixel array 111 via the adhesive layer 42 in which the filler 41 is diffused. The counter substrate 12 is bonded to the element substrate 11 through the light-shielding adhesive portion 30 having a laminated structure including the thermosetting adhesive layer 32.

  At this time, the gap (inter-substrate gap) between the element substrate 11 and the counter substrate 12 is set based on the particle size of the filler 41 in the outer peripheral region of the pixel array 111, and the light shielding is performed in the pixel array 111. It is set based on the thickness of the conductive spacer layer 31. Therefore, in the light-shielding adhesive portion 30 in the pixel array 111, the gap between the element substrate 11 and the counter substrate 12 in the pixel array 111 (inter-substrate gap) is equal to the gap in the outer peripheral region (that is, the particle size of the filler 41). The thickness of the adhesive layer 32 is adjusted and cured so as to be substantially uniform. That is, the element substrate 11 and the counter substrate 12 have a substantially uniform gap (inter-substrate gap) in the outer peripheral region and the inside of the pixel array 111 and are firmly bonded.

(Function and effect)
Next, the effects of the display device according to the present embodiment will be verified.
FIG. 7 is an explanatory diagram showing the operational effects of the display device according to the present embodiment. Here, the description of the operational effects equivalent to those of the first embodiment described above will be simplified.

  As described above, in the display device according to the second embodiment, as in the first embodiment, a signal is displayed on the lower layer side of the partition wall 25 provided in the boundary region between the pixels PIX arranged in the pixel array 111. A wiring LN and an active element TR are formed, and overlap with the signal wiring LN and the active element TR in a plan view as viewed from the field of view, so that the signal wiring LN and the active element TR are not shielded on the partition wall 25. The light-shielding adhesive portion 30 including the light-shielding spacer layer 31 having the above is formed. In particular, in the present embodiment, as shown in FIG. 7, it is formed on the upper surface of the partition wall 25 exposed in the opening 23c formed by partially removing the counter electrode 23, on the bonding surface side of the counter substrate 12. The element substrate 11 and the counter substrate 12 are bonded to each other by directly bonding the adhesive layer 32 of the light-shielding adhesive portion 30.

  According to the display panel 110 having such a panel structure, as shown in FIG. 7, the light (external light) LTx incident from the outside of the display panel 110, the signal wiring LN The light reflected by the electrodes of the active element TR is blocked or absorbed by the light-shielding spacer layer 31 having the light-shielding property included in the light-shielding adhesive portion 30 provided on the partition wall 25, and emission to the field of view is suppressed. The

  Therefore, in the display panel 110 having a top emission type light emitting structure, only the light hν emitted from the organic EL element OEL (organic EL layer 22) of each pixel PIX is emitted to the visual field side through the counter substrate 12. Thus, since external light reflection by the signal wiring LN and the electrodes of the active element TR is suppressed, the image quality can be improved.

  Further, according to the display panel 110 according to the present embodiment, the light blocking spacer layer 31 having the light blocking property included in the light blocking adhesive portion 30 suppresses the incidence of the external light LTx to the active element TR such as a thin film transistor. Therefore, it is possible to suppress a decrease in display quality due to a change or deterioration in element characteristics.

  Further, according to the present embodiment, the element substrate 11 and the counter substrate 12 have a substantially uniform gap (inter-substrate gap) through the light-shielding adhesive portion 30 and are firmly bonded. In particular, in the present embodiment, the adhesive layer 32 of the light-shielding adhesive portion 30 formed on the adhesive surface side of the counter substrate 12 is directly on the upper surface of the partition wall 25 exposed in the opening 23 c formed in the counter electrode 23. Glued. Therefore, for example, by applying a polyimide resin material, which is a photosensitive insulating material, as the partition wall 25, it is possible to improve the adhesion with the adhesive layer 32 made of a photocurable or thermosetting resin material. Therefore, the element substrate 11 and the counter substrate 12 can be bonded more firmly.

  As described above, in the present embodiment, the element substrate 11 and the counter substrate 12 are firmly bonded to each other. Therefore, when an excessive pressing force is applied from the outside of the display panel 110, or distortion caused by heat or the like. Even when this occurs, the gap (inter-substrate gap) between the element substrate 11 and the counter substrate 12 can be maintained substantially constant. Therefore, the path (angle and distance) of the emitted light from the organic EL element OEL can be made uniform to suppress the occurrence of blurring and blurring of the image, and a good image quality can be realized. In addition, according to the present embodiment, even when the above-described pressing force is applied, contact of the counter substrate 12 with the pixel array 111 of the element substrate 11 is avoided, and damage to elements and circuits is prevented. It is possible to prevent or suppress the occurrence of characteristic deterioration and sealing breakage, and to improve the manufacturing yield and quality.

  Next, specific examples of a display device and pixels to which the display panel described in each of the above embodiments is applied will be described with reference to the drawings. Note that although the display device described below has a configuration corresponding to the active matrix driving method, the present invention is not limited to this. The present invention may be applied to a display device corresponding to another driving method such as a passive matrix driving method.

<Application example to display device and specific example of pixel>
Next, specific examples of a display device (light-emitting device) to which the display panel (light-emitting panel) described in each embodiment described above is applied and a pixel will be described with reference to the drawings.
(First application example)
FIG. 8 is a schematic configuration diagram showing a first specific example of a display device to which the display panel (light emitting panel) according to the present invention is applied. FIG. 8A is a schematic block diagram showing a display device according to this application example, and FIG. 8B is an equivalent circuit diagram of a pixel applied to the display device according to this application example. Here, description will be made with reference to the respective drawings (FIGS. 1 to 7) shown in the respective embodiments as appropriate.

  As shown in FIG. 8A, the display device (light emitting device) 100 according to the first application example is roughly arranged in the display panel (light emitting panel) 110 shown in each of the embodiments described above and the display panel 110. A selection driver (selection drive circuit) 120 for setting each pixel PIX in a selected state, a data driver (signal drive circuit) 130 for supplying a gradation signal corresponding to image data to each pixel PIX, And a system controller 140.

  The pixels PIX arranged in the display panel 110 according to this application example include a light emission drive circuit DC and an organic EL element OEL which is a current drive type light emission element as shown in FIG. 8B, for example. Yes. The light emission drive circuit DC generates a light emission drive current having a current value corresponding to the image data and supplies the light emission drive current to the organic EL element OEL. The organic EL element OEL emits light at a luminance gradation corresponding to image data based on the light emission drive current supplied from the light emission drive circuit DC.

  For example, as shown in FIG. 8B, the light emission drive circuit DC includes transistors (active elements; switching elements) Tr11 and Tr12 and a capacitor Cs. The transistor Tr11 has a gate terminal connected to the selection line Ls, a drain terminal connected to the data line Ld, and a source terminal connected to the contact N11. The transistor Tr12 has a gate terminal connected to the contact N11, a drain terminal connected to the high-potential power supply voltage Vsa, and a source terminal connected to the contact N12. The capacitor Cs is connected between the gate terminal (contact N11) and the source terminal (contact N12) of the transistor Tr12.

  The organic EL element (display element) OEL has an anode (anode electrode; the pixel electrode 21 described above) connected to the contact N12 of the light emission drive circuit DC, and a cathode (cathode electrode; the counter electrode 23 described above) has a predetermined value. It is connected to a low potential power source (reference voltage Vsc; for example, ground potential Vgnd).

  Here, an n-channel thin film transistor can be applied to both the transistors Tr11 and Tr12. Note that if the transistors Tr11 and Tr12 are p-channel transistors, the source terminal and the drain terminal are opposite to each other. The capacitor Cs is a parasitic capacitance formed between the gate and the source of the transistor Tr12, an auxiliary capacitance additionally provided between the gate and the source, or a capacitance component composed of these parasitic capacitance and auxiliary capacitance. It is.

  The selection line Ls connected to the pixel PIX is arranged, for example, in the row direction of the display panel 110 (the left-right direction in FIG. 8A) and is connected to the selection driver 120. A selection voltage (selection signal) Vsel of a selection level or a non-selection level is applied from the selection driver 120 to the selection line Ls. Further, the data line Ld connected to the pixel PIX is connected to the data driver 130, for example, arranged in the column direction of the display panel 110 (the vertical direction in FIG. 8A). A gradation voltage (gradation signal) Vdata corresponding to image data is applied from the data driver 130 to the data line Ld.

  The system controller 140 generates display data composed of digital data including luminance gradation data based on image data supplied from the outside of the display device 100 and supplies the display data to the data driver 130. Further, the system controller 140 controls the operation state of the selection driver 120 and the data driver 130 based on a timing signal generated or extracted based on the image data, and executes a predetermined image display operation on the display panel 110. A selection control signal and a data control signal are generated and output.

  Accordingly, the selection driver 120 applies the selection voltage Vsel of the selection level to the selection line Ls of each row based on the selection control signal, thereby setting the pixel PIX of each row to the selected state. Further, the data driver 130 generates a gradation voltage Vdata corresponding to the image data based on the data control signal, and supplies the gradation voltage Vdata to the pixel PIX set to the selected state via each data line Ld.

  A display drive operation in a display device including the pixel PIX having such a circuit configuration will be briefly described. First, in a predetermined selection period, a selection level (high level) is selected from the selection driver 120 to the selection line Ls. ) Is applied to turn on the transistor Tr11 and set the pixel PIX to the selected state. In synchronization with this timing, the gradation voltage Vdata having a voltage value corresponding to the image data is applied from the data driver 130 to the data line Ld, whereby the potential corresponding to the gradation voltage Vdata is applied to the contact N11 via the transistor Tr11. Is applied.

  As a result, the transistor Tr12 is turned on in a conductive state corresponding to the gradation voltage Vdata, a light emission driving current having a predetermined current value flows between the drain and the source, and the organic EL element OEL has the gradation voltage Vdata (that is, the image). Light emission at a luminance gradation corresponding to the data. At this time, charge is stored (charged) in the capacitor Cs connected between the gate and source of the transistor Tr12 based on the gradation voltage Vdata applied to the contact N11.

  Next, in the non-selection period after the end of the selection period, the transistor Tr11 is turned off by applying the selection voltage Vsel of the non-selection level (low level) from the selection driver 120 to the selection line Ls. PIX is set to a non-selected state. At this time, the electric charge (that is, the potential difference between the gate and the source) accumulated in the capacitor Cs is held, and a voltage corresponding to the gradation voltage Vdata is applied to the gate terminal of the transistor Tr12. Therefore, a light emission drive current having a current value equivalent to that in the light emission operation state (selection period) flows between the drain and source of the transistor Tr12, and the organic EL element OEL continues to emit light. Then, desired image information is displayed by sequentially executing such a display driving operation for every pixel PIX two-dimensionally arranged on the display panel 110, for example, for each row.

Next, a specific device structure (planar layout and cross-sectional structure) of a pixel (light emission drive circuit and organic EL element) having the above-described circuit configuration will be described.
FIG. 9 is a plan layout diagram illustrating an example of a pixel according to this application example. Here, the layers in which the transistors and wirings of the light emission drive circuit DC shown in FIG. 8B are mainly shown are mainly shown, and hatching is made for convenience in order to clarify the electrodes and wiring layers of the transistors. This is shown. Here, the electrode and wiring layer which gave the same hatching are provided in the same layer. In addition, the planar patterns of the partition walls 25 and the light-shielding adhesive portions 30 described in the above-described embodiments are superimposed on the planar layout of the pixel PIX. FIG. 10 is a cross-sectional view of a main part of a pixel according to this application example. Here, FIG. 10 is an XB-XB line in the pixel having the planar layout shown in FIG. 9 (in this specification, “X” is conveniently used as a symbol corresponding to the Roman numeral “10” shown in FIG. "Is used.).

  Specifically, the pixel PIX shown in FIG. 8B is set on one surface side (upper surface side in FIG. 10) of an insulating element substrate 11 such as glass as shown in FIGS. It is provided for each pixel formation region Rpx. In this pixel formation region Rpx, at least a boundary region between the formation region (EL element formation region) Rel of the organic EL element OEL and the adjacent pixel PIX is set.

  In the pixel PIX shown in FIG. 9, a selection line Ls and a power supply line La are provided so as to extend in the row direction (horizontal direction in the drawing) in the upper and lower edge regions of the pixel formation region Rpx, respectively. ing. On the other hand, in the region on the right side of the pixel formation region Rpx in the drawing, a data line Ld is disposed so as to extend in the column direction (vertical direction in the drawing) perpendicular to the selection line Ls and the power supply line La. .

  In the display panel 110 shown in FIG. 9, for example, as shown in FIG. 10, a partition wall 25 having an opening in the EL element formation region Rel in the pixel formation region Rpx is provided. That is, in the boundary region between the pixels PIX arranged adjacent to each other in the row direction (horizontal direction in the drawing) and the column direction (vertical direction in the drawing) on the element substrate 11, as shown in FIGS. A partition wall 25 that continuously protrudes from the surface of the element substrate 11 and has a lattice-like plane pattern is provided. A region surrounded by the partition wall 25 and exposing the pixel electrode 21 (that is, the opening) is defined as an EL element formation region Rel.

  For example, as illustrated in FIGS. 9 and 10, the selection line Ls is provided on the lower layer side (element substrate 11 side) than the data line Ld and the power supply line La. The selection line Ls is provided in the same layer as the gate electrodes Tr11g and Tr12g of the transistor Tr11 and the transistor Tr12. Here, as shown in FIG. 9, the selection line Ls is formed integrally with the gate electrode Tr11g of the transistor Tr11.

  The data line Ld is provided on the lower layer side (element substrate 11 side) than the power supply line La, for example, as shown in FIGS. The data line Ld is provided in the same layer as the source electrodes Tr11s and Tr12s and the drain electrodes Tr11d and Tr12d of the transistors Tr11 and Tr12. Here, as shown in FIG. 9, the data line Ld is formed integrally with the drain electrode Tr11d of the transistor Tr11.

  Further, for example, as shown in FIGS. 9 and 10, the power supply line La is provided on an insulating film 24 that covers transistors Tr11 and Tr12, a selection line Ls, and a data line Ld, which will be described later. As shown in FIG. 9, the power supply line La is directly connected to the drain electrode Tr11d of the transistor Tr12 through a contact hole HL12 provided in the lower insulating film 24.

  In the pixel PIX shown in FIG. 9, the transistors Tr11 and Tr12 provided in the light emission drive circuit DC are arranged so as to extend in the column direction (the vertical direction in the drawing) along the data line Ld, for example. . Specifically, the channel width direction of the transistors Tr11 and Tr12 is set to extend in parallel to the data line Ld. Each of the transistors Tr11 and Tr12 has a field effect thin film transistor structure as shown in FIG. In the following description of the transistor Tr11, for the sake of illustration, the description will be made with reference to the cross-sectional structure of the transistor Tr12 illustrated in FIG.

  The transistors Tr11 and Tr12 have a bottom gate structure, and as shown in FIGS. 9 and 10, a gate insulating film 13 is provided to cover the gate electrodes Tr11g and Tr12g formed on the element substrate 11, and the gates A semiconductor layer SMC (not shown in FIG. 9) is provided in a region on the insulating film 13 corresponding to the gate electrodes Tr11g and Tr12g. In addition, a channel protection layer BL is provided on a channel region formed in the semiconductor layer SMC, and source electrodes Tr11s and Tr12s and drain electrodes Tr11d and Tr12d are provided so as to face each other with the channel protection layer BL interposed therebetween. . Impurity layers OHM are provided between the source electrodes Tr11s and Tr12s and the drain electrodes Tr11d and Tr12d and the semiconductor layer SMC, whereby the semiconductor layer SMC and the source electrodes Tr11s and Tr12s and the drain electrodes Tr11d and Tr12d are ohmically connected. ing.

  Further, as shown in FIG. 9, in the transistor Tr11, the gate electrode Tr11g is formed integrally with the selection line Ls so as to correspond to the circuit configuration of the light emission drive circuit DC shown in FIG. 8B. Further, as shown in FIG. 9, the drain electrode Tr11d is formed integrally with the data line Ld. Further, as shown in FIG. 9, the source electrode Tr11s is connected to the gate electrode Tr12g of the transistor Tr12 via a contact hole HL11 provided in the gate insulating film 13. Here, the contact hole HL11 corresponds to the contact N11 of the light emission drive circuit DC shown in FIG.

  Further, as shown in FIG. 9, the transistor Tr12 is connected to the source electrode Tr11s of the transistor Tr11 through the contact hole HL11 in which the gate electrode Tr12g is provided in the gate insulating film 13. Further, as shown in FIG. 9, the drain electrode Tr12d is connected to the power supply line La via a contact hole HL12 provided in the insulating film 24. Further, the source electrode Tr12s is formed integrally with the pixel electrode 21 of the organic EL element OEL, as shown in FIGS.

  As shown in FIGS. 9 and 10, the organic EL element OEL is an element in which the pixel electrode (anode electrode) 21, the organic EL layer (light emitting layer) 22, and the counter electrode (cathode electrode) 23 are sequentially stacked. It has a structure. Here, when the organic EL element OEL has a top emission type light emitting structure, for example, the pixel electrode 21 is formed to include an electrode material having a high light reflectance such as a single aluminum or an aluminum alloy. . The counter electrode 23 is made of a transparent electrode material having translucency (high light transmittance) such as tin-doped indium oxide (ITO).

  As shown in FIGS. 9 and 10, the pixel electrode 21 is formed integrally with the source electrode Tr12s of the transistor Tr12. As shown in FIGS. 9 and 10, the organic EL layer 22 is a pixel that is exposed to an EL element formation region Rel defined by an opening provided in a partition wall 25 that protrudes continuously from the element substrate 11. It is formed on the electrode 21.

  The counter electrode 23 is formed of a single electrode layer (solid electrode) so as to face the pixel electrode 21 of each pixel PIX two-dimensionally arranged on the element substrate 11 in common. Further, as shown in FIG. 10, the counter electrode 23 is provided so as to extend not only on the EL element formation region Rel of each pixel PIX but also on the partition wall 25 that defines the EL element formation region Rel. . Further, the counter electrode 23 is connected to a low potential power supply (reference voltage Vsc) through a contact portion and a lead wiring not shown.

  For example, as illustrated in FIGS. 9 and 10, the partition wall 25 includes a selection line Ls, a data line Ld, a power supply line La, transistors Tr11 and Tr12 formed in a boundary region between the pixels PIX arranged on the element substrate 11. And it is provided so as to have a lattice-like planar pattern so as to cover the insulating film 24 and continuously protrude from the surface of the element substrate 11. Here, the partition 25 is formed of, for example, a polyimide resin material that is a photosensitive insulating material, as described in the above-described embodiments.

  Then, on the one surface side of the element substrate 11 on which the above-described light emission drive circuit DC, organic EL element OEL, and partition wall 25 are formed, as shown in FIG. The counter substrate 12 is bonded with a predetermined gap. Here, as shown in each of the above-described embodiments, the light-shielding adhesive portion 30 is provided on the adhesion surface side of the counter substrate 12, and has a light-shielding spacer layer 31 having light shielding properties and the partition wall 25 on the element substrate 11 side. It has a laminated structure comprising an adhesive layer 32 that is provided on and is made of a photocurable or thermosetting resin material.

  When the display panel 110 of the display device 100 according to this application example has the panel structure described in the first embodiment, the light-shielding spacer layer 31 and the adhesive layer 32 of the light-shielding adhesive portion 30 are For example, they have the same plane pattern. The adhesive layer 32 is adhered to both the surface of the light-shielding spacer layer 31 formed on the adhesive surface side of the counter substrate 12 and the counter electrode 23 on the partition wall 25 provided on the element substrate 11 side. Thus, the element substrate 11 and the counter substrate 12 are bonded to each other with a predetermined gap (inter-substrate gap).

  On the other hand, when the display panel 110 of the display device 100 according to this application example has the panel structure described in the second embodiment, the adhesive layer 32 of the light-shielding adhesive portion 30 is, for example, a light-shielding spacer. Of the planar pattern of the layer 31, it is provided at a position corresponding to the opening 23c of the counter electrode 23 formed on the element substrate 11 side. The adhesive layer 32 includes a surface of the light-shielding spacer layer 31 formed on the adhesive surface side of the counter substrate 12, and an upper surface of the partition wall 25 exposed in the opening 23c of the counter electrode 23 provided on the element substrate 11 side. The element substrate 11 and the counter substrate 12 are bonded to each other with a predetermined gap (inter-substrate gap).

(Second application example)
FIG. 11 is a schematic configuration diagram showing a second specific example of a display device to which the display panel according to the present invention is applied. FIG. 11A is a schematic block diagram showing a display device according to this application example, and FIG. 11B is an equivalent circuit diagram of a pixel applied to the display device according to this application example. Here, about the structure equivalent to the 1st application example mentioned above, the same or equivalent code | symbol is attached | subjected and the description is simplified.

  As shown in FIG. 11A, the display device 100 according to the second application example is roughly configured by the display panel (light emitting panel) 110, the selection driver 120, and the data driver 130 described in the above-described embodiments. A system controller 140 and a power supply driver 150. That is, the display device 100 shown in this application example has a configuration in which the power supply driver 150 is added to the display device 100 shown in the first application example.

  For example, as shown in FIG. 11B, the pixels PIX arranged in the display panel 110 according to this application example include a light emission driving circuit DC, an organic EL element OEL, and the like, as in the first application example described above. It has. The light emission driving circuit DC includes transistors Tr21 to Tr23 and a capacitor Cs as shown in FIG. 11B, for example. The transistor Tr21 has a gate terminal connected to the selection line Ls, a drain terminal connected to the power supply line La, and a source terminal connected to the contact N21. The transistor Tr22 has a gate terminal connected to the selection line Ls, a source terminal connected to the data line Ld, and a drain terminal connected to the contact N22. The transistor Tr23 has a gate terminal connected to the contact N21, a drain terminal connected to the power supply line La, and a source terminal connected to the contact N22. The capacitor Cs is connected to the gate terminal (contact N21) and the source terminal (contact N22) of the transistor Tr23.

  The organic EL element OEL has an anode (anode electrode; pixel electrode 21) connected to the contact N22 of the light emission drive circuit DC, and a cathode (cathode electrode; counter electrode 23) having a predetermined low potential power supply (reference voltage Vsc; For example, it is connected to the ground potential Vgnd).

  Here, in this application example, any of the transistors Tr21 to Tr23 can be an n-channel thin film transistor. The capacitor Cs is a parasitic capacitance formed between the gate and the source of the transistor Tr23, an auxiliary capacitance additionally provided between the gate and the source, or a capacitance component composed of these parasitic capacitance and auxiliary capacitance. It is.

  The power supply line La connected to the pixel PIX is disposed, for example, in the row direction of the display panel 110 (the left-right direction in FIG. 11A) and connected to the power supply driver 150. The power supply driver 150 applies the light emission level or non-light emission level power supply voltage Vsa to the power supply line La at a predetermined timing based on the power supply control signal supplied from the system controller 140.

  The display drive operation in the display device including the pixel PIX having such a circuit configuration will be briefly described. First, in the selection period, the selection driver 120 sets the selection level (high level) to the selection line Ls. The transistor Tr21 and Tr22 are turned on by applying the selection voltage Vsel and applying the power supply voltage Vsa of the non-light emission level (voltage level lower than the reference voltage Vsc; for example, negative voltage) from the power supply driver 150 to the power supply line La. The pixel PIX is set to the selected state. In synchronization with this timing, the gradation voltage Vdata having a negative voltage value corresponding to the image data is applied from the data driver 130 to the data line Ld, whereby the contact N22 is connected via the transistor Tr22 to the gradation voltage Vdata. Applied potential.

  As a result, the transistor Tr23 is turned on, and the write current corresponding to the potential difference generated between the gate and source of the transistor Tr23 is transferred from the power supply line La to the data line Ld via the transistor Tr23, the contact N22, and the transistor Tr22. Flowing. At this time, a charge corresponding to the potential difference generated between the contacts N21 and N22 is accumulated in the capacitor Cs connected between the gate and source of the transistor Tr23.

  Here, the power supply line La is set so that the power supply voltage Vsa equal to or lower than the reference voltage Vsc is applied and the write current is drawn from the pixel PIX in the direction of the data line Ld. As a result, the potential applied to the anode (contact N22) of the organic EL element OEL is lower than the cathode potential (reference voltage Vsc). Therefore, no current flows through the organic EL element OEL, and the organic EL element OEL Does not emit light (non-emission operation). Such a writing operation is sequentially executed for each row for all the pixels PIX two-dimensionally arranged on the display panel 110.

  Next, in the non-selection period after the end of the selection period, by applying the selection voltage Vsel of the non-selection level (low level) from the selection driver 120 to the selection line Ls, the transistors Tr21 and Tr22 are turned off. , The pixel PIX is set to a non-selected state. At this time, since the electric charge (that is, the potential difference between the gate and the source) accumulated in the capacitor Cs is held, the transistor Tr23 maintains the on state. Then, by applying a power supply voltage Vsa of a light emission level (voltage level higher than the reference voltage Vsc) from the power supply driver 150 to the power supply line La, the organic EL element OEL is supplied from the power supply line La through the transistor Tr23 and the contact N22. A predetermined light emission drive current flows.

  Here, since the charge (voltage component) accumulated in the capacitor Cs corresponds to a potential difference when a write current corresponding to the gradation voltage Vdata is caused to flow in the transistor Tr23, the light emission drive current flowing in the organic EL element OEL is The current value is substantially equal to the write current. As a result, the organic EL element OEL of each pixel PIX emits light with a luminance gradation corresponding to the image data (gradation voltage Vdata) written during the writing operation, and desired image information is displayed on the display panel 110. .

Next, a specific device structure (planar layout and cross-sectional structure) of a pixel (light emission drive circuit and organic EL element) having the above-described circuit configuration will be described.
FIG. 12 is a plan layout diagram illustrating an example of a pixel according to this application example. Here, a layer in which each transistor, wiring, and the like of the light emission drive circuit DC shown in FIG. 11B is mainly shown, and the electrode and each wiring layer of each transistor are hatched for the sake of convenience. This is shown. Here, the electrode and wiring layer which gave the same hatching are provided in the same layer. In addition, the planar patterns of the partition walls 25 and the light-shielding adhesive portions 30 described in the above-described embodiments are superimposed on the planar layout of the pixel PIX. FIG. 13 is a cross-sectional view of main parts of a pixel according to this application example. Here, FIG. 13 is an XIIIC-XIIIC line in the pixel having the planar layout shown in FIG. 12 (in this specification, for the sake of convenience, “XIII "Is used.). In FIGS. 12 and 13, the same or equivalent reference numerals are given to the same components as those in the first application example described above, and the description thereof is simplified.

  In the pixel PIX shown in FIG. 12, a power supply line La and a selection line Ls are provided so as to extend in the row direction (horizontal direction in the drawing) in the upper and lower edge regions of the pixel formation region Rpx, respectively. ing. On the other hand, in the left and right regions of the pixel formation region Rpx, the data lines Ld extend in the column direction (vertical direction in the drawing) perpendicular to the power supply line La and the selection line Ls, respectively. In addition, an auxiliary power line Lay is provided.

  Further, in the display panel 110 shown in FIG. 12, for example, as shown in FIG. 13, a partition wall 25 having an opening in the EL element formation region Rel in the pixel formation region Rpx is provided. That is, also in this application example, the boundary region between the pixels PIX arranged adjacent to the pixel array 111 on the element substrate 11 is continuously formed from the surface of the element substrate 11 as shown in FIGS. A partition wall 25 having a lattice-like planar pattern is provided. A region surrounded by the partition wall 25 and exposing the pixel electrode 21 (that is, the opening) is defined as an EL element formation region Rel.

  For example, as shown in FIGS. 12 and 13, the data line Ld is provided on the lower layer side (element substrate 11 side) than the selection line Ls, the power supply line La, and the auxiliary power supply line Lay. The data line Ld is provided in the same layer as the gate electrodes Tr21g to Tr23g of the transistors Tr21 to Tr23. Further, as shown in FIG. 12, the data line Ld is directly connected to the source electrode Tr22s of the transistor Tr22 via a contact hole HL24 provided in the upper gate insulating film 13.

  In addition, the selection line Ls and the power supply line La are provided in the same layer as shown in FIGS. 12 and 13, for example, and an insulating film that covers the transistors Tr21 to Tr23, the data line Ld, and the auxiliary power supply line Lay. 24 is provided. As shown in FIG. 12, the selection line Ls is directly connected to the gate electrodes Tr21g and Tr22g of the transistors Tr21 and Tr22 via a contact hole HL22 provided in the lower insulating film 24 and the gate insulating film 13. Further, for example, as shown in FIGS. 12 and 13, the power supply line La is directly connected to the auxiliary power supply line La through a contact hole HL23 provided in the lower insulating film 24.

  For example, as illustrated in FIGS. 12 and 13, the auxiliary power line Lay is provided in the same layer as the source electrodes Tr21s to Tr23s and the drain electrodes Tr21d to Tr23d of the transistors Tr21 to Tr23. Here, as shown in FIG. 12, the auxiliary power line Lay is formed integrally with the drain electrodes Tr21d and Tr23d of the transistors Tr21 and Tr23.

  In the pixel PIX shown in FIG. 12, the transistor Tr22 provided in the light emission drive circuit DC is disposed so as to extend in the column direction (vertical direction in the drawing) along the data line Ld, for example. Further, the transistors Tr21 and Tr23 are arranged so as to extend in the column direction along the auxiliary power supply line Lay, for example.

  The transistors Tr21 to Tr23 have a bottom gate structure, and as shown in FIGS. 12 and 13, a gate insulating film 13 is provided so as to cover the gate electrodes Tr21g to Tr23g formed on the element substrate 11, and the gate A semiconductor layer SMC (not shown in FIG. 12) is provided in a region on the insulating film 13 corresponding to the gate electrodes Tr21g to Tr23g. A channel protective layer BL is provided on the channel region formed in the semiconductor layer SMC, and source electrodes Tr21s to Tr23s and drain electrodes Tr21d to Tr23d are provided to face each other with the channel protective layer BL interposed therebetween. . Impurity layers OHM (not shown) are provided between the source electrodes Tr21s to Tr23s and the drain electrodes Tr21d to Tr23d and the semiconductor layer SMC.

  Then, as shown in FIG. 12, in the transistor Tr21, the gate electrode Tr21g is formed integrally with the gate electrode Tr22g of the transistor Tr22 so as to correspond to the circuit configuration of the light emission drive circuit DC shown in FIG. ing. The gate electrode Tr21g is connected to the selection line Ls through a contact hole HL22 provided in the gate insulating film 13 and the insulating film 24. Further, as shown in FIG. 12, the drain electrode Tr21d is formed integrally with the auxiliary power supply line Lay. As shown in FIG. 12, the source electrode Tr21s is connected to the gate electrode Tr23g of the transistor Tr23 and the lower electrode Eca of the capacitor Cs via a contact hole HL21 provided in the gate insulating film 13. Here, the contact hole HL21 corresponds to the contact N21 of the light emission drive circuit DC shown in FIG.

  In the transistor Tr22, as shown in FIG. 12, the gate electrode Tr22g is formed integrally with the gate electrode Tr21g of the transistor Tr21. The gate electrode Tr22g is connected to the selection line Ls through a contact hole HL22 provided in the gate insulating film 13 and the insulating film 24. Further, as shown in FIG. 12, the drain electrode Tr22d is connected to the pixel electrode 21 that also serves as the upper electrode Ecb of the capacitor Cs. Further, as shown in FIG. 12, the source electrode Tr22s is connected to the data line Ld through a contact hole HL24 provided in the gate insulating film 13.

  As shown in FIGS. 12 and 13, the transistor Tr23 is connected to the source electrode Tr21s of the transistor Tr21 through the contact hole HL22 in which the gate electrode Tr23g is provided in the gate insulating film 13. The gate electrode Tr23g is connected to the lower electrode Eca of the capacitor Cs. Further, as shown in FIGS. 12 and 13, the drain electrode Tr23d is formed integrally with the auxiliary power supply line Lay. Further, as shown in FIGS. 12 and 13, the source electrode Tr23s is connected to the pixel electrode 21 that also serves as the upper electrode Ecb of the capacitor Cs.

  As shown in FIGS. 12 and 13, the capacitor Cs includes a lower electrode Eca provided on the element substrate 11, and an upper electrode Ecb made of a metal film facing the lower electrode Eca and having a high light reflectance such as aluminum. And a gate insulating film 13 interposed between the lower electrode Eca and the upper electrode Ecb. Here, the gate insulating film 13 is also used as a dielectric layer of the capacitor Cs. The upper electrode Ecb is also used as the pixel electrode 21 of the organic EL element OEL. That is, the capacitor Cs is provided on the lower layer side (element substrate 11 side) of the organic EL element OEL. As shown in FIGS. 12 and 13, the lower electrode Eca is connected to the source electrode Tr21s of the transistor Tr21 and the gate electrode Tr23g of the transistor Tr23. The pixel electrode 21 that is also used as the upper electrode Ecb is formed integrally with the drain electrode Tr22d of the transistor Tr22 and the source electrode Tr23s of the transistor Tr23, as shown in FIGS. Here, the connecting portion between the pixel electrode 21, the drain electrode Tr22d, and the source electrode Tr23s corresponds to the contact N22 of the light emission drive circuit DC shown in FIG.

  As in the first application example described above, the organic EL element OEL is a pixel electrode (anode electrode) connected to the drain electrode Tr22d of the transistor Tr22 and the source electrode Tr12s of the transistor Tr23, as shown in FIGS. 21, an organic EL layer (light emitting layer) 22, and a counter electrode (cathode electrode) 23 are sequentially stacked.

  In addition, as in the first application example described above, the partition wall 25 is, for example, as illustrated in FIGS. 12 and 13, the selection line Ls formed in the boundary region between the pixels PIX arranged on the element substrate 11, Provided to continuously protrude from the surface of the element substrate 11 so as to cover the data line Ld, the power supply line La, the auxiliary power supply line Lay, the transistors Tr21 to Tr23, and the insulating film 24, and to have a grid-like planar pattern It has been. Here, the partition 25 is formed of, for example, a polyimide resin material that is a photosensitive insulating material, as described in the above-described embodiments.

  Then, on one surface side of the element substrate 11 on which the light emission drive circuit DC, the organic EL element OEL, and the partition wall 25 are formed, a counter substrate 12 is predetermined via a light-shielding adhesive portion 30 as shown in FIG. It is pasted together so as to have a gap. Here, also in this application example, the light-shielding adhesive portion 30 is provided on the adhesion surface side of the counter substrate 12 and is provided on the light-shielding spacer layer 31 having light shielding properties and the partition wall 25 on the element substrate 11 side. It has a laminated structure comprising an adhesive layer 32 made of a photo-curable or thermosetting resin material. Therefore, as for the planar pattern of the light-shielding spacer layer 31 and the adhesive layer 32 of the light-shielding adhesive portion 30, at least the light-shielding spacer layer 31 having the light shielding property of the partition 25 on the element substrate 11 side is the same as the application example described above. What is necessary is just to be provided in the area | region corresponding to a plane pattern at the grid | lattice form. That is, the light-shielding spacer layer 31 and the adhesive layer 32 may have, for example, the same plane pattern, or the adhesive layer 32 is an opening of the counter electrode 23 formed on the element substrate 11 side. It may be provided only at a position corresponding to 23c.

  The adhesive layer 32 has both the surface of the light-shielding spacer layer 31 formed on the adhesive surface side of the counter substrate 12 and the counter electrode 23 on the partition wall 25 provided on the element substrate 11 side, or the counter The element substrate 11 and the counter substrate 12 are bonded to each other with a predetermined gap (inter-substrate gap) by bonding to both the upper surface of the partition wall 25 exposed in the opening 23c formed in the electrode 23. .

  According to the display device according to such an application example, as shown in each of the above-described embodiments, in the display panel 110 having a top emission type light emitting structure, the organic EL element OEL (organic EL layer 22) of each pixel PIX. ) Is emitted to the field of view satisfactorily through the counter substrate 12, and signal lines such as a selection line Ls, a data line Ld, and a power supply line La provided in a boundary region between the pixels PIX, Since external light reflection by the electrodes of active elements such as the transistors Tr11, Tr12, Tr21 to Tr23 is suppressed, the image quality can be improved.

  Further, in the panel structure shown in each of the above application examples, when the thin film transistors such as the transistors Tr11, Tr12, Tr21 to Tr23 have a bottom gate structure and the display panel 110 has a top emission type light emitting structure, Light is incident on the semiconductor layer in which the channel region of each thin film transistor is formed through the partition wall 25, thereby generating a leak current and the like, and the characteristics of each thin film transistor are likely to fluctuate or malfunction. On the other hand, by forming the light-shielding adhesive portion 30 using a light-shielding material, the incidence of external light on the semiconductor layer of each thin film transistor is suppressed, and the characteristics of the thin film transistor are stabilized and no malfunction occurs. Can be.

  Further, according to the display device according to the application example described above, even when an excessive pressing force is applied from the outside of the display panel 110 or when distortion due to heat or the like occurs, the element substrate 11 and Since the gap (inter-substrate gap) with the counter substrate 12 can be kept substantially constant, it is possible to suppress the occurrence of blurring and blurring of the image and to realize good image quality. Further, since the contact of the counter substrate 12 with the pixel array 111 of the element substrate 11 can be avoided, it is possible to prevent or suppress the occurrence of damage to elements and circuits, characteristic deterioration, and sealing damage, and the production yield and The quality can be improved.

<Application examples of electronic devices>
Next, an electronic apparatus to which the display device according to each embodiment described above is applied will be described with reference to the drawings.
The display device 100 including the display panel 110 having the panel structure shown in each of the above-described embodiments can be favorably applied as a display device of various electronic devices such as a digital camera, a thin television, a personal computer, and a mobile phone. It is.

  FIG. 14 is a perspective view illustrating a configuration example of a digital camera to which the light emitting device according to the present invention is applied, and FIG. 15 is a perspective view illustrating a configuration example of a thin television to which the light emitting device according to the present invention is applied. 16 is a perspective view showing a configuration example of a personal computer to which the light emitting device according to the present invention is applied, and FIG. 17 is a diagram showing a configuration example of a mobile phone to which the light emitting device according to the present invention is applied.

  14, the digital camera 210 is roughly divided into a main body 211, a lens unit 212, an operation unit 213, and a display unit 214 to which the display device 100 including the display panel 110 described in each of the above embodiments is applied. And a shutter button 215. According to this, reflection of external light at the display unit 214 can be suppressed, the gap between the substrates constituting the display unit 214 can be made uniform, and display image quality can be improved. Further, it is possible to prevent the pixel array (light emitting element, driving circuit, signal wiring, etc.) from being damaged and to deteriorate the characteristics, thereby improving the manufacturing yield and quality.

  In FIG. 15, a thin television 220 is roughly divided into a main body 221, a display unit 222 to which the display device 100 including the display panel 110 shown in each of the above embodiments is applied, and an operation controller (remote controller). 223. According to this, external light reflection in the display unit 222 can be suppressed, the gap between the substrates constituting the display unit 222 can be made uniform, and display image quality can be improved. Further, it is possible to prevent the pixel array (light emitting element, driving circuit, signal wiring, etc.) from being damaged and to deteriorate the characteristics, thereby improving the manufacturing yield and quality.

  In FIG. 16, the personal computer 230 roughly includes a main body 231, a keyboard 232, and a display unit 233 to which the display device 100 including the display panel 110 described in each of the above embodiments is applied. . Even in this case, reflection of external light at the display portion 233 can be suppressed, and the gap between the substrates constituting the display portion 233 can be made uniform, and the display image quality can be improved. Further, it is possible to prevent the pixel array (light emitting element, driving circuit, signal wiring, etc.) from being damaged and to deteriorate the characteristics, thereby improving the manufacturing yield and quality.

  In FIG. 17, the mobile phone 240 is roughly divided into a display to which the display device 100 including the operation unit 241, the earpiece 242, the mouthpiece 243, and the display panel 110 described in each of the above embodiments is applied. Part 244. Even in this case, reflection of external light at the display unit 244 can be suppressed, the gap between the substrates constituting the display unit 244 can be made uniform, and the display image quality can be improved. Further, it is possible to prevent the pixel array (light emitting element, driving circuit, signal wiring, etc.) from being damaged and to deteriorate the characteristics, thereby improving the manufacturing yield and quality.

  In each electronic device described above, the case where the light-emitting panel according to the present invention is applied as a display panel in which a plurality of pixels are two-dimensionally arranged has been described in detail, but the present invention is not limited to this. . The light-emitting device according to the present invention includes, for example, a light-emitting element array in which a plurality of pixels having light-emitting elements are arranged in one direction, and is exposed by irradiating the photosensitive drum with light emitted from the light-emitting element array according to image data. It may be applied to an exposure apparatus.

DESCRIPTION OF SYMBOLS 11 Element substrate 12 Counter substrate 21 Pixel electrode 22 Organic EL layer 23 Counter electrode 25 Partition 30 Light-shielding adhesive part 31 Light-shielding spacer layer 32 Adhesive layer 40 Seal part 41 Filler 42 Adhesive layer 50 Sealing space 100 Display device 110 Display panel 111 Pixel array PIX Pixel OEL Organic EL element

Claims (11)

A plurality of pixels each having a light emitting element, and a partition wall provided continuously in a boundary region that partitions the light emitting element formation region of each pixel, and a first substrate provided on one side;
A second substrate having one surface side facing the one surface side of the first substrate and sealing the one surface side of the first substrate;
A light-shielding spacer layer having a planar pattern corresponding to the planar pattern of the partition walls, being in close contact with the one surface side of the second substrate, and having a light-shielding property;
An adhesive layer bonded to a surface side of the light-shielding spacer layer facing the one surface side of the first substrate and the one surface side of the first substrate;
A light-emitting panel comprising: The light emitting element has a light emitting layer and a pair of electrodes facing each other through the light emitting layer, and an electrode layer forming one of the pair of electrodes is provided to extend on the partition wall,
The light emitting panel according to claim 1, wherein the adhesive layer is provided in a region corresponding to an opening from which at least a part of the electrode layer extending on the partition wall is removed.   The light-emitting panel according to claim 1, wherein the light-shielding spacer layer has a continuous planar pattern corresponding to the planar pattern of the partition walls. The light emitting element has a top emission structure,
Each pixel includes at least a plurality of thin film transistors for driving the light emitting element to emit light, and each thin film transistor has a bottom gate structure in which a gate electrode is provided below a semiconductor layer. The light emitting panel according to claim 1. Forming a plurality of pixels each having a light-emitting element on one surface side of the first substrate, and a partition wall continuously provided in a boundary region that partitions the light-emitting element formation region of each pixel;
Preparing a second substrate for sealing the one surface side of the first substrate;
Forming a light-shielding spacer layer having a planar pattern corresponding to the planar pattern of the partition wall and having a light-shielding property, in close contact with one surface side of the second substrate;
Forming an adhesive layer having an adhesive resin material on a surface of the light-shielding spacer layer facing the one surface side of the first substrate;
The one surface side of the first substrate is opposed to the one surface side of the first substrate, a pressing force is applied, and the first substrate and the adhesive layer are interposed through the light-shielding spacer layer and the adhesive layer. Bonding the second substrate together;
In a state where the first substrate and the second substrate are bonded together, the adhesive layer is cured under a predetermined condition to form an adhesive layer, and the light-shielding spacer layer is formed through the adhesive layer. Bonding a surface side corresponding to the one surface side of the first substrate and the one surface side of the first substrate;
A method for manufacturing a light-emitting panel, comprising: The light emitting element includes a light emitting layer and a pair of electrodes facing each other through the light emitting layer,
Forming the pixel on the one surface side of the first substrate;
Extending an electrode layer forming either one of the pair of electrodes of the light emitting element on the partition; and
Forming an opening by removing a part of the electrode layer extending on the partition;
Including
The step of forming the adhesive layer includes the step of forming the adhesive layer at a position corresponding to at least the opening of a surface of the light-shielding spacer layer facing the one surface side of the first substrate. The method for manufacturing a light-emitting panel according to claim 5. A plurality of pixels each having a light-emitting element, a plurality of selection lines and a plurality of data lines connected to the plurality of pixels, and a boundary region that partitions the light-emitting element formation region of each pixel A first substrate provided on one surface side, and a first surface side facing the one surface side of the first substrate, and sealing the one surface side of the first substrate. A light-shielding spacer layer having a light-shielding property provided in close contact with the one surface side of the second substrate having a planar pattern corresponding to the planar pattern of the partition; A light-emitting panel comprising: an adhesive layer bonded to a surface side of the first substrate facing the one surface side of the spacer layer and the one surface side of the first substrate;
A selection drive circuit for applying a selection signal for setting the pixel to a selected state via the selection lines;
A signal driving circuit for writing a gradation signal corresponding to image data to the pixels set in the selected state via the data lines;
A light emitting device comprising: The light emitting element has a light emitting layer and a pair of electrodes facing each other through the light emitting layer, and an electrode layer forming one of the pair of electrodes is provided to extend on the partition wall,
The light-emitting device according to claim 7, wherein the adhesive layer is provided in a region corresponding to the opening from which a part of the electrode layer extending on the partition wall is removed.   The light-emitting device according to claim 7, wherein the light-shielding spacer layer has a continuous planar pattern corresponding to the planar pattern of the partition walls. The light emitting element has a top emission structure,
Each pixel includes at least a plurality of thin film transistors for driving the light emitting element to emit light, and each thin film transistor has a bottom gate structure in which a gate electrode is provided below a semiconductor layer. The light emitting device according to claim 7.   An electronic device comprising the light emitting device according to claim 7 mounted thereon.

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