JP2012039536A - Imaging device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an imaging device capable of improving the correction accuracy of noise component removal.SOLUTION: An imaging device 1 has an imaging element 3. The imaging element 3 has a pixel array in which plural pixels for outputting pixel signals according to light amounts are arranged in a two-dimensional matrix state. First readout control for decimating the pixel signals in the column direction to read out the decimated pixel signals in a state where the pixel array is light-shielded and second readout control for reading out the pixel signals in a state where the pixel array is exposed are switched and executed. An image processing unit 13 corrects pixel signals read out from the pixel array by the second readout control based on pixel signals read out from the pixel array by the first readout control.

Description

  The present invention relates to an imaging apparatus.

  In an image pickup apparatus having an image pickup device such as a CMOS type or CCD type solid-state image pickup device, at least one screen portion is removed in order to remove noise components (fixed pattern noise (FPN) components, etc.) included in the output of the image pickup device. It has been proposed to correct exposure data by reading out light shielding data from the image sensor and storing it in a frame memory and subtracting the light shielding data in the frame memory from the exposure data.

  However, in this imaging apparatus, it is necessary to perform correction processing using light shielding data for at least one screen, and the processing amount increases. For this reason, it takes a long time for the correction processing for removing the noise component, and the time required for obtaining the final corrected image data is increased accordingly. Therefore, the photographing speed such as continuous shooting cannot be increased. In addition, there is a problem that the time lag of the release becomes long during single shooting.

  Therefore, in Patent Document 1 below, it is proposed to read out signals from a plurality of rows of pixels instead of all rows from the image pickup device in a state where the image pickup device is shielded from light, and use this as correction data. In this case, since the amount of correction data is small, the amount of noise component correction is reduced, the correction time is shortened, and the shooting speed such as continuous shooting can be increased. The time lag of the release at the time of shooting can be shortened.

JP 2006-287378 A

  However, as a result of the inventor's research, in a state where the image sensor is shielded from light, signals are read from pixels in a plurality of continuous rows corresponding to the central region in the column direction of the image instead of all rows from the image sensor. It has been found that when used as correction data, the accuracy of noise component correction may be reduced.

  The present invention has been made in view of such circumstances, and an object of the present invention is to provide an imaging apparatus capable of improving the accuracy of noise component removal correction.

  The following aspects are presented as means for solving the problems. An image pickup apparatus according to a first aspect includes: a pixel array in which a plurality of pixels that output pixel signals corresponding to a light amount are arranged in a two-dimensional matrix; and the pixel signals in a column direction with the pixel array shielded from light Read control means for switching between a first read control that reads out the pixel signal and a second read control that reads out the pixel signal in a state where the pixel array is exposed, and the first read control Correction means for correcting the pixel signal read out by the second read-out control based on the output pixel signal.

  In the imaging device according to a second aspect, in the first aspect, the first readout control is configured to variably set the thinning rate in accordance with a command signal.

  In the imaging device according to a third aspect, in the first or second aspect, the correction unit performs an average process for each column of the pixel array with respect to the pixel signal read out by the first readout control. The correction data for one row is generated by subtracting the correction data, and the correction data is subtracted for each column from the pixel signal read out by the second readout control.

  In the imaging device according to a fourth aspect, in any one of the first to third aspects, the correction unit moves the pixel array in a column direction with respect to the pixel signal read by the first read control. Correction data is generated for each partial area divided into a plurality of areas, and the pixel signal read out by the second readout control is corrected for each partial area based on the correction data.

  ADVANTAGE OF THE INVENTION According to this invention, the imaging device which can raise the precision of correction | amendment of noise component removal can be provided.

1 is a schematic block diagram illustrating an imaging apparatus according to an embodiment of the present invention. It is a schematic block diagram which shows the solid-state image sensor in FIG. FIG. 3 is a circuit diagram showing one pixel in FIG. 2. It is a figure which shows typically the reading line of the solid-state image sensor in the imaging device shown in FIG. 1, and the reading line of the solid-state image sensor in the imaging device by a comparative example. FIG. 3 is a circuit diagram showing a part of the vertical scanning circuit in FIG. 2. 6 is a timing chart illustrating an operation of the circuit illustrated in FIG. 5 when acquiring correction data. 6 is a timing chart showing an operation of the circuit shown in FIG. 5 when acquiring data to be corrected.

  Hereinafter, an imaging device according to the present invention will be described with reference to the drawings.

  FIG. 1 is a schematic block diagram showing an imaging apparatus 1 according to an embodiment of the present invention. The imaging device 1 according to the present embodiment is configured as an electronic camera.

  In FIG. 1, a photographing lens 2 is attached to an imaging apparatus 1 according to the present embodiment. The photographing lens 2 is driven by a lens control unit 2a for focus and diaphragm. In the image space of the photographic lens 2, the imaging surface of the solid-state imaging device 3 is arranged.

  The solid-state imaging device 3 is driven by a control signal output from the imaging control unit 4 and outputs a signal. A signal output from the solid-state imaging device 3 is processed through the signal processing unit 5 and the A / D conversion unit 6 and then temporarily stored in the memory 7. The memory 7 is connected to the bus 8. The bus 8 is also connected with a lens control unit 2a, an imaging control unit 4, a microprocessor 9, a focus calculation unit 10, a recording unit 11, an image compression unit 12, an image processing unit 13, and the like. An operation unit 9 a such as a release button is connected to the microprocessor 9. A recording medium 11a is detachably attached to the recording unit 11 described above.

  FIG. 2 is a circuit diagram showing a schematic configuration of the solid-state imaging device 3 in FIG. The solid-state image sensor 3 is configured as a CMOS solid-state image sensor.

  As shown in FIG. 2, this solid-state image sensor 3 is arranged in a vertical scanning circuit 22, a horizontal scanning circuit 23, and a pixel corresponding to the amount of light, as in a general CMOS solid-state image sensor. A plurality of pixels 24 for outputting signals, a readout circuit 25 including a well-known CDS circuit and the like, and an output amplifier 26 are provided. An electrical signal output from the photodiode PD (not shown in FIG. 2; see FIG. 3) of each pixel 24 is taken out by the vertical scanning circuit 22 controlled by the imaging control unit 4 to the readout circuit 25 in units of rows. The horizontal scanning circuit 23 controlled by the imaging control unit 4 outputs the image signal to the output terminal 27 via the output amplifier 26 in units of columns. Thus, the vertical scanning circuit 22 and the horizontal scanning circuit 23 constitute a circuit that drives the pixel 24. A region where the pixels 24 are arranged in a two-dimensional matrix is a pixel array 40. In the solid-state imaging device 3, the vertical scanning circuit 22, the horizontal scanning circuit 23, the readout circuit 25, and the output amplifier 26 constitute a peripheral circuit.

  FIG. 3 is a circuit diagram showing one pixel 24 in FIG. As shown in FIG. 3, each pixel 24 includes a photodiode PD as a photoelectric conversion unit that generates and accumulates charges according to incident light, a floating capacitance unit FD that receives the charges and converts them into a potential, and a photodiode. As a transfer transistor TX as a transfer unit that transfers charges from the PD to the floating capacitor unit FD, a reset transistor RST that resets the potential of the floating capacitor unit FD, and an amplifier unit that outputs a signal corresponding to the potential of the floating capacitor unit FD Amplification transistor AMP and a selection transistor SEL as a selection unit for selecting a readout row. In the present embodiment, the transistors AMP, TX, RST, and SEL of the pixel 24 are all nMOS transistors. In FIG. 3, VDD is a power supply potential.

  The gate of the transfer transistor TX is commonly connected to the transfer line 32 for each row, and a control signal φTX for controlling the transfer transistor TX is supplied from the vertical scanning circuit 22 thereto. The gate of the reset transistor RST is commonly connected to the reset line 31 for each row, and a control signal φRST for controlling the reset transistor RST is supplied thereto from the vertical scanning circuit 22. The gates of the selection transistors SEL are commonly connected to the row selection line 30 for each row, and a control signal (row selection signal) φSEL for controlling the selection transistor SEL is supplied from the vertical scanning circuit 22 thereto. The source of the selection transistor SEL of the pixel 24 is commonly connected to the vertical signal line 33 for each column. The row selection line 30, the reset line 31 and the transfer line 32 are connected to the vertical scanning circuit 32. The vertical signal line 33 is connected to the readout circuit 25.

  In the present embodiment, the imaging control unit 4, the vertical scanning circuit 22, the horizontal scanning circuit 23, and the horizontal readout circuit 25 are connected to the pixels from the pixel array 40 with the solid-state imaging device 3 (and thus the pixel array 40) shielded from light. First read control is performed in which signals are read out in the column direction. In the present embodiment, the first read control is performed so that the rows of pixels 24 to be read are distributed over substantially the entire column direction of the pixel array 40.

  FIG. 4A schematically shows an example of the row 50 of the pixels 24 read by the thinning readout. In the example shown in FIG. 4A, the number of read rows is one row every k rows (k-1) at a rate of one row in consecutive k rows (k is an integer of 2 or more). However, the number of read rows at the time of thinning-out readout may be, for example, two rows every h rows (h-2) at a ratio of two rows to h rows (h is an integer of 3 or more). FIG. 4B is a diagram schematically illustrating a read row in the comparative example. In this comparative example, a plurality of continuous rows corresponding to the central region in the column direction of the pixel array 40 are used as readout rows, and signals are not read out from the remaining rows (upper and lower region rows).

  In the present embodiment, the imaging control unit 4, the vertical scanning circuit 22, the horizontal scanning circuit 23, and the horizontal readout circuit 25 are configured so that the first readout control and the solid-state imaging device 3 (and thus the pixel array 40) are exposed. In this state, the second readout control for reading out the pixel signal from the pixel array 40 is switched to perform a function as a readout control means. .

  Further, in the present embodiment, a function as a correction unit that corrects the pixel signal read by the second read control based on the pixel signal read by the first read control is provided with image processing. Part 13 is supposed to bear.

  FIG. 5 is a circuit diagram showing a part of the vertical scanning circuit 22 in FIG. 2 (a circuit related to selection of a read row, that is, a circuit for generating a row selection signal φSEL). In the present embodiment, the vertical scanning circuit 22 includes a D-type flip-prop 61 and an AND gate 62 that are provided on a one-to-one basis for each row of pixels 24. The output terminal c of the D-type flip-prop 61 of each stage is connected to the data input terminal b of the D-type flip-prop 61 of the next stage, and the vertical start pulse φVSTR is applied to the data input terminal b of the D-type flip-prop 61 of the first stage. The clock input terminals a of the D-type flip-props 61 of the respective stages are connected in common, and the clock signal φCLK is input thereto. Thereby, a shift register is constituted by these D-type flip-props 61. One input terminal of each AND gate 62 is connected to the output terminal c of the corresponding D-type flip-prop 61, and the other input terminal of each AND gate 62 is connected in common to which the control signal φRD is input. ing. Thereby, each AND gate 62 outputs a logical product signal of the output of the data input terminal b of the corresponding stage and the control signal φRD as the row selection signal φSEL of each row. The signals φVSTR, φCLK, and φRD are supplied from the imaging control unit 4 to the vertical scanning circuit 22.

  At the rising edge of the clock signal φCLK during the period when the vertical start pulse φVSTR is at the high level, the shift register including the D-type flip-prop 61 starts its operation, and then the D-type flip of each stage is synchronized with the clock signal φCLK. In the output signal of the prop 61, pulses are sequentially shifted. Then, a logical product of the output of the data input terminal b of each stage and the control signal φRD is output as the row selection signal φSEL for that row.

  FIG. 6 shows the signals φVSTR, φCLK, φRD, and the output signals (1) to (4) of the D-type flip-props 61 in the first to fourth stages when every two rows are read out. It is a timing chart which shows. In FIG. 6, the high level pattern of the control signal φRD serving as the gate signal of the AND gate 62 corresponds to every other row in the first row, the fourth row, the seventh row, and so on. Therefore, the row selection signals φSEL (1), φSEL (4), φSEL (7)... Of these rows sequentially become high level, while the row selection signals φSEL (2), φSEL corresponding to the rows in between. (3), φSEL (5), φSEL (6)... Remain at a low level, and every other row is selected as a read row every two rows. By appropriately setting a high level pattern of the control signal φRD, it is possible to set an arbitrary thinning rate and set a row according to the thinning rate as a read row.

  FIG. 7 shows the signals φVSTR, φCLK, φRD, and the output signals (1) to (4) of the first to fourth D-type flip-flops 61 when all the rows are read out. It is a timing chart. In FIG. 7, since the high level pattern of the control signal φRD serving as the gate signal of the AND gate 62 corresponds to all the rows one by one, the row selection signals φSEL (1) and φSEL (2) for these rows. , ΦSEL (3), φSEL (4)... Sequentially become high level. Therefore, all the rows are selected as read rows one by one.

  Note that, under the control of the imaging control unit 4, the vertical scanning circuit 22 outputs the control signals φTX and φRES in response to the row selection signal φSEL, and further performs horizontal scanning in the horizontal scanning period according to those conditions. As described above, the imaging control unit 4 supplies control signals to the horizontal scanning circuit 23 and the readout circuit 25 to control them. However, since these points are known, the description thereof is omitted.

  In the imaging apparatus 1 according to the present embodiment, for example, when an imaging start is instructed by the operation unit 9a, under the overall control by the microprocessor 9, after the correction data is acquired, the data to be corrected (main imaging data) Etc.) is then performed, and then the data to be corrected is corrected based on the correction data.

  Acquisition of the correction data is performed as follows. That is, in a state where the mechanical shutter is closed by the lens control unit 2a and the solid-state image pickup device 3 is shielded from light, the image pickup control unit 4 outputs the control signals φRD, φVSTR, and φCLK shown in FIG. 22, the signals of the pixels 24 of the pixel array 40 are read out in the column direction, and the rows 50 of the pixels 24 to be read out are almost entirely in the column direction of the pixel array 40 as shown in FIG. The readout control of the solid-state imaging device 3 is performed so as to be distributed over the range. The signal thus read out is stored in the memory 7 as correction data via the signal processing unit 5 and the A / D conversion unit 6.

  Acquisition of the data for correction (main photographing data or the like) is performed as follows, for example. The lens control unit 2a opens the mechanical shutter for a desired exposure period and then closes it. Thus, the imaging control unit 4 controls the control signals φRD, φVSTR, φCLK shown in FIG. Is supplied to the vertical scanning circuit 22 of the solid-state imaging device 3, and the readout control of the solid-state imaging device 3 is performed so that the signals of the pixels 24 of the pixel array 40 are read out over all rows. The signal thus read out is stored in the memory 7 as data to be corrected through the signal processing unit 5 and the A / D conversion unit 6.

  Subsequent correction processing is performed by correcting the data to be corrected stored in the memory based on the data for correction stored in the memory 7.

  In the first specific example of the correction process, the correction data is averaged for each column of the pixels 24 to collect correction data for one row, and from each signal of the correction target data, Data in the same column as that of the signal in the correction data for one row is subtracted. Thereby, corrected image data is obtained.

  In the second specific example of the correction processing, the partial data (for example, FIG. 5) obtained by dividing the data to be corrected stored in the memory 7 into a plurality of (for example, three divisions) the pixel array 40 in the column direction. 4 (a) is corrected based on the correction data stored in the memory 7 for each of the upper area, the central area, and the lower area. More specifically, for example, by performing an averaging process for each column of the pixels 24 for each of the upper region, the central region, and the lower region in FIG. Correction data for one line compiled from the correction data, correction data for one line compiled from the correction data for the central area, and correction data for one line compiled from the correction data for the lower area are obtained. Then, from the signals in the upper area of the data to be corrected, the data in the same column as the signal column of the correction data for one row collected from the correction data in the upper area is subtracted. Data of the same column as the column of the signal among the correction data for one row collected from the correction data of the central region is subtracted from each signal of the central region of the correction target data. Data in the same column as the column of the signal among the correction data for one row collected from the correction data in the lower region is subtracted from each signal in the lower region of the data to be corrected. Thus, corrected image data is obtained as a set of signals after subtraction for each region.

  Note that the thinning rate at the time of reading out the correction data may be fixed, or may be set variably. In the latter case, for example, the imaging control unit 4 variably sets the thinning rate (specifically, the control signal φRD of the control signal φRD) in accordance with a command corresponding to a signal for selecting the speed priority mode or the image quality priority mode by the operation unit 9a. A high level pattern may be set). When the thinning rate can be variably set, the thinning rate may be variably set to zero (that is, all rows are read).

  As in the comparative example shown in FIG. 4B described above, using data read from only a plurality of continuous rows corresponding to the central region in the column direction of the pixel array 40 as correction data, When correcting the actual shooting data, etc., if there is a large noise generation factor that is different from the central area in the peripheral part of the image (area on both sides in the column direction of the image), the noise is included in the correction. The generation factor is not reflected at all, and as a result, the accuracy of noise removal correction decreases, and the image quality of the corrected image deteriorates.

  On the other hand, in the present embodiment, as shown in FIG. 4A, signals read from the rows distributed over almost the entire column direction of the pixel array 40 are used as correction data to be corrected. Since correction of data (main shooting data, etc.) is performed, even if a large noise generation factor that differs from the central area exists in the peripheral part of the image (area on both sides in the column direction of the image), the correction is performed. The cause of the noise is reflected. Therefore, according to the present embodiment, the accuracy of noise removal correction is increased and the image quality of the corrected image is improved.

  As mentioned above, although embodiment of this invention was described, this invention is not limited to the embodiment. For example, as the vertical scanning circuit 22, not only a shift register type vertical scanning circuit but also a decoder type vertical scanning circuit may be used.

DESCRIPTION OF SYMBOLS 1 Imaging device 3 Solid-state image sensor 4 Imaging control part 22 Vertical scanning circuit 23 Horizontal scanning circuit 25 Reading circuit

Claims (4)

A pixel array in which a plurality of pixels that output pixel signals according to the amount of light are arranged in a two-dimensional matrix;
First read control for reading out the pixel signals in the column direction while the pixel array is shielded from light, and second read control for reading out the pixel signals with the pixel array exposed. Read control means for switching, and
Correction means for correcting the pixel signal read by the second read control based on the pixel signal read by the first read control;
An imaging apparatus comprising:   The imaging apparatus according to claim 1, wherein in the first readout control, the thinning-out rate is variably set according to a command signal.   The correction unit generates correction data for one row by performing an average process for each column of the pixel array on the pixel signal read by the first read control, and generates the second correction data. The imaging apparatus according to claim 1, wherein the correction data is subtracted for each column from the pixel signal read by the read control and corrected.   The correction means generates correction data for each partial region obtained by dividing the pixel array into a plurality of columns in the column direction with respect to the pixel signal read by the first read control, and performs the second read The image pickup apparatus according to claim 1, wherein the pixel signal read by the control is corrected based on the correction data for each of the partial areas.

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