JP2012038860A5 - - Google Patents

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JP2012038860A5
JP2012038860A5 JP2010176468A JP2010176468A JP2012038860A5 JP 2012038860 A5 JP2012038860 A5 JP 2012038860A5 JP 2010176468 A JP2010176468 A JP 2010176468A JP 2010176468 A JP2010176468 A JP 2010176468A JP 2012038860 A5 JP2012038860 A5 JP 2012038860A5
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semiconductor substrate
semiconductor
laminating
substrates
stacking
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JP2012038860A (en
JP5617418B2 (en
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複数の半導体基板のうち少なくとも二つの半導体基板を互いに積層する半導体基板の積層方法であって
複数の半導体基板のうち、第1の半導体基板に対する積層基準を満たす第2の半導体基板を選択する選択ステップと、
前記第1の半導体基板と前記第2の半導体基板とを互いに積層する積層ステップと
を有する半導体基板の積層方法。
A method of laminating a semiconductor substrate in which at least two semiconductor substrates among a plurality of semiconductor substrates are laminated together ,
A selection step of selecting a second semiconductor substrate satisfying a stacking criterion for the first semiconductor substrate among the plurality of semiconductor substrates;
A laminating step of laminating the first semiconductor substrate and the second semiconductor substrate ;
A method for laminating a semiconductor substrate comprising:
前記第1の半導体基板の表面に設けられた指標の位置を計測する計測ステップを有し、
前記選択ステップは、前記第1の半導体基板の前記位置に対して、予め定められた基準を満たす位置に指標が配置された半導体基板を、前記積層基準を満たす前記第2の半導体基板として選択する請求項1に記載の半導体基板の積層方法。
A measurement step of measuring a position of an index provided on the surface of the first semiconductor substrate;
The selection step, relative to the position of the first semiconductor substrate, a semiconductor substrate which index is arranged at a position that satisfies the predetermined criterion is selected as the second semiconductor substrate which satisfies the laminated reference The method for laminating a semiconductor substrate according to claim 1.
前記複数の半導体基板のうち、表面に設けられた指標の位置が前記基準を満たさない半導体基板を、保留基板として保留する保留ステップを有する請求項2に記載の半導体基板の積層方法。 The semiconductor substrate stacking method according to claim 2, further comprising: a holding step of holding, as a holding substrate , a semiconductor substrate in which a position of an index provided on a surface does not satisfy the reference among the plurality of semiconductor substrates. 前記選択ステップは、前記第1の半導体基板の前記指標の位置に対するずれ量が予め定められた範囲内にある前記指標が配置されている半導体基板を前記第2の半導体基板として選択する請求項2または3に記載の半導体基板の積層方法。 Said selection step, wherein selecting a semiconductor substrate on which the index is in the range of displacement amount with respect to the position of the index of the first semiconductor substrate is predetermined is disposed in said second semiconductor substrate Item 4. The method for stacking semiconductor substrates according to Item 2 or 3 . 前記第1の半導体基板と前記第2の半導体基板とを互いに積層した後、前記第2の半導体基板を研磨する研磨ステップと、A polishing step of polishing the second semiconductor substrate after laminating the first semiconductor substrate and the second semiconductor substrate;
前記第2の半導体基板の研磨された面に指標を形成する指標形成ステップと、Forming an index on the polished surface of the second semiconductor substrate; and
を含み、Including
前記計測ステップは、前記指標形成ステップで形成された前記指標の位置を計測し、The measurement step measures the position of the index formed in the index formation step,
前記選択ステップは、前記計測ステップで計測された前記指標の位置に対して前記基準を満たす位置に指標が配置された半導体基板を、前記積層基準を満たす新たな前記第2の半導体基板として選択する請求項2から4のいずれか一項に記載の半導体基板の積層方法。In the selection step, a semiconductor substrate in which an index is arranged at a position satisfying the standard with respect to the position of the index measured in the measurement step is selected as a new second semiconductor substrate that satisfies the stacking standard. The method for laminating a semiconductor substrate according to claim 2.
前記計測ステップは、前記第1の半導体基板の反りが矯正された状態で前記位置を計測する請求項2から5のいずれか1項に記載の半導体基板の積層方法。 The semiconductor substrate stacking method according to claim 2, wherein the measuring step measures the position in a state where the warp of the first semiconductor substrate is corrected. 前記基準は、前記第1の半導体基板の表面に設けられた電極の高さと前記複数の半導体基板の表面に設けられた電極の高さを加味して定められる請求項2から6のいずれか一項に記載の半導体基板の積層方法。 The criterion is any one of the first electrode provided on the semiconductor substrate surface of the height and the plurality of electrodes provided on the semiconductor substrate surface of a height claims 2 that is determined by adding the 6 The method for laminating a semiconductor substrate according to Item . 前記選択ステップは、加熱を含む後工程における熱膨張を考慮して第2の半導体基板を選択する請求項1からのいずれか一項に記載の半導体基板の積層方法。 Said selection step, a semiconductor substrate The method of laminating according to any one of claims 1 7 for selecting the second semiconductor substrate in consideration of the thermal expansion in the process after including heating. 前記選択ステップは、複数の前記第1の半導体基板と前記複数の半導体基板との全ての組み合わせにおいて前記積層基準を満たすか否かを判断し、複数の前記第1の半導体基板と前記複数の半導体基板との組み合わせ数が最も多くなるように前記第2の半導体基板を選択する請求項1から8のいずれか一項に記載の半導体基板の積層方法。In the selection step, it is determined whether all the combinations of the plurality of first semiconductor substrates and the plurality of semiconductor substrates satisfy the stacking criterion, and the plurality of first semiconductor substrates and the plurality of semiconductors are determined. The method for laminating a semiconductor substrate according to any one of claims 1 to 8, wherein the second semiconductor substrate is selected so that the number of combinations with the substrate is maximized. 前記第1の半導体基板および前記第2の半導体基板の少なくとも一方は、既に積層された半導体基板である請求項1から9のいずれか1項に記載の半導体基板の積層方法。10. The method of laminating a semiconductor substrate according to claim 1, wherein at least one of the first semiconductor substrate and the second semiconductor substrate is an already laminated semiconductor substrate. 複数の半導体基板のうち少なくとも二つの半導体基板を互いに積層する半導体基板の積層方法であって、A method of laminating a semiconductor substrate in which at least two semiconductor substrates among a plurality of semiconductor substrates are laminated together,
複数の半導体基板のうち、予め定められた積層基準を満たす第1の半導体基板および第2の半導体基板をそれぞれ選択する選択ステップと、A selection step of selecting a first semiconductor substrate and a second semiconductor substrate that satisfy a predetermined stacking criterion among a plurality of semiconductor substrates,
前記第1の半導体基板と前記第2の半導体基板とを互いに積層する積層ステップと、A laminating step of laminating the first semiconductor substrate and the second semiconductor substrate;
を有する半導体基板の積層方法。A method for laminating a semiconductor substrate comprising:
複数の半導体基板のうち少なくとも二つの半導体基板を互いに積層する半導体基板の積層装置であって、
複数の半導体基板のうち、第1の半導体基板に対する積層基準を満たす第2の半導体基板を選択する選択部と、
前記第1の半導体基板と前記第2の半導体基板とを互いに積層する積層部と
を備える半導体基板の積層装置。
A semiconductor substrate laminating apparatus for laminating at least two semiconductor substrates among a plurality of semiconductor substrates,
A selection unit that selects a second semiconductor substrate that satisfies a stacking criterion for the first semiconductor substrate among the plurality of semiconductor substrates;
A stacked portion that stacks the first semiconductor substrate and the second semiconductor substrate ;
A semiconductor substrate laminating apparatus comprising:
前記第1の半導体基板の表面に設けられた指標の位置を計測する計測部を備え、
前記選択部は、前記第1の半導体基板の前記位置に対して、予め定められた基準を満たす位置に指標が配置された半導体基板を、前記積層基準を満たす前記第2の半導体基板として選択する請求項12に記載の半導体基板の積層装置。
A measurement unit that measures the position of an index provided on the surface of the first semiconductor substrate;
The selection unit, with respect to the position of the first semiconductor substrate, a semiconductor substrate which index is arranged at a position that satisfies the predetermined criterion is selected as the second semiconductor substrate which satisfies the laminated reference 13. A semiconductor substrate stacking apparatus according to claim 12 .
前記複数の半導体基板のうち、表面に設けられた指標の位置が前記基準を満たさない半導体基板を、保留基板として保留する保留部を備える請求項13に記載の半導体基板の積層装置。 Wherein the plurality of the semiconductor substrate, a semiconductor substrate having a position indicator provided on the surface does not satisfy the criteria, the semiconductor substrate lamination device according to claim 13, Ru provided with a holding portion for holding the holding substrate. 前記選択部は、前記第1の半導体基板の前記指標の位置に対するずれ量が予め定められた範囲内にある前記指標が配置されている半導体基板を前記第2の半導体基板として選択する請求項13または14に記載の半導体基板の積層装置。The selection unit selects, as the second semiconductor substrate, a semiconductor substrate on which the index in which a deviation amount of the first semiconductor substrate with respect to the position of the index is within a predetermined range is arranged. Or a semiconductor substrate stacking apparatus according to 14. 前記計測部は、前記第1の半導体基板の反りが矯正された状態で前記位置を計測する請求項13から15のいずれか1項に記載の半導体基板の積層装置。The semiconductor substrate stacking apparatus according to claim 13, wherein the measurement unit measures the position in a state where the warp of the first semiconductor substrate is corrected. 前記基準は、前記第1の半導体基板の表面に設けられた電極の高さと前記複数の半導体基板の表面に設けられた電極の高さを加味して定められる請求項13から16のいずれか一項に記載の半導体基板の積層装置。17. The reference is determined by taking into account the height of an electrode provided on the surface of the first semiconductor substrate and the height of an electrode provided on the surface of the plurality of semiconductor substrates. The semiconductor substrate laminating apparatus according to the item. 前記選択部は、加熱を含む後工程における熱膨張を考慮して第2の半導体基板を選択する請求項12から17のいずれか一項に記載の半導体基板の積層装置。The semiconductor substrate stacking apparatus according to claim 12, wherein the selection unit selects a second semiconductor substrate in consideration of thermal expansion in a post-process including heating. 前記選択部は、複数の前記第1の半導体基板と前記複数の半導体基板との全ての組み合わせにおいて前記積層基準を満たすか否かを判断し、複数の前記第1の半導体基板と前記複数の半導体基板との組み合わせ数が最も多くなるように前記第2の半導体基板を選択する請求項12から18のいずれか一項に記載の半導体基板の積層装置 The selection unit determines whether or not all the combinations of the plurality of first semiconductor substrates and the plurality of semiconductor substrates satisfy the stacking criterion, and the plurality of first semiconductor substrates and the plurality of semiconductors. 19. The semiconductor substrate stacking apparatus according to claim 12, wherein the second semiconductor substrate is selected so that the number of combinations with the substrate is maximized . 複数の半導体基板のうち少なくとも二つの半導体基板を互いに積層する半導体基板の積層装置であって、A semiconductor substrate laminating apparatus for laminating at least two semiconductor substrates among a plurality of semiconductor substrates,
複数の半導体基板のうち、予め定められた積層基準を満たす第1の半導体基板および第2の半導体基板をそれぞれ選択する選択部と、A selection unit that selects a first semiconductor substrate and a second semiconductor substrate that satisfy a predetermined stacking criterion among a plurality of semiconductor substrates;
前記第1の半導体基板と前記第2の半導体基板とを互いに積層する積層部と、A stacked portion that stacks the first semiconductor substrate and the second semiconductor substrate;
を備える半導体基板の積層装置。A semiconductor substrate laminating apparatus comprising:
複数の基板を重ね合わせて製造されるデバイスの製造方法であって、A device manufacturing method manufactured by stacking a plurality of substrates,
前記複数の基板を重ね合わせる工程は、The step of superimposing the plurality of substrates includes:
請求項1から11のいずれか一項に記載の半導体基板の積層方法を有するデバイスの製造方法。The manufacturing method of the device which has the lamination | stacking method of the semiconductor substrate as described in any one of Claim 1 to 11.
JP2010176468A 2010-08-05 2010-08-05 Semiconductor substrate laminating method, semiconductor substrate laminating apparatus and device manufacturing method Active JP5617418B2 (en)

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JP5850412B2 (en) * 2012-10-02 2016-02-03 株式会社デンソー Semiconductor device manufacturing system and semiconductor device manufacturing method
JP6264831B2 (en) * 2012-11-06 2018-01-24 株式会社ニコン Alignment apparatus, alignment method, and manufacturing method of laminated semiconductor device
JP6600838B2 (en) * 2016-03-08 2019-11-06 ボンドテック株式会社 Alignment apparatus and alignment method
WO2018012300A1 (en) 2016-07-12 2018-01-18 株式会社ニコン Method for producing laminated substrate, device for producing laminated substrate, system for producing laminated substrate, and substrate treatment device
KR102388201B1 (en) 2017-11-02 2022-04-19 가부시키가이샤 니콘 Manufacturing method, manufacturing apparatus, and program for laminated substrate

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