JP2012023396A - Epitaxial wafer, and method for producing epitaxial wafer - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an epitaxial wafer which can reduce wafer cracking by using a GaN wafer which is not beveled.SOLUTION: An epitaxial wafer E2 includes a GaN wafer 11 and an InAlGaN (0<X1<1, 0≤X2<1, 0<X1+X2<1) buffer layer 13. A GaN layer 17 is provided between the GaN wafer 11 and the InAlGaN buffer layer 13. The GaN layer 17 is grown on a major surface 11b of the GaN wafer 11. The GaN layer 17 forms a homojunction 19 with the major surface 11b of the GaN wafer 11. A semiconductor region having an optical gain such as an active layer is not provided between the GaN wafer 11 and the InAlGaN buffer layer 13. The InAlGaN buffer layer 13 forms a heterojunction 21 with the GaN layer 17.

Description

  The present invention relates to an epitaxial wafer and a method for producing an epitaxial wafer.

Patent Document 1 describes a circular wafer of gallium nitride. The circular wafer is a hexagonal system doped with oxygen at a concentration of 10 ¹⁶ cm ⁻³ to 10 ²⁰ cm ⁻³ and is made of a {0001} -oriented gallium nitride single crystal, is transparent, and can independently stand. . The circular wafer is chamfered at an inclination angle of 5 ° to 30 ° from the front side and the back side. Alternatively, the circular wafer is rounded with a radius of 0.1 to 0.5 mm. A circular wafer has one or two orientation flats (OF) that specify the orientation.

JP 2002-356398 A

  Practical GaN wafers are available from commercial routes. The GaN wafer is chamfered as described in Patent Document 1. According to the knowledge of the inventors, when a semiconductor element is manufactured using a GaN wafer without chamfering, the wafer being manufactured is broken during growth, inspection, handling during processing, and conveyance. In order to prevent the wafer from cracking, it is necessary to handle the wafer carefully, and the manufacture of the GaN-based semiconductor element is not easy. For this reason, in a practical GaN wafer, chamfering of the wafer is indispensable for improving the yield. GaN is a material that easily causes chipping, and wafer cracking is considered to be caused by some stress.

  When GaN-based semiconductor elements such as semiconductor light emitting diodes and semiconductor lasers are put into practical use, it has been required to reduce the price of GaN-based semiconductor elements. Improvements in cost reduction have been made in various aspects, and as one of them, simplification of the production of GaN wafers is being studied.

  As already described, the GaN wafer is chamfered, and in this chamfering process, the chamfer angle and the like are managed so as to be within a predetermined range of manufacturing variation. For this reason, as a matter of course, the cost for the chamfering operation occupies a certain proportion in the manufacturing cost of the GaN wafer. On the other hand, when a non-chamfered GaN wafer is used for manufacturing a semiconductor device, the wafer cracking frequency increases during the manufacturing process, resulting in an increase in the manufacturing cost of the semiconductor device.

  Accordingly, the present invention has been made in view of the above matters, and provides an epitaxial wafer that can reduce wafer cracking using a GaN wafer that has not been chamfered, and a method for producing this epitaxial wafer. Objective.

An epitaxial wafer according to one aspect of the present invention includes: (a) a GaN wafer that is not chamfered; and (b) In _X1 Al _X2 Ga _1-X1-X2 N (on the main surface of the GaN wafer). 0 <X1 <1, 0 ≦ X2 <1, 0 <X1 + X2 <1). The In _X1 Al _X2 Ga _1-X1-X2 N buffer layer has a thickness of 30 nm or more.

According to this epitaxial wafer, since the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer is provided on the GaN wafer that has not been chamfered, the occurrence of damage to the epitaxial wafer can be reduced. When the thickness of the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer becomes thinner than 30 nm, the buffer effect for reducing the occurrence of breakage is lowered.

In the epitaxial wafer of the present invention, the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer preferably has an indium composition of 0.02 or more. In this epitaxial wafer, when the indium composition is less than 0.02, the buffering effect is lowered. In the epitaxial wafer of the present invention, the indium composition is preferably 0.1 or less. In this epitaxial wafer, if the indium composition is 0.1 or less, crystal quality suitable for a semiconductor device can be provided. Since the growth of the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer is performed relatively quickly among the growth of a large number of epitaxial films for semiconductor elements, the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer is used. This crystal quality has a non-negligible effect on the subsequent crystal quality.

In the epitaxial wafer of the present invention, the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer is preferably InGaN. A buffering effect that reduces the occurrence of breakage is suitably provided.

In the epitaxial wafer of the present invention, the aluminum composition of the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer may be greater than zero. In the epitaxial wafer of the present invention, the aluminum composition may be 0.2 or less. In the above range, InAlGaN having an aluminum composition also provides a buffering effect that reduces the occurrence of breakage.

In the epitaxial wafer of the present invention, the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer may be grown on the main surface of the GaN wafer. According to this epitaxial wafer, the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer forms a heterojunction with the main surface of the GaN wafer.

The epitaxial wafer of the present invention may further include a GaN layer provided between the GaN wafer and the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer. The GaN layer may be grown on the main surface of the GaN wafer. According to the epitaxial wafer, the GaN layer forms a homojunction with the main surface of the GaN wafer, and the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer forms a heterojunction with the GaN layer. A semiconductor region having an optical gain such as an active layer is not provided between the GaN wafer and the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer.

  In the epitaxial wafer of the present invention, the thickness of the GaN wafer may be less than 350 micrometers. According to this epitaxial wafer, the occurrence of wafer cracking can be reduced even in a thin chamfered GaN wafer having a thickness of less than 350 micrometers. Alternatively, the thickness of the GaN wafer may be 230 micrometers or less. Even with a thinner GaN wafer without chamfering, the occurrence of wafer cracking can be reduced. The thickness of the GaN wafer is preferably 180 micrometers or more.

  In the epitaxial wafer of the present invention, the maximum value of the distance between two points on the edge of the GaN wafer may be 45 millimeters or more. In an epitaxial wafer having a wafer size equal to or greater than the above value, a buffering effect that reduces the occurrence of breakage is useful.

  In the epitaxial wafer of the present invention, an angle θ formed by an axis extending in the c-axis direction of the GaN wafer and a normal line of the main surface of the GaN wafer may be zero degrees or more. Also, the angle θ can be 90 degrees or less.

  In the epitaxial wafer of the present invention, the normal line of the main surface of the GaN wafer may be oriented along a plane defined by the m-axis and a-axis of the GaN wafer. For example, the normal may be directed in the m-axis direction of the GaN wafer, or may be directed in the a-axis direction. Further, the angle taken from the m-axis to the a-axis may be larger than zero degrees and smaller than 30 degrees.

  Furthermore, in the epitaxial wafer of the present invention, the main surface may be a semipolar surface of GaN. Since a wafer having a semipolar plane of GaN is easily broken, the buffer layer according to the present invention is effective.

In the epitaxial wafer of the present invention, the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer preferably has a thickness of 500 nm or less. According to this epitaxial wafer, a decrease in crystal quality was observed at a thickness exceeding 500 nm.

In the epitaxial wafer of the present invention, an n-type dopant may be added to the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer. According to this epitaxial wafer, by providing the buffer layer in the n-type region, it is possible to impart a buffering capability for reducing the occurrence of breakage to the non-chamfered GaN wafer at an early stage in many manufacturing processes. In the epitaxial wafer of the present invention, at least one of oxygen and silicon can be added to the GaN wafer as an n-type dopant. According to this epitaxial wafer, the buffer layer to which the n-type dopant is added also has a buffering capacity that reduces the occurrence of breakage.

In the epitaxial wafer of the present invention, the GaN wafer may include a gallium nitride region having a threading dislocation density of 1 × 10 ⁷ cm ⁻² or less. According to the epitaxial wafer, the threading dislocation density of the buffer layer is small, and therefore, the threading dislocation density of one or a plurality of GaN-based semiconductor layers grown on the buffer layer can also be decreased.

Epitaxial wafer of the present invention, the _{an In} X1 _Al X2 and _{Ga 1-X1-X2} N buffer layer p-type gallium nitride based semiconductor layer provided on the _{In X1 Al X2 Ga 1-X1} -X2 N buffer layer N-type gallium nitride based semiconductor layer provided on the substrate, and a gallium nitride based semiconductor multilayer for a multiple quantum well structure provided between the p-type gallium nitride based semiconductor layer and the n-type gallium nitride based semiconductor layer And a membrane. The peak wavelength of the photoluminescence spectrum from the gallium nitride based semiconductor multilayer film is 400 nm or more, and the peak wavelength is 550 nm or less. An epitaxial wafer for a light emitting device is provided.

Another aspect of the present invention is a method of making an epitaxial wafer. This method includes (a) preparing a GaN wafer that has not been chamfered; and (b) placing the GaN wafer in a reaction furnace using a wafer gripping tool, Growing a buffer layer of In _X1 Al _X2 Ga _1-X1-X2 N (0 <X1 <1, 0 ≦ X2 <1, 0 <X1 + X2 <1) on the surface; and (c) the In _X1 Al _X2 Ga. _And after the growth of the _1-X1-X2 N buffer layer, a step of removing the epitaxial wafer including the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer from the reactor using a wafer gripping tool. The In _X1 Al _X2 Ga _1-X1-X2 N buffer layer has a thickness of 30 nm or more.

According to this method, since the growth of the _{In X1 Al X2 Ga 1-X1} -X2 N buffer layer on the GaN wafer chamfering is not performed, it is possible to reduce the occurrence of the epitaxial wafer breakage. Therefore, after the growth of the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer, it is possible to reduce the occurrence of wafer breakage when the GaN wafer is taken out from the reaction furnace using the wafer gripping tool. When the thickness of the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer becomes thinner than 30 nm, the buffering effect for reducing the occurrence of breakage is lowered.

In the method according to the present invention, the indium composition of the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer is preferably 0.02 or more. In this method, when the indium composition is less than 0.02, the buffering effect is lowered. In the method of the present invention, the indium composition is preferably 0.1 or less. In this method, if the indium composition is 0.1 or less, crystal quality suitable for a semiconductor device can be provided. Since the growth of the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer is performed relatively quickly among the growth of a large number of epitaxial films for semiconductor elements, the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer is used. This crystal quality has a non-negligible effect on the subsequent crystal quality.

In the method according to the present invention, the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer is preferably InGaN. A buffering effect that reduces the occurrence of breakage is suitably provided.

In the method according to the present invention, the aluminum composition of the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer may be greater than zero. In the method according to the present invention, the aluminum composition may be 0.2 or less. In the above range, InAlGaN having an aluminum composition also provides a buffering effect that reduces the occurrence of breakage.

In the method according to the present invention, the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer may be grown on the main surface of the GaN wafer. According to this method, the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer forms a heterojunction with the main surface of the GaN wafer.

The method according to the present invention may further include a step of growing a GaN layer on the GaN wafer prior to the growth of the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer. The GaN layer forms a homojunction with the main surface of the GaN wafer, and the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer forms a heterojunction with the GaN layer. According to this method, no semiconductor region having an optical gain such as an active layer is provided between the GaN wafer and the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer.

  In the method according to the present invention, the thickness of the GaN wafer may be less than 350 micrometers. According to this method, it is possible to reduce the occurrence of wafer cracking even in a GaN wafer having a thickness of less than 350 micrometers and having a thin chamfer. Alternatively, the thickness of the GaN wafer may be 230 micrometers or less. Even with a thinner GaN wafer without chamfering, the occurrence of wafer cracking can be reduced. The thickness of the GaN wafer is 180 micrometers or more. Below this thickness value, wafer cracking is less relevant with or without chamfering.

  In the method according to the present invention, the maximum value of the distance between two points on the edge of the GaN wafer may be 45 millimeters or more. In an epitaxial wafer having a size equal to or larger than the above value, a buffering effect that reduces the occurrence of breakage is useful.

In the method according to the present invention, the thickness of the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer is preferably 500 nm or less. According to this method, a decrease in crystal quality was observed at a thickness exceeding 500 nm.

In the method according to the present invention, an n-type dopant may be added to the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer. By providing the buffer layer in the n-type region, it is possible to impart a buffer capacity to reduce the occurrence of breakage to the chamfered GaN wafer at an early stage in many manufacturing processes. The GaN wafer may contain at least one of oxygen and silicon as an n-type dopant. The buffer layer to which the n-type dopant is added also has a buffer capacity that reduces the occurrence of breakage. In the method according to the present invention, the GaN wafer may include a gallium nitride region having a threading dislocation density of 1 × 10 ⁷ cm ⁻² or less. The threading dislocation density of the buffer layer can be reduced, and therefore the threading dislocation density of one or more GaN-based semiconductor layers grown on the buffer layer can also be reduced.

The method according to the present invention includes growing an n-type gallium nitride based semiconductor layer on the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer before removing the GaN wafer from the reactor; Before removing the wafer from the reactor, growing a p-type gallium nitride based semiconductor layer on the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer, and before removing the GaN wafer from the reactor And a step of growing a gallium nitride based semiconductor multilayer film for a quantum well structure on the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer. The gallium nitride based semiconductor multilayer film is provided between the p-type gallium nitride based semiconductor layer and the n-type gallium nitride based semiconductor layer, and a peak wavelength of a photoluminescence spectrum from the gallium nitride based semiconductor multilayer film Is 400 nm or more, and the peak wavelength is 550 nm or less. According to this method, an epitaxial wafer for a light emitting element is produced.

  The above and other objects, features, and advantages of the present invention will become more readily apparent from the following detailed description of preferred embodiments of the present invention, which proceeds with reference to the accompanying drawings.

  As described above, according to the present invention, an epitaxial wafer that can reduce wafer cracking using a GaN wafer that has not been chamfered is provided. Further, according to the present invention, a method for producing this epitaxial wafer is provided.

FIG. 1 is a drawing showing the structure of an epitaxial wafer according to the present embodiment. FIG. 2 is a drawing showing the main steps of the method for producing the epitaxial wafer and the method for producing the substrate product shown in FIG. FIG. 3 is a diagram showing steps when crystal growth and a device process are performed on a GaN wafer without chamfering. FIG. 4 is a diagram showing a process when performing inspection or the like of an epitaxial wafer without chamfering.

The knowledge of the present invention can be easily understood by considering the following detailed description with reference to the accompanying drawings shown as examples. Subsequently, embodiments of the epitaxial wafer, the method for producing an epitaxial wafer, and the method for producing a substrate product using the epitaxial wafer according to the present invention will be described with reference to the accompanying drawings. Where possible, the same parts are denoted by the same reference numerals.
(First embodiment)

  FIG. 1 is a drawing showing the structure of an epitaxial wafer according to the present embodiment. As shown in FIG. 1A, the edge 11a of the GaN wafer 11 is not chamfered over the entire circumference. In the GaN wafer 11, the maximum distance between two points on the edge 11a is 45 millimeters or more. An example of this is a GaN wafer having a diameter of 2 inches or more. The GaN wafer can include one or more orientation flats (OF) if desired. A GaN wafer of this size has a large amount of warpage, so the yield tends to decrease.

  As described above, until now, it has been considered that chamfering of a wafer is indispensable for practical GaN wafers in order to improve yield. According to the inventor's knowledge, when manufacturing a semiconductor device using a GaN wafer without chamfering, unlike a practical GaN wafer (chamfered) available from a commercial route, growth, inspection, process During handling and transport, the wafer being produced is broken. In order to prevent wafer cracking, it is necessary to handle the wafer carefully. According to the experiments by the inventors, the epitaxial wafer that will be described subsequently provides a buffering effect that reduces the occurrence of breakage.

Referring to FIG. 1 (a), an epitaxial wafer E1 is shown. The epitaxial wafer E1 includes a GaN wafer 11 and an In _X1 Al _X2 Ga _1-X1-X2 N (0 <X1 <1, 0 ≦ X2 <1, 0 <X1 + X2 <1) buffer layer 13. The In _X1 Al _X2 Ga _1-X1-X2 N buffer layer 13 is provided on the main surface 11 b of the GaN wafer 11. The thickness D2 of the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer 13 is 30 nm or more. The In _X1 Al _X2 Ga _1-X1-X2 N buffer layer 13 is grown directly on the main surface 11 b of the GaN wafer 11. The In _X1 Al _X2 Ga _1-X1-X2 N buffer layer 13 forms a heterojunction 15 with the main surface 11 b of the GaN wafer 11.

Referring to FIG. 1 (b), an epitaxial wafer E2 is shown. This epitaxial wafer E2 is provided by adding a GaN layer 17 to the epitaxial wafer E1. The GaN layer 17 is provided between the GaN wafer 11 and the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer 13. The GaN layer 17 is grown directly on the main surface 11 b of the GaN wafer 11. The GaN layer 17 forms a homojunction 19 with the main surface 11 b of the GaN wafer 11, and the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer 13 forms a heterojunction 21 with the GaN layer 17. A semiconductor region having an optical gain, such as an active layer, is not provided between the GaN wafer 11 and the In _X1 Al _X2 Ga _{1 -X1-X2} N buffer layer 13.

Referring to FIG. 1C, an epitaxial wafer E3 is shown. The epitaxial wafer E3 includes a GaN wafer 11, an In _X1 Al _X2 Ga _1-X1-X2 N buffer layer 13, an n-type gallium nitride semiconductor layer 23, a gallium nitride semiconductor multilayer film 25, and a p-type gallium nitride. The epitaxial wafer E3 can further include a GaN layer 17 if necessary. The n-type gallium nitride semiconductor layer 23, the gallium nitride semiconductor multilayer film 25, and the p-type gallium nitride semiconductor layer 27 are provided on the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer 13. The gallium nitride semiconductor multilayer film 25 is provided between the p-type gallium nitride semiconductor layer 27 and the n-type gallium nitride semiconductor layer 23. The gallium nitride based semiconductor multilayer film 25 can have a quantum well structure, for example. Preferably, the peak wavelength in the photoluminescence spectrum from the epitaxial wafer E3 is 400 nm or more, and the peak wavelength is 550 nm or less. The epitaxial wafer E3 includes an epitaxial multilayer structure for optical elements.

According to the epitaxial wafers E1, E2, and E3, since the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer 13 is provided on the GaN wafer 11 that is not chamfered, the epitaxial wafers E1, E2, The occurrence of E3 breakage can be reduced. When the thickness D2 of the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer 13 is thinner than 30 nm, the buffering effect for reducing the occurrence of breakage is lowered. The thickness D2 of the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer 13 is preferably 500 nm or less. At thicknesses exceeding 500 nm, a decrease in crystal quality was observed. In a preferred embodiment, the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer 13 is made of InGaN or InAlGaN.

  The thickness D1 of the GaN wafer 11 can preferably be 350 micrometers or less than 350 micrometers. The occurrence of wafer cracking can be reduced in a thin chamfered GaN wafer having a thickness of less than 350 micrometers. Also, the thickness D1 of the GaN wafer 11 can be 230 micrometers or less. Even with a thinner GaN wafer without chamfering, the occurrence of wafer cracking can be reduced. The thickness D1 of the GaN wafer 11 is 180 micrometers or more. Below this thickness value, wafer cracking is less relevant with or without chamfering.

The GaN wafer 11 can include a gallium nitride region having a threading dislocation density of 1 × 10 ⁷ cm ⁻² or less. The GaN wafer 11 can include, for example, a high dislocation region called a random core or a stripe core, and a low dislocation region having a dislocation density lower than that of the high dislocation region. The low dislocation region has a threading dislocation density of 1 × 10 ⁷ cm ⁻² or less. Therefore, the threading dislocation density of the buffer layer 13 is small, and therefore, the threading dislocation density of one or a plurality of GaN-based semiconductor layers grown on the buffer layer 13 can also be decreased.

The In _X1 Al _X2 Ga _1-X1-X2 N buffer layer 13 is preferably InGaN (X2 = 0). A buffering effect that reduces the occurrence of breakage is suitably provided. In the case of InGaN, since the In composition can be determined from the results of nondestructive inspection such as X-ray diffraction and photoluminescence (PL) measurement, the composition can be determined at the time of this inspection, and quality assurance is facilitated. The indium composition X1 of the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer 13 is preferably 0.02 or more. When the indium composition X1 is less than 0.02, the buffering effect decreases. If the indium composition X1 of the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer 13 is 0.1 or less, crystal quality suitable for a semiconductor device such as a light emitting diode and a semiconductor laser can be provided. Since the growth of the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer 13 is performed relatively quickly among the growth of a large number of epitaxial films for semiconductor elements, the In _X1 Al _X2 Ga _1-X1-X2 N buffer is used. The crystal quality of the layer 13 has a non-negligible effect on the subsequent crystal quality.

The In _X1 Al _X2 Ga _1-X1-X2 N buffer layer 13 is preferably InAlGaN. The indium composition X1 of the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer 13 is preferably in the above range.

The aluminum composition X2 of the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer 13 can be greater than zero. By including aluminum, spatial compositional modulation occurs, and as a result, the active layer also has an advantage that spatial compositional modulation is promoted to improve the light emission characteristics. The aluminum composition X2 can be 0.2 or less. If aluminum composition X2 is 0.2 or less, there is an advantage that cracks generated on the surface can be suppressed. In the above range, InAlGaN having an aluminum composition also provides a buffering effect that reduces the occurrence of breakage.

In the epitaxial wafers E1, E2, and E3, an n-type dopant is added to the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer 13. By providing the buffer layer 13 in the n-type region, it is possible to provide the chamfering-free GaN wafer 11 with a buffer capacity that reduces the occurrence of breakage at an early stage in many manufacturing processes. The n-type dopant for the GaN wafer 11 can be at least one of oxygen and silicon. The buffer layer 13 to which the n-type dopant is added also has a buffer capacity that reduces the occurrence of breakage.

  FIG. 2 is a drawing showing the main steps of the method for producing the epitaxial wafer and the method for producing the substrate product shown in FIG. FIG. 3 is a diagram showing a process when crystal growth is performed on a GaN wafer without chamfering using an epitaxial growth furnace. Referring to the manufacturing flow 100, a GaN wafer 11 without chamfering is prepared as shown in step S101. For example, the GaN wafer 11 is stored in a wafer tray or wafer carrier 31 as shown in FIG. In step S102, as shown in FIG. 3B, the chamfered GaN wafer 11 is placed on the processing apparatus 35 (for example, on the susceptor of the reaction furnace). The reaction furnace may be, for example, a metal organic vapor phase growth furnace, but is not limited thereto. The movement of the GaN wafer 11 is performed using a wafer gripping tool 33. As the wafer gripping tool 33, for example, tweezers and a vacuum chuck can be used. Thereafter, as shown in FIG. 3C, one or a plurality of gallium nitride based semiconductor films 29 are grown on the main surface 11b of the GaN wafer 11 in a reaction furnace.

In the first embodiment, the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer 13 is directly grown on the main surface 11b of the GaN wafer 11 in the reaction furnace. If necessary, a step of growing a GaN layer 17 on the GaN wafer 11 prior to the growth of the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer 13 can be further provided. The conductivity type of the buffer layer 13 is the same as the conductivity type of the GaN wafer 11, and in a preferred embodiment, this conductivity is n-type.

After the growth of the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer 13, in step S104, the epitaxial wafers E1 and E2 are taken out from the reactor as shown in FIG. The extracted epitaxial wafers E1 and E2 are stored in a wafer tray or wafer carrier 37 using a wafer gripping tool 33, as shown in FIG.

According to this method, since the growth of the _{In X1 Al X2 Ga 1-X1} -X2 N buffer layer 13 on the GaN wafer 11 which chamfering is not performed, it is possible to reduce the occurrence of damage to the epitaxial wafer E1, E2. Therefore, after the growth of the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer 13, the occurrence of wafer breakage when the GaN wafer 11 is taken out from the reaction furnace using the wafer gripping tool 33 can be reduced.

In the second example, following step S103, in step S105, as shown in FIG. 3C, the n-type gallium nitride based semiconductor region is formed on the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer 13. 23 is grown in a growth furnace. The n-type gallium nitride based semiconductor region 23 includes, for example, an AlGaN layer, a GaN layer, etc., and the n-type gallium nitride based semiconductor region 23 can be, for example, a cladding layer. In step S106, an active layer is grown on the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer 13 in a growth furnace. This active layer includes a gallium nitride based semiconductor multilayer film 25 for a multiple quantum well structure. In step S107, a p-type gallium nitride based semiconductor layer 27 is grown on the active layer in a growth furnace. The p-type gallium nitride based semiconductor region 27 includes, for example, an AlGaN layer, a GaN layer, etc., and the p-type gallium nitride based semiconductor region 27 can be, for example, a cladding layer or a contact layer. According to this method, the epitaxial wafer E3 for the light emitting element is manufactured.

After the growth of the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer 13, in step S108, the epitaxial wafer E3 is removed from the reactor. The extracted epitaxial wafer E3 is stored in a wafer tray or wafer carrier 37 by using a wafer gripping tool 33 as shown in FIG. According to this method, since the growth of the _{In X1 Al X2 Ga 1-X1} -X2 N buffer layer 13 on the GaN wafer 11 which chamfering is not performed, it is possible to reduce the occurrence of damage to the epitaxial wafer E3.

  In step S109, a substrate product is produced using an epitaxial wafer. In this production, after preparing any of the epitaxial wafers E1, E2, and E3, the epitaxial wafers E1, E2, and E3 are moved to a processing apparatus for producing a semiconductor element by using a wafer gripping tool. . This process is then performed using the processing apparatus to produce a substrate product for the semiconductor element. Processing includes, for example, application of a photosensitive agent, exposure of the photosensitive agent, development of the exposed photosensitive agent, production of a conductive film, lift-off for processing the conductive film, etching, crystal growth, storage in a wafer carrier, wafer There is a heat treatment for taking out from the carrier and forming an ohmic. With reference to the following examples, it will be described that the occurrence of breakage can be reduced in the movement of the wafer performed during the above-described processing.

  Moreover, in the method of producing a substrate product using an epitaxial wafer, the epitaxial wafers E1, E2, E3 are used by using a wafer gripping tool for any one of microscopic observation, photoluminescence measurement, and X-ray diffraction measurement. Any one of these is moved, and the process is performed on any of the epitaxial wafers E1, E2, and E3. This step is performed prior to the production of the substrate product or after the production of the substrate product. According to this method, it is possible to reduce the occurrence of breakage in the wafer movement performed during the above processing.

(Example)
A blue light emitting diode structure was fabricated by metal organic vapor phase epitaxy. Trimethyl gallium (TMG), trimethyl aluminum (TMA), trimethyl indium (TMI), ammonia (NH ₃ ), silane (SiH ₄ ), and biscyclopentadienyl magnesium (CP ₂ Mg) were used as raw materials. First, as shown in FIG. 3A, 20 2-inch GaN wafers without chamfering were prepared. These GaN wafers are made of hexagonal GaN crystals, and their main surfaces can substantially have a C-plane or (0001) plane, or can have a desired off-angle from the C-plane. As shown in FIG. 3B, a GaN wafer was placed on the susceptor in the reaction furnace. As shown in FIG. 3C, epitaxial growth was performed as follows. While controlling the pressure in the growth furnace to 101 kPa, NH ₃ and H ₂ were supplied to the growth furnace, and cleaning was performed at a substrate temperature of 1050 degrees Celsius for 10 minutes. Thereafter, TMG and SiH ₄ were supplied to grow a Si-doped GaN layer having a thickness of 2000 nm. After the supply of TMG and SiH ₄ was stopped, the substrate temperature was lowered to 800 degrees Celsius, TMG and TMI were supplied, and an In _0.05 Ga _0.95 N buffer layer having a thickness of 50 nm was grown. Next, a light emitting layer (6-period multiple quantum well structure) composed of a GaN barrier layer having a thickness of 15 nm and an In _0.14 Ga _0.86 N well layer having a thickness of 3 nm was grown. Thereafter, the supply of TMG and TMI was stopped, and the substrate temperature was raised to 1000 degrees Celsius. TMG, TMA, NH ₃ , and CP ₂ Mg were supplied to the growth furnace to grow 20 nm thick Mg-doped p-type AlGaN. Thereafter, the supply of TMA was stopped, and a p-type GaN layer having a thickness of 50 nm was grown. After the growth of the p-type GaN layer, the temperature was lowered to room temperature, and the epitaxial wafer A was carefully taken out of the growth furnace as shown in FIG.

  The above procedure was repeated to produce 20 epitaxial wafers A having an LED structure on a GaN substrate without chamfering. For comparison, 20 epitaxial wafers B not including the InGaN buffer layer were produced in the same manner.

  Next, an epitaxial wafer inspection process and a device process process will be described. Each of the 40 epitaxial wafers is stored in a wafer tray one by one. Stainless steel tweezers for 2-inch wafers were used for wafer handling. Also, in handling the wafer, an effort was made to lift the GaN wafer around the same position around the OF position.

  The epitaxial wafer was taken out of the wafer tray using tweezers and moved to a flat Teflon wafer tray. The main epitaxial wafer inspection processes are as follows: appearance inspection, photoluminescence mapping measurement, X-ray diffraction measurement. In addition, the main light emitting diode (LED) process steps are as follows: p electrode formation, mesa etching, n electrode formation, electrode annealing, p pad electrode formation. Note that photolithography by optical exposure was used for patterning. These steps were performed in the above order.

  After the epitaxial growth, 20 epitaxial wafers A were stored in the wafer tray 41 as shown in FIG. An appearance inspection of the epitaxial wafer A was performed. As shown in FIG. 4B, an epitaxial wafer A was placed on a stage of a microscope 43 called a Nomarski differential interference microscope. As shown in FIG. 4C, an appearance inspection of the epitaxial wafer A was performed. In the microscopic observation, the epitaxial wafer A was placed on the flat XY stage of the microscope from the wafer tray 41 using tweezers, and then five points in the plane were observed. During the observation, the wafer was not fixed and only the stage was in contact with the epitaxial wafer. After the observation, the epitaxial wafer A was moved from the stage of the microscope 43 using tweezers and stored in the wafer tray 41 as shown in FIG.

  For comparison, 20 epitaxial wafers B were similarly inspected. In this process, there was no epitaxial wafer B that was broken during observation, but there was an epitaxial wafer B that was broken during loading / unloading from / to the wafer tray.

  After the epitaxial growth, the epitaxial wafer A accommodated in the wafer tray 41 was placed on the stage of the photoluminescence (PL) mapping measuring instrument 45 as shown in FIG. As shown in FIG. 4B, PL mapping measurement was performed. As shown in FIG. 4C, a mapping of the epitaxial wafer A was created. In the PL mapping measurement, the epitaxial wafer A was placed on the flat XY stage of the PL mapping apparatus using tweezers from the wafer tray 41. Thereafter, the epitaxial wafer A was fixed by a vacuum adsorption method. A PL mapping measurement was performed over about 30 minutes using a He—Ne laser with a wavelength of 325 nm as the excitation laser. Only the stage is in contact with the epitaxial wafer A during observation. As shown in FIG. 4D, the epitaxial wafer A was moved from the stage of the PL mapping measuring device 45 and stored in the wafer tray 41.

  For comparison, similarly, PL mapping of the epitaxial wafer B was performed. In this process, there was no epitaxial wafer B that was broken during observation, but there was an epitaxial wafer B that was broken during loading / unloading from / to the wafer tray.

  As shown in FIG. 4A, the epitaxial wafer A placed on the wafer tray 41 after the epitaxial growth was placed on the stage of the X-ray diffractometer 47. As shown in FIG. 4B, X-ray diffraction measurement was performed. As shown in FIG. 4C, the X-ray diffraction measurement of the epitaxial wafer A was performed. After removing the detachable plate-shaped metal stasis from the X-ray diffraction measuring apparatus 47, the epitaxial wafer A was moved from the wafer tray 41 to the stage using tweezers. In the X-ray diffraction measurement, the epitaxial wafer A was fixed using a magnet and a metal stage. After fixing the plate-like stage on which the epitaxial wafer A was fixed vertically to the apparatus, X-gland diffraction measurement was performed for about 40 minutes. Only the stage contacts the wafer A during the measurement. After completion of the measurement, the plate-shaped stage is taken out of the apparatus and flattened, and then the magnet is removed. As shown in FIG. 4D, the epitaxial wafer A is placed on the wafer tray 41 using tweezers from the stage of the X-ray diffractometer 47. Returned to.

  For comparison, similarly, the epitaxial wafer B was measured for X-ray diffraction. In this process, no epitaxial wafer was cracked during observation, but there was an epitaxial wafer that was cracked during loading / unloading from / to the wafer tray.

  Further, device processes A and B were performed on the epitaxial wafer. In the device process step, 500 nm mesa formation by RIE, p-type transparent electrode (NiAu) formation, p-pad electrode (Au) formation, n-electrode (TiAl) formation, electrode annealing (550 degrees Celsius, 1 minute) are performed in this order. It was broken. These steps were performed in the same manner as the procedure shown in FIG. Between each process, photolithography (application | coating of a photosensitive agent, exposure, development), ultrasonic cleaning, etc. were performed. Ultrasonic cleaning and the like were performed in the same manner as the procedure shown in FIG.

  In order to form a mask, the epitaxial wafers were first placed on the flat stage of the spinner using tweezers one by one from the wafer tray. The stage fixed the wafer by vacuum suction. A resist was dropped at a rotational speed of 3500 rpm, and the resist was applied while maintaining the rotation for 25 seconds to form a substrate product. The stage rotation was stopped and the substrate product was returned to the wafer tray. Then, the substrate product was introduced into the tray at 30 degrees Celsius and the resist was pre-baked. The wafer tray was taken out after 5 minutes. Next, in order to perform exposure, the substrate product was moved from the tray to the flat stage of the mask aligner using tweezers one by one, and the stage fixed the wafer by vacuum suction. The alignment was performed through a microscope and the stage was moved up and down to bring the substrate product into close contact with the quartz mask, followed by exposure with a mercury lamp. After exposure, the substrate product was returned from the stage to the tray using tweezers. Next, the substrate product was moved from the tray to a Teflon vertical basket using tweezers for development. Development was performed while stirring the developer in the basket for about 1 minute. After development, the substrate product was returned from the basket to the tray using tweezers. Through these steps, a substrate product having a mask pattern was formed.

  In order to form a p-electrode, first, pretreatment was performed. The substrate product was transferred from the tray to a Teflon vertical basket using tweezers. The basket was immersed in dilute hydrochloric acid in the container for about 2 minutes for pretreatment. Next, the basket was immersed in a container containing pure water to wash the substrate product. The substrate product was taken out of the container using tweezers, and moisture was removed by nitrogen blowing. Thereafter, the substrate product was returned to the wafer tray using tweezers.

  Next, electrode deposition was performed. First, the substrate product was firmly fixed using a leaf spring on a metal jig. The jig was placed in a vapor deposition apparatus. The metal film was deposited by a resistance heating method. Thereafter, the inside of the vapor deposition apparatus was evacuated to deposit 5 nm thick nickel and 10 nm thick gold. After removing the metal jig from the deposition apparatus, the substrate product was carefully removed from the jig. Then, the substrate product was transferred to a Teflon vertical basket using a bin set.

  Thereafter, the metal film was lifted off. The basket containing the substrate product was immersed in acetone in the container, and ultrasonic cleaning for 10 minutes was performed. After visually confirming that the electrode on the mask was lifted off, ultrasonic cleaning was performed again using acetone. Subsequently, the basket was transferred to a container containing pure water, and the substrate product was washed with water for 5 minutes. After washing with water, the substrate product was taken out of the basket using tweezers, the substrate product was dried by nitrogen blowing, and the substrate product having the p-electrode was returned to the wafer tray.

  In order to form a resist mask for mesa etching, a resist mask was formed in the same manner as described above. Next, the substrate product was moved from the tray onto a flat carbon stage using Pincent, and mesa formation was performed using reactive ion etching. A mesa structure having a depth of 500 nm was formed by etching for 10 minutes using a salt gas. After the etching, the mask pattern was removed in the same manner as described above.

  In order to form an n-electrode mask, a resist mask was formed in the same manner as described above. Next, the substrate product was moved from the wafer tray to a Teflon vertical basket using tweezers for pretreatment. This basket was immersed in dilute hydrochloric acid in the container for about 2 minutes for pretreatment. Next, the substrate product is immersed in pure water in the container and washed with water. The substrate product was taken out of the container using tweezers, and water was removed with a nitrogen probe. Thereafter, the substrate product was returned to the wafer tray using tweezers. Next, in order to deposit the metal film, the substrate product was firmly fixed to the metal jig using a leaf spring. The jig was placed in a vapor deposition apparatus. In addition, although vapor deposition was performed by electron beam vapor deposition, resistance heating can be used. The inside of the deposition apparatus was evacuated to deposit a 20 nm thick titanium film and a 300 nm aluminum film. The metal jig was taken out from the vapor deposition apparatus, and the substrate product was carefully removed. The substrate product was transferred to a Teflon vertical basket using tweezers. The substrate was lifted off in the same manner as previously described to produce a substrate product with n electrodes.

  Electrode annealing was performed to make the p-electrode translucent and reduce the contact resistance of the n-electrode. After moving the substrate product from the wafer tray to the carbon flat stage using tweezers, annealing is performed at 550 degrees Celsius for 1 minute in an atmosphere of nitrogen and oxygen (ratio: nitrogen / oxygen = 4/1). It was. Use tweezers after cooling down. The alloyed substrate product was returned to the wafer tray.

  In order to form a p-pad electrode mask, a resist mask was formed in the same manner as described above. In order to perform the pretreatment, the substrate product was transferred from the wafer tray to a Teflon vertical basket using tweezers. The basket was immersed in dilute hydrochloric acid in the container for about 2 minutes for pretreatment. Next, the basket was transferred to a container containing pure water, the substrate product was washed with water, the substrate product was taken out with tweezers, and moisture was removed by nitrogen blowing. Thereafter, the substrate product was returned to the wafer tray using tweezers.

  Next, in order to perform electrode vapor deposition, the substrate product was firmly fixed to a metal jig using a leaf spring, and then the jig was placed in a vapor deposition apparatus. The vapor deposition was performed by the insulator beam vapor deposition method, but a resistance heating method can be used. The inside of the vapor deposition apparatus was evacuated to deposit 20 nm thick Ti and 200 nm thick gold. The metal jig was removed from the vapor deposition apparatus, and the substrate product was carefully removed from the jig. After moving to a Teflon vertical basket using tweezers, lift-off was performed in the same manner as described above to produce a substrate product with a p-pad electrode.

  Through these steps, a light emitting diode was produced. As described above, in the evaluation and process, there are a large number of operations for moving epitaxial wafers and substrate products using a wafer gripping tool such as tweezers, and these movements can cause wafer cracking.

The above process was performed carefully in the same procedure for all wafers, and the following results were obtained.
Presence or absence of InGaN buffer layer, no wafer, some cracks after wafer epi-inspection, 6 pieces, 1 piece (in 20 wafers)
Cracks after process, 9 sheets, 1 sheet (out of 20 wafers)
Yield, 25%, 90%

  As shown in this result, the occurrence of wafer cracking can be reduced by using a buffer layer made of InGaN. Further, when the epitaxial stack contains tensile stress AlGaN, it is considered that the epitaxial stack is more easily cracked than the GaN substrate before growth. When the epitaxial wafer includes an InGaN layer, cracking and chipping of the wafer were reduced. Production yield has been greatly reduced. This is probably because the InGaN layer is a softer material than GaN or AlGaN, and therefore absorbed the stress of the epitaxial wafer. As a result, cracking and chipping were reduced. By using a GaN wafer without chamfering, the wafer cost can be reduced, and the yield can be greatly improved by adding an InGaN layer to the epitaxial structure. Further, an AlInGaN layer can be used instead of InGaN.

  It is desired to reduce the price of the GaN substrate. It is necessary to reduce the manufacturing cost of the GaN substrate. If the chamfering process can be omitted, the manufacturing cost can be reduced. However, a GaN wafer without chamfering is easy to break, and conversely causes a decrease in yield. However, it has become clear that cracks can be suppressed by adding the buffer layer according to the present embodiment to the epitaxial structure. Therefore, the yield is improved in the production of a GaN-based semiconductor element using a non-chamfered GaN wafer. Therefore, the manufacturing cost of the GaN-based semiconductor element can be reduced.

  In the above embodiment, the orientation of the main surface of the GaN wafer is in the direction of the c-axis or the direction in which the angle is slightly off from the c-axis. In the epitaxial wafer according to the present embodiment, the angle θ formed by the c-axis direction of GaN and the normal line of the main surface of the GaN wafer can be zero degrees or more. Also, this angle θ can be 90 degrees or less.

  In the epitaxial wafer according to the present embodiment, the normal line of the main surface of the GaN wafer can face the direction along the plane defined by the m-axis and a-axis of the GaN wafer. For example, the normal can be in the direction of the m-axis of the GaN wafer, or in a direction where the angle is slightly off from the m-axis. Alternatively, the normal can be in the direction of the a-axis or in a direction slightly off the angle from the a-axis. Alternatively, the orientation of the main surface of the wafer can be such that the angle taken from one of the m-axis and the a-axis to the other is greater than zero degrees and less than 30 degrees.

  Furthermore, in the epitaxial wafer according to the present embodiment, the main surface of the wafer can be a semipolar surface of GaN. Since the wafer having the semipolar plane of GaN is easily broken, the buffer layer according to the present embodiment is effective. According to the knowledge of the inventors, even in the GaN wafer, when the GaN wafer has a semipolar main surface, the GaN wafer is easily broken. For example, when the off angle from the main crystal axis (c-axis, a-axis, or m-axis) is 10 degrees or more, the GaN wafer is easily broken. Further, when the off angle is 45 degrees or less, the GaN wafer is easily broken. In such a wafer, the buffer layer according to the present embodiment is effective.

  While the principles of the invention have been illustrated and described in the preferred embodiments, it will be appreciated by those skilled in the art that the invention can be modified in arrangement and detail without departing from such principles. The present invention is not limited to the specific configuration disclosed in the present embodiment. In this embodiment mode, crystal growth is performed by metal organic vapor phase epitaxy, but other crystal growth methods such as molecular beam growth can be used. We therefore claim all modifications and changes that come within the scope and spirit of the following claims.

E1, E2, E3 ... epitaxial wafer, 11 ... GaN _{wafer, 13 ... In X1 Al X2 Ga} 1-X1-X2 N buffer layer, 17 ... GaN layer, 19 ... homozygous, 21 ... heterozygous, 23 ... n-type nitride Gallium-based semiconductor layer, 25 ... gallium nitride-based semiconductor multilayer film, 27 ... p-type gallium nitride-based semiconductor layer, 29 ... gallium nitride-based semiconductor film, 31, 37 ... wafer tray or wafer carrier, 33 ... wafer gripping tool, 35 ... processing Equipment: 41 ... Wafer tray, 43 ... Microscope, 45 ... Photoluminescence (PL) mapping measuring instrument, 47 ... X-ray diffractometer.

Claims (25)

A GaN wafer having an edge that is not chamfered;
In _X1 Al _X2 Ga _1-X1-X2 N (0 <X1 <1, 0 ≦ X2 <1, 0 <X1 + X2 <1) buffer layer provided on the main surface of the GaN wafer,
An epitaxial wafer, wherein the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer has a thickness of 30 nm or more. 2. The epitaxial wafer according to claim 1, wherein an indium composition of the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer is 0.02 or more and the indium composition is 0.1 or less. . The epitaxial wafer according to claim 1, wherein the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer is InGaN. 3. The epitaxial according to claim 1, wherein the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer has an aluminum composition greater than 0 and the aluminum composition is 0.2 or less. Wafer. 5. The epitaxial according to claim 1, wherein the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer is grown on the main surface of the GaN wafer. Wafer. A GaN layer provided between the GaN wafer and the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer;
The epitaxial wafer according to any one of claims 1 to 4, wherein the GaN layer is grown on the main surface of the GaN wafer.   The epitaxial wafer according to any one of claims 1 to 6, wherein the GaN wafer has a thickness of less than 350 micrometers.   The epitaxial wafer according to any one of claims 1 to 7, wherein a maximum value of a distance between two points on the edge of the GaN wafer is 45 millimeters or more.   The angle θ formed by an axis extending in the c-axis direction of the GaN wafer and a normal line of the main surface of the GaN wafer is not less than zero degrees and not more than 90 degrees. The epitaxial wafer according to claim 8.   The normal line of the main surface of the GaN wafer faces a direction along a plane defined by the m-axis and a-axis of the GaN wafer. An epitaxial wafer described in one item.   The epitaxial wafer according to claim 9 or 10, wherein the main surface is a semipolar surface of GaN. 12. The epitaxial wafer according to claim 1, wherein an n-type dopant is added to the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer. The epitaxial wafer according to claim 12, wherein the GaN wafer includes a gallium nitride region having a threading dislocation density of 1 × 10 ⁷ cm ⁻² or less. A p-type gallium nitride based semiconductor layer provided on the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer;
An n-type gallium nitride based semiconductor layer provided on the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer;
A gallium nitride semiconductor multilayer film for a quantum well structure provided between the p-type gallium nitride semiconductor layer and the n-type gallium nitride semiconductor layer;
14. The peak wavelength of a photoluminescence spectrum from the gallium nitride based semiconductor multilayer film is 400 nm or more, and the peak wavelength is 550 nm or less. 14. Epitaxial wafer. A method for producing an epitaxial wafer, comprising:
Preparing a GaN wafer that has not been chamfered;
After the GaN wafer is placed in a reaction furnace using a wafer gripping tool, In _X1 Al _X2 Ga _1-X1-X2 N (0 <X1 <1, 0 ≦ X2) is formed on the main surface of the GaN wafer in the reaction furnace. <1, 0 <X1 + X2 <1) growing a buffer layer;
Step of removing after the growth of the _{In X1 Al X2 Ga 1-X1} -X2 N buffer layer, an epitaxial wafer including the _{In X1 Al X2 Ga 1-X1} -X2 N buffer layer from the reactor by using a wafer gripping tool And
The In _X1 Al _X2 Ga _1-X1-X2 N buffer layer has a thickness of 30 nm or more. The method according to claim 15, wherein the indium composition of the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer is 0.02 or more and the indium composition is 0.1 or less. The method according to claim 16, wherein the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer is InGaN. Aluminum composition of the _{In X1 Al X2 Ga 1-X1} -X2 N buffer layer is greater than 0, the aluminum composition is 0.2 or less, according to claim 15 or claim 16, characterized in that Method. The _{In X1 Al X2 Ga 1-X1} -X2 N buffer layer constitutes the main surface and the heterojunction of the GaN wafer, as claimed in any one of claims 15 to claim 18, characterized in that Method. A step of growing a GaN layer on the GaN wafer prior to the growth of the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer;
19. The GaN layer according to claim 15, wherein the GaN layer forms a homojunction with the main surface of the GaN wafer, and the GaN layer forms a heterojunction with an InAlGaN layer. Method.   21. A method as claimed in any one of claims 15 to 20 wherein the thickness of the GaN wafer is less than 350 micrometers. The _{In X1 Al X2 Ga 1-X1} -X2 N is the buffer layer is doped with n-type dopant, a method according to any one of claims 15 to claim 21, characterized in that. Wherein _{an In} X1 _Al X2 thickness of _{Ga 1-X1-X2} N buffer layer is 500nm or less, the method according to any one of claims 15 to claim 22, characterized in that. Growing an n-type gallium nitride based semiconductor layer on the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer before removing the GaN wafer from the reactor;
Growing a p-type gallium nitride based semiconductor layer on the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer before removing the GaN wafer from the reactor;
A step of growing a gallium nitride based semiconductor multilayer for a quantum well structure on the In _X1 Al _X2 Ga _1-X1-X2 N buffer layer before removing the GaN wafer from the reactor;
The gallium nitride based semiconductor multilayer film is provided between the p-type gallium nitride based semiconductor layer and the n-type gallium nitride based semiconductor layer,
The peak wavelength in the photoluminescence spectrum of the gallium nitride based semiconductor multilayer film is 400 nm or more, and the peak wavelength is 550 nm or less. Method.   The method according to any one of claims 15 to 24, wherein the maximum value of the distance between two points on the edge of the GaN wafer is 45 millimeters or more.

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