JP2012004219A - Inspecting method for semiconductor device and inspecting system for semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an inspecting method for a semiconductor device and an inspecting system for a semiconductor device in which in-line inspection data can be easily collated with a semiconductor chip with high precision.SOLUTION: An inspecting method for a semiconductor device comprises a step of setting shot addresses to plural shot regions formed in different regions on one surface of a substrate, a step of setting chip addresses of plural semiconductor chips formed on the one surface of the substrate in association with the shot addresses, a step of setting coordinates representing any positions on the one surface of the substrate in association with the shot addresses and the chip addresses, a step of achieving in-line inspection data as a result of an inspection executed on a manufacturing line for the one surface of the substrate, and a step of converting the in-line inspection data to inspection data of each short address, chip address or coordinate.

Description

  The present invention relates to a semiconductor device inspection method and a semiconductor device inspection system.

  As this type of prior art, for example, there is one disclosed in Patent Document 1. That is, in Patent Document 1, after the semiconductor device is formed, the appearance of each semiconductor chip is inspected, and then in the wiring process, the appearance is inspected every time the wiring layer is formed by the wiring pattern. It is disclosed that after an insulating film is formed on the upper portion of the substrate, electrical characteristics are inspected by a prober. In addition, it is disclosed that semiconductor chips determined to be defective by the appearance inspection and the electrical characteristic inspection are subjected to an overlay process in a test control unit, and a marker indicating a defective product is attached.

  According to the method disclosed in Patent Document 1, the layout of the wafer surface when performing an appearance inspection and the layout of the wafer surface when performing an electrical characteristic inspection are almost the same. In both of these inspections, the same semiconductor chip is used. Can be assigned the same chip address. For this reason, the determination result of the appearance inspection and the determination result of the electrical characteristic inspection can be easily superimposed on each semiconductor chip.

JP 2007-227419 A

  By the way, in the manufacturing process of a semiconductor device, not only after the formation of the semiconductor chip but also in the middle of the formation (that is, the manufacturing line), various inspections relating to the appearance of the wafer, the dimension of the pattern, the film thickness, the resistance value, and the like are performed. As appropriate. The inspection result in such a production line can be output as inline inspection data. The in-line inspection data can be used as a material for determining whether the semiconductor chip is good or bad as well as evaluating the manufacturing process.

  However, in the semiconductor device being formed, the layout of the wafer surface is incomplete and the semiconductor chip cannot be visually recognized, and is in-line with coordinates different from the chip address (for example, coordinates arbitrarily set by the inspection apparatus or the like). Management data must be managed and output. In addition, since each inspection device independently sets coordinates on the wafer surface, even if the same location on the wafer surface is shown, the coordinates shown for each type of inspection device are different.

For this reason, when using inline inspection data as a material for determining whether a semiconductor chip is good or defective, the inline inspection data is output and the operator checks the inline inspection data against the wafer, It was necessary to apply a marking process. In such operations, the defective part based on the in-line inspection data is indicated by the coordinates uniquely set on the inspection device side, and the defective part and the semiconductor chip do not simply match, so it is difficult to collate. There was a problem that it took time. There is also a problem that it is difficult to increase the accuracy of the verification.
Accordingly, the present invention has been made in view of such circumstances, and a semiconductor device inspection method and a semiconductor device inspection that enable easy and accurate verification of in-line inspection data and a semiconductor chip. The purpose is to provide a system.

  In order to achieve the above object, an inspection method for a semiconductor device according to one embodiment of the present invention includes sequentially performing exposure processing of the same pattern on one surface of a substrate while sequentially changing the position for each shot. A step of setting a shot address for a plurality of shot regions respectively formed in different regions, and a chip address of a plurality of semiconductor chips formed on one surface of the substrate are set in association with the shot address. A step, a step of setting coordinates for representing an arbitrary position on one surface of the substrate in association with the shot address and the chip address, and an inspection performed on a manufacturing line for one surface of the substrate Obtaining in-line inspection data as a result of the step; and Less, a method of inspecting a semiconductor device which comprises the steps of: converting the test data of the chip address or each of the coordinates. Here, the “shot address” is an address for representing each of a plurality of shot areas on one surface of the substrate. The “chip address” is an address for representing each of a plurality of semiconductor chips on one surface of the substrate.

  With such a method, a unified coordinate system can be configured by shot addresses, chip addresses, and coordinates set on one surface of the substrate. This coordinate system is not individually set on the inspection device side, but is a coordinate system set for each type of product (classified into multiple types according to the number and arrangement of shot areas and the number and arrangement of semiconductor chips). is there. In-line inspection data is converted into inspection data of a unified coordinate system set for each type of product. As a result, the inspection location of the in-line inspection data and the semiconductor chip match relatively simply, so that the in-line inspection data and the semiconductor chip can be easily and accurately collated. The “substrate” corresponds to, for example, a wafer W which will be described later, and the “one surface” corresponds to, for example, the surface of the wafer W.

  In the semiconductor device inspection method, in the step of setting the chip address, the origin address of the chip address is set to coincide with the origin address of the shot address, and in the step of setting the coordinates, The origin of the coordinates may be matched with both the origin address of the shot address and the origin address of the chip address. With such a method, the correspondence between the chip address, the shot address, and the coordinates can be made simpler and clearer in the coordinate system set for each type of product.

  In the semiconductor device inspection method, the step of acquiring probe inspection data as a result of inspection of electrical characteristics using a prober for each of the plurality of semiconductor chips formed on one surface of the substrate. A step of virtually superimposing the inspection data for each of the shot address, the chip address or the coordinates, and the probe inspection data to determine whether each of the plurality of semiconductor chips is good or bad. It may be characterized by including. Here, “virtual superposition” means that a plurality of types of data are superposed by information processing using an electronic computer such as a PC (for example, the data management apparatus 20 shown in FIG. 1). is there. With such a method, it is possible to determine whether the semiconductor chip is good or bad based on both in-line inspection data and probe inspection data.

  In the inspection method of the semiconductor device, in the step of acquiring the inline inspection data, the inline inspection data includes first inline inspection data that is a result of an inspection performed in a first process of the manufacturing line. And second inline inspection data that is a result of the inspection performed in the second step of the manufacturing line, and the inline inspection data is used as inspection data for each of the shot address, the chip address, or the coordinates. Converting the first inline inspection data into the shot address, the chip address, or the first inspection data for each coordinate, and the second inline inspection data is converted into the shot address, The chip address or the second inspection data for each coordinate is converted into the plurality of semiconductors. In the step of determining good or bad for each of the chips, the first inspection data, the second inspection data, and the probe inspection data are virtually overlapped to be good for each of the plurality of semiconductor chips, It may be characterized by determining a defect.

  With such a method, it is possible to determine whether the semiconductor chip is good or bad based on a plurality of types of in-line inspection data. The level of quality assurance of the semiconductor chip can be further increased. Note that “first inline inspection data” and “second inline inspection data” correspond to any one of later-described inline inspection data D1 to D4, for example.

  In the semiconductor device inspection method, if there is a semiconductor chip determined to be defective among the plurality of semiconductor chips, a step of performing a marking process on the semiconductor chip determined to be defective is further included. It may be characterized by including. With such a method, a semiconductor chip determined to be defective (hereinafter also referred to as a defective chip) can be identified by a mark such as ink.

  According to another aspect of the present invention, there is provided an inspection system for a semiconductor device, in which an exposure process of the same pattern is sequentially performed on one surface of a substrate while changing the position for each shot, and formed in different regions on the one surface. A first setting means for setting a shot address for a plurality of shot areas, and a second setting for setting a chip address of a plurality of semiconductor chips formed on one surface of the substrate in association with the shot address. A setting unit, a third setting unit for setting coordinates for representing an arbitrary position on one surface of the substrate in association with the shot address and the chip address, and a manufacturing line for one surface of the substrate Acquisition means for acquiring in-line inspection data, which is a result of the inspection performed in step 1, and Scan, characterized in that it comprises a conversion means for converting the test data of the chip address or each of the coordinates.

  According to such an inspection system, in-line inspection data can be easily and accurately verified with a semiconductor chip. The “first setting unit”, “second setting unit”, and “third setting unit” correspond to, for example, an address / coordinate setting unit 22 described later. The “acquiring unit” corresponds to, for example, a data storage unit 21 described later. The “conversion unit” corresponds to, for example, a coordinate conversion unit 24 described later.

The figure which shows the structural example of the test | inspection system 100 which concerns on embodiment. The figure which shows the setting method of the address and coordinates which concern on embodiment. The figure which expanded a part of FIG. The flowchart which shows the setting method of the address and coordinates which concern on embodiment. 6 is a flowchart illustrating a method for inspecting a semiconductor device according to an embodiment. FIG. 10 shows a method for inspecting a semiconductor device according to an embodiment (application example). The figure which shows the method of specifying a position based on the distance from a center.

Hereinafter, embodiments of the present invention will be described with reference to the drawings. Note that, in each drawing described below, parts having the same configuration are denoted by the same reference numerals, and redundant description thereof is omitted.
(1) Inspection System FIG. 1 is a block diagram showing a configuration example of a semiconductor device inspection system 100 according to an embodiment of the present invention.
The inspection system 100 acquires in-line inspection data from a plurality of inspection processes on a production line and acquires probe inspection data from a probe inspection process after the manufacturing line for a plurality of semiconductor chips formed on the surface of the wafer. Then, these inspection data are converted into a coordinate system unified for each type of product and virtually overlapped to determine whether the semiconductor chip is good or bad. Moreover, it is also a system which performs marking processing before dicing on each of a plurality of semiconductor chips based on the determination result.

As shown in FIG. 1, the inspection system 100 includes an in-line inspection device 10, a prober 14, a data management device 20, and a marking device 30. The inline inspection device 10, the prober 14, the data management device 20, and the marking device 30 are connected to each other via a communication line such as a LAN (local area network).
The in-line inspection apparatus 10 is an apparatus that performs various inspections and measurements while forming a plurality of semiconductor chips on the surface of a wafer (that is, a production line). For example, the in-line inspection apparatus 11, the film thickness measurement apparatus 12, A long device 13 is exemplified.

  The appearance inspection apparatus 11 is an apparatus that detects defects, abnormalities, scratches, adhesion of foreign matters, and the like on the appearance of a film or pattern formed on the wafer surface. Examples of the film to be inspected by the appearance inspection apparatus 11 include an insulating film such as a silicon oxide film and a silicon nitride film, a semiconductor film such as a polysilicon film, and a metal film such as tungsten and aluminum. Examples of the pattern to be inspected by the appearance inspection apparatus 11 include a resist pattern, a gate electrode, a contact hole, and a wiring pattern. The appearance inspection apparatus 11 optically reads out these inspection objects for appearance defects, abnormalities, scratches, adhesion of foreign matters, etc., and determines good or bad by image processing. It transmits to the management apparatus 20.

  The film thickness measuring device 12 is a device that measures the thickness of the film formed on the wafer surface. Examples of the film thickness measurement target include an insulating film such as a silicon oxide film and a silicon nitride film formed on the surface of a wafer, and a semiconductor film such as a polysilicon film. The film thickness measuring device 12 calculates the film thickness by, for example, irradiating light to these measurement objects and monitoring the reflected light, and transmits the result to the data management device 20.

  Note that the substrate on which the film thickness is actually measured is not limited to a wafer on which a plurality of semiconductor chips are formed (hereinafter also referred to as a product wafer), for example, a test in which film formation is performed in the same batch as the product wafer. It may be a wafer. In that case, the orientation flat of the product wafer and the orientation flat of the test wafer are aligned at the same position, and the film is formed in the same batch. Thereby, since the tendency of film formation distribution is almost the same between the product wafer and the test wafer, the film thickness value on the test wafer can be regarded as the film thickness value on the product wafer.

  The length measuring device 13 is a device that measures the length of a pattern formed on the wafer surface in plan view. Examples of length measurement targets include resist patterns, gate electrodes, contact hole diameters, wiring patterns, and the like. The length measuring device 13 optically reads the images of these length measuring objects, calculates the length by image processing, and transmits the result to the data management device 20.

  The prober 14 is an apparatus for inspecting the electrical characteristics of each semiconductor chip after a plurality of semiconductor chips are formed on the surface of the wafer. The prober 14 applies a probe needle to each electrode portion of a plurality of semiconductor chips formed on the surface of the wafer to inspect whether or not each of the semiconductor chips operates normally, and determines whether the semiconductor chip is good or bad. Judge every time. Then, the determination result is transmitted to the data management device 20.

On the other hand, the data management device 20 includes, for example, a data storage unit 21, an address / coordinate setting unit 22, an address / coordinate storage unit 23, a coordinate conversion unit 24, an overlay determination unit 25, and a determination result storage unit 26. And.
The data storage unit 21 sequentially stores the inspection or measurement results (that is, inline inspection data) transmitted from the inline inspection device 10 and the inspection results (that is, probe inspection data) transmitted from the prober 14. It has a function to store. Here, the inline inspection data is data based on coordinates arbitrarily set on the inline inspection apparatus 10 side, for example. For example, the coordinate axis (indicating the defect position) of the data transmitted by the appearance inspection apparatus 11 and the coordinate axis (indicating the length measurement position) of the data transmitted by the length measuring apparatus 13 are different. Even in the case where the same location on the wafer surface is shown, these coordinates are different for each type of inspection device. The data storage unit 21 stores a plurality of types of inline inspection data having different coordinate axes for each lot and for each wafer.

  The address / coordinate setting unit 22 has a function of acquiring design information of a product to be put on the production line, and setting a unified address / coordinate for each type of semiconductor device based on the acquired design information. Here, the design information is, for example, information related to a photomask (also referred to as a reticle in the case of reduced projection exposure) used when an arbitrary pattern is transferred onto the wafer surface, information related to a semiconductor chip, and the like. is there. Information on the reticle includes, for example, information on the number of shots for one wafer in an arbitrary exposure process, information on the arrangement of a region to which a pattern is transferred by one-shot exposure (ie, a shot region) on the wafer surface, and one shot Information on the size of the region (for example, the length along the X-axis direction in plan view and the length along the Y-axis direction orthogonal to the X-axis direction), the number of semiconductor chips included in one shot region and their arrangement Information about

  The information on the semiconductor chip includes, for example, information on the number and arrangement of the semiconductor chips on the wafer surface, and the size of one semiconductor chip (for example, a length along the X-axis direction and a length along the Y-axis direction). In addition to the information on the product, it is invalid as a product due to the arrangement of semiconductor chips (that is also referred to as effective chips) that are expected to be shipped effectively as products and the formation of them on the periphery of the wafer. Information on the arrangement of a certain semiconductor chip (that is also referred to as an invalid chip) is included.

The specific processing performed by the address / coordinate setting unit 22 will be described in the section “(2) Address / coordinate setting method” described later.
The address / coordinate storage unit 23 has a function of storing addresses and coordinates defined and unified for each product type by the address / coordinate setting unit 22 (that is, a unified coordinate system). In addition, the coordinate conversion unit 24 has a function of converting the coordinates of a plurality of types of inline inspection data stored in the data storage unit 21 into a coordinate system unified for each type of product as necessary.

The overlay determination unit 25 has a function of superimposing a plurality of types of in-line inspection data stored in the data storage unit 21 and probe inspection data, and determining whether each semiconductor chip is good or defective. Overlaying a plurality of types of in-line inspection data and probe inspection data is performed based on a coordinate system unified by the address / coordinate setting unit 22. Note that specific processing performed by the overlay determination unit 25 will be described in the section (3) “About inspection method” described later.
The determination result storage unit 26 has a function of storing a determination result (that is, determination data) output from the overlay determination unit 25.

The address / coordinate setting unit 22, the coordinate conversion unit 24, and the overlay determination unit 25 are, for example, an arithmetic processing unit such as a CPU (central processing unit) and a ROM (read only) that can read various programs. memory) and a RAM (random access memory) capable of writing and reading data. The data storage unit 21, the address / coordinate storage unit 23, and the determination result storage unit 26 are configured by a large-capacity storage device (for example, a hard disk or a data server) that can write and read data. .
The marking device 30 is connected to the data management device 20 and is a device that selectively performs a marking process on the semiconductor chip based on the determination data stored in the determination result storage unit 26.

Next, the address / coordinate setting method will be described more specifically.
(2) Address / Coordinate Setting Method FIG. 2 is a conceptual diagram showing an address / coordinate setting method according to the embodiment of the present invention. FIG. 3 is an enlarged view of a part of FIG. 2 and shows an example of a chip address overlapping with the origin shot. FIG. 4 is a flowchart showing an address / coordinate setting method according to the embodiment of the present invention.
In this embodiment, the address / coordinate setting unit 22 shown in FIG. 1 first acquires design information of a semiconductor device to be inspected (step (S) 1 in FIG. 4). Here, the design information acquired by the address / coordinate setting unit 22 is as described above, and is, for example, information related to a reticle and information related to a semiconductor chip.

  Next, as shown in FIG. 2, the address / coordinate setting unit 22 selects an arbitrary shot area from among a plurality of shot areas formed on the surface of the wafer W in the exposure process based on the design information of the semiconductor device. Is selected, and the selected shot area is defined as the origin shot area. Also, an address (that is, a shot address) is set for each shot area with reference to the origin shot area (step (S) 2 in FIG. 4).

  Note that the shape of the shot region in plan view is usually a rectangle, and each side thereof is along the X-axis direction and the Y-axis direction in plan view, respectively. In addition, each shot area is disposed adjacent to another shot area in at least one of the X-axis direction and the Y-axis direction. Therefore, the shot address of the shot area can be represented by (Xs, Ys) along the X-axis direction and the Y-axis direction. For example, the shot address of the origin shot area is represented by (Xs, Ys) = (0, 0), and the shot address of the shot area adjacent to the origin shot area on both sides in the X-axis direction is (Xs, Ys) = ( −1,0), (1,0).

  Next, as shown in FIGS. 2 and 3, the address / coordinate setting unit 22 selects an arbitrary semiconductor chip from a plurality of semiconductor chips included in the origin shot region based on the design information of the semiconductor device. This is defined as the origin chip. Further, using this origin chip as a reference, addresses (that is, chip addresses) are set to a plurality of semiconductor chips (step (S) 3 in FIG. 4).

  The shape of the semiconductor chip in a plan view is usually a rectangle, and each side thereof is along the X-axis direction and the Y-axis direction in the plan view. Each semiconductor chip is disposed adjacent to another semiconductor chip in at least one of the X-axis direction and the Y-axis direction. For this reason, as in the case of the shot address, the chip address can also be expressed by (Xc, Yc) along the X-axis direction and the Y-axis direction. For example, the chip address of the origin chip is represented by (Xc, Yc) = (0, 0), and the chip addresses of the semiconductor chips adjacent to the origin chip on both sides in the X-axis direction are respectively (Xc, Yc) = (− 1. , 0), (1, 0).

  In this embodiment, as shown in FIGS. 2 and 3, the chip address is set so that the lower left corner of the origin shot area (0, 0) and the origin chip (0, 0) overlap in plan view. Set. Also, the X-axis direction and the Y-axis direction are made to coincide with each other between the shot address (Xs, Ys) and the chip address (Xc, Yc).

Next, as shown in FIGS. 2 and 3, the address / coordinate setting unit 22 overlaps with the lower left corner of the origin shot area (0, 0) in plan view on the surface of the wafer W, and the origin chip ( A position where the lower left corner of (0, 0) overlaps in plan view is defined as origin coordinates (X, Y) = (0, 0). Further, on the surface of the wafer W, coordinates (X, Y) for representing an arbitrary position are set such that the shot address (Xs, Ys) and the chip address (Xc, Ys) are in the X-axis direction and the Y-axis direction, respectively. It sets so that it may correspond (step (S) 4 of FIG. 4).
Note that the shot address, chip address, and coordinates set in this way (that is, a coordinate system that is set and unified for each product type) are stored in the address / coordinate storage unit 23 shown in FIG. .

  Next, a method for inspecting a semiconductor device using the above-described coordinate system will be described more specifically. In the present embodiment, steps (S) 1 to 4 shown in FIG. 4 are executed in advance before steps (S) 1 to 21 shown in FIG. 5 are executed. The coordinate system set by this execution is stored in the address / coordinate storage unit 23 shown in FIG. Further, such a coordinate system setting is not a type that is performed every time before executing each step (S) 11 to 21 in FIG. There is no need to update.

(3) Inspection Method FIG. 5 is a flowchart showing a semiconductor device inspection method according to the embodiment of the present invention. For example, after a plurality of wafers are put into a production line in lot units, the surface of these wafers is inspected for any appearance defects, abnormalities, scratches, foreign matter adhesion, etc. (step (FIG. 5) S) 11). This inspection is performed by, for example, the appearance inspection apparatus 11 shown in FIG. The result is transmitted (that is, output) from the appearance inspection apparatus 11 to the data management apparatus 20 as in-line inspection data D1 for each wafer, and stored in the data storage unit 21. Note that this inspection step may be performed in a state where no pattern made of a resist, an insulating film, a semiconductor film, or the like is formed on the surface of the wafer. Further, in order to indicate the position of a defect or the like, the coordinates set on the wafer surface by the appearance inspection apparatus 11 are different from the unified coordinate system shown in FIGS. 2 and 3 (this will be described later). The same applies to steps (S) 13, 15, and 17 of FIG.

Next, in the film forming process, a predetermined film is formed on the surface of the wafer (step (S) 12 in FIG. 5). Here, examples of the predetermined film include an insulating film such as a silicon oxide film or a silicon nitride film, a semiconductor film such as polysilicon, or a metal film such as tungsten or aluminum. Further, a film other than those exemplified here may be used.
Subsequently, the film formed on the surface of the wafer is inspected for appearance defects, abnormalities, scratches, adhesion of foreign matters, and the like (step (S) 13 in FIG. 5). This inspection is performed by, for example, the appearance inspection apparatus 11 shown in FIG. The result is transmitted to the data management apparatus 20 as in-line inspection data D2 for each wafer and stored in the data storage unit 21. In this step (S) 13, another coordinate different from the coordinate set by the appearance inspection apparatus 11 in step (S) 11 is set on the wafer surface, and the position of the defect or the like is indicated using this other coordinate. You may do it. That is, even if the appearance inspection apparatus is used for the same purpose, the settable coordinates may be different if the model is different. In such a case, inline inspection data is created and transmitted based on the coordinates set for each model of the appearance inspection apparatus 11 (this also applies to steps (S) 15 and 17 described later). .)

Alternatively, step (S) 13 in FIG. 5 may be a step of measuring the thickness of the film formed on the surface of the wafer. In this case, for example, the film thickness measuring device 12 shown in FIG. 1 measures the film thickness at a plurality of locations in the plane for each wafer. Then, the measurement result is transmitted to the data management device 20 as in-line inspection data D′ 2 for each wafer, and stored in the data storage unit 21. As described above, the substrate on which the film thickness is actually measured by the film thickness measuring device 12 is not limited to the product wafer. In the film forming process of step (S) 12 in FIG. 5, the film thickness may be measured using a test wafer formed in the same batch as the product wafer, and the result may be used as in-line inspection data D′ 2. Further, the film thickness distribution over the entire surface of the test wafer may be calculated based on the film thickness values measured at a plurality of locations on the test wafer, and this may be used as in-line inspection data D′ 2.
Alternatively, in step (S) 13 of FIG. 5, both the appearance inspection and the film thickness measurement are performed, and both the in-line inspection data D2 related to the appearance inspection and the in-line inspection data D′ 2 related to the film thickness measurement are data management devices. 20 may be transmitted.

  Next, for example, in an exposure process, a resist pattern is formed on the surface of the wafer (step (S) 14 in FIG. 5). Subsequently, the resist pattern is inspected for defects in appearance, abnormalities, scratches, adhesion of foreign matters, or misalignment of the resist pattern (step (S) 15 in FIG. 5). This inspection is performed by, for example, the appearance inspection apparatus 11 shown in FIG. 1, and the result is transmitted (output) to the data management apparatus 20 as inline inspection data D3 for each wafer and stored in the data storage unit 21.

  Next, in an etching process, for example, the insulating film, the semiconductor film, or the metal film is etched using the resist pattern as a mask to form a pattern made of these films (step (S) 16 in FIG. 5). For example, when an insulating film such as a silicon oxide film or a silicon nitride film is etched, an opening such as a contact hole is formed as an example. In the case of etching a semiconductor film such as polysilicon, a gate electrode is formed as an example. Alternatively, in the case of etching a refractory metal film such as tungsten, a plug electrode is formed as an example. When this etching process is performed in the second half of the production line, a low melting point metal film such as aluminum may be etched to form a wiring pattern.

  Next, after removing the resist pattern, the above pattern is inspected (step (S) 17 in FIG. 5). This inspection may be, for example, an inspection using the appearance inspection apparatus 11 shown in FIG. 1 or an inspection using the length measuring device 13. When the inspection using the appearance inspection apparatus 11 is performed, it is the same as step (S) 11 described above. When the inspection using the length measuring device 13 is performed, the length measuring device 13 measures the length of the pattern at a plurality of locations in the plane for each wafer. In any case, the inspection or measurement result is transmitted to the data management device 20 as in-line inspection data D4 for each wafer and stored in the data storage unit 21.

  Thereafter, for example, the probe inspection process is reached through a plurality of processes from step (S) 17. In the probe inspection process, electrical characteristics of each of the plurality of semiconductor chips formed on the surface of the wafer are inspected by the prober 14 to determine whether the semiconductor chip operates normally (step of FIG. 5). (S) 18). Then, the result of this determination is transmitted to the data management device 20 as probe inspection data Dp and stored in the data storage unit 21.

  As described above, after the inline inspection data D1 to D4 and the probe inspection data Dp are all prepared for the wafer to be inspected, the coordinate conversion unit 24 stores the inspection data D1 to D4 and Dp in the data storage unit. Read from 21. In addition, the coordinate conversion unit 24 includes a shot address (Xs, Ys), a chip address (Xc, Yc), and coordinates (X, Y) according to the types of products related to the inspection data D1 to D4 and Dp. The unified coordinate system is read out from the address / coordinate storage unit 23. Then, the coordinate conversion unit 24 converts the coordinates individually set on the inspection apparatus side with respect to the inspection data D1 to D4 and Dp, the shot address (Xs, Ys) and the chip address (Xc, Yc) or coordinates (X, Y) (step (S) 19 in FIG. 5).

  That is, the coordinates individually set by the appearance inspection apparatus 11, the film thickness measurement apparatus 12, the length measurement apparatus 13 and the like shown in FIG. 1 are converted into a unified coordinate system as shown in FIGS. To do. Thereby, each of test | inspection data D1-D4 and Dp can be converted into the data for every chip address (Xc, Yc), for example.

Next, each of the inspection data D1 to D4 and Dp is virtually overlapped for each chip address (Xc, Yc), for example, to determine whether the semiconductor chip corresponding to the chip address (Xc, Yc) is good or bad. (Step (S) 20 in FIG. 5). The superposition determination unit 25 shown in FIG. 1 performs this superposition.
For example, for any semiconductor chip corresponding to a chip address (Xc, Yc) = (1, 1) of an arbitrary wafer, if all inspection data D1 to D4 and Dp are not abnormal, it corresponds to the chip address of the wafer. The semiconductor chip can be determined to be good. In addition, even if the result of the probe inspection data Dp is good, if any one of the in-line inspection data D1 to D4 is defective, the product quality and reliability are prioritized over the yield, and the semiconductor chip is It can be determined to be defective. Even if any one of the in-line inspection data D1 to D4 is defective, the defect does not need to be marked (for example, the defect size is small enough not to cause a problem or removed in a later process) In the case of a defect that may occur, the semiconductor chip can be determined to be good.
The result of determination by such superposition (that is, defective chip marking data) is stored, for example, in the determination result storage unit 26 shown in FIG.

Next, after the determination of good or bad for each wafer is completed, the marking device 30 reads out defective chip marking data from the determination result storage unit 26. Then, the marking device 30 performs a marking process on the corresponding semiconductor chip based on the defective chip marking data (step (S) 21 in FIG. 5).
As described above, according to the embodiment of the present invention, as shown in FIG. 2 or FIG. 3, the shot address (Xs, Ys), the chip address (Xc, Yc), and the coordinates (X, Y) are unified. Constitute the coordinate system. Then, all the inline inspection data D1 to D4 are converted into inspection data of this unified coordinate system. As a result, the inspection locations of the in-line inspection data D1 to D4 and the semiconductor chip are relatively simply matched, so that the in-line inspection data D1 to D4 and the semiconductor chip can be easily and accurately collated. .

  In the semiconductor device manufacturing line, multiple products such as products with different chip sizes and wafer sizes may flow, but the origin of the shot address, chip address, and coordinates for each type of product should match. By defining a unified coordinate system, inline inspection data can be easily and accurately overlaid for all products.

  Further, as described above, the defective chip marking that reflects the inline inspection data D1 to D4 by converting the coordinates of the inline inspection data D1 to D4 into a unified coordinate system and virtually superimposing them. Data can be output. Even in the inspection of defects and the like in the process before pattern formation, the data management device 20 virtually superimposes the inspection data, so that the semiconductor chip formed in the corresponding location can be determined as defective, and this is reflected. It is possible to output the defective chip marking data.

(4) Application Examples Further, as a limitation due to the performance limit of an appearance inspection apparatus, for example, a minute chip size cannot be measured, and an actual semiconductor chip is divided into one chip in an appearance inspection apparatus or the like. May be set to recognize. Even in such a case, by dividing the one chip into a plurality of chips at the time of coordinate conversion by the coordinate conversion unit 24, the result of the appearance inspection can be decomposed into data for a plurality of chips, which is defective. It can be reflected in the chip marking data. Hereinafter, this point will be described more specifically.

  FIG. 6 is a conceptual diagram showing a semiconductor device inspection method according to an embodiment (application example) of the present invention. In FIG. 6, a chip address A is a chip address set on the appearance inspection apparatus 11 (see FIG. 1) side, for example. This chip address A is defined by a chip size of, for example, a 1 cm square in plan view (that is, a rectangle in plan view, 1 cm in the X direction and 1 cm in the Y direction) due to restrictions on the appearance inspection apparatus 11 side. Has been.

  On the other hand, the chip address B is the chip address (Xc, Yc) set by the address / coordinate setting unit 22 in accordance with the method described in the section “(2) Address / coordinate setting method” above. The chip address B is defined by a chip size of 5 mm square in plan view, for example, in accordance with an actual semiconductor chip formed on the wafer W. The chip address B is stored in the address / coordinate storage unit 23 (see FIG. 1).

  Under such settings, for example, it is assumed that the appearance inspection apparatus 11 inspects the surface of the wafer W and finds a defect point at the chip address (Xm, Ym). In such a case, the result of inspection by the appearance inspection apparatus 11 (hereinafter referred to as inline inspection data D) is transmitted to the data management apparatus 20 (see FIG. 1) and stored in the data storage unit 21. The in-line inspection data D stored in the data storage unit 21 is converted from chip address A data to chip address B data at an arbitrary timing. This data conversion is performed by the coordinate conversion unit 24 (see FIG. 1).

Here, when the chip address (Xm, Ym) corresponds to, for example, the chip address (Xc, Yc) = (5, 3), (5, 4), (6, 3), (6, 4) The overlay determination unit 25 (see FIG. 1) sets these (Xc, Yc) = (5,3), (5,4), (6,3), (6,4) to a defective chip. It can be output as an address.
Alternatively, when the above-mentioned in-line inspection data D includes “detailed information” regarding the position of the defect point, these (Xc, Yc) = (5, 3), (5, 4), (6 , 3), (6, 4), only the corresponding chip address can be output as a defective chip address. Here, the “detailed information” is a position in the area of the chip address (Xm, Ym).

  For example, in the area of the chip address (Xm, Ym), when the appearance inspection apparatus 11 can recognize that there is a defect point at the lower left position in plan view from the center, this is inlined as “detailed information”. It is included in the inspection data D. As a result, the overlay determination unit 25 detects the chip address (Xc, Yc) = (5 in the area of the chip address (Xm, Ym) in the area of the chip address (Xm, Ym)). , 3) can be output as a defective address.

The position in the area can be indicated by a combination of a distance in the X direction and a distance in the Y direction from the reference position by setting a reference position in the area. As the reference position, for example, as shown in FIG. For example, in the area of the chip address (Xm, Ym), the position of −2 mm in the X direction and −2 mm in the Y direction from the center of the area corresponds to the lower left position from the center of the area, and the chip address (Xc , Yc) = (5, 3).
In this way, even when one chip of chip address A set on the appearance inspection apparatus 11 side corresponds to 4 chips of actual semiconductor chips (= 2 chips × 2 chips), inline that is the result of the inspection Data D can be converted into data of chip address B which is a unified coordinate system.

  Also, before or after such conversion, or in parallel, the inline data D1 to D4 described with reference to FIG. Then, the converted in-line inspection data D, D1 to D4 and the probe inspection data Dp are superimposed. Thereby, defective chip marking data reflecting the results of a plurality of types of in-line inspections and the results of probe inspections can be created, and defective chip marking can be performed.

  DESCRIPTION OF SYMBOLS 10 In-line inspection apparatus, 11 Appearance inspection apparatus, 12 Film thickness measurement apparatus, 13 Length measuring apparatus, 14 Prober, 20 Data management apparatus, 21 Data storage part, 22 Address / coordinate setting part, 23 Address / coordinate storage part, 24 coordinates Conversion unit, 25 overlay determination unit, 26 determination result storage unit, 30 marking device, 100 inspection system

Claims (6)

A step of setting shot addresses for a plurality of shot areas respectively formed in different areas of the one surface by sequentially performing exposure processing of the same pattern on one surface of the substrate while changing the position for each shot; ,
Setting a chip address of a plurality of semiconductor chips formed on one surface of the substrate in association with the shot address;
Setting coordinates for representing an arbitrary position on one surface of the substrate in association with the shot address and the chip address;
Obtaining in-line inspection data that is a result of an inspection performed on a production line for one side of the substrate;
Converting the in-line inspection data into inspection data for each of the shot address, the chip address or the coordinates, and a method for inspecting a semiconductor device. In the step of setting the chip address, the origin address of the chip address is set to match the origin address of the shot address,
2. The method for inspecting a semiconductor device according to claim 1, wherein in the step of setting the coordinates, the origin of the coordinates is made to coincide with both the origin address of the shot address and the origin address of the chip address. For each of the plurality of semiconductor chips formed on one surface of the substrate, obtaining probe inspection data that is a result of electrical property inspection using a prober;
A step of virtually superimposing the inspection data for each of the shot address, the chip address or the coordinates, and the probe inspection data to determine whether each of the plurality of semiconductor chips is good or bad. The method for inspecting a semiconductor device according to claim 1, wherein: In the step of acquiring the inline inspection data,
As the in-line inspection data, first in-line inspection data that is a result of the inspection performed in the first process of the manufacturing line, and second that is a result of the inspection performed in the second process of the manufacturing line. With inline inspection data,
In the step of converting the inline inspection data into the shot address, the chip address or the inspection data for each coordinate,
Converting the first inline inspection data into the first inspection data for each of the shot address, the chip address or the coordinates;
Converting the second inline inspection data into the second inspection data for each of the shot address, the chip address or the coordinates;
In the step of determining good or bad for each of the plurality of semiconductor chips,
4. The good or bad of each of the plurality of semiconductor chips is determined by virtually superimposing the first inspection data, the second inspection data, and the probe inspection data. 2. A method for inspecting a semiconductor device according to 1.   4. The method according to claim 3, further comprising a step of performing a marking process on the semiconductor chip determined to be defective when there is a semiconductor chip determined to be defective among the plurality of semiconductor chips. Item 5. A method for inspecting a semiconductor device according to Item 4. A first address for setting a shot address for a plurality of shot areas respectively formed in different areas of the one surface by sequentially performing exposure processing of the same pattern on one surface of the substrate while changing the position for each shot. Setting means,
Second setting means for setting chip addresses of a plurality of semiconductor chips formed on one surface of the substrate in association with the shot address;
Third setting means for setting coordinates for representing an arbitrary position on one surface of the substrate in association with the shot address and the chip address;
For one surface of the substrate, an acquisition means for acquiring in-line inspection data that is a result of an inspection performed on a production line;
A semiconductor device inspection system comprising: conversion means for converting the in-line inspection data into the shot address, the chip address, or inspection data for each coordinate.

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