JP2011529603A - バーチャル化可能な高度な同期機構 - Google Patents

バーチャル化可能な高度な同期機構 Download PDF

Info

Publication number
JP2011529603A
JP2011529603A JP2011521116A JP2011521116A JP2011529603A JP 2011529603 A JP2011529603 A JP 2011529603A JP 2011521116 A JP2011521116 A JP 2011521116A JP 2011521116 A JP2011521116 A JP 2011521116A JP 2011529603 A JP2011529603 A JP 2011529603A
Authority
JP
Japan
Prior art keywords
transaction
instructions
processor
memory
instruction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2011521116A
Other languages
English (en)
Japanese (ja)
Other versions
JP2011529603A5 (enExample
Inventor
エス．クリスティ デイビッド
ペー．ホームート ミヒャエル
ディーステルホースト ステファン
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advanced Micro Devices Inc
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Publication of JP2011529603A publication Critical patent/JP2011529603A/ja
Publication of JP2011529603A5 publication Critical patent/JP2011529603A5/ja
Pending legal-status Critical Current

Links

Images

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/466—Transaction processing
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30076—Arrangements for executing specific machine instructions to perform miscellaneous control operations, e.g. NOP
    • G06F9/30087—Synchronisation or serialisation instructions
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30181—Instruction operation extension or modification
    • G06F9/30185—Instruction operation extension or modification according to one or more bits in the instruction, e.g. prefix, sub-opcode
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30181—Instruction operation extension or modification
    • G06F9/30189—Instruction operation extension or modification according to execution mode, e.g. mode flag
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824—Operand accessing
    • G06F9/3834—Maintaining memory consistency
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3842—Speculative instruction execution
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3854—Instruction completion, e.g. retiring, committing or graduating
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3854—Instruction completion, e.g. retiring, committing or graduating
    • G06F9/3858—Result writeback, i.e. updating the architectural state or memory
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3854—Instruction completion, e.g. retiring, committing or graduating
    • G06F9/3858—Result writeback, i.e. updating the architectural state or memory
    • G06F9/38585—Result writeback, i.e. updating the architectural state or memory with result invalidation, e.g. nullification
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3861—Recovery, e.g. branch miss-prediction, exception handling
    • G06F9/3863—Recovery, e.g. branch miss-prediction, exception handling using multiple copies of the architectural state, e.g. shadow registers
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/455—Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
    • G06F9/45504—Abstract machines for programme code execution, e.g. Java virtual machine [JVM], interpreters, emulators
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/468—Specific access rights for resources, e.g. using capability register
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/52—Program synchronisation; Mutual exclusion, e.g. by means of semaphores

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Advance Control (AREA)
  • Storage Device Security (AREA)
JP2011521116A 2008-07-28 2009-07-28 バーチャル化可能な高度な同期機構 Pending JP2011529603A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US8400808P 2008-07-28 2008-07-28
US61/084,008 2008-07-28
PCT/US2009/004349 WO2010014200A1 (en) 2008-07-28 2009-07-28 Virtualizable advanced synchronization facility

Publications (2)

Publication Number Publication Date
JP2011529603A true JP2011529603A (ja) 2011-12-08
JP2011529603A5 JP2011529603A5 (enExample) 2012-09-13

Family

ID=41090366

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2011521116A Pending JP2011529603A (ja) 2008-07-28 2009-07-28 バーチャル化可能な高度な同期機構

Country Status (6)

Country Link
US (5) US9372718B2 (enExample)
EP (1) EP2332043B1 (enExample)
JP (1) JP2011529603A (enExample)
KR (1) KR20110044884A (enExample)
CN (1) CN102144218A (enExample)
WO (1) WO2010014200A1 (enExample)

Cited By (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015523651A (ja) * 2012-06-15 2015-08-13 インターナショナル・ビジネス・マシーンズ・コーポレーションＩｎｔｅｒｎａｔｉｏｎａｌ Ｂｕｓｉｎｅｓｓ Ｍａｃｈｉｎｅｓ Ｃｏｒｐｏｒａｔｉｏｎ コンピューティング環境においてマシン命令を実行するための方法、システム、およびプログラム（トランザクション開始／終了命令）
JP2015523654A (ja) * 2012-06-15 2015-08-13 インターナショナル・ビジネス・マシーンズ・コーポレーションＩｎｔｅｒｎａｔｉｏｎａｌ Ｂｕｓｉｎｅｓｓ Ｍａｃｈｉｎｅｓ Ｃｏｒｐｏｒａｔｉｏｎ 制約付きトランザクションの実行
JP2015523655A (ja) * 2012-06-15 2015-08-13 インターナショナル・ビジネス・マシーンズ・コーポレーションＩｎｔｅｒｎａｔｉｏｎａｌ Ｂｕｓｉｎｅｓｓ Ｍａｃｈｉｎｅｓ Ｃｏｒｐｏｒａｔｉｏｎ トランザクション処理における命令実行の選択的制御
JP2015523653A (ja) * 2012-06-15 2015-08-13 インターナショナル・ビジネス・マシーンズ・コーポレーションＩｎｔｅｒｎａｔｉｏｎａｌ Ｂｕｓｉｎｅｓｓ Ｍａｃｈｉｎｅｓ Ｃｏｒｐｏｒａｔｉｏｎ Ｎｏｎｔｒａｎｓａｃｔｉｏｎａｌｓｔｏｒｅ命令
JP2015525406A (ja) * 2012-06-15 2015-09-03 インターナショナル・ビジネス・マシーンズ・コーポレーションＩｎｔｅｒｎａｔｉｏｎａｌ Ｂｕｓｉｎｅｓｓ Ｍａｃｈｉｎｅｓ Ｃｏｒｐｏｒａｔｉｏｎ コンピューティング環境においてトランザクション実行に関連付けられた処理を実行するための方法、システム、およびプログラム（トランザクション実行における制限された命令）
JP2015525405A (ja) * 2012-06-15 2015-09-03 インターナショナル・ビジネス・マシーンズ・コーポレーションＩｎｔｅｒｎａｔｉｏｎａｌ Ｂｕｓｉｎｅｓｓ Ｍａｃｈｉｎｅｓ Ｃｏｒｐｏｒａｔｉｏｎ Ｔｒａｎｓａｃｔｉｏｎａｂｏｒｔ命令
JP2015525408A (ja) * 2012-06-15 2015-09-03 インターナショナル・ビジネス・マシーンズ・コーポレーションＩｎｔｅｒｎａｔｉｏｎａｌ Ｂｕｓｉｎｅｓｓ Ｍａｃｈｉｎｅｓ Ｃｏｒｐｏｒａｔｉｏｎ トランザクション処理
JP2015526790A (ja) * 2012-06-15 2015-09-10 インターナショナル・ビジネス・マシーンズ・コーポレーションＩｎｔｅｒｎａｔｉｏｎａｌ Ｂｕｓｉｎｅｓｓ Ｍａｃｈｉｎｅｓ Ｃｏｒｐｏｒａｔｉｏｎ トランザクション処理における選択されたレジスタの保存／復元
JP2015526788A (ja) * 2012-06-15 2015-09-10 インターナショナル・ビジネス・マシーンズ・コーポレーションＩｎｔｅｒｎａｔｉｏｎａｌ Ｂｕｓｉｎｅｓｓ Ｍａｃｈｉｎｅｓ Ｃｏｒｐｏｒａｔｉｏｎ トランザクション診断ブロック
JP2015527631A (ja) * 2012-06-15 2015-09-17 インターナショナル・ビジネス・マシーンズ・コーポレーションＩｎｔｅｒｎａｔｉｏｎａｌ Ｂｕｓｉｎｅｓｓ Ｍａｃｈｉｎｅｓ Ｃｏｒｐｏｒａｔｉｏｎ プロセッサ支援ファシリティ
JP2015528935A (ja) * 2012-06-15 2015-10-01 インターナショナル・ビジネス・マシーンズ・コーポレーションＩｎｔｅｒｎａｔｉｏｎａｌ Ｂｕｓｉｎｅｓｓ Ｍａｃｈｉｎｅｓ Ｃｏｒｐｏｒａｔｉｏｎ トランザクション実行内でのランダム化されたテスト
JP2017520857A (ja) * 2014-07-15 2017-07-27 エイアールエム リミテッド トランザクション・データ処理実行モードのための呼出しスタック維持
JP2017539008A (ja) * 2014-12-24 2017-12-28 インテル・コーポレーション データ投機実行のためのシステム、装置および方法
JP2018500662A (ja) * 2014-12-24 2018-01-11 インテル・コーポレーション データ投機実行のためのシステム、装置および方法
JP2020507152A (ja) * 2017-01-19 2020-03-05 インターナショナル・ビジネス・マシーンズ・コーポレーションＩｎｔｅｒｎａｔｉｏｎａｌ Ｂｕｓｉｎｅｓｓ Ｍａｃｈｉｎｅｓ Ｃｏｒｐｏｒａｔｉｏｎ トランザクション実行中の保護ストレージ・イベント処理

Families Citing this family (160)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9372718B2 (en) 2008-07-28 2016-06-21 Advanced Micro Devices, Inc. Virtualizable advanced synchronization facility
US8479166B2 (en) * 2008-08-25 2013-07-02 International Business Machines Corporation Detecting locking discipline violations on shared resources
US9021502B2 (en) * 2008-12-29 2015-04-28 Oracle America Inc. Method and system for inter-thread communication using processor messaging
US8812796B2 (en) 2009-06-26 2014-08-19 Microsoft Corporation Private memory regions and coherence optimizations
US8375175B2 (en) * 2009-12-09 2013-02-12 Oracle America, Inc. Fast and efficient reacquisition of locks for transactional memory systems
US9092253B2 (en) 2009-12-15 2015-07-28 Microsoft Technology Licensing, Llc Instrumentation of hardware assisted transactional memory system
US8402218B2 (en) * 2009-12-15 2013-03-19 Microsoft Corporation Efficient garbage collection and exception handling in a hardware accelerated transactional memory system
US8972994B2 (en) * 2009-12-23 2015-03-03 Intel Corporation Method and apparatus to bypass object lock by speculative execution of generated bypass code shell based on bypass failure threshold in managed runtime environment
US8924692B2 (en) * 2009-12-26 2014-12-30 Intel Corporation Event counter checkpointing and restoring
US20110208921A1 (en) * 2010-02-19 2011-08-25 Pohlack Martin T Inverted default semantics for in-speculative-region memory accesses
US9626187B2 (en) 2010-05-27 2017-04-18 International Business Machines Corporation Transactional memory system supporting unbroken suspended execution
US9880848B2 (en) * 2010-06-11 2018-01-30 Advanced Micro Devices, Inc. Processor support for hardware transactional memory
US8782434B1 (en) 2010-07-15 2014-07-15 The Research Foundation For The State University Of New York System and method for validating program execution at run-time
US8782435B1 (en) * 2010-07-15 2014-07-15 The Research Foundation For The State University Of New York System and method for validating program execution at run-time using control flow signatures
US20120079212A1 (en) 2010-09-23 2012-03-29 International Business Machines Corporation Architecture for sharing caches among multiple processes
US8549504B2 (en) 2010-09-25 2013-10-01 Intel Corporation Apparatus, method, and system for providing a decision mechanism for conditional commits in an atomic region
US20120079245A1 (en) * 2010-09-25 2012-03-29 Cheng Wang Dynamic optimization for conditional commit
US8424015B2 (en) * 2010-09-30 2013-04-16 International Business Machines Corporation Transactional memory preemption mechanism
US9110691B2 (en) * 2010-11-16 2015-08-18 Advanced Micro Devices, Inc. Compiler support technique for hardware transactional memory systems
US8468169B2 (en) 2010-12-01 2013-06-18 Microsoft Corporation Hierarchical software locking
US8788794B2 (en) * 2010-12-07 2014-07-22 Advanced Micro Devices, Inc. Programmable atomic memory using stored atomic procedures
US9274962B2 (en) * 2010-12-07 2016-03-01 Intel Corporation Apparatus, method, and system for instantaneous cache state recovery from speculative abort/commit
US9122476B2 (en) 2010-12-07 2015-09-01 Advanced Micro Devices, Inc. Programmable atomic memory using hardware validation agent
US8612694B2 (en) 2011-03-07 2013-12-17 Advanced Micro Devices, Inc. Protecting large objects within an advanced synchronization facility
US8990823B2 (en) 2011-03-10 2015-03-24 International Business Machines Corporation Optimizing virtual machine synchronization for application software
US8533699B2 (en) * 2011-03-31 2013-09-10 Oracle International Corporation System and method for optimizing a code section by forcing a code section to be executed atomically
KR20130022091A (ko) 2011-08-24 2013-03-06 주식회사 케이티 클라우드 컴퓨팅 서버 시스템의 가상머신 제어 장치 및 방법
US8677331B2 (en) * 2011-09-30 2014-03-18 Oracle International Corporation Lock-clustering compilation for software transactional memory
US8954680B2 (en) 2011-11-20 2015-02-10 International Business Machines Corporation Modifying data prefetching operation based on a past prefetching attempt
WO2013095569A1 (en) * 2011-12-22 2013-06-27 Intel Corporation Method, apparatus and system for selective execution of a commit instruction
CN104025023A (zh) * 2011-12-23 2014-09-03 英特尔公司 用于执行使用掩码的向量打包一元解码的系统、装置和方法
CN104126166A (zh) * 2011-12-23 2014-10-29 英特尔公司 用于执行使用掩码的向量打包一元编码的系统、装置和方法
US8893094B2 (en) * 2011-12-30 2014-11-18 Intel Corporation Hardware compilation and/or translation with fault detection and roll back functionality
US9229722B2 (en) * 2012-01-31 2016-01-05 International Business Machines Corporation Major branch instructions with transactional memory
US9280398B2 (en) * 2012-01-31 2016-03-08 International Business Machines Corporation Major branch instructions
US9268596B2 (en) 2012-02-02 2016-02-23 Intel Corparation Instruction and logic to test transactional execution status
WO2013115816A1 (en) * 2012-02-02 2013-08-08 Intel Corporation A method, apparatus, and system for speculative abort control mechanisms
US9891962B2 (en) * 2012-05-23 2018-02-13 Nec Corporation Lock management system, lock management method and lock management program
US9411595B2 (en) 2012-05-31 2016-08-09 Nvidia Corporation Multi-threaded transactional memory coherence
WO2013185220A1 (en) * 2012-06-15 2013-12-19 Edatanetworks Inc. Systems and methods for incenting consumers
US9442737B2 (en) 2012-06-15 2016-09-13 International Business Machines Corporation Restricting processing within a processor to facilitate transaction completion
US9311101B2 (en) 2012-06-15 2016-04-12 International Business Machines Corporation Intra-instructional transaction abort handling
US9740549B2 (en) 2012-06-15 2017-08-22 International Business Machines Corporation Facilitating transaction completion subsequent to repeated aborts of the transaction
US9317460B2 (en) 2012-06-15 2016-04-19 International Business Machines Corporation Program event recording within a transactional environment
US9298469B2 (en) * 2012-06-15 2016-03-29 International Business Machines Corporation Management of multiple nested transactions
US8966324B2 (en) 2012-06-15 2015-02-24 International Business Machines Corporation Transactional execution branch indications
US9298631B2 (en) 2012-06-15 2016-03-29 International Business Machines Corporation Managing transactional and non-transactional store observability
US9336046B2 (en) * 2012-06-15 2016-05-10 International Business Machines Corporation Transaction abort processing
US9262320B2 (en) 2012-06-15 2016-02-16 International Business Machines Corporation Tracking transactional execution footprint
US9223687B2 (en) 2012-06-15 2015-12-29 International Business Machines Corporation Determining the logical address of a transaction abort
US10437602B2 (en) 2012-06-15 2019-10-08 International Business Machines Corporation Program interruption filtering in transactional execution
CN105786665B (zh) * 2012-06-29 2019-11-05 英特尔公司 用于测试事务性执行状态的系统
US9535768B2 (en) * 2012-07-16 2017-01-03 Sony Corporation Managing multi-threaded operations in a multimedia authoring environment
US9274963B2 (en) 2012-07-20 2016-03-01 International Business Machines Corporation Cache replacement for shared memory caches
WO2014018912A1 (en) * 2012-07-27 2014-01-30 Huawei Technologies Co., Ltd. The handling of barrier commands for computing systems
US8914586B2 (en) 2012-07-31 2014-12-16 Advanced Micro Devices, Inc. TLB-walk controlled abort policy for hardware transactional memory
US8943278B2 (en) 2012-07-31 2015-01-27 Advanced Micro Devices, Inc. Protecting large regions without operating-system support
US9396115B2 (en) 2012-08-02 2016-07-19 International Business Machines Corporation Rewind only transactions in a data processing system supporting transactional storage accesses
US9342454B2 (en) 2012-08-02 2016-05-17 International Business Machines Corporation Nested rewind only and non rewind only transactions in a data processing system supporting transactional storage accesses
US9430166B2 (en) 2012-08-10 2016-08-30 International Business Machines Corporation Interaction of transactional storage accesses with other atomic semantics
US9063721B2 (en) 2012-09-14 2015-06-23 The Research Foundation For The State University Of New York Continuous run-time validation of program execution: a practical approach
US9471317B2 (en) 2012-09-27 2016-10-18 Texas Instruments Deutschland Gmbh Execution of additional instructions in conjunction atomically as specified in instruction field
US9612834B2 (en) * 2012-09-27 2017-04-04 Texas Instruments Deutschland Gmbh Processor with variable instruction atomicity
US9069782B2 (en) 2012-10-01 2015-06-30 The Research Foundation For The State University Of New York System and method for security and privacy aware virtual machine checkpointing
US9081607B2 (en) 2012-10-24 2015-07-14 International Business Machines Corporation Conditional transaction abort and precise abort handling
US9459877B2 (en) * 2012-12-21 2016-10-04 Advanced Micro Devices, Inc. Nested speculative regions for a synchronization facility
US9824009B2 (en) 2012-12-21 2017-11-21 Nvidia Corporation Information coherency maintenance systems and methods
US10102142B2 (en) 2012-12-26 2018-10-16 Nvidia Corporation Virtual address based memory reordering
US9569223B2 (en) * 2013-02-13 2017-02-14 Red Hat Israel, Ltd. Mixed shared/non-shared memory transport for virtual machines
US20140281236A1 (en) * 2013-03-14 2014-09-18 William C. Rash Systems and methods for implementing transactional memory
US9569385B2 (en) 2013-09-09 2017-02-14 Nvidia Corporation Memory transaction ordering
US9588801B2 (en) * 2013-09-11 2017-03-07 Intel Corporation Apparatus and method for improved lock elision techniques
US9348522B2 (en) * 2013-12-12 2016-05-24 International Business Machines Corporation Software indications and hints for coalescing memory transactions
US9146774B2 (en) 2013-12-12 2015-09-29 International Business Machines Corporation Coalescing memory transactions
US9292337B2 (en) 2013-12-12 2016-03-22 International Business Machines Corporation Software enabled and disabled coalescing of memory transactions
US9348523B2 (en) 2013-12-12 2016-05-24 International Business Machines Corporation Code optimization to enable and disable coalescing of memory transactions
US9158573B2 (en) 2013-12-12 2015-10-13 International Business Machines Corporation Dynamic predictor for coalescing memory transactions
US9361041B2 (en) 2014-02-27 2016-06-07 International Business Machines Corporation Hint instruction for managing transactional aborts in transactional memory computing environments
US9424072B2 (en) * 2014-02-27 2016-08-23 International Business Machines Corporation Alerting hardware transactions that are about to run out of space
US9524187B2 (en) * 2014-03-02 2016-12-20 International Business Machines Corporation Executing instruction with threshold indicating nearing of completion of transaction
US9454370B2 (en) 2014-03-14 2016-09-27 International Business Machines Corporation Conditional transaction end instruction
US9558032B2 (en) 2014-03-14 2017-01-31 International Business Machines Corporation Conditional instruction end operation
US10120681B2 (en) 2014-03-14 2018-11-06 International Business Machines Corporation Compare and delay instructions
US9262343B2 (en) 2014-03-26 2016-02-16 International Business Machines Corporation Transactional processing based upon run-time conditions
US9256553B2 (en) 2014-03-26 2016-02-09 International Business Machines Corporation Transactional processing based upon run-time storage values
US20150278123A1 (en) * 2014-03-28 2015-10-01 Alex Nayshtut Low-overhead detection of unauthorized memory modification using transactional memory
US9778949B2 (en) * 2014-05-05 2017-10-03 Google Inc. Thread waiting in a multithreaded processor architecture
US10261764B2 (en) * 2014-05-13 2019-04-16 Oracle International Corporation Handling value types
US9600286B2 (en) * 2014-06-30 2017-03-21 International Business Machines Corporation Latent modification instruction for transactional execution
US9348643B2 (en) 2014-06-30 2016-05-24 International Business Machines Corporation Prefetching of discontiguous storage locations as part of transactional execution
US9336047B2 (en) 2014-06-30 2016-05-10 International Business Machines Corporation Prefetching of discontiguous storage locations in anticipation of transactional execution
US9448939B2 (en) 2014-06-30 2016-09-20 International Business Machines Corporation Collecting memory operand access characteristics during transactional execution
US9710271B2 (en) 2014-06-30 2017-07-18 International Business Machines Corporation Collecting transactional execution characteristics during transactional execution
GB2529148B (en) * 2014-08-04 2020-05-27 Advanced Risc Mach Ltd Write operations to non-volatile memory
WO2016037048A1 (en) 2014-09-05 2016-03-10 Sequitur Labs, Inc. Policy-managed secure code execution and messaging for computing devices and computing device security
GB2533414B (en) * 2014-12-19 2021-12-01 Advanced Risc Mach Ltd Apparatus with shared transactional processing resource, and data processing method
GB2533415B (en) * 2014-12-19 2022-01-19 Advanced Risc Mach Ltd Apparatus with at least one resource having thread mode and transaction mode, and method
US10942744B2 (en) * 2014-12-24 2021-03-09 Intel Corporation Systems, apparatuses, and methods for data speculation execution
US10540524B2 (en) 2014-12-31 2020-01-21 Mcafee, Llc Memory access protection using processor transactional memory support
US10685130B2 (en) 2015-04-21 2020-06-16 Sequitur Labs Inc. System and methods for context-aware and situation-aware secure, policy-based access control for computing devices
US11847237B1 (en) 2015-04-28 2023-12-19 Sequitur Labs, Inc. Secure data protection and encryption techniques for computing devices and information storage
WO2016183504A1 (en) 2015-05-14 2016-11-17 Sequitur Labs, Inc. System and methods for facilitating secure computing device control and operation
US9870253B2 (en) 2015-05-27 2018-01-16 International Business Machines Corporation Enabling end of transaction detection using speculative look ahead
US11228458B2 (en) * 2015-09-10 2022-01-18 Lightfleet Corporation Group-coherent memory
US20170083331A1 (en) * 2015-09-19 2017-03-23 Microsoft Technology Licensing, Llc Memory synchronization in block-based processors
US9513960B1 (en) 2015-09-22 2016-12-06 International Business Machines Corporation Inducing transactional aborts in other processing threads
US10558582B2 (en) 2015-10-02 2020-02-11 Intel Corporation Technologies for execute only transactional memory
US9916179B2 (en) 2015-10-29 2018-03-13 International Business Machines Corporation Interprocessor memory status communication
US10261827B2 (en) 2015-10-29 2019-04-16 International Business Machines Corporation Interprocessor memory status communication
US9563467B1 (en) 2015-10-29 2017-02-07 International Business Machines Corporation Interprocessor memory status communication
US9760397B2 (en) 2015-10-29 2017-09-12 International Business Machines Corporation Interprocessor memory status communication
US9690623B2 (en) * 2015-11-06 2017-06-27 International Business Machines Corporation Regulating hardware speculative processing around a transaction
US9652385B1 (en) * 2015-11-27 2017-05-16 Arm Limited Apparatus and method for handling atomic update operations
US10318295B2 (en) * 2015-12-22 2019-06-11 Intel Corporation Transaction end plus commit to persistence instructions, processors, methods, and systems
US10649773B2 (en) * 2016-04-07 2020-05-12 MIPS Tech, LLC Processors supporting atomic writes to multiword memory locations and methods
US10248564B2 (en) 2016-06-24 2019-04-02 Advanced Micro Devices, Inc. Contended lock request elision scheme
EP3264317B1 (en) * 2016-06-29 2019-11-20 Arm Ltd Permission control for contingent memory access program instruction
US10169106B2 (en) * 2016-06-30 2019-01-01 International Business Machines Corporation Method for managing control-loss processing during critical processing sections while maintaining transaction scope integrity
CN107766080B (zh) * 2016-08-23 2021-11-09 阿里巴巴集团控股有限公司 事务消息处理方法、装置、设备及系统
US10802971B2 (en) 2016-10-13 2020-10-13 International Business Machines Corporation Cache memory transaction shielding via prefetch suppression
US10700865B1 (en) 2016-10-21 2020-06-30 Sequitur Labs Inc. System and method for granting secure access to computing services hidden in trusted computing environments to an unsecure requestor
CN106502920B (zh) * 2016-11-08 2019-09-24 郑州云海信息技术有限公司 一种基于mesi的缓存方法、装置和处理器
US10402327B2 (en) 2016-11-22 2019-09-03 Advanced Micro Devices, Inc. Network-aware cache coherence protocol enhancement
US10162757B2 (en) * 2016-12-06 2018-12-25 Advanced Micro Devices, Inc. Proactive cache coherence
US10235190B2 (en) 2016-12-14 2019-03-19 International Business Machines Corporation Executing instructions to store context information based on routine to be executed
US10152338B2 (en) 2016-12-14 2018-12-11 International Business Machines Corporation Marking external sibling caller routines
US10095493B2 (en) 2016-12-14 2018-10-09 International Business Machines Corporation Call sequence generation based on type of routine
US10180827B2 (en) 2016-12-14 2019-01-15 International Business Machines Corporation Suppressing storing of context information
US20180165073A1 (en) 2016-12-14 2018-06-14 International Business Machines Corporation Context information based on type of routine being called
US10241769B2 (en) 2016-12-14 2019-03-26 International Business Machines Corporation Marking sibling caller routines
US10496292B2 (en) 2017-01-19 2019-12-03 International Business Machines Corporation Saving/restoring guarded storage controls in a virtualized environment
US10725685B2 (en) 2017-01-19 2020-07-28 International Business Machines Corporation Load logical and shift guarded instruction
US10452288B2 (en) 2017-01-19 2019-10-22 International Business Machines Corporation Identifying processor attributes based on detecting a guarded storage event
US10732858B2 (en) 2017-01-19 2020-08-04 International Business Machines Corporation Loading and storing controls regulating the operation of a guarded storage facility
US10496311B2 (en) 2017-01-19 2019-12-03 International Business Machines Corporation Run-time instrumentation of guarded storage event processing
GB201708439D0 (en) 2017-05-26 2017-07-12 Microsoft Technology Licensing Llc Compute node security
GB2564097B (en) * 2017-06-28 2019-10-23 Advanced Risc Mach Ltd Memory region locking
CN110785746B (zh) 2017-06-28 2024-04-12 Arm有限公司 存储器区域锁定
EP3462308B1 (en) * 2017-09-29 2022-03-02 ARM Limited Transaction nesting depth testing instruction
GB2567433B (en) * 2017-10-10 2020-02-26 Advanced Risc Mach Ltd Checking lock variables for transactions in a system with transactional memory support
US10621103B2 (en) 2017-12-05 2020-04-14 Arm Limited Apparatus and method for handling write operations
US10657057B2 (en) * 2018-04-04 2020-05-19 Nxp B.V. Secure speculative instruction execution in a data processing system
GB2579246B (en) * 2018-11-28 2021-10-13 Advanced Risc Mach Ltd Apparatus and data processing method for transactional memory
US11403234B2 (en) 2019-06-29 2022-08-02 Intel Corporation Cryptographic computing using encrypted base addresses and used in multi-tenant environments
US11580234B2 (en) 2019-06-29 2023-02-14 Intel Corporation Implicit integrity for cryptographic computing
US11575504B2 (en) 2019-06-29 2023-02-07 Intel Corporation Cryptographic computing engine for memory load and store units of a microarchitecture pipeline
US12282567B2 (en) 2019-06-29 2025-04-22 Intel Corporation Cryptographic computing using encrypted base addresses and used in multi-tenant environments
US11144322B2 (en) * 2019-11-05 2021-10-12 Mediatek Inc. Code and data sharing among multiple independent processors
US11436187B2 (en) * 2020-10-20 2022-09-06 Micron Technology, Inc. Method of notifying a process or programmable atomic operation traps
US12020062B2 (en) 2020-10-20 2024-06-25 Micron Technology, Inc. Method of executing programmable atomic unit resources within a multi-process system
US11740929B2 (en) 2020-10-20 2023-08-29 Micron Technology, Inc. Registering a custom atomic operation with the operating system
US11693690B2 (en) 2020-10-20 2023-07-04 Micron Technology, Inc. Method of completing a programmable atomic transaction by ensuring memory locks are cleared
US11586439B2 (en) 2020-10-20 2023-02-21 Micron Technology, Inc. Detecting infinite loops in a programmable atomic transaction
US11403023B2 (en) 2020-10-20 2022-08-02 Micron Technology, Inc. Method of organizing a programmable atomic unit instruction memory
US11669625B2 (en) 2020-12-26 2023-06-06 Intel Corporation Data type based cryptographic computing
US11580035B2 (en) 2020-12-26 2023-02-14 Intel Corporation Fine-grained stack protection using cryptographic computing
US20210318961A1 (en) * 2021-06-23 2021-10-14 Intel Corporation Mitigating pooled memory cache miss latency with cache miss faults and transaction aborts
US12306998B2 (en) 2022-06-30 2025-05-20 Intel Corporation Stateless and low-overhead domain isolation using cryptographic computing
US12321467B2 (en) 2022-06-30 2025-06-03 Intel Corporation Cryptographic computing isolation for multi-tenancy and secure software components
US20250291602A1 (en) * 2024-03-13 2025-09-18 Nvidia Corporation Efficient execution of atomic instructions for single instruction, multiple thread (simt) architectures

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070239942A1 (en) * 2006-03-30 2007-10-11 Ravi Rajwar Transactional memory virtualization

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5239633A (en) 1989-03-24 1993-08-24 Mitsubishi Denki Kabushiki Kaisha Data processor executing memory indirect addressing and register indirect addressing
US8244990B2 (en) 2002-07-16 2012-08-14 Oracle America, Inc. Obstruction-free synchronization for shared data structures
US7418577B2 (en) * 2003-02-13 2008-08-26 Sun Microsystems, Inc. Fail instruction to support transactional program execution
US7206903B1 (en) 2004-07-20 2007-04-17 Sun Microsystems, Inc. Method and apparatus for releasing memory locations during transactional execution
US8041958B2 (en) 2006-02-14 2011-10-18 Lenovo (Singapore) Pte. Ltd. Method for preventing malicious software from execution within a computer system
US8180977B2 (en) 2006-03-30 2012-05-15 Intel Corporation Transactional memory in out-of-order processors
US20080005504A1 (en) * 2006-06-30 2008-01-03 Jesse Barnes Global overflow method for virtualized transactional memory
US8516201B2 (en) * 2006-12-05 2013-08-20 Intel Corporation Protecting private data from cache attacks
US7516365B2 (en) * 2007-07-27 2009-04-07 Sun Microsystems, Inc. System and method for split hardware transactions
US9372718B2 (en) 2008-07-28 2016-06-21 Advanced Micro Devices, Inc. Virtualizable advanced synchronization facility
US8229907B2 (en) 2009-06-30 2012-07-24 Microsoft Corporation Hardware accelerated transactional memory system with open nested transactions

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070239942A1 (en) * 2006-03-30 2007-10-11 Ravi Rajwar Transactional memory virtualization

Non-Patent Citations (4)

* Cited by examiner, † Cited by third party
Title
CSNG200400482028; 梅野英典ほか: '仮想計算機システムにおける論理プロセッサをスケジュールする新方式の開発と評価' 情報処理学会論文誌 第４４巻 第３号, 200303, ８６８-８８２頁, 社団法人情報処理学会 *
JPN5013003668; ＭＩＣＨＥＬＬＥ　Ｊ　ＭＯＲＡＶＡＮ　ｅｔ　ａｌ．: 'ＳＵＰＰＯＲＴＩＮＧ　ＮＥＳＴＥＤ　ＴＲＡＮＳＡＣＴＩＯＮＡＬ　ＭＥＭＯＲＹ　ＩＮ　ＬＯＧＴＭ' ＰＲＯＣＥＥＤＩＮＧＳ　ＯＦ　ＴＨＥ　１２ＴＨ　ＩＮＴＥＲＮＡＴＩＯＮＡＬ　ＣＯＮＦＥＲＥＮＣＥ　ＯＮ　ＡＲＣＨＩＴＥＣＴＵＲＡＬ　ＳＵＰＰＯＲＴ　ＦＯＲ　ＰＲＯＧＲＡＭＭＩＮＧ　ＬＡＮＧＵＡＧＥＳ , 20061021, Ｐａｇｅｓ１-１２, ＡＳＳＯＣＩＡＴＩＯＮ　ＦＯＲ　ＣＯＭＰＵＴＩＮＧ　ＭＡＣＨＩＮＥＲＹ *
JPN6013014756; Ｋｕｎａｌ　ＡＧＲＡＷＡＬ　ｅｔ　ａｌ．: 'Ｎｅｓｔｅｄ　Ｐａｒａｌｌｅｌｉｓｍ　ｉｎ　Ｔｒａｎｓａｃｔｉｏｎａｌ　Ｍｅｍｏｒｙ' ＴＨＥ　ＳＥＣＯＮＤ　ＡＣＭ　ＳＩＧＰＬＡＮ　ＷＯＲＫＳＨＯＰ　ＯＮ　ＴＲＡＮＳＡＣＴＩＯＮＡＬ　ＣＯＭＰＵＴＩＮＧ , 20070816, ｐａｇｅｓ１-１２ *
JPN6014033546; 梅野英典ほか: '仮想計算機システムにおける論理プロセッサをスケジュールする新方式の開発と評価' 情報処理学会論文誌 第４４巻 第３号, 200303, ８６８-８８２頁, 社団法人情報処理学会 *

Cited By (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015523651A (ja) * 2012-06-15 2015-08-13 インターナショナル・ビジネス・マシーンズ・コーポレーションＩｎｔｅｒｎａｔｉｏｎａｌ Ｂｕｓｉｎｅｓｓ Ｍａｃｈｉｎｅｓ Ｃｏｒｐｏｒａｔｉｏｎ コンピューティング環境においてマシン命令を実行するための方法、システム、およびプログラム（トランザクション開始／終了命令）
JP2015523654A (ja) * 2012-06-15 2015-08-13 インターナショナル・ビジネス・マシーンズ・コーポレーションＩｎｔｅｒｎａｔｉｏｎａｌ Ｂｕｓｉｎｅｓｓ Ｍａｃｈｉｎｅｓ Ｃｏｒｐｏｒａｔｉｏｎ 制約付きトランザクションの実行
JP2015523655A (ja) * 2012-06-15 2015-08-13 インターナショナル・ビジネス・マシーンズ・コーポレーションＩｎｔｅｒｎａｔｉｏｎａｌ Ｂｕｓｉｎｅｓｓ Ｍａｃｈｉｎｅｓ Ｃｏｒｐｏｒａｔｉｏｎ トランザクション処理における命令実行の選択的制御
JP2015523653A (ja) * 2012-06-15 2015-08-13 インターナショナル・ビジネス・マシーンズ・コーポレーションＩｎｔｅｒｎａｔｉｏｎａｌ Ｂｕｓｉｎｅｓｓ Ｍａｃｈｉｎｅｓ Ｃｏｒｐｏｒａｔｉｏｎ Ｎｏｎｔｒａｎｓａｃｔｉｏｎａｌｓｔｏｒｅ命令
JP2015525406A (ja) * 2012-06-15 2015-09-03 インターナショナル・ビジネス・マシーンズ・コーポレーションＩｎｔｅｒｎａｔｉｏｎａｌ Ｂｕｓｉｎｅｓｓ Ｍａｃｈｉｎｅｓ Ｃｏｒｐｏｒａｔｉｏｎ コンピューティング環境においてトランザクション実行に関連付けられた処理を実行するための方法、システム、およびプログラム（トランザクション実行における制限された命令）
JP2015525405A (ja) * 2012-06-15 2015-09-03 インターナショナル・ビジネス・マシーンズ・コーポレーションＩｎｔｅｒｎａｔｉｏｎａｌ Ｂｕｓｉｎｅｓｓ Ｍａｃｈｉｎｅｓ Ｃｏｒｐｏｒａｔｉｏｎ Ｔｒａｎｓａｃｔｉｏｎａｂｏｒｔ命令
JP2015525408A (ja) * 2012-06-15 2015-09-03 インターナショナル・ビジネス・マシーンズ・コーポレーションＩｎｔｅｒｎａｔｉｏｎａｌ Ｂｕｓｉｎｅｓｓ Ｍａｃｈｉｎｅｓ Ｃｏｒｐｏｒａｔｉｏｎ トランザクション処理
JP2015526790A (ja) * 2012-06-15 2015-09-10 インターナショナル・ビジネス・マシーンズ・コーポレーションＩｎｔｅｒｎａｔｉｏｎａｌ Ｂｕｓｉｎｅｓｓ Ｍａｃｈｉｎｅｓ Ｃｏｒｐｏｒａｔｉｏｎ トランザクション処理における選択されたレジスタの保存／復元
JP2015526788A (ja) * 2012-06-15 2015-09-10 インターナショナル・ビジネス・マシーンズ・コーポレーションＩｎｔｅｒｎａｔｉｏｎａｌ Ｂｕｓｉｎｅｓｓ Ｍａｃｈｉｎｅｓ Ｃｏｒｐｏｒａｔｉｏｎ トランザクション診断ブロック
JP2015527631A (ja) * 2012-06-15 2015-09-17 インターナショナル・ビジネス・マシーンズ・コーポレーションＩｎｔｅｒｎａｔｉｏｎａｌ Ｂｕｓｉｎｅｓｓ Ｍａｃｈｉｎｅｓ Ｃｏｒｐｏｒａｔｉｏｎ プロセッサ支援ファシリティ
JP2015528935A (ja) * 2012-06-15 2015-10-01 インターナショナル・ビジネス・マシーンズ・コーポレーションＩｎｔｅｒｎａｔｉｏｎａｌ Ｂｕｓｉｎｅｓｓ Ｍａｃｈｉｎｅｓ Ｃｏｒｐｏｒａｔｉｏｎ トランザクション実行内でのランダム化されたテスト
JP2017520857A (ja) * 2014-07-15 2017-07-27 エイアールエム リミテッド トランザクション・データ処理実行モードのための呼出しスタック維持
JP2017539008A (ja) * 2014-12-24 2017-12-28 インテル・コーポレーション データ投機実行のためのシステム、装置および方法
JP2018500662A (ja) * 2014-12-24 2018-01-11 インテル・コーポレーション データ投機実行のためのシステム、装置および方法
JP2020507152A (ja) * 2017-01-19 2020-03-05 インターナショナル・ビジネス・マシーンズ・コーポレーションＩｎｔｅｒｎａｔｉｏｎａｌ Ｂｕｓｉｎｅｓｓ Ｍａｃｈｉｎｅｓ Ｃｏｒｐｏｒａｔｉｏｎ トランザクション実行中の保護ストレージ・イベント処理
JP6995124B2 (ja) 2017-01-19 2022-01-14 インターナショナル・ビジネス・マシーンズ・コーポレーション トランザクション実行中の保護ストレージ・イベント処理

Also Published As

Publication number Publication date
US8407455B2 (en) 2013-03-26
EP2332043B1 (en) 2018-06-13
US20100023706A1 (en) 2010-01-28
US20100023704A1 (en) 2010-01-28
US8621183B2 (en) 2013-12-31
US20100023707A1 (en) 2010-01-28
US9372718B2 (en) 2016-06-21
KR20110044884A (ko) 2011-05-02
US20100023703A1 (en) 2010-01-28
US20100205408A1 (en) 2010-08-12
CN102144218A (zh) 2011-08-03
EP2332043A1 (en) 2011-06-15
WO2010014200A1 (en) 2010-02-04

Similar Documents

Publication Publication Date Title
US8621183B2 (en) Processor with support for nested speculative sections with different transactional modes
US8612694B2 (en) Protecting large objects within an advanced synchronization facility
JP5615384B2 (ja) ハードウエアトランザクショナルメモリにおける自動サスペンド及び再開
Jacobi et al. Transactional memory architecture and implementation for IBM System z
Bobba et al. Tokentm: Efficient execution of large transactions with hardware transactional memory
US9262173B2 (en) Critical section detection and prediction mechanism for hardware lock elision
TWI476595B (zh) 用於交易式記憶體事件處置之硬體中使用者處置器的登錄
US8914586B2 (en) TLB-walk controlled abort policy for hardware transactional memory
EP2641171B1 (en) Preventing unintended loss of transactional data in hardware transactional memory systems
US9514006B1 (en) Transaction tracking within a microprocessor
TWI801603B (zh) 處理獨佔式載入指令的資料處理設備、方法及電腦程式
US20180136966A1 (en) Dynamic releasing of cache lines
US8943278B2 (en) Protecting large regions without operating-system support
US10346196B2 (en) Techniques for enhancing progress for hardware transactional memory
Harris et al. Hardware-Supported Transactional Memory

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20120726

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20120726

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20131009

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20131023

A601 Written request for extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A601

Effective date: 20140123

A602 Written permission of extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A602

Effective date: 20140130

A601 Written request for extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A601

Effective date: 20140224

A602 Written permission of extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A602

Effective date: 20140303

A601 Written request for extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A601

Effective date: 20140320

A602 Written permission of extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A602

Effective date: 20140328

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20140423

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20140806

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20150113