JP2011249551A - Interposer substrate and electronic component mounting structure using the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an interposer substrate which does not make it difficult to transmit a high speed signal even when an interposer substrate having low specific resistance is used, which deals with miniaturization and narrowing of pitches, which reduces the manufacturing cost.SOLUTION: A wiring layer (5) is formed on one surface of an interposer substrate (1) composed of a semiconductor material. One end of a through electrode (14) is electrically connected to the wiring layer (5), and the other end reaches the other surface of the interposer substrate (1). Through holes (11) are formed on the interposer substrate (1) located under the wiring layer (5) so as to be spaced in the length direction of the wiring layer (5). An insulation material (16) is filled in the through electrode (14) and the through hole (11) to respectively dispose insulating layers (10, 13) between the interposer substrate (1) and the wiring (5) and between the through hole (11) and the insulating material (16).

Description

  The present invention relates to an interposer substrate and an electronic component mounting structure using the same.

  In recent years, demands for electronic devices that are smaller and lighter, and have higher functionality and higher performance have become increasingly intense. With the miniaturization of semiconductor process rules accompanying higher functionality of LSIs, LSI pins are becoming more multi-pin and narrower in pitch, and miniaturization is required for interposer substrates constituting semiconductor packages.

  As a method for connecting this fine interposer substrate and LSI, flip chip mounting is used in which LSI terminals are directly connected to the interposer substrate by solder balls or gold bumps.

  Conventionally, when flip-chip mounting, a substrate using a resin has been used as an interposer substrate. However, flip chip mounting requires a fine pattern equivalent to the LSI surface layer on the interposer substrate, making it difficult to follow the miniaturization of semiconductor process rules.

Therefore, attention is focused on a semiconductor package using a silicon interposer substrate as an interposer substrate for coping with further higher density.
Since silicon interposer substrates can be manufactured relatively easily by semiconductor processes like LSIs, they can cope with miniaturization, and since the thermal expansion coefficient is the same as LSIs, shape changes such as expansion and contraction due to temperature changes are the same as LSIs. Thus, a highly reliable semiconductor package can be manufactured.

  On the other hand, high-speed and high-frequency semiconductor devices are advancing rapidly, and a semiconductor package design technology corresponding to high-speed and high-frequency is required as an important technique for causing these semiconductor devices to function properly.

  Here, as a package using a silicon interposer substrate, for example, the following is proposed. Table 1 below shows the transmission loss when a high frequency signal with a frequency of 20 GHz is flowed when the specific resistance of silicon is changed in a wiring board using silicon as a core material. The specific resistance of silicon is large. As the transmission loss becomes smaller, the specific resistance of silicon is set to 10 Ωcm or more in order to suppress the transmission loss as much as possible (Patent Document 1). Alternatively, there is a technique in which the specific resistance of silicon is set to 100 Ωcm or more to further suppress transmission loss (Patent Document 2).

Japanese Patent Laid-Open No. 2005-167048 JP 2007-67335 A

However, in order to increase the specific resistance of silicon, it is necessary to implant impurity ions such as boron and phosphorus to adjust the impurity concentration. Therefore, silicon having a high specific resistance can be stably manufactured in large quantities with the same physical properties. Is very difficult to supply, and the material process costs are high.
Even when a semiconductor material such as silicon having a low specific resistance is used as an interposer substrate, the present invention can cope with miniaturization and narrow pitch without making high-speed signal transmission difficult, and can reduce manufacturing costs. An object is to provide a semiconductor package.

  The interposer substrate of the present invention includes a wiring layer formed on one surface of a substrate made of a semiconductor material, a through electrode having one end electrically connected to the wiring layer and the other end reaching the other surface of the substrate, A through-hole formed in the substrate positioned below the wiring layer at an interval in the length direction of the wiring layer and filled with an insulating material; between the substrate and the wiring layer; the through-hole and the insulating material And an insulating layer interposed therebetween.

  The electronic component mounting structure of the present invention has an interposer substrate and a semiconductor chip connected to the interposer substrate, and the interposer substrate is formed on one surface of a substrate made of a semiconductor material, and the semiconductor chip is A connected wiring layer; a through electrode that has one end electrically connected to the wiring layer and the other end reaching the other surface of the substrate; and a length of the wiring layer on the substrate located under the wiring layer It is characterized by having a through hole formed with a space and filled with an insulating material, an insulating layer interposed between the substrate and the wiring layer, and between the through hole and the insulating material.

  The interposer substrate of the present invention includes a wiring layer formed on one surface of a substrate made of a semiconductor material via an insulating layer, and a penetration formed along the wiring layer at a position near the wiring layer. It has a hole.

  The electronic component mounting structure according to the present invention includes an interposer substrate and a semiconductor chip connected to the interposer substrate, and the interposer substrate has an insulating layer interposed on one surface of the substrate made of a semiconductor material. And a through hole formed along the wiring layer at a position near the wiring layer.

  The interposer substrate of the present invention includes a wiring layer formed on one surface of a substrate made of a semiconductor material via an insulating layer, and the length of the wiring layer on the substrate located below the wiring layer. It is characterized by having through holes formed at intervals in the direction.

  The electronic component mounting structure according to the present invention includes an interposer substrate and a semiconductor chip connected to the interposer substrate, and the interposer substrate has an insulating layer interposed on one surface of the substrate made of a semiconductor material. And a through hole formed in the substrate positioned below the wiring layer at intervals in the length direction of the wiring layer.

  According to the present invention, even when a semiconductor material such as silicon is used for the substrate, it is possible to cope with miniaturization / narrow pitch and to reduce the manufacturing cost without making high-speed signal transmission difficult.

The enlarged plan view of the electronic component mounting structure concerning Embodiment 1 of this invention, and its XX sectional drawing. Plan view of interposer substrate of the same embodiment Process diagram for forming interposer substrate of the embodiment Sectional drawing which shows another specific example The enlarged plan view of the electronic component mounting structure concerning Embodiment 2 of this invention, and its YY sectional drawing Plan view of interposer substrate of the same embodiment Process diagram for forming interposer substrate of the embodiment Plan view showing another specific example Sectional drawing which shows another specific example

Hereinafter, an interposer substrate of the present invention and an electronic component mounting structure using the same will be described based on each embodiment.
(Embodiment 1)
1 to 3 show an electronic component mounting structure using an interposer substrate.

  As shown in FIGS. 1A and 1B, this electronic component mounting structure includes an interposer substrate 1 and an electronic component mounting structure 3 having a semiconductor chip 2 connected to the interposer substrate 1. It is configured to be mounted on the substrate 4.

  The semiconductor chip 2 is mounted on the wiring layer 5 on the upper surface of the interposer substrate 1 shown in FIG. The electronic component mounting structure 3 is mounted on the electrode terminal 7 on the upper surface of the interposer substrate 4 via the protruding electrode 8.

The interposer substrate 1 is made of a semiconductor material such as silicon.
The interposer substrate 1 is manufactured by the process shown in FIG.
As shown in FIG. 3A, an insulating layer 10 is formed on one side of a substrate 9 made of a semiconductor material, and a wiring layer 5 is further formed thereon. A wiring pattern for transmitting an electrical signal is formed on the wiring layer 5.

  Next, as shown in FIG. 3B, a plurality of through holes 11 are formed at predetermined positions of the substrate 9. The through hole 11 exists immediately below the wiring pattern formed by the wiring layer 5. The size of the through hole 11 is in the range of 10 μm to 100 μm in diameter. When the diameter is less than 10 μm, the area of the through hole cannot be sufficiently secured in the area immediately below the wiring pattern, so that the transmission characteristics of the wiring are deteriorated. When the diameter exceeds 100 μm, it is impossible to make a fine wiring to cope with the multi-pin and narrow pitch.

As shown in FIG. 3C, the insulating layer 12 is formed on the lower surface of the substrate 9, and the insulating layer 13 is also formed on the side wall of the through hole 11.
As shown in FIG. 3 (d), as the predetermined through hole 11, here, a through electrode 14 is formed by filling the through hole 11 at the end of the wiring layer 5 with a conductor, and the wiring layer is formed on the through electrode 14. 15 is formed. At this time, the wiring layer 5 and the wiring layer 15 are connected via the through electrode 14.

Finally, as shown in FIG. 3E, the interposer substrate 1 can be manufactured by filling the resin material 16 in the lower surface of the substrate 9 and the remaining through holes 11 to form through vias.
The wiring layer 5 is made of, for example, aluminum. However, a metal that has higher conductivity than aluminum and is difficult to oxidize, such as copper, may be used.

  In addition, the conductor filled in the through electrode 14 is formed of, for example, a copper paste or the like, but a silver paste having a high conductivity may be used. Moreover, it does not need to be completely filled, and may be formed on the side wall of the insulating layer 13 by, for example, copper plating.

  The resin material 16 is preferably a material having a low dielectric loss tangent or a material having a high specific resistance. In this embodiment, it is formed of an epoxy resin, an acrylic resin or the like, but may be a silicone resin, for example. Moreover, a polyimide resin, a phenol resin, etc. may be sufficient.

  Moreover, it is preferable to form the through holes 11 at a narrow pitch as much as possible. In this embodiment, the signal line is formed with a hole diameter of 10 μm and a pitch of 20 μm of the through holes 11 with respect to a line width of 15 μm.

  As described above, the electronic component mounting structure 3 using the interposer substrate 1 forms a signal line through the wiring layer 5, and the signal line is connected to the signal line of the semiconductor chip 2 through the protruding electrode 6. Finally, it is connected to the signal line of the interposer substrate 4 through the through electrode 14, the protruding electrode 8, and the electrode terminal 7.

  As described above, the electronic component mounting structure 3 on which the semiconductor chip 2 is flip-chip mounted is further flip-chip mounted on the resin interposer substrate 4, so that even when a silicon interposer substrate having a low specific resistance is used, high speed A small package that excels in signal transmission characteristics and supports miniaturization and narrow pitch can be manufactured at low cost.

Although the shape of the through-hole 11 was cylindrical, this may be a truncated cone as shown in FIG.
(Embodiment 2)
5 to 7 show an electronic component mounting structure using an interposer substrate.

FIG. 5A is a plan view showing the configuration of the electronic component mounting structure according to the second exemplary embodiment. FIG. 5B is a YY cross-sectional view in FIG.
In the first embodiment, the electronic component mounting structure 3 having the semiconductor material substrate 9 as the interport substrate 1 is configured to be mounted on another interposer substrate 4 via the protruding electrodes 8. The electronic component mounting structure of the form is configured by mounting the electronic component mounting structure 17 on the electrode terminal 7 of another interposer substrate 4 by wire bonds 18.

The interposer substrate 4 is made of an organic material. The interposer substrate 1 is made of a semiconductor material such as silicon.
An interposer substrate 1 made of a semiconductor material includes a wiring layer 5 formed on one surface of a substrate 9 made of a semiconductor material via an insulating layer 10 and wiring in the vicinity of the wiring layer 5 as shown in FIG. It has a through-hole 11 formed along the layer 5.

The interposer substrate 1 can be manufactured by the process of FIG.
First, as shown in FIG. 7A, a substrate 9 made of a semiconductor material and having a predetermined thickness is prepared.

Next, as shown in FIG. 7B, an insulating layer 10 having a predetermined thickness is formed on the upper surface of the substrate 9.
As shown in FIG. 7C, a wiring layer 5 having a predetermined wiring pattern is formed on the insulating layer 10.

  Finally, by forming a plurality of through holes 11 at predetermined positions on the substrate 9, the interposer substrate 1 shown in FIG. At this time, the through hole 11 is formed so as to sandwich the wiring pattern formed of the wiring layer 5 from both sides as shown in FIG.

The wiring layer 5 is made of, for example, aluminum. However, a metal that has higher conductivity than aluminum and is difficult to oxidize, such as copper, may be used.
Further, although the through hole 11 is formed at a position different from the wiring layer 5, it may be formed in the substrate 9 below the wiring layer 5 as shown in FIG. The position of the hollow through hole 11 is preferably formed as close to the wiring layer 5 as possible. Furthermore, it is preferable to increase the occupied area of the through holes in the interposer substrate 1 by increasing the number of through holes as much as possible or increasing the hole diameter.

  Thus, by forming the hollow through hole 11 in the substrate, the dielectric loss tangent of the entire interposer is lowered. Alternatively, the specific resistance of the interposer as a whole is lowered. Furthermore, since there are through vias around the signal line, it is possible to influence the electromagnetic field generated from the signal line, and even when using a silicon interposer substrate with low specific resistance, high-speed signal transmission is possible. Without making the characteristics difficult, it is possible to provide a semiconductor package that can cope with miniaturization and narrow pitch and reduce the manufacturing cost.

  Moreover, although the through-hole 11 is formed by the space | gap part as a through-opening part, you may be filled with the resin material etc. In this case, epoxy resin, acrylic resin, silicone resin, polyimide resin, phenol resin, or the like can be used as the resin.

  Moreover, although the shape of the through-hole 11 was a cylindrical shape, this may be a truncated cone shape as shown in FIG.

  The present invention is useful in various electronic devices of the present invention, particularly in the field of digital AV devices and portable electronic devices.

DESCRIPTION OF SYMBOLS 1 Interposer substrate 2 Semiconductor chip 3 Electronic component mounting structure 4 Interposer substrate 5 Wiring layer 6 Protruding electrode 7 Electrode terminal 8 Protruding electrode 9 Substrate made of semiconductor material 10 Insulating layer 11 Through hole 12, 13 Insulating layer 14 Through electrode 15 Wiring layer 16 Resin material 17 Electronic component mounting structure 18 Wire bond

Claims (7)

A wiring layer formed on one surface of a substrate made of a semiconductor material;
A through electrode having one end electrically connected to the wiring layer and the other end reaching the other surface of the substrate;
A through hole filled with an insulating material that is formed at an interval in the length direction of the wiring layer on the substrate located under the wiring layer;
An interposer substrate having an insulating layer interposed between the substrate and the wiring layer, and between the through hole and the insulating material. The insulating material is
2. The interposer substrate according to claim 1, wherein the interposer substrate is a material having a higher specific resistance than the semiconductor material, a material having a lower relative dielectric constant than the semiconductor material, or a material having a lower dielectric loss tangent than the semiconductor material. An interposer substrate and a semiconductor chip connected to the interposer substrate,
The interposer substrate is
A wiring layer formed on one surface of a substrate made of a semiconductor material and connected to the semiconductor chip;
A through electrode having one end electrically connected to the wiring layer and the other end reaching the other surface of the substrate;
A through hole filled with an insulating material that is formed at an interval in the length direction of the wiring layer on the substrate located under the wiring layer;
An electronic component mounting structure having an insulating layer interposed between a substrate and the wiring layer, and between the through hole and the insulating material. A wiring layer formed on one surface of a substrate made of a semiconductor material via an insulating layer;
An interposer substrate having a through hole formed along the wiring layer at a position near the wiring layer. An interposer substrate and a semiconductor chip connected to the interposer substrate,
The interposer substrate is
A wiring layer formed on one surface of a substrate made of a semiconductor material via an insulating layer;
An electronic component mounting structure having a through hole formed along the wiring layer at a position near the wiring layer. A wiring layer formed on one surface of a substrate made of a semiconductor material via an insulating layer;
An interposer substrate having a through-hole formed in the substrate located below the wiring layer at intervals in the length direction of the wiring layer. An interposer substrate and a semiconductor chip connected to the interposer substrate,
The interposer substrate is
A wiring layer formed on one surface of a substrate made of a semiconductor material via an insulating layer;
An electronic component mounting structure having a through-hole formed in the substrate located below the wiring layer at intervals in the length direction of the wiring layer.

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