JP2011247847A - Displacement detection device and pre-amplifier - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a detection output which is in proportion to the displacement of a movable section even in case of using any of a capacitor for displacement detection whose capacity is in proportion to the displacement of the movable section and a capacitor for displacement detection whose capacity is in inverse proportion to the displacement of the movable section.SOLUTION: This pre-amplifier is provided with: a clock amplification means 3a for amplifying a first clock signal and an amplification modulation signal fed back from an operation amplifier Q1, and for outputting a first output signal, and for amplifying a second clock signal and the amplification modulation signal, and for outputting a second output signal; a capacitor C1 to which the first output signal is supplied; a capacitor C2 to which the second output signal is supplied; and an operation amplifier Q1 whose inverting input terminal is connected to a first capacitor and a second capacitor, and whose non-inverting input terminal is connected to a ground potential, and whose output terminal is connected to the input of the clock amplification means.

Description

  The present invention relates to a displacement detection device using a displacement detection capacitor and a preamplifier.

  In a mechanical system composed of a fixed part and a movable part, as a method for detecting the relative position or displacement, electrodes are arranged on the fixed part and the movable part, respectively, and the capacitance or the change in capacitance between them is arranged. The method of measuring is taken.

  FIG. 10 shows a schematic diagram of this structure. In FIG. 10A, the movable electrode C is provided in the movable part that moves in the left-right direction, and the fixed electrode A and the fixed electrode B are provided in the fixed part that does not move. A displacement detection capacitor C1 is formed by the fixed electrode A and the movable electrode C, and a displacement detection capacitor C2 is formed by the fixed electrode B and the movable electrode C. The opposing area between the electrode A and the electrode C and the opposing area between the electrode B and the electrode C change according to the lateral displacement of the movable part, and the capacitance of one of the capacitors C1 and C2 increases. Operates to reduce capacitance. Since the opposing area of the electrodes is proportional to the displacement of the movable part, the change in the capacitance of the capacitors C1 and C2 linearly changes (proportional) to the displacement of the movable part.

  In FIG. 10B, the movable electrode C is provided in the movable part that moves in the left-right direction, and the fixed electrode A and the fixed electrode B are provided in the fixed part that does not move. A displacement detection capacitor C1 is formed by the fixed electrode A and the movable electrode C, and a displacement detection capacitor C2 is formed by the fixed electrode B and the movable electrode C. The distance between the electrode A and the electrode C and the distance between the electrode B and the electrode C are changed according to the lateral displacement of the movable part, and the capacitance of one of the capacitors C1 and C2 is increased. The other capacitance operates to decrease. Since the electrostatic capacity is inversely proportional to the distance between the electrodes, the electrostatic capacity of the capacitors C1 and C2 is not a linear change with respect to the displacement of the movable part, but a hyperbolic change.

  FIG. 10 shows a case where the movable part is linearly displaced. However, in order to measure the rotation angle of the rotating system in which the movable part rotates, a counter area changing type or distance changing type capacitor is used. Can be generated.

  In order to measure the displacement amount or the displacement angle, a lock-in amplifier type measurement circuit as shown in FIG. 11 is generally used. In this circuit, the preamplifier is supplied with clock signals es, es (−) having a frequency (for example, several tens of kHz or more) sufficiently higher than the frequency of the displacement to be measured (for example, several hundred Hz or less). An amplitude modulation signal proportional to the displacement is generated and output from the clock signal. The multiplier multiplies the amplitude modulation signal and the clock signal es to generate an output voltage proportional to the amount of displacement.

  Although a sine wave is used for the clock signal of this circuit, it is relatively difficult to generate a sine wave with an analog circuit. In addition, it is not easy to implement the multiplier with an analog circuit.

FIG. 12 is a circuit diagram showing an example of a preamplifier applied to FIG. According to this preamplifier, an output proportional to the difference between the capacitances of the capacitors C1 and C2 can be generated as in the following equation.

ここで、εoは真空の誘電率、Ａは電極の面積（つまり、固定電極Ａ又はＢが、可動電極Ｃと完全に対向する際の対向面積）、doは固定電極Ａ又はＢと可動電極Ｃとの間の距離、ｙoは基準位置（中央位置）からの最大変位（つまり、固定電極Ａ又はＢが、可動電極Ｃと完全に対向する際の可動部分の変位量）、yは基準位置からの可動部分の変位量である。 When the capacitors C1 and C2 are linear with respect to the displacement of the movable part as shown in FIG. 10A, the capacitances of the capacitors C1 and C2 can be expressed by the following equation.

Here, εo is the dielectric constant of vacuum, A is the area of the electrode (that is, the facing area when the fixed electrode A or B completely faces the movable electrode C), and do is the fixed electrode A or B and the movable electrode C. , Is the maximum displacement from the reference position (center position) (that is, the amount of displacement of the movable part when the fixed electrode A or B completely faces the movable electrode C), and y is the distance from the reference position The amount of displacement of the movable part.

Substituting this equation into the above Vo equation yields:

従って、Ｋｏは変数ｙを含まず、定数のみを含むので、線形な変位出力を得ることができることが分かる。 Accordingly, the sensitivity (change amount of the output voltage with respect to the unit displacement amount) Ko is expressed by the following equation.

Therefore, Ko does not include the variable y but includes only a constant, so that it can be understood that a linear displacement output can be obtained.

On the other hand, in FIG. 10B, the capacitances of the capacitors C1 and C2 are expressed by the following equation.

Therefore, C1-C2 and Vo are as follows.

従って、Ｋｏは変数ｙを含むので、変位量に対して出力電圧は非線形となり、図１０（ｂ）においては図１２の回路を適用できないことが分かる。 Therefore, the sensitivity Ko is as follows.

Therefore, since Ko includes the variable y, the output voltage becomes nonlinear with respect to the displacement, and it can be seen that the circuit of FIG. 12 cannot be applied in FIG. 10B.

A circuit shown in FIG. 13 can be considered as a preamplifier to which either of the displacement detecting capacitors shown in FIGS. 10A and 10B can be applied. Here, the capacitor Co represents the input capacitance of the operational amplifier and the stray capacitance component of the wiring, not the actual capacitor. The output voltage Vo in this circuit is as follows.

Ｖｏは次式に変形される。

Here, in the following frequency region,

Vo is transformed into the following equation.

Here, considering the case of Co = 0, it is further transformed into the following equation.

従って、Ｋｏは変数ｙを含まず、定数のみを含むので、線形な変位出力を得ることができることが分かる。 Therefore, the output voltage is proportional to (capacitance difference between capacitors C1 and C2 / capacitance sum of capacitors C1 and C2). At this time, when the capacitances of the capacitors C1 and C2 are defined in the same manner as described above, the sensitivity Ko is as follows in both cases of FIGS. 10 (a) and 10 (b).

Therefore, Ko does not include the variable y but includes only a constant, so that it can be understood that a linear displacement output can be obtained.

However, since the capacitance Co actually exists, the operation is as follows. That is, in FIG. 10A, the sensitivity Ko is expressed by the following equation, and although there is a decrease in sensitivity, the sensitivity Ko does not include the variable y and the linearity is maintained.

On the other hand, in FIG. 10B, the following equation is obtained, and the sensitivity Ko includes the variable y and becomes a non-linear response.

  In order to prevent this, wiring using a guard is performed as shown in FIG. 14 in order to reduce the influence of Co as much as possible. The guard is a wiring for preventing current from flowing through Co. However, because the capacitors C1 and C2 are connected to the non-inverting input terminal of the operational amplifier, the guard potential is not a ground potential but an amplitude-modulated high-frequency signal. There is a risk of jumping into the circuit and causing other circuits to malfunction. In order to prevent this, it is necessary to provide a shield on the outer side of the guard, and special wiring is required. Even if a guard is used, an operational amplifier used as an amplifier usually has a protective diode between the input terminal and the internal positive / negative power supply. Since the (No. 3 pin) and the negative power input terminal (No. 4 pin) are adjacent to each other and no guard can be provided between them, the influence of Co cannot be completely eliminated.

JP 2009-222654 A

  SUMMARY OF THE INVENTION The present invention has been made to solve the above-described conventional problems, and its purpose is to provide a displacement detection capacitor whose capacity is proportional to the displacement of the movable part, and for displacement detection whose capacity is not proportional to the displacement of the movable part. It is an object of the present invention to provide a displacement detection device capable of obtaining a detection output proportional to the displacement of a movable part, regardless of which capacitor is used.

  A displacement detection apparatus according to a preferred embodiment of the present invention supplies a first clock signal, a second clock signal whose phase is inverted with respect to the first clock signal, and an amplitude modulation signal output from a first operational amplifier. Amplifying the signal based on the first clock signal and the amplitude modulation signal to output a first output signal, and amplifying the signal based on the second clock signal and the amplitude modulation signal to generate a second output signal A first amplifier to which the first output signal from the clock amplifier is supplied to the first electrode, a second electrode connected to the second electrode of the first capacitor, and the clock A second capacitor to which the second output signal from the amplification means is supplied to the first electrode, and an inverting input terminal is the second electrode of the first capacitor and the second electrode of the second capacitor. And a first operational amplifier having a non-inverting input terminal connected to a ground potential and an output terminal connected to an input of the clock amplifying means, and a capacitance of the first capacitor and a capacitance of the second capacitor, A preamplifier circuit that outputs the amplitude modulation signal from the first operational amplifier in proportion to a value obtained by dividing the difference by the sum of the capacitance of the first capacitor and the capacitance of the second capacitor; A third output signal that is supplied and is the amplitude modulation signal during a period in which one of the first clock signal and the second clock signal is greater than a predetermined value and is at a ground potential in the other period; A difference between the other of the clock signal and the second clock signal is the amplitude modulation signal in a period larger than a predetermined value, and a fourth output signal which is a ground potential in the other period; It comprises; a synchronous detection circuit for outputting a low frequency component.

  According to this embodiment, even when using either a displacement detection capacitor whose capacity is proportional to the displacement of the movable part or a displacement detection capacitor whose capacity is not proportional to the displacement of the movable part, the detection is proportional to the displacement of the movable part. A displacement detection device capable of obtaining an output can be provided.

  In a preferred embodiment, the clock amplification means includes first to eighth resistors, a second operational amplifier, and a third operational amplifier, and a non-inverting input terminal of the second operational amplifier is connected to the first operational resistor via the first resistor. A first clock signal is supplied and is connected to the output terminal of the first operational amplifier via the second resistor, and the inverting input terminal of the second operational amplifier is the output of the second operational amplifier via the third resistor. And the output terminal of the second operational amplifier is connected to the first electrode of the first capacitor, and the non-inverting input of the third operational amplifier is connected to the terminal of the third operational amplifier. The terminal is supplied with the second clock signal via the fifth resistor, and is connected to the output terminal of the first operational amplifier via the sixth resistor. The inverting input terminal of the third operational amplifier The third resistor is connected to the output terminal of the third operational amplifier via the seventh resistor, and is connected to the fourth resistor via the eighth resistor. The output terminal of the third operational amplifier is connected to the first capacitor of the second capacitor. Connected to the electrode.

  The preamplifier has the circuit configuration so that the difference between the capacity of the first capacitor and the capacity of the second capacitor is divided by the sum of the capacity of the first capacitor and the capacity of the second capacitor. The amplitude modulation signal proportional to the measured value can be output from the first operational amplifier.

  In a preferred embodiment, the clock amplification means includes a first resistor, a second resistor, a fifth resistor, a sixth resistor, a second operational amplifier, and a third operational amplifier. An inverting input terminal is supplied with the first clock signal through the first resistor and is connected to an output terminal of the first operational amplifier through the second resistor, and an output terminal of the second operational amplifier is connected to the first operational amplifier. An inverting input terminal of the second operational amplifier and a first electrode of the first capacitor; a non-inverting input terminal of the third operational amplifier is supplied with the second clock signal via the fifth resistor; and 6 is connected to the output terminal of the first operational amplifier via a resistor, and the output terminal of the third operational amplifier is connected to the inverting input terminal of the third operational amplifier and the first electrode of the second capacitor.

  The preamplifier has the circuit configuration so that the difference between the capacity of the first capacitor and the capacity of the second capacitor is divided by the sum of the capacity of the first capacitor and the capacity of the second capacitor. The amplitude modulation signal proportional to the measured value can be output from the first operational amplifier.

  In a preferred embodiment, a third capacitor is connected in parallel with the second resistor, and a fourth capacitor is connected in parallel with the sixth resistor.

  In the present embodiment, the rising responsiveness of the first clock signal and the second clock signal can be improved.

  In a preferred embodiment, the synchronous detection circuit includes ninth to twelfth resistors, fifth and sixth capacitors, a fourth operational amplifier, a first analog switch, and a second analog switch. A non-inverting input terminal of an operational amplifier is connected to the first analog switch via the ninth resistor, connected to a ground potential via the tenth resistor, and connected to a ground potential via the fifth capacitor; An inverting input terminal of the fourth operational amplifier is connected to the second analog switch via the eleventh resistor, is connected to an output terminal of the fourth operational amplifier via the twelfth resistor, and passes through the sixth capacitor. Connected to the output terminal of the fourth operational amplifier, and the first analog switch has one of the first clock signal and the second clock signal larger than a predetermined value. In the period, the ninth resistor is connected to the output of the preamplifier, and in the other period, the ninth resistor is connected to the ground potential, and the second analog switch is connected to the first clock signal and the second clock. The eleventh resistor is connected to the output of the preamplifier during a period when the other of the signals is greater than a predetermined value, and the eleventh resistor is connected to the ground potential during the other period.

  In this embodiment, it is not necessary to use an analog multiplier unlike the background art, and a detection signal can be output using an inexpensive analog switch.

  Whether using a displacement detection capacitor whose capacity is proportional to the displacement of the movable part or a displacement detection capacitor whose capacity is not proportional to the displacement of the movable part, a detection output proportional to the displacement of the movable part can be obtained. A displacement detection device can be provided.

It is a circuit block diagram which shows the displacement detection apparatus 1 by preferable embodiment of this invention. 4 is a timing chart showing the displacement of a movable part of a displacement detection capacitor and the voltage waveform of each part of the displacement detection device 1; 2 is a circuit diagram of a preamplifier 3 according to a preferred embodiment of the present invention. FIG. It is a circuit diagram which shows a shield wiring about the preamplifier 3 of FIG. It is a circuit diagram of the synchronous detection circuit 4 by preferable embodiment of this invention. FIG. 4 is a circuit diagram of a preamplifier 31 according to another preferred embodiment of the present invention. FIG. 4 is a circuit diagram of a preamplifier 32 according to another preferred embodiment of the present invention. It is a timing chart which shows the voltage waveform of each part of the displacement detection apparatus 1, and shows the 1st, 2nd clock signal for masking the settling time which arises in Vo, and a settling time. It is a circuit diagram which shows the clock shaping circuit for masking settling time. It is a figure which shows the structure of the capacitors C1 and C2 for a displacement detection. It is a circuit block diagram which shows the displacement detection apparatus by background art. It is a circuit block diagram which shows the preamplifier by background art. It is a circuit block diagram which shows the preamplifier by background art. It is a circuit block diagram which shows the preamplifier by background art.

  Hereinafter, although the displacement detection apparatus by preferable embodiment of this invention is demonstrated concretely with reference to drawings, this invention is not limited to these embodiment.

  FIG. 1 is a block diagram showing a displacement detection device 1 of the present embodiment. The displacement detection device 1 includes a clock generation circuit 2, a preamplifier 3, and a synchronous detection circuit 4. FIG. 2 is a timing chart showing waveforms of respective parts of the displacement detection device 1.

  The clock generation circuit 2 generates a first clock signal eclk shown in FIG. 2C and a second clock signal eclk (−) whose phase is inverted with respect to the first clock signal eclk. And supplied to the synchronous detection circuit 4. The clock generation circuit 2 may be provided outside the displacement detection device 1.

  The preamplifier 3 uses displacement detection capacitors C1 and C2 as shown in FIG. 10, and amplitude-modulates the first clock signal eclk and the second clock signal eclk (−) supplied from the clock generation circuit 2. The amplitude modulation signal is supplied to the synchronous detection circuit 4. That is, for the displacement y (displacement from the reference position of the movable part in FIG. 10) as shown in FIG. 2A, the preamplifier 3 generates the amplitude modulation signal Vo as shown in FIG. Output.

  FIG. 3 is a circuit diagram showing the preamplifier 3. Preamplifier 3 includes clock amplification means 3a, displacement detection capacitors C1 and C2, and operational amplifier Q1. The clock amplifying means 3a is supplied with the first clock signal and the second clock signal, non-inverting amplifies the first clock signal, supplies it to the fixed electrode of the capacitor C1, and amplifies the second clock signal by non-inverting amplification. Supply to the fixed electrode of the capacitor C2.

  Specifically, the amplitude modulation signal Vo, which is the output signal of the operational amplifier Q1, is fed back to the signal input terminal of the clock amplification means 3a, and the signal input to the clock amplification means 3a changes according to the amplitude modulation signal Vo. It is like that. That is, the clock amplifying unit 3a amplifies the signal based on the first clock signal and the amplitude modulation signal and outputs an output signal, and amplifies the signal based on the second clock signal and the amplitude modulation signal and outputs the output signal. To do. As will be described in detail later, by feeding back the output signal of the operational amplifier Q1 to the clock amplification means 3a, the movable electrodes of the capacitors C1 and C2 are connected to the inverting input terminal of the operational amplifier Q1, and the input capacitance of the operational amplifier and the floating capacitance component of the wiring Regardless of whether or not a displacement detection capacitor whose capacity is proportional to the displacement of the movable part and a displacement detection capacitor whose capacity is not proportional to the displacement of the movable part is used. A detection output proportional to the displacement of the movable part can be obtained.

  The clock amplification means 3a includes operational amplifiers Q2 and Q3 and resistors R1a, R1b, R2a, R2b, R3a, R3b, R4a, and R4b. The resistance values of R1a and R1b are both R1, the resistance values of R2a and R2b are both R2, the resistance values of R3a and R3b are both R3, and the resistance values of R4a and R4b are both R4. is there.

  The non-inverting input terminal (+ terminal) of the operational amplifier Q2 is supplied with the first clock signal via the resistor R1a, and is connected to the resistor R2b and the output terminal of the operational amplifier Q1 via the resistor R2a. The inverting input terminal (− terminal) of the operational amplifier Q2 is connected to the output terminal of the operational amplifier Q2 through the resistor R3a, and is connected to the resistor R4b through the resistor R4a. The output terminal of the operational amplifier Q2 is connected to the fixed electrode A of the capacitor C1. Therefore, the operational amplifier Q2 is supplied with the first clock signal and the output signal Vo of the operational amplifier Q1 at the non-inverting input terminal, and non-inverts and amplifies these signals and supplies them to the capacitor C1.

  The non-inverting input terminal (+ terminal) of the operational amplifier Q3 is supplied with the second clock signal via the resistor R1b, and is connected to the resistor R2a and the output terminal of the operational amplifier Q1 via the resistor R2b. The inverting input terminal (− terminal) of the operational amplifier Q3 is connected to the output terminal of the operational amplifier Q3 through the resistor R3b, and is connected to the resistor R4a through the resistor R4b. The output terminal of the operational amplifier Q3 is connected to the fixed electrode B of the capacitor C2. Therefore, the operational amplifier Q3 is supplied with the second clock signal and the output signal Vo of the operational amplifier Q1 at the non-inverting input terminal, non-inverted and amplifies these signals, and supplies them to the capacitor C2.

  As the displacement detection capacitors C1 and C2, those shown in FIG. 10A or 10B are employed, and the detailed configuration is as described in the background art. In other words, the displacement detection capacitor has a fixed portion and a movable portion that is displaced with respect to the fixed portion. The fixed portion includes a fixed electrode A and a fixed electrode B, and the movable portion includes a movable electrode C at a portion facing the fixed electrode A and the fixed electrode B. The fixed electrode A and the movable electrode C constitute a capacitor C1, and the fixed electrode B and the movable electrode C constitute a capacitor C2. When the capacitance of one of the capacitors C1 and C2 increases, the other capacitance decreases. The fixed portion and the movable portion may be reversed. In this case, the electrodes A and B are movable electrodes, and the electrode C is a fixed electrode. FIG. 10A is a displacement detection capacitor whose capacitance is proportional to the displacement of the movable part, and FIG. 10B is a displacement detection capacitor whose capacitance is not proportional to the displacement of the movable part.

  The movable electrode C of the capacitor C1 and the movable electrode C of the capacitor C2 are connected. The inverting input terminal (− terminal) of the operational amplifier Q1 is connected to the movable electrode C of the capacitors C1 and C2, and is connected to the output terminal of the operational amplifier Q1 through the resistor Rz. The non-inverting input terminal (+ terminal) of the operational amplifier Q1 is connected to the ground potential. The output terminal of the operational amplifier Q1 is connected to the non-inverting input terminal of the operational amplifier Q2 through the resistor R2a, and is connected to the non-inverting input terminal of the operational amplifier Q3 through the resistor R2b. With this connection configuration, the capacitors C1 and C2, the operational amplifier Q1, and the resistor Rz constitute a differentiation circuit. As will be described in detail later, the operational amplifier Q1 has an amplitude modulation signal Vo (FIG. 2) proportional to a value obtained by dividing the difference between the capacitance of the capacitor C1 and the capacitance of the capacitor C2 by the sum of the capacitance of the capacitor C1 and the capacitance of the capacitor C2. (B)) is output.

  The movable electrode C of the capacitor C1 and the movable electrode C of the capacitor C2 are connected to the inverting input terminal of the operational amplifier Q1 and operate as a virtual ground. That is, since the non-inverting input terminal of the operational amplifier Q1 is connected to the ground potential and the potential difference between the inverting input terminal and the non-inverting input terminal of the operational amplifier Q1 is 0, the operational amplifier Q1 is connected to the inverting input terminal of the operational amplifier Q1. The signal line can be regarded as being substantially connected to the ground potential. Therefore, even when the input capacitance of the operational amplifier and the stray capacitance component of the wiring as shown by Co in FIG. 13 are present in the preamplifier 3 of FIG. 3, the signal line connected to the inverting input terminal of the operational amplifier Q1. Is a virtual ground, no current flows through Co, and the influence of Co can be ignored in calculating Vo below. Therefore, according to the preamplifier 3 of FIG. 3, no guard is required, and as shown in FIG. 4, wiring can be performed using only a simple shield line in order to prevent malfunction of other circuits.

  Returning to FIG. 1, the synchronous detection circuit 4 is supplied with the amplitude modulation signal Vo from the preamplifier 3, is supplied with the first clock signal and the second clock signal from the clock generation circuit 2, and receives the amplitude modulation signal Vo as the first. Both-wave synchronous detection is executed using the clock signal and the second clock signal. That is, the amplitude modulation signal Vo is a period during which one of the first clock signal and the second clock signal is larger than a predetermined value (period in which the voltage is positive (high level)), and is the ground potential during the other period. The amplitude output signal Vo is a period during which the other one of the first output and the first clock signal and the second clock signal is greater than a predetermined value (a period in which the voltage is positive (high level)), and the ground potential in other periods. By taking the difference from the second output, a two-wave synchronous detection signal is obtained.

  By using the synchronous detection circuit 4, it is not necessary to use a multiplier as shown in FIG. The synchronous detection circuit 4 outputs a detection signal Vd as shown in FIG. 2 (e) by extracting only a low frequency component from the double-wave synchronous detection signal by the LPF. The effect that the 1 / f noise generated in the preamplifier 3 is canceled by taking the difference between the first output and the second output by the synchronous detection circuit 4 performing both-wave synchronous detection instead of single-wave synchronous detection. There is.

  FIG. 5 is a circuit diagram showing the synchronous detection circuit 4. The synchronous detection circuit 4 includes an operational amplifier Q4, resistors R5a, R5b, R6a, R6b, capacitors C3a, C3b, and switches SW1, SW2. R5a and R5b have the same resistance value, R6a and R6b have the same resistance value, and C3a and C3b have the same capacitance. Since switches SW1 and SW2 can use inexpensive analog switches, they contribute to cost reduction.

  The non-inverting input terminal (+ terminal) of the operational amplifier Q4 is connected to the switch SW1 via the resistor R5a, connected to the ground potential via the resistor R6a, and connected to the ground potential via the capacitor C3a. The inverting input terminal (− terminal) of the operational amplifier Q4 is connected to the switch SW2 through the resistor R5b, is connected to the output terminal of the operational amplifier Q4 through the resistor R6b, and is connected to the output terminal of the operational amplifier Q4 through the capacitor C3b. ing.

  The switch SW1 is controlled by the second clock signal. The switch SW1 connects the resistor R5a to the output of the preamplifier 3 and supplies the amplitude modulation signal Vo to the resistor R5a while the second clock signal is positive. On the other hand, the switch SW1 connects the resistor R5a to the ground potential and does not supply the amplitude modulation signal Vo to the resistor R5a during the negative period of the second clock signal. (Note that the switch SW1 is controlled by the first clock signal, the resistor R5a is connected to the output of the preamplifier 3 when the first clock signal is negative, and the resistor R5a is connected when the first clock signal is positive. (It may be connected to ground potential.)

  The switch SW2 is controlled by the first clock signal. The switch SW2 connects the resistor R5b to the output of the preamplifier 3 and supplies the amplitude modulation signal Vo to the resistor R5b while the first clock signal is positive. On the other hand, the switch SW2 connects the resistor R5b to the ground potential while the first clock signal is negative, and does not supply the amplitude modulation signal Vo to the resistor R5b. (Note that the switch SW2 is controlled by the second clock signal, the resistor R5b is connected to the output of the preamplifier 3 when the second clock signal is negative, and the resistor R5b is connected when the second clock signal is positive. (It may be connected to ground potential.)

  The operational amplifier Q4, resistors R5a, R5b, R6a, R6b, and capacitors C3a, C3b constitute a differential LPF (low-pass filter), and a signal supplied to the resistor R5a via the switch SW1 passes through the switch SW2. The detection signal Vd is output by subtracting and amplifying the signal supplied to the resistor R5b and extracting only the low frequency component.

Hereinafter, according to the displacement detection device 1 (preamplifier 3) of the present embodiment, even when any of the displacement detection capacitors C1 and C2 in FIG. 10A or 10B is used, it is proportional to the displacement of the movable part. It will be explained that the output signal obtained is obtained. The voltages V1 to V4 and the amplitude modulation signal Vo at each node of the preamplifier 3 in FIG. 3 are expressed by the following equations.

When Vo is obtained from the above equation, the following equation is obtained.

Here, the clock frequency is selected so as to satisfy the following equation.

Then, Vo is transformed into the following equation.

  Since the resistors R1 to R4 are constants, Vo is proportional to (capacitance difference between capacitors C1 and C2 / capacitance sum of capacitors C1 and C2) as in the case described with Co = 0 in FIG. . Therefore, the sensitivity K0 does not include the variable y. As a result, an output signal proportional to the displacement of the movable part can be obtained by using either the displacement detection capacitor in FIG. 10A or the displacement detection capacitor in FIG.

FIG. 6 is a circuit diagram illustrating a preamplifier 31 according to another embodiment. This is a circuit in which R3 = 0 and R4 = ∞ in the above formula. That is, the inverting input terminal of the operational amplifier Q2 is connected to the output terminal of the operational amplifier Q2, and the inverting input terminal of the operational amplifier Q3 is connected to the output terminal of the operational amplifier Q3. Here, if R1a = R1b = R2a = R2b, V0 is represented by the following equation.

Similar to the above, when Ko is calculated, the following equation is obtained.

  Therefore, the sensitivity K0 does not include the variable y. As a result, an output signal proportional to the displacement of the movable part can be obtained by using either the displacement detection capacitor in FIG. 10A or the displacement detection capacitor in FIG.

  FIG. 7 is a circuit diagram showing a preamplifier 32 according to still another preferred embodiment, which is a circuit in which rising responsiveness of the first clock signal and the second clock signal is improved as compared with FIG. In the preamplifier 32, capacitors C4a and C4b are added, the capacitor C4a is connected in parallel to the resistor R2a, and the capacitor C4b is connected in parallel to the resistor R2b. Capacitors C4a and C4b have the same capacity. Capacitors C4a and C4b function as LPFs for the first clock signal and the second clock signal, and function to delay the rising edges of the first clock signal and the second clock signal. The capacitors C4a and C4b function as an HPF (High Pass Filter) for the amplitude modulation signal Vo fed back from the output terminal of the operational amplifier Q1, and play a role of speeding up. The capacitors C4a and C4b may be provided in the preamplifier 3 shown in FIG.

  In each of the preamplifiers described above, since the output of the operational amplifier Q1 is fed back to the input of the clock amplification means 3a, a certain settling time is required for the rectangular wave response. The voltage within the settling time gives an error to the final output. Therefore, in the synchronous detection circuit 4, it is preferable in terms of accuracy to mask the settling period as shown in FIG. For this purpose, it is necessary to delay the rise of the first clock signal and the second clock signal used in the synchronous detection circuit 4 by the settling time (however, the fall is not delayed). FIG. 9 shows an embodiment of a clock shaping circuit for this purpose, and is provided in the preceding stage of the synchronous detection circuit 4. In FIG. 9, this is realized by changing the charge / discharge time constant of the capacitor Cd. However, the circuit is not limited to the circuit of FIG. 9 as long as similar pulse shaping can be realized.

As described above, according to the present embodiment, the following effects can be obtained.
(1) By using the synchronous detection circuit 4, an inexpensive analog switch can be used. There is no need to use an analog multiplier.
(2) The displacement detection capacitors C1 and C2 are connected to the inverting input terminal of the operational amplifier Q1, and the non-inverting input terminal is connected to the ground potential. Therefore, since no current flows through the capacitor corresponding to Co in FIG. 13, the influence of Co can be ignored. The output of the operational amplifier Q1 is proportional to (C1−C2) / (C1 + C2) by feeding back the output of the operational amplifier Q1 to the inputs of the operational amplifiers Q2 and Q3. Therefore, even when using either a displacement detection capacitor whose capacity is proportional to the displacement of the movable part or a displacement detection capacitor whose capacity is not proportional to the displacement of the movable part, a detection output proportional to the displacement of the movable part is obtained. Can do.
(3) Since the influence of Co can be ignored, there is no need to provide special and complicated wiring such as a guard as shown in FIG. 14 or a shield further covering the guard.
(4) According to the preamplifier 3 and the synchronous detection circuit 4, the clock signal can use not only a sine wave but also a rectangular wave. Accordingly, since the clock generation circuit 2 only needs to generate a rectangular wave clock signal, it can be configured inexpensively and easily.

  As mentioned above, although preferable embodiment of this invention was described, this invention is not limited to these embodiment. You may provide with the form of the preamplifier applied to said displacement detection apparatus, or a synchronous detection circuit.

  The present invention can be suitably employed in a displacement detection device.

DESCRIPTION OF SYMBOLS 1 Displacement detection apparatus 2 Clock generation circuit 3 Preamplifier 3a Clock amplification means 4 Synchronous detection circuit Q1 Operational amplifier

Claims (6)

A first clock signal, a second clock signal whose phase is inverted with respect to the first clock signal, and an amplitude modulation signal output from the first operational amplifier are supplied, and the first clock signal and the amplitude modulation signal are supplied. A clock amplifying means for amplifying a signal based on the second clock signal and outputting a first output signal and amplifying the signal based on the second clock signal and the amplitude modulation signal and outputting a second output signal;
A first capacitor to which the first output signal from the clock amplification means is supplied to a first electrode;
A second capacitor having a second electrode connected to the second electrode of the first capacitor and the second output signal from the clock amplification means being supplied to the first electrode;
The inverting input terminal is connected to the second electrode of the first capacitor and the second electrode of the second capacitor, the non-inverting input terminal is connected to the ground potential, and the output terminal is connected to the input of the clock amplification means. Including the first operational amplifier;
The amplitude operational signal is proportional to a value obtained by dividing the difference between the capacitance of the first capacitor and the capacitance of the second capacitor by the sum of the capacitance of the first capacitor and the capacitance of the second capacitor. A preamplifier circuit which outputs from
A third output signal which is supplied with the amplitude modulation signal and is the amplitude modulation signal when one of the first clock signal and the second clock signal is larger than a predetermined value and is at the ground potential during the other period; And the fourth output signal that is the amplitude modulation signal during a period when the other of the first clock signal and the second clock signal is larger than a predetermined value and is the ground potential during the other period. A displacement detection apparatus comprising: a synchronous detection circuit that outputs the low-frequency component. The clock amplification means includes first to eighth resistors, a second operational amplifier, and a third operational amplifier,
The non-inverting input terminal of the second operational amplifier is supplied with the first clock signal via the first resistor, and is connected to the output terminal of the first operational amplifier via the second resistor. Is connected to the output terminal of the second operational amplifier through the third resistor, and is connected to the eighth resistor through the fourth resistor. The output terminal of the second operational amplifier is connected to the second operational amplifier. Connected to the first electrode of one capacitor,
The non-inverting input terminal of the third operational amplifier is supplied with the second clock signal via the fifth resistor and connected to the output terminal of the first operational amplifier via the sixth resistor. Is connected to the output terminal of the third operational amplifier through the seventh resistor, and is connected to the fourth resistor through the eighth resistor. The output terminal of the third operational amplifier is connected to the third operational amplifier. The displacement detection device according to claim 1, wherein the displacement detection device is connected to a first electrode of two capacitors. The clock amplification means includes a first resistor, a second resistor, a fifth resistor, a sixth resistor, a second operational amplifier, and a third operational amplifier,
The non-inverting input terminal of the second operational amplifier is supplied with the first clock signal via the first resistor, and is connected to the output terminal of the first operational amplifier via the second resistor. Are connected to the inverting input terminal of the second operational amplifier and the first electrode of the first capacitor,
The non-inverting input terminal of the third operational amplifier is supplied with the second clock signal via the fifth resistor and connected to the output terminal of the first operational amplifier via the sixth resistor. The displacement detection device according to claim 1, wherein an output terminal of the second operational amplifier is connected to an inverting input terminal of the third operational amplifier and a first electrode of the second capacitor. A third capacitor is connected in parallel with the second resistor;
The displacement detection device according to claim 2 or 3, wherein a fourth capacitor is connected in parallel to the sixth resistor. The synchronous detection circuit includes ninth to twelfth resistors, fifth and sixth capacitors, a fourth operational amplifier, a first analog switch, and a second analog switch;
The non-inverting input terminal of the fourth operational amplifier is connected to the first analog switch via the ninth resistor, connected to the ground potential via the tenth resistor, and is connected to the ground potential via the fifth capacitor. And an inverting input terminal of the fourth operational amplifier is connected to the second analog switch via the eleventh resistor, connected to an output terminal of the fourth operational amplifier via the twelfth resistor, Connected to the output terminal of the fourth operational amplifier via a capacitor;
The first analog switch connects the ninth resistor to the output of the preamplifier during a period in which one of the first clock signal and the second clock signal is greater than a predetermined value, and during the period during which the first analog switch does not. Connect the ninth resistor to the ground potential;
The second analog switch connects the eleventh resistor to the output of the preamplifier during a period when the other of the first clock signal and the second clock signal is greater than a predetermined value, and during the period when the other is not The displacement detection device according to claim 1, wherein the eleventh resistor is connected to a ground potential. A first clock signal, a second clock signal whose phase is inverted with respect to the first clock signal, and an amplitude modulation signal output from the first operational amplifier are supplied, and the first clock signal and the amplitude modulation signal are supplied. A clock amplifying means for amplifying a signal based on the second clock signal and outputting a first output signal and amplifying the signal based on the second clock signal and the amplitude modulation signal and outputting a second output signal;
A first capacitor to which the first output signal from the clock amplification means is supplied to a first electrode;
A second capacitor having a second electrode connected to the second electrode of the first capacitor and the second output signal from the clock amplification means being supplied to the first electrode;
The inverting input terminal is connected to the second electrode of the first capacitor and the second electrode of the second capacitor, the non-inverting input terminal is connected to the ground potential, and the output terminal is connected to the input of the clock amplification means. Including the first operational amplifier;
The amplitude operational signal is proportional to a value obtained by dividing the difference between the capacitance of the first capacitor and the capacitance of the second capacitor by the sum of the capacitance of the first capacitor and the capacitance of the second capacitor. Output from the preamplifier circuit.

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