JP2011236124A - Silicon carbide single crystal substrate and silicon carbide single crystal epitaxial wafer - Google Patents

Abstract

PROBLEM TO BE SOLVED: To define the direction of the dislocation line of a threading dislocation to suppress the deterioration of a device characteristics and the lowering of yield.SOLUTION: The direction of the dislocation line of the threading dislocation 3 is arranged to make the direction of the threading dislocation 3 parallel to [0001] c-axis. The threading dislocation 3 having a dislocation line in the [0001] c-axis direction is vertical to the direction of the dislocation line of the basal plane dislocation, so that the threading dislocation 3 can not be an extension dislocation in C-plane, and stacking dislocation is not generated. Therefore, the device characteristics are improved by forming an electronic device to an SiC single crystal substrate having the direction of dislocation line of the threading dislocation 3 of being the [0001] c-axis, and an SiC semiconductor device with improved yield having no deterioration is formed.

Description

  The present invention relates to a SiC single crystal substrate composed of silicon carbide (hereinafter referred to as SiC) single crystal and a SiC single crystal epitaxial wafer configured by growing an epitaxial film on the SiC single crystal substrate.

  Conventionally, high quality SiC single crystal wafers are disclosed in Patent Documents 1 and 2. In the SiC single crystal wafers disclosed in these Patent Documents 1 and 2, the density of dislocations that adversely affect device characteristics is set to a specified value or less so as to be suitable for device fabrication. The dislocation here is a crystal defect that rises linearly, and the types of dislocations of interest are basal plane dislocations existing in the (0001) C plane and threading screw dislocations having a direction parallel to the c-axis.

JP 2008-115034 A Special table 2008-515748 gazette

  However, Patent Documents 1 and 2 do not particularly disclose the threading edge dislocation, and the influence of the threading edge dislocation on the device is unknown. Also, threading screw dislocations and threading edge dislocations (hereinafter collectively referred to as threading dislocations) are said to degrade device characteristics such as diodes and transistors, and to reduce yield, and to reduce their density. However, Patent Documents 1 and 2 disclose the type and density of dislocations, but the direction of dislocation lines of threading dislocations is unknown.

  Note that the threading screw dislocation and the threading edge dislocation differ in strain direction (Burgers vector), the threading screw dislocation is parallel to the c-axis, and the threading edge dislocation is perpendicular to the c-axis. The basal plane dislocation includes both screw dislocations and edge dislocations.

  In view of the above points, the present invention provides a silicon carbide single crystal substrate and a silicon carbide single crystal epitaxial wafer that define the direction of dislocation lines of threading dislocations that can suppress deterioration of device characteristics or decrease in yield. With the goal.

  In order to achieve the above object, the present inventors conducted various experiments on the relationship between the direction of threading dislocation lines and the deterioration of device characteristics and yield. It has been found that the deterioration in device characteristics and the decrease in yield can be suppressed as the amount increases. In particular, the direction of the dislocation line of the threading dislocation in which the dislocation line penetrates the (0001) C plane (hereinafter, this threading dislocation penetrating the (0001) C plane is simply referred to as threading dislocation) and the [0001] axis It was confirmed that the device characteristics could be degraded and the yield could be reduced by setting the angle to be 22.5 ° or less.

  In addition, the present inventors conducted various trial production studies on the growth direction of SiC single crystal and the growth direction of crystal defects. As a result, in conventional crystal growth using a C-plane off substrate by a sublimation method, threading dislocations grow in various directions with respect to the growth direction, but epitaxial growth using a C-plane off substrate by a CVD method. Then, the phenomenon that the growth direction of the penetrating defect to be inherited is limited to the (11-2n) plane or the (1-10n) plane was found. The direction of the step flow when growing the epitaxial film on the SiC single crystal substrate is related, and the direction of inclination of the dislocation line and the direction of the step flow are the same direction, and the angle of the dislocation line is limited to a specific direction. is there.

  The inventors have also found that the growth direction has a close relationship with the impurity concentration during epitaxial growth. Here, n is an arbitrary integer. For example, the (11-1n) plane includes (11-21) plane, (11-22) plane, (11-23) plane, and the like. , (1-10n) plane includes (1-101) plane, (1-102) plane, (1-103) plane, and the like.

  FIG. 5 shows a dislocation line direction of threading dislocations formed on a SiC single crystal substrate using a SiC single crystal substrate with 4H-SiC and an off angle of [11-20] and an off angle of 4 °. 5 is a graph showing the relationship between the direction of threading dislocations inherited in an epitaxial film and the direction of dislocation lines when the epitaxial film is formed on a SiC single crystal substrate according to impurity concentration. The direction of dislocation lines of threading dislocations in the SiC single crystal substrate or the epitaxial film is represented by an angle obtained by adding the direction inclined to the same side as the substrate normal direction with respect to the [0001] c-axis. In addition, here, each characteristic is shown for each nitrogen concentration when nitrogen is used as the impurity. However, the nitrogen concentration is an example, and the same characteristics are obtained even if the impurity is changed.

As shown in this figure, when the nitrogen concentration is, for example, 1 × 10 ¹⁵ cm ⁻³ or less, the direction of dislocation lines of threading dislocations in the epitaxial film is ± 3 ° centered on 0 °, that is, [0001]. The direction is almost the same as the direction. Further, when the nitrogen concentration is, for example, 1 × 10 ¹⁵ cm ⁻³ or more and 1 × 10 ¹⁶ cm ⁻³ or less, the direction of dislocation lines of threading dislocations in the epitaxial film is ± 3 ° centered on 8.7 °. That is, the direction is substantially the same as the [11-26] direction. Further, when the nitrogen concentration is, for example, 1 × 10 ¹⁶ cm ⁻³ or more and 1 × 10 ¹⁷ cm ⁻³ or less, the direction of the dislocation line of the threading dislocation in the epitaxial film is ± 3 ° centered at 17 °, that is, The direction is substantially the same as the [11-23] direction. When the nitrogen concentration is, for example, 1 × 10 ¹⁸ cm ⁻³ or more, the direction of dislocation lines of threading dislocations in the epitaxial film becomes larger than 22.5 ° (see Japanese Patent Application No. 2009-29584).

  Then, using the SiC single crystal substrate in which the dislocation direction is specified in this way, the direction of the dislocation line of the threading dislocation formed in the SiC single crystal substrate and the electronic device such as a diode with respect to the SiC single crystal substrate We investigated the relationship with the failure time (time taken before failure) when power-type electronic devices such as MOS transistors were formed. FIG. 6 is a graph showing this relationship. The direction of dislocation lines of threading dislocations was measured by observing with a transmission electron microscope.

  As shown in this figure, even when threading dislocations are formed, the failure time of the electronic device can be lengthened if the threading dislocation angle is 20 (= 17 + 3 °) or less. Then, as threading dislocations, it is possible to increase the effect by aligning them by edge dislocations as compared with screw dislocations.

  Although described in documents such as Patent Document 1, the basal plane dislocation causes a decrease in device characteristics and yield. This is because basal plane dislocations exist in the (0001) C plane, become extended dislocations, and act as a nucleus for occurrence of stacking faults, and stacking faults deteriorate device characteristics. On the other hand, the threading dislocation having a dislocation line in the [0001] c-axis direction is perpendicular to the direction of the dislocation line of the basal plane dislocation, and thus does not become an extended dislocation in the C plane and causes a stacking fault. There is nothing. For this reason, if an electronic device is formed on a SiC single crystal substrate in which the direction of dislocation lines of threading dislocations is the [0001] c-axis, the device characteristics are improved, there is no deterioration, and the yield is improved. Further, since the direction of dislocation lines of threading dislocations is aligned, variation in characteristics depending on location is reduced and yield is improved.

  When the direction of the dislocation line of threading dislocations deviates from the [0001] c-axis, a component in the basal plane direction in proportion to sin θ appears when the angle is θ. This component becomes extended dislocations and causes the generation of stacking faults that degrade device characteristics. It was also confirmed that the effect is reduced when the angle θ is small.

  Thus, in the case of using the SiC single crystal substrate with the off angle shown in FIG. 5 as the [11-20] direction, the direction of the dislocation lines of threading dislocations is made 20 ° or less. Thus, it was confirmed that deterioration of device characteristics and a decrease in yield can be suppressed. The same thing was done using a SiC single crystal substrate with an off angle as the [1-100] direction and the dislocation line direction of threading dislocations corresponds to the [2-203] direction. By using a SiC single crystal substrate having an off angle of [11-20] direction with an off angle of ± 3 ° with respect to 5 °, that is, 22.5 (= 19.5 + 3) ° or less. It was confirmed that the same effect as that obtained was obtained.

  Therefore, as described above, by aligning the direction of dislocation lines of threading dislocations, that is, the angle θ between the direction of dislocation lines and the [0001] axis, to 22.5 ° (= 19.5 ° + 3 °) or less, the device Degradation of characteristics can be reduced. In particular, for the angle θ = 17 ° ([11-23] direction) and the angle θ = 19.5 ° ([2-203] direction), it is easy to grow the epitaxial film based on the impurity concentration. Therefore, an SiC single crystal substrate in which the direction of threading dislocations is aligned at such an angle θ can be easily produced.

  Further, the dislocation line is inclined with respect to the [0001] c-axis only in a plane passing through the [0001] c-axis and a specific direction perpendicular to the [0001] c-axis (for example, the [11-20] direction and the [1-100] direction). It is preferable.

  For example, when a SiC single crystal substrate with an off angle as the [11-20] direction is used, the dislocation lines are [0001] so that the dislocation lines are in the (1-100) plane. Tilt with respect to the c-axis. Thus, by arranging the dislocation lines so as to be inclined only in the same plane, it becomes possible to further improve the device characteristics and suppress the yield reduction. For example, when a field effect transistor having a channel surface of (1-100) plane with respect to a SiC single crystal substrate is created, dislocation lines do not cross the channel surface. As a result, the characteristics and reliability of the transistor can be further improved.

  The same applies to the case of using a SiC single crystal substrate with an off angle given as the [1-100] direction as the off direction. In this case, the dislocation line is inclined with respect to the [0001] c-axis so that the dislocation line is in the (11-20) plane. For this reason, for example, when a field effect transistor having a channel surface of (11-20) plane with respect to a SiC single crystal substrate is created, dislocation lines do not cross the channel surface. For this reason, the characteristics and reliability of the transistor can be further improved.

  Examples of the substrate on which the electronic device is formed include a SiC single crystal substrate and a SiC single crystal epitaxial wafer in which an epitaxial film is grown on the SiC single crystal substrate. An SiC single crystal substrate is formed by growing an epitaxial film with threading dislocations aligned, and then performing, for example, bulk growth on the epitaxial film and cutting it out in a desired plane orientation, so that the SiC single crystal with aligned threading dislocations is obtained. A substrate can be obtained. When this SiC single crystal substrate is used, the direction of the threading dislocation lines formed on the SiC single crystal substrate itself directly affects the device characteristics, so that the threading dislocation lines formed on the SiC single crystal substrate itself. Must satisfy the above relationship. However, in the case of a SiC single crystal epitaxial wafer, it is the direction of dislocation lines of threading dislocations in the epitaxial film that affects device characteristics. For this reason, if the direction of threading dislocation lines in the epitaxial film is aligned at least, the device characteristics can be improved even if the direction of threading dislocation lines in the underlying SiC single crystal substrate is not aligned. .

  Based on the above knowledge, in the invention according to claim 1, the dislocation line includes threading dislocation (3) penetrating the (0001) C plane, and the direction of the dislocation line of the threading dislocation (3) is [0001] c. It is characterized by a direction parallel to the axis.

  The threading dislocation (3) having a dislocation line in the [0001] c-axis direction is perpendicular to the direction of the dislocation line of the basal plane dislocation, and therefore does not become an extended dislocation in the C plane and may cause a stacking fault. Absent. For this reason, device characteristics are good when an electronic device is formed on this SiC single crystal substrate by using a SiC single crystal substrate whose dislocation line direction of threading dislocation (3) is the [0001] c-axis. Thus, a SiC semiconductor device with no deterioration and improved yield can be obtained.

  Moreover, the direction of the dislocation line of the threading dislocation (3) is aligned in a specific direction. For this reason, variation in characteristics depending on the place is reduced, and the yield can be further improved.

  Furthermore, since the direction of the dislocation line of threading dislocation (3) is parallel to the [0001] c-axis, the C in-plane component can be eliminated, and the deterioration of device characteristics can be further reduced.

  The invention according to claim 2 includes an SiC single crystal substrate (1) whose off direction is the [11-20] direction, and an epitaxial film (2) grown on the SiC single crystal substrate (1). The epitaxial film (2) includes a threading dislocation (3) in which the dislocation line penetrates the (0001) C plane, and the direction of the dislocation line of the threading dislocation (3) is [11-20] from the [0001] c-axis. The angle of the direction of the substrate surface to the normal direction is not less than −3 ° and not more than 20 °, and the threading dislocation (3) is in the (1-100) plane.

  Thus, the direction of the dislocation line of the threading dislocation (3) is aligned, and the angle θ formed between the direction of the dislocation line of the threading dislocation (3) and the [0001] c-axis is -3 ° or more and 20 ° or less. I am doing so. If an electronic device is formed on such a SiC single crystal epitaxial wafer, the device characteristics are good, there is no deterioration, and the yield can be improved, as in the first aspect. The threading dislocations (3) are in the (1-100) plane, and the dislocation lines are aligned so as to be inclined only in the same plane. As a result, it is possible to further improve device characteristics and suppress a decrease in yield. For example, as described in claim 13, when a field effect transistor having a channel surface of (1-100) plane with respect to a SiC single crystal substrate is created, dislocation lines do not cross the channel surface. For this reason, the characteristics and reliability of the transistor can be further improved.

  For example, as described in claim 3, the direction of the dislocation line of the threading dislocation (3) is 17 ° ± 3 ° with respect to the normal direction of the substrate surface from the [0001] c-axis to the [11-20] direction. Range. Further, as described in claim 4, the angle of the dislocation line of the threading dislocation (3) is 8.7 ° ± from the [0001] c-axis to the normal direction of the substrate surface in the [11-20] direction. It can also be in the range of 3 °.

  In the invention according to claim 5, the epitaxial film (2) includes the threading dislocation (3) in which the dislocation line penetrates the (0001) C plane, and the direction of the dislocation line of the threading dislocation (3) is [0001]. The angle from the c-axis to the normal direction of the substrate surface in the [1-100] direction is -3 ° or more and 22.5 ° or less, and the threading dislocation (3) is in the (11-20) plane. It is characterized by being.

  Thus, the direction of the dislocation line of the threading dislocation (3) is aligned, and the angle θ between the direction of the dislocation line of the threading dislocation (3) and the [0001] c-axis is -3 ° or more and 22.5 ° or less. It is trying to become. If an electronic device is formed on such a SiC single crystal epitaxial wafer, the device characteristics are good, there is no deterioration, and the yield can be improved, as in the first aspect. The threading dislocations (3) are in the (11-20) plane, and the dislocation lines are aligned only in the same plane. As a result, it is possible to further improve device characteristics and suppress a decrease in yield. For example, as described in claim 14, when a field effect transistor having a channel surface of (11-20) plane with respect to a SiC single crystal substrate is formed, dislocation lines do not cross the channel surface. For this reason, the characteristics and reliability of the transistor can be further improved.

  For example, as described in claim 6, the angle of the dislocation line of the threading dislocation (3) from the [0001] c-axis to the normal direction of the substrate surface in the [1-100] direction is 19.5 ° ±. It can be in the range of 3 °. Further, as described in claim 7, the direction of the dislocation line of the threading dislocation (3) is 15 ° ± 3 ° from the [0001] c-axis to the normal direction of the substrate surface in the [1-100] direction. It can also be set as the range. Furthermore, as described in claim 8, the direction of the dislocation line of the threading dislocation (3) is 7.6 ° ± from the [0001] c-axis to the normal direction of the substrate surface in the [1-100] direction. It can also be in the range of 3 °.

The direction of threading dislocations (3) of the epitaxial film (2) in the SiC single crystal epitaxial wafer as described in claims 2 to 8 is determined by, for example, the impurity concentration. For example, as described in claim 9, by setting the impurity concentration of the epitaxial film (2) to 1 × 10 ¹⁷ cm ⁻³ or less, the direction of threading dislocation (3) can be defined as described above. it can. In this case, since the impurity concentration of the epitaxial film (2) can be lower than the impurity concentration of the SiC single crystal substrate (1), the epitaxial film (2) having a concentration suitable for device fabrication can be obtained.

  The invention according to claims 10 and 11 is characterized in that threading dislocations (3) include threading edge dislocations. Thus, by including threading edge dislocations, electronic devices such as diodes and MOS transistors can be used for SiC single crystal epitaxial wafers and silicon carbide single crystal substrates, compared to when threading screw dislocations are included. Thus, the failure time when the power element is formed can be increased, and the device characteristics can be further improved.

  In addition, the code | symbol in the bracket | parenthesis of each said means shows the correspondence with the specific means as described in embodiment mentioned later.

(A) is sectional drawing of the SiC single crystal epitaxial wafer concerning 1st Embodiment of this invention, (b) is the angle | corner of the dislocation line of the threading dislocation in a SiC single crystal epitaxial wafer, and the c-axis. It is a vector diagram showing the relationship. (A) is sectional drawing of the SiC single crystal epitaxial wafer concerning 4th Embodiment of this invention, (b) is the angle which the dislocation line of the threading dislocation in a SiC single crystal epitaxial wafer and the c axis | shaft make It is a vector diagram showing the relationship. (A) is sectional drawing of the SiC single crystal epitaxial wafer concerning 5th Embodiment of this invention, (b) is a vector diagram for demonstrating the off angle and the inclination angle of a threading dislocation. (A) is sectional drawing of the SiC single crystal epitaxial wafer concerning 8th Embodiment of this invention, (b) is a vector diagram for demonstrating the off angle and the inclination angle of a threading dislocation. It is the graph which showed the relationship with the direction of the dislocation line of the threading dislocation inherited in an epitaxial film according to impurity concentration. It is the graph which showed the relationship between the direction of a threading dislocation, and the failure time when a power type electronic device was formed.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the following embodiments, the same or equivalent parts are denoted by the same reference numerals in the drawings.

(First embodiment)
A first embodiment of the present invention will be described. FIG. 1A is a cross-sectional view of the SiC single crystal epitaxial wafer according to the present embodiment, and FIG. 1B shows the angle formed between the dislocation line of threading dislocations in the SiC single crystal epitaxial wafer and the c-axis. It is a vector diagram showing the relationship.

  As shown in FIG. 1A, the SiC single crystal epitaxial wafer is formed by growing an epitaxial film 2 on a SiC single crystal substrate 1 made of 4H—SiC. The SiC single crystal substrate 1 and the epitaxial film 2 have threading dislocations 3, and at least the threading dislocations 3 formed in the epitaxial film 2 have an angle θ between the direction of the dislocation line and the [0001] c-axis of 22. .5 ° (= 19.5 ° + 3 °) or less. The direction of dislocation lines of threading dislocations 3 in the SiC single crystal substrate 1 or the epitaxial film 2 is the normal direction of the wafer surface with respect to the [0001] c-axis, as shown in FIG. The angle that is inclined to the same side is represented by a plus angle.

  Thus, in this embodiment, the direction of the dislocation line of the threading dislocation 3 is aligned, and the angle θ between the direction of the dislocation line of the threading dislocation 3 and the [0001] c-axis is 22.5 ° or less. ing. Since the threading dislocation 3 having a dislocation line in the [0001] c-axis direction is perpendicular to the direction of the dislocation line of the basal plane dislocation, it does not become an extended dislocation in the C plane and does not cause stacking faults. For this reason, if an electronic device is formed on a SiC single crystal substrate in which the direction of the dislocation line of threading dislocation 3 is the [0001] c-axis, the SiC semiconductor device has improved device characteristics, no deterioration, and improved yield. It can be.

(Second Embodiment)
A second embodiment of the present invention will be described. In the present embodiment, the direction of dislocation lines of threading dislocations 3 is more specifically specified and aligned with respect to the first embodiment. The structure of the SiC single crystal epitaxial wafer according to the present embodiment is the same as that of the first embodiment, and therefore only different parts will be described.

  In the present embodiment, in the SiC single crystal epitaxial wafer shown in FIG. 1A, the angle θ between the direction of the dislocation line and the [0001] c-axis is specified for all threading dislocations 3 existing in the epitaxial film 2. The angle is within a range of ± 3 ° with respect to the angle. For example, examples of the specific angle include 19.5 ° ([2-203] direction) and 17 ° ([11-23] direction).

  Thus, the direction of the dislocation line of the threading dislocation 3 is aligned in a specific direction. For this reason, in addition to the effect similar to 1st Embodiment, the direction of the dislocation line of the threading dislocation | rearrangement 3 has become uniform, the dispersion | variation in the characteristic by a place decreases, and it can improve a yield further.

(Third embodiment)
A third embodiment of the present invention will be described. In the present embodiment, the direction of the dislocation line of the threading dislocation 3 is limited to the direction around the c-axis and aligned with the first embodiment. The structure of the SiC single crystal epitaxial wafer according to the present embodiment is the same as that of the first embodiment, and therefore only different parts will be described.

  In this embodiment, in the SiC single crystal epitaxial wafer shown in FIG. 1A, the direction of the dislocation line is ± 3 ° with respect to the [0001] c-axis for all threading dislocations 3 existing in the epitaxial film 2. It is within the range.

  Thus, the direction of the dislocation line of the threading dislocation 3 is aligned with the [0001] c-axis as the center. For this reason, in addition to the effect similar to 1st Embodiment, a C surface component can be made small and degradation of a device characteristic can further be reduced.

(Fourth embodiment)
A fourth embodiment of the present invention will be described. In the present embodiment, the direction of dislocation lines of threading dislocations 3 is specified and aligned more than in the first to third embodiments. The structure of the SiC single crystal epitaxial wafer according to the present embodiment is the same as that of the first embodiment, and therefore only different parts will be described.

  FIG. 2A is a cross-sectional view of the SiC single crystal epitaxial wafer according to the present embodiment, and FIG. 2B shows the angle formed between the dislocation lines of threading dislocations in the SiC single crystal epitaxial wafer and the c axis. It is a vector diagram showing the relationship.

  2A and 2B, in this embodiment, in the SiC single crystal epitaxial wafer shown in FIG. 1, the direction of the dislocation line for all the threading dislocations 3 existing in the epitaxial film 2 is [ [0001] Parallel to the c-axis.

  Thus, the direction of the dislocation line of the threading dislocation 3 is aligned with the [0001] c-axis. For this reason, in addition to the effect similar to 1st Embodiment, a C in-plane component can be lose | eliminated and deterioration of a device characteristic can be reduced further.

(Fifth embodiment)
A fifth embodiment of the present invention will be described. In the present embodiment, the off direction of the SiC single crystal substrate used for the first embodiment is defined. The structure of the SiC single crystal epitaxial wafer according to the present embodiment is the same as that of the first embodiment, and therefore only different parts will be described.

  FIG. 3A is a cross-sectional view of the SiC single crystal epitaxial wafer according to the present embodiment, and FIG. 3B is a vector diagram for explaining an off angle and an inclination angle of threading dislocation.

As shown in FIG. 3A, in the present embodiment, a SiC single crystal epitaxial wafer having an off angle of [11-20] and an α ° off angle is used. For example, the SiC single crystal substrate 1 has a high impurity concentration of 5 × 10 ¹⁸ cm ⁻³ , and the epitaxial film 2 has a low concentration of 1 × 10 ¹⁷ cm ⁻³ or less. Then, the direction of the dislocation line of the threading dislocation 3 existing in the epitaxial film 2 in this SiC single crystal epitaxial wafer is inclined and aligned in the same direction as the off direction, and the direction of the dislocation line of the threading dislocation 3 and the [0001] c axis Is set to be −3 (= 0 ° −3 °) or more and 20 ° (= 17 ° + 3 °) or less. Further, the dislocation line is inclined with respect to the [0001] c-axis only in the (1-100) plane passing through the [0001] c-axis and a specific direction perpendicular to the [0001] c-axis (for example, the [11-20] direction). .

  Here, as shown in FIG. 3B, when the off direction is the [11-20] direction, the off angle α is the angle that the normal direction of the wafer surface makes with the [0001] c-axis is α °. Means something. Further, the dislocation line of the threading dislocation 3 extends in the same direction as the normal direction of the wafer surface with respect to the [0001] c-axis, and represents the angle θ with the normal side as a plus.

  In this embodiment, the direction of the dislocation line of the threading dislocation 3 is such that the angle formed in the epitaxial film 2 is the above angle, but the threading dislocation formed in the SiC single crystal substrate 1 The dislocation 3 is not particularly defined and may be at any angle.

  Thus, in this embodiment, the direction of the dislocation line of the threading dislocation 3 is aligned, and the angle θ between the direction of the dislocation line of the threading dislocation 3 and the [0001] c-axis is not less than −3 ° and not more than 20 °. It is trying to become. If an electronic device is formed on such a SiC single crystal epitaxial wafer, the device characteristics are good, there is no deterioration, and the yield can be improved as in the first embodiment. Further, in this embodiment, the direction of the dislocation line of the threading dislocation 3 is defined only for the one formed in the epitaxial film 2, but when the electronic device is a SiC single crystal epitaxial wafer, the SiC single crystal substrate 1 However, since the electronic device is formed in the epitaxial film 2, the direction of the dislocation line of the threading dislocation 3 may be defined in the epitaxial film 2.

  The SiC single crystal epitaxial wafer having such a structure is manufactured as follows, for example. First, a bulk SiC single crystal is prepared, and the SiC single crystal 1 in the off direction can be prepared by cutting the SiC single crystal in a plane including the [11-20] direction. Then, epitaxial film 2 made of SiC single crystal is grown on the surface of SiC single crystal substrate 1 by the CVD method.

  In this way, as shown in FIG. 5, the threading dislocation 3 included in the SiC substrate 1 has an angle θ with respect to the [0001] c-axis in the epitaxial film 2 of −3 ° or more and 20 °. It can be set to the following range. This is considered to be related to the direction of the step flow when the epitaxial film 2 is grown, and it is confirmed that the direction of inclination of the dislocation line of the threading dislocation 3 and the step flow direction are the same direction.

For example, when nitrogen is used as the impurity in the epitaxial film 2 and the impurity concentration is, for example, 1 × 10 ¹⁶ to 1 × 10 ¹⁷ cm ⁻³ , the direction of the dislocation line of the threading dislocation 3 is, for example, [11− 23] direction or in a direction within the range of ± 3 ° with respect to the [11-23] direction, the angle θ is in the range of 17 ° ± 3 °. Further, when, for example, nitrogen is used as the impurity in the epitaxial film 2 and the impurity concentration is set to 1 × 10 ¹⁵ to 1 × 10 ¹⁶ cm ⁻³ , the direction of the dislocation line of the threading dislocation 3 is, for example, [11− 26] direction or in a direction within a range of ± 3 ° with respect to the [11-26] direction, the angle θ is in a range of 8.7 ° ± 3 °. Further, when, for example, nitrogen is used as the impurity in the epitaxial film 2 and the impurity concentration is set to 1 × 10 ¹⁵ cm ⁻³ or less, the direction of the dislocation line of the threading dislocation 3 is, for example, parallel to the [0001] direction or The direction is in the range of ± 3 ° with respect to the [0001] direction, and the angle θ is in the range of 0 ° ± 3 °.

Thus, by setting the impurity concentration to 1 × 10 ¹⁷ cm ⁻³ or less, for example, the direction of the dislocation line of the threading dislocation 3 can be aligned in the same direction. Since such impurity concentration is suitable for device fabrication, the device characteristics are good, there is no deterioration, and the yield is improved. On the contrary, when the impurity concentration is set to 1 × 10 ¹⁸ cm ⁻³ , for example, the angle θ is larger than 20 °, and the component in the basal plane direction is increased, which adversely affects the device characteristics. In addition, since the impurity concentration is high and is not suitable for device fabrication, it is not suitable for use. Note that although nitrogen showing n-type conductivity is taken as an example here as an impurity, other impurities may be used, and aluminum or boron showing p-type conductivity may be used.

  Furthermore, in this embodiment, the dislocation line is in the [0001] c-axis only in the (1-100) plane passing through the [0001] c-axis and a specific direction perpendicular to the [0001] c-axis (for example, the [11-20] direction). It is leaning against.

  Thus, by arranging the dislocation lines so as to be inclined only in the same plane, it becomes possible to further improve the device characteristics and suppress the yield reduction. For example, when a field effect transistor having a channel surface of (1-100) plane with respect to a SiC single crystal substrate is created, dislocation lines do not cross the channel surface. For this reason, the characteristics and reliability of the transistor can be further improved.

  In this example, the off direction is the [11-20] direction and an α ° off angle is used. However, α ° may be larger than 0 ° and may be an angle at which the epitaxial film 2 grows by step flow. Any angle is acceptable. For example, α ° can be set to 4 °.

(Sixth embodiment)
A sixth embodiment of the present invention will be described. In the present embodiment, the direction of dislocation lines of threading dislocations 3 is more specifically specified and aligned with respect to the fifth embodiment. The structure of the SiC single crystal epitaxial wafer according to the present embodiment is the same as that of the fifth embodiment, and therefore only different parts will be described.

  In the present embodiment, for all the threading dislocations 3 existing in the epitaxial film 2 in the SiC single crystal epitaxial wafer having the α ° off angle with the off direction shown in FIG. 3A as the [11-20] direction, The angle θ formed by the direction of the dislocation line and the [0001] c-axis is set within a range of ± 3 ° with respect to 17 ° ([11-23] direction).

  Thus, the direction of the dislocation line of the threading dislocation 3 is aligned in a specific direction. For this reason, in addition to the effect similar to 5th Embodiment, since the direction of the dislocation line of the threading dislocation 3 is equal, the dispersion | variation in the characteristic by a place decreases and it can improve a yield further.

Such a structure can be realized by growing the epitaxial film 2 on the SiC single crystal substrate 1 with an impurity concentration of, for example, 1 × 10 ¹⁶ to 1 × 10 ¹⁷ cm ⁻³ .

(Seventh embodiment)
A seventh embodiment of the present invention will be described. This embodiment also specifies and aligns the direction of dislocation lines of threading dislocations 3 more regularly than the fifth embodiment. The structure of the SiC single crystal epitaxial wafer according to the present embodiment is the same as that of the fifth embodiment, and therefore only different parts will be described.

  In the present embodiment, for all the threading dislocations 3 existing in the epitaxial film 2 in the SiC single crystal epitaxial wafer having the α ° off angle with the off direction shown in FIG. 3A as the [11-20] direction, The angle θ formed by the direction of the dislocation line and the [0001] c-axis is set within a range of ± 3 ° with respect to 8.7 ° ([11-26] direction).

  Thus, the direction of the dislocation line of the threading dislocation 3 is aligned in a specific direction. For this reason, in addition to the effect similar to 5th Embodiment, since the direction of the dislocation line of the threading dislocation 3 is equal, the dispersion | variation in the characteristic by a place decreases and it can improve a yield further.

Such a structure, the SiC single crystal substrate 1, the epitaxial layer 2 can be realized be grown impurity concentration of, for example, as a ^{1 × 10 15 ~1 × 10 16} cm -3.

(Eighth embodiment)
An eighth embodiment of the present invention will be described. In the present embodiment, the off direction of the SiC single crystal substrate used for the first embodiment is defined in a direction different from that of the fifth embodiment. The structure of the SiC single crystal epitaxial wafer according to the present embodiment is the same as that of the first embodiment, and therefore only different parts will be described.

  FIG. 4A is a cross-sectional view of the SiC single crystal epitaxial wafer according to the present embodiment, and FIG. 4B is a vector diagram for explaining an off angle and an inclination angle of threading dislocation.

As shown in FIG. 4A, in the present embodiment, a SiC single crystal epitaxial wafer having an α ° off angle with the off direction as the [1-100] direction is used. For example, the SiC single crystal substrate 1 has a high impurity concentration of 5 × 10 ¹⁸ cm ⁻³ , and the epitaxial film 2 has a low concentration of 1 × 10 ¹⁷ cm ⁻³ or less. Then, the direction of the dislocation line of the threading dislocation 3 existing in the epitaxial film 2 in this SiC single crystal epitaxial wafer is inclined and aligned in the same direction as the off direction, and the direction of the dislocation line of the threading dislocation 3 and the [0001] c axis Is set to be −3 (= 0 ° −3 °) or more and 22.5 ° (= 19.5 ° + 3 °) or less. Further, the dislocation line is inclined with respect to the [0001] c-axis only in the (11-20) plane passing through the [0001] c-axis and a specific direction perpendicular to the [0001] c-axis (for example, the [1-100] direction). .

  Here, as shown in FIG. 4B, when the off-direction is the [1-100] direction, the off-angle α is an angle formed by the normal direction of the wafer surface with respect to the [0001] c-axis is α °. Means something. Further, the dislocation line of the threading dislocation 3 extends in the same direction as the normal direction of the wafer surface with respect to the [0001] c-axis, and represents the angle θ with the normal side as a plus.

  Also in this embodiment, the direction of the dislocation line of the threading dislocation 3 is set to the above angle for the one formed in the epitaxial film 2, but the threading dislocation formed in the SiC single crystal substrate 1 is used. The dislocation 3 is not particularly defined and may be at any angle.

  Thus, in this embodiment, the direction of the dislocation line of the threading dislocation 3 is aligned, and the angle θ formed by the direction of the dislocation line and the [0001] c-axis is not less than −3 ° and not more than 22.5 °. I have to. Even if an electronic device is formed on such a SiC single crystal epitaxial wafer, the same effect as in the fifth embodiment can be obtained.

  The SiC single crystal epitaxial wafer having such a structure is manufactured as follows, for example. First, a bulk SiC single crystal is prepared, and the SiC single crystal 1 in the off direction can be prepared by cutting the SiC single crystal in a plane including the [1-100] direction. Then, epitaxial film 2 made of SiC single crystal is grown on the surface of SiC single crystal substrate 1 by the CVD method.

  In this way, the threading dislocations 3 included in the SiC substrate 1 have an angle θ with respect to the [0001] c-axis in the epitaxial film 2 within a range of −3 ° to 22.5 °. it can. This is also considered to be related to the direction of the step flow when the epitaxial film 2 is grown, and it is confirmed that the direction of inclination of the dislocation line of the threading dislocation 3 and the step flow direction are the same direction.

For example, by adjusting the impurity concentration (for example, nitrogen concentration) in the epitaxial film 2 to 1 × 10 ¹⁷ cm ⁻³ or less, the direction of the dislocation line of the threading dislocation 3 is, for example, parallel to the [2-203] direction or [ 2-203] direction within a range of ± 3 °, and angle θ is in a range of 19.5 ° ± 3 °, or parallel to [1-102] direction or [1-102] direction The angle θ is in the range of 15 ° ± 3 °, or parallel to the [1-104] direction or ± 3 with respect to the [1-104] direction. The angle θ is in the range of 7.6 ° ± 3 °.

Thus, by setting the impurity concentration to 1 × 10 ¹⁷ cm ⁻³ or less, for example, the direction of the dislocation line of the threading dislocation 3 can be aligned in the same direction. Since such impurity concentration is suitable for device fabrication, the device characteristics are good, there is no deterioration, and the yield is improved. On the contrary, when the impurity concentration is set to 1 × 10 ¹⁸ cm ⁻³ , for example, the angle θ is larger than 22.5 °, and the component in the basal plane direction increases, which adversely affects the device characteristics. Become. In addition, since the impurity concentration is high and is not suitable for device fabrication, it is not suitable for use. Note that although nitrogen showing n-type conductivity is taken as an example here as an impurity, other impurities may be used, and aluminum or boron showing p-type conductivity may be used.

  Further, in the present embodiment, the dislocation line is in the [0001] c-axis only in the (11-20) plane passing through the [0001] c-axis and a specific direction (eg, [1-100] direction) perpendicular thereto. It is leaning against it.

  Thus, by arranging the dislocation lines so as to be inclined only in the same plane, it becomes possible to further improve the device characteristics and suppress the yield reduction. For example, when a field effect transistor having a channel surface of (11-20) plane with respect to a SiC single crystal substrate is created, dislocation lines do not cross the channel surface. For this reason, the characteristics and reliability of the transistor can be further improved.

  In this case, the off direction is the [1-100] direction and an α ° off angle is used. However, α ° should be larger than 0 °, and the angle at which the epitaxial film 2 grows by step flow may be used. Any angle is acceptable. For example, α ° can be set to 4 °.

(Ninth embodiment)
A ninth embodiment of the present invention will be described. In the present embodiment, the direction of dislocation lines of threading dislocations 3 is more specifically specified and aligned with respect to the eighth embodiment. The structure of the SiC single crystal epitaxial wafer according to the present embodiment is the same as that of the fifth embodiment, and therefore only different parts will be described.

  In the present embodiment, for all the threading dislocations 3 existing in the epitaxial film 2 in the SiC single crystal epitaxial wafer having the α ° off angle with the off direction shown in FIG. 4A as the [1-100] direction, The angle θ formed by the direction of the dislocation line and the [0001] c-axis is set within a range of ± 3 ° with respect to 19.5 ° ([2-203] direction).

  Thus, the direction of the dislocation line of the threading dislocation 3 is aligned in a specific direction. For this reason, in addition to the effect similar to 8th Embodiment, since the direction of the dislocation line of the threading dislocation 3 is equal, the dispersion | variation in the characteristic by a place decreases and a yield can be improved further.

(10th Embodiment)
A tenth embodiment of the present invention will be described. This embodiment also specifies and aligns the direction of the dislocation line of threading dislocation 3 more regularly than the eighth embodiment. The structure of the SiC single crystal epitaxial wafer according to the present embodiment is the same as that of the fifth embodiment, and therefore only different parts will be described.

  In the present embodiment, for all the threading dislocations 3 existing in the epitaxial film 2 in the SiC single crystal epitaxial wafer having the α ° off angle with the off direction shown in FIG. 4A as the [1-100] direction, The angle θ formed by the direction of the dislocation line and the [0001] c-axis is set within a range of ± 3 ° with respect to 15 ° ([1-102] direction).

  Thus, the direction of the dislocation line of the threading dislocation 3 is aligned in a specific direction. For this reason, in addition to the effect similar to 8th Embodiment, since the direction of the dislocation line of the threading dislocation 3 is equal, the dispersion | variation in the characteristic by a place decreases and a yield can be improved further.

(Eleventh embodiment)
An eleventh embodiment of the present invention will be described. This embodiment also specifies and aligns the direction of the dislocation line of threading dislocation 3 more regularly than the eighth embodiment. The structure of the SiC single crystal epitaxial wafer according to the present embodiment is the same as that of the fifth embodiment, and therefore only different parts will be described.

  In the present embodiment, for all the threading dislocations 3 existing in the epitaxial film 2 in the SiC single crystal epitaxial wafer having the α ° off angle with the off direction shown in FIG. 4A as the [1-100] direction, The angle θ formed by the direction of the dislocation line and the [0001] c-axis is set within a range of ± 3 ° with respect to 7.6 ° ([1-104] direction).

  Thus, the direction of the dislocation line of the threading dislocation 3 is aligned in a specific direction. For this reason, in addition to the effect similar to 8th Embodiment, since the direction of the dislocation line of the threading dislocation 3 is equal, the dispersion | variation in the characteristic by a place decreases and a yield can be improved further.

(Twelfth embodiment)
A twelfth embodiment of the present invention will be described. In the first to eleventh embodiments, the threading dislocation 3 has been described. However, it is preferable that the threading dislocation 3 includes a threading edge dislocation. Even in the case where threading dislocations 3 including such threading edge dislocations are formed, the same effect as in the first to eleventh embodiments is obtained, but as shown in FIG. In the case of dislocation, the failure time when an electronic device such as a power element such as a diode or a MOS transistor is formed on the SiC single crystal epitaxial wafer is longer than that of threading screw dislocation. Thereby, it becomes possible to make device characteristics more favorable.

(Other embodiments)
In each of the above embodiments, when the epitaxial film 2 is manufactured on the SiC single crystal substrate 1 by, for example, the CVD method, the direction of the dislocation line of the threading dislocation 3 is directed to a specific direction based on the relationship with the impurity concentration. Is used. However, this is only described as a method for easily aligning the directions of dislocation lines of threading dislocations 3, and from the viewpoint of device characteristics and yield, the epitaxial film of SiC single crystal substrate 1 or SiC single crystal epitaxial wafer If the direction of the dislocation line of the threading dislocation 3 formed in 2 satisfies the angle range shown in each of the above embodiments, the above effect can be obtained, and therefore, the manufacturing method is limited to that described in each embodiment. It is not a thing.

  In each of the above-described embodiments, the case where the hexagonal 4H—SiC SiC single crystal substrate 1 suitable for a power-type electronic device is used has been described, but the present invention can be applied to other crystal polymorphs. . However, the index indicating the direction of the dislocation line of threading dislocation 3 is changed in the case of other crystal polymorphs such as 6H—SiC.

  Further, in each of the embodiments described above, the SiC single crystal epitaxial wafer in which the epitaxial film is grown on the SiC single crystal substrate 1 is taken as an example of the substrate on which the electronic device is formed, but the SiC single crystal is formed on the epitaxial film 2. If a SiC single crystal substrate in which the directions of threading dislocations 3 are aligned is formed by bulk-growing crystals and cutting them out, a device can be formed on the SiC single crystal substrate. Therefore, the present invention is not limited to a SiC single crystal epitaxial wafer, but also includes a SiC single crystal substrate.

  In addition, when indicating the orientation of a crystal, a bar (-) should be added to a desired number, but there is a limitation in expression based on a personal computer application. A bar shall be placed in front of the number.

1 SiC single crystal substrate 2 Epitaxial film 3 Threading dislocation

Claims (14)

  The dislocation line includes a threading dislocation (3) penetrating the (0001) C plane, and the direction of the dislocation line of the threading dislocation (3) is a direction parallel to the [0001] c-axis. Silicon carbide single crystal substrate. A silicon carbide single crystal substrate (1) having the [11-20] direction as an off direction;
An epitaxial film (2) grown on the silicon carbide single crystal substrate (1),
The epitaxial film (2) includes threading dislocations (3) in which dislocation lines penetrate the (0001) C plane, and the direction of the dislocation lines of the threading dislocations (3) is [11-20] from the [0001] c-axis. A silicon carbide single crystal characterized in that the angle of the substrate surface to the normal direction of the substrate surface is −3 ° to 20 ° and the threading dislocation (3) is in the (1-100) plane Epitaxial wafer.   The direction of the dislocation line of the threading dislocation (3) is in the range of 17 ° ± 3 ° from the [0001] c-axis to the normal direction of the substrate surface in the [11-20] direction. The silicon carbide single crystal epitaxial wafer according to claim 2.   The direction of the dislocation line of the threading dislocation (3) is within the range of 8.7 ° ± 3 ° from the [0001] c-axis to the normal direction of the substrate surface in the [11-20] direction. The silicon carbide single crystal epitaxial wafer according to claim 2, wherein A silicon carbide single crystal substrate (1) having the [1-100] direction as an off direction;
An epitaxial film (2) grown on the silicon carbide single crystal substrate (1),
The epitaxial film (2) includes a threading dislocation (3) in which the dislocation line penetrates the (0001) C plane, and the direction of the dislocation line of the threading dislocation (3) is [1-100] from the [0001] c-axis. The angle of the substrate surface in the normal direction to the normal direction is not less than −3 ° and not more than 22.5 °, and the threading dislocation (3) is in the (11-20) plane Single crystal epitaxial wafer.   The direction of the dislocation line of the threading dislocation (3) is in the range of 19.5 ° ± 3 ° from the [0001] c-axis to the normal direction of the substrate surface in the [1-100] direction. 6. The silicon carbide single crystal epitaxial wafer according to claim 5, wherein   The direction of the dislocation line of the threading dislocation (3) is in the range of 15 ° ± 3 ° from the [0001] c-axis to the normal direction of the substrate surface in the [1-100] direction. The silicon carbide single crystal epitaxial wafer according to claim 5.   The direction of the dislocation line of the threading dislocation (3) is such that the angle from the [0001] c-axis to the normal direction of the substrate surface in the [1-100] direction is in the range of 7.6 ° ± 3 °. 6. The silicon carbide single crystal epitaxial wafer according to claim 5, wherein The impurity concentration of the epitaxial film (2) is lower than the impurity concentration of the silicon carbide single crystal substrate (1), and the impurity concentration of the epitaxial film (2) is 1 × 10 ¹⁷ cm ⁻³ or less. The silicon carbide single crystal epitaxial wafer according to claim 2, wherein the silicon carbide single crystal epitaxial wafer is provided.   The silicon carbide single crystal epitaxial wafer according to any one of claims 2 to 9, wherein the threading dislocations (3) include threading edge dislocations.   The silicon carbide single crystal substrate according to claim 1, wherein the threading dislocations (3) include threading edge dislocations.   An electronic device is formed on the silicon carbide single crystal substrate according to claim 1 or 11 or the silicon carbide single crystal epitaxial wafer according to any one of claims 2 to 12. Semiconductor device.   A field effect transistor having a (1-100) plane as a channel plane is formed as an electronic device on the silicon carbide single crystal epitaxial wafer according to any one of claims 2 to 4. A silicon carbide semiconductor device.   A field effect transistor having a (11-20) plane as a channel plane is formed as an electronic device on the silicon carbide single crystal epitaxial wafer according to any one of claims 5 to 8. A silicon carbide semiconductor device.

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