JP2011232910A - Memory diagnosis system - Google Patents

Abstract

PROBLEM TO BE SOLVED: To consider a memory diagnosis system which does not affect the operation of other processes to solve the problem that it is necessary to exclusively control memory diagnosis processing, other processes and memory access, and to temporarily stop the memory access from other processes in order to surely execute memory diagnosis, but if other processes are stopped even temporarily, the original processing of a control device is delayed.SOLUTION: In a memory with an ECC function, bits are intentionally changed in the range of the error correcting capability of the ECC function. For example, in case of an ECC 103 in which the error of one bit is correctable, one bit 102 of data 101 is inverted, and after inversion, the data 101 are read, and it is detected that any bit fixation failure has not occurred by confirming that correction has been executed by the ECC 103. On the other hand, when correction by the ECC 103 is not executed, it is detected that the bit 102 has not been inverted, that is, that the fixation failure of the bit 102 has occurred.

Description

  The present invention relates to a control device having a memory with an ECC (Error Check and Correct) function, and more particularly to a control device capable of detecting an abnormality when a memory abnormality occurs.

  For the memory mounted on the control device, abnormalities such as bit corruption and bit fixed failure may occur. When such a memory abnormality occurs, there is a possibility of incorrect control.

  Generally, countermeasures against bit corruption are taken by attaching ECC. There are various types of ECC mounting methods, but it is common to have a function that corrects 1-bit errors correctly and cannot detect 2-bit errors but can detect them.

  On the other hand, a fixed bit failure cannot be detected unless the value of the fixed bit changes, so the failure cannot be detected for a long period of time. I can't deny it. In that case, ECC alone is not a sufficient measure. Therefore, for memory diagnosis, a measure is taken to actually write data into the memory, change the data, perform a process of diagnosing whether the data has been written correctly, and detect a bit fixed failure in the memory.

  At this time, since memory diagnosis data is temporarily written in the memory, there is a possibility of erroneous control if there is a memory access from another process and the data written for diagnosis is read. Therefore, it is necessary to exclusively control memory diagnosis and memory access of other processes. Therefore, for example, a method is adopted in which the memory access cycle of another process is monitored and a memory diagnosis is performed in the interval of the cycle.

JP 2009-48224 A

  As described above, in order to execute the memory diagnosis, exclusive control between the memory diagnosis process and another process is necessary. Therefore, a method is adopted in which memory access of other processes is monitored, diagnosis is performed on an area where no access is made, or timing control is performed.

  However, in these methods, there is a possibility that memory diagnosis cannot be performed on an area where the access frequency of other processes is high. Therefore, it is necessary to temporarily stop the memory access of other processes in order to reliably execute the memory diagnosis on the entire memory area.

  However, since the other processes include a main process that is an original process of the control device, if the process is temporarily stopped, there is a possibility that a delay occurs in the original process of the control device.

  Therefore, it is necessary to consider a memory diagnostic method that does not affect the behavior of other processes.

  The present invention solves the problem by intentionally changing bits within the error correction capability of the ECC function without changing the error correction data provided by the ECC function in the memory with the ECC function.

  Specifically, for example, in the case of an ECC function capable of correcting a 1-bit error, the error correction data provided by the ECC function is left as it is, and 1 bit of data on the memory is inverted. When the data is read after inversion, since it is in a 1-bit error state, the data is corrected by the ECC function, corrected to the data before the original bit inversion, and read. At this time, by confirming that the correction has been performed by the ECC function, it can be understood that the bit is correctly inverted, that is, no bit fixing failure has occurred. Conversely, when the correction by ECC is not performed, it can be seen that the bit cannot be inverted, that is, a fixed failure of the bit has occurred.

  Also, when the other process reads the data during the memory diagnosis process, as described above, it is corrected by the ECC function, and the other process reads the correct data, so the other process operates normally.

  By using such a memory diagnosis method, it is possible to perform memory diagnosis without affecting the memory access of other processes.

  According to the present invention, it is possible to perform memory diagnosis without affecting the operation of other processes.

FIG. 1 is a conceptual diagram showing an outline of a memory diagnosis process according to the first embodiment of the present invention. FIG. 2 is a configuration diagram showing the configuration of the memory diagnosis method according to the first embodiment of the present invention. FIG. 3 is a flowchart of the memory diagnosis process in Embodiment 1 of the present invention. FIG. 4 is a configuration diagram showing the configuration of the memory diagnosis method according to the second embodiment of the present invention.

  The present invention realizes the purpose of performing memory diagnosis on a memory with an ECC function without adding a special device or the like and without being affected by the operation of other processes, with a simple system configuration. Hereinafter, embodiments of the present invention will be described with reference to the drawings.

  FIG. 1 shows the concept of the memory diagnosis method in Embodiment 1 of the present invention. In this configuration, ECC 103 is assigned to data 101. The specific length of the data 101 and the content of the ECC 103 only have to be a bit error correction capability and a multi-bit error detection capability, and the specific content is considered out of the scope of the present invention.

  In this embodiment, a configuration example using an ECC capable of correcting a 1-bit error and detecting a 2-bit error is used.

  FIG. 1 shows an outline of an operation for diagnosing the presence or absence of a fixed failure of the check bit 102 in the configuration in which the ECC 103 is assigned to the data 101. FIG. 1A is an outline of the operation when there is no fixed fault in the memory, and FIG. 1B is an outline of the operation when there is a fixed fault in the memory.

  In FIG. 1A, the check bit 102 is inverted. At this time, the error correction data provided by the ECC function is not changed. Since the check bit is not a fixed failure, it is reversed correctly. That is, the data 101 is in a 1-bit error state.

  After the bit is inverted, the data 101 is read. Then, since it is a 1-bit error, correction is performed by the ECC function, and correct data before bit inversion is read out. At this time, it is detected that correction has been performed by the ECC function, and it can be seen that the bit is correctly inverted, that is, the check bit 102 is not in a fixed failure.

  In FIG. 1 (b), as in the case of FIG. 1 (a), when the check bit 102 is to be inverted, the check bit 102 has a fixed fault, so the bit can be inverted. Can not.

  As a result, since there is no change in the data 101 and there is no bit error, data that is not corrected by the ECC function is read when the data 101 is read. It is detected that the correction by the ECC is not performed at the time of reading, and it is possible to detect that the check bit 102 has not been reversed, that is, the check bit 102 has a fixed failure.

  As for the influence when another process performs a memory read during the memory diagnosis process, even if the other process performs a memory read when the check bit 102 is inverted and a 1-bit error occurs, as described above. Since the bit correction is performed by the ECC function, another process that has read the memory can read the correct data and perform control correctly.

  If temporary bit corruption occurs in one bit other than the check bit 102 during the memory diagnosis process, a 2-bit error occurs during memory read, and the ECC cannot detect the 2-bit error and correct it correctly.

  In such a case, the memory diagnosis processing inverts the check bit 102 to restore the original state, performs memory read again, performs bit correction by the ECC function, eliminates temporary bit corruption, and then performs memory diagnosis again. By executing the processing, the memory diagnosis can be executed without being affected by temporary bit corruption.

  Further, when temporary bit corruption occurs in a plurality of bits other than the check bit 102 during the memory diagnosis process, the ECC function may perform an erroneous correction. In such a case, it is possible to detect erroneous ECC correction by reading and storing the data 101 in advance before entering the memory diagnosis process and comparing it with the data read during the memory diagnosis process. is there.

  Specifically, the data stored in advance and the data read at the time of the memory diagnosis process are compared, and if they do not match, it can be determined that the ECC function has performed an error correction, and a multi-bit error can be determined. Can be detected.

  As for the hardware configuration, as shown in FIG. 2, as long as the memory 201 with the ECC function 202 and hardware capable of performing memory diagnosis processing (a storage device such as the CPU 203 and the HDD 204 storing the diagnostic program 205) are present. The present invention can be realized. Even if the processor that performs the memory diagnosis process and the processor that performs the control process that is the original function of the control device are the same or different, the memory diagnosis process can be performed.

  FIG. 3 shows the flow of the memory diagnosis process of this embodiment. Memory diagnosis processing is performed in steps S301 to S314 in FIG.

  In step S301, the processing of the following steps S302 to S314 is performed on the data of all areas to be subjected to memory diagnosis while updating the diagnosis target data in order.

  In step S302, the processing of step S303 to step S314 is performed for the number of bits of data subjected to memory diagnosis. Except when changing the next check bit in step S313, which will be described later, the check bits are changed in order and updated so that all the bits are to be checked.

In step S303, the data subjected to the memory diagnosis is read and the value is held. Proceed to step S304.
In step S304, the inspection bit to be inspected is inverted.

Next, the process proceeds to step S305. In step S305, the data to be inspected is read out.
Next, the process proceeds to step S306. In step S306, it is confirmed whether correction by the ECC function has been performed at the time of reading in step S305. If so, the process proceeds to step S307. When not implemented, it progresses to step S310.

  In step S307, if the correction by the ECC function is confirmed in step S306, either one bit inverted in step S304 is corrected correctly, or another bit garbled and overlapped error correction is performed.

  Therefore, the data held in step S303 is compared with the data read in step S305. If they match, it can be determined that the correction has been made correctly, and the process advances to step S308. If they do not match, it is determined that there are multiple bits, and the process proceeds to step S309.

  In step S308, as intended, the bit inverted in step S304 is correctly inverted and it can be determined that it has been corrected. Therefore, it is determined that the check bit is a normal bit not having a fixed failure, and Finish the diagnostic process. In step S302, the next check bit is processed.

  In step S309, it is determined that bit corruption has occurred in a plurality of bits other than the check bit. In this case, it is determined that there is an abnormality in the data area. The processing after abnormality detection should be determined by the control device and is considered out of the scope of the present invention.

  In step S310, if correction by the ECC function could not be confirmed in step S306, inversion of the check bit failed in step S304, the data did not change, and the ECC function did not perform any processing. An error was detected due to the bit corruption of, but it was either impossible to correct. If an error is detected, the process proceeds to step S311. If no error is detected and the ECC function does nothing, the process proceeds to step S314.

  In step S311, if bit corruption other than the check bit can be corrected correctly, the processing can be continued. Therefore, the check bit is inverted and returned to the original state, and the process proceeds to step S312.

  In step S312, the data is read and correction by the ECC function is performed. The process proceeds to step S313. At this time, if an error is detected again but cannot be corrected, it is determined that the data area is abnormal. The processing after abnormality detection should be determined by the control device and is considered out of the scope of the present invention.

  In step S313, the next check bit is set again to the data corrected in step S312 so that the check bit is diagnosed again, and the process returns to step S302.

  In step S314, if the ECC function has not detected anything, it is determined that the check bit has not been reversed in step S304, that is, the check bit has a fixed failure. The processing after failure detection should be determined by the control device and is considered out of the scope of the present invention.

  By implementing the memory diagnosis process as described above, it is possible to execute the memory diagnosis without being affected by the memory access of other processes.

  If the memory diagnosis method of the present invention is used, the memory diagnosis process can be executed regardless of the memory access status of other processes, so that the memory diagnosis process and the other processes can be operated asynchronously. It can be implemented on different processors. Therefore, a processor dedicated to memory diagnosis may be prepared.

  FIG. 4 shows a second embodiment of the present invention of the memory diagnosis method 404 using the dedicated processor 405. In FIG. 4, the operation of the dedicated processor 405 is the same as the flow of the memory diagnosis process shown in FIG.

  In step (1), the dedicated processor 405 sets the data range of all areas to be subjected to memory diagnosis, and in step (2), reads and holds data corresponding to the number of bits of the data to be subjected to memory diagnosis. In step (3), data obtained by inverting one bit of the inspection bit to be inspected is written in the memory 401 without changing the error correction data provided by the ECC function.

  When data in which 1 bit is inverted is read from the memory 401 in step (4), when the ECC function 402 operates and correction by the ECC function is performed, a correction interrupt signal is generated, and the dedicated processor 405 In 5), the correction interrupt signal is detected, and it is confirmed that the correction by the ECC function 402 has been performed.

  In this case, if the data in the memory 401 that has been corrected by the ECC function 402 is read and compared with the held data read before the correction, the memory is determined to be normal.

  Next, when a bit error is detected without being corrected by the ECC function 402, the ECC function 402 generates an error detection interrupt signal. This error detection interrupt signal is detected, and the ECC function 402 does not perform correction and confirms that a bit error has occurred.

  In this case, the inverted bit for memory diagnosis is restored, and correction by the ECC function is attempted. If correction is performed, the bit is inverted again to perform memory diagnosis, and correction cannot be performed. If it is, it is determined as abnormal.

  By implementing the memory diagnosis process as described above, it is possible to execute the memory diagnosis without being affected by the memory access of other processes.

101 Data 102 Inspection bit 103 ECC
200 Memory Diagnosis Method 201 Memory 202 ECC Function 203 CPU
204 HDD
205 Diagnostic Program 400 Memory Diagnosis Method 401 Memory 402 ECC Function 403 CPU
404 HDD
405 Dedicated processor

Claims (6)

In a control device including a processor that performs arithmetic processing, a memory, and an ECC function that corrects and detects errors in the memory,
The processor inverts the bits of the data in the memory within the range of the error correction capability of the ECC function without changing the error correction data provided by the ECC function, and the ECC function corrects the data correctly. A memory diagnostic system comprising means for determining whether or not there is an abnormality in the memory by determining whether or not the correction is made.   2. The memory diagnosis system according to claim 1, wherein the means for determining whether or not there is an abnormality in the memory determines that there is no abnormality when the data is correctly corrected by the ECC function.   2. The memory diagnosis system according to claim 1, wherein the means for determining whether or not there is an abnormality in the memory determines that there is an abnormality when the correction process by the ECC function is not executed and no bit error is detected. A memory diagnostic method that is characterized.   2. The memory diagnosis method according to claim 1, wherein the means for determining whether or not there is an abnormality in the memory holds data before the memory diagnosis is performed, and after the correction processing by the ECC function is executed, the correction result and the data are held. A memory diagnostic system characterized by determining that there is an abnormality when the data does not match.   2. The memory diagnosis method according to claim 1, wherein in the correction processing by the ECC function, correction by the ECC function is not performed, and when a bit error is detected, the inverted bit for memory diagnosis is restored, and ECC is corrected. A memory diagnostic system characterized by trying to correct by function, and if the correction is performed, the bit is inverted again to perform the memory diagnosis, and if the correction cannot be performed, it is determined as abnormal.   6. The memory diagnosis method according to claim 1, wherein the memory diagnosis processing is performed using a dedicated processor for memory diagnosis.

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