JP2011221202A - Display device, electronic device, and driving method of display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve display unevenness with reversible reaction of a drive transistor.SOLUTION: A drive transistor 121 driving an organic electroluminescent (EL) element 127 exhibits a reversible reaction phenomenon in which it tends to temporarily return to an original degradation-free state when a power is switched from ON to OFF so that a bias applied to the drive transistor 121 is eliminated from an energized state that occurs when an image is being displayed. Because the quantity of return in the reaction varies from pixel to pixel, display unevenness is caused to thereby degrade display quality. As a countermeasure, the drive transistor 121 is driven (preferably, linearly driven) in a predetermined bias state before it drives a display device following power-on. This cancels the current variation and the associated variation in display luminance, which are resulting from the reversible reaction, and restores the drive transistor into its original, degraded state. Thus, the variation in return quantity between pixels can be reduced and the current variation caused by the drive transistor 121 can be alleviated. As a result, the display unevenness induced by the reversible reaction phenomenon can be improved.

Description

  The present invention relates to a display device including a pixel circuit (also referred to as a pixel) including a display element (also referred to as an electro-optical element), an electronic apparatus including the display device, and a method for driving the display device. More specifically, the present invention relates to a technique for preventing a change in display luminance caused by a drive transistor.

  As a display element of a pixel, there is a display device using an electro-optical element whose luminance changes depending on an applied voltage or a flowing current. For example, a liquid crystal display element is a typical example of an electro-optical element whose luminance changes depending on an applied voltage, and an organic electroluminescence (Organic Electro Luminescence, Organic EL, Organic) (Light Emitting Diode, OLED; hereinafter referred to as “organic EL”) A typical example is an element. The organic EL display device using the latter organic EL element is a so-called self-luminous display device using an electro-optic element which is a self-luminous element as a pixel display element.

  By the way, in a display device using an electro-optic element, a simple (passive) matrix method and an active matrix method can be adopted as the driving method. However, a simple matrix display device has problems such as a simple structure and a difficulty in realizing a large and high-definition display device.

  Therefore, in recent years, a pixel signal supplied to a light emitting element in a pixel has been converted into an active element, for example, an insulated gate field effect transistor (generally a thin film transistor (TFT)) as a switching transistor. Active matrix systems that are used and controlled have been actively developed.

  When performing display with an electro-optical element, an input image signal supplied via a video signal line is a switching transistor (referred to as a sampling transistor) and a storage capacitor (pixel) provided at the gate (control input terminal) of the drive transistor. The drive signal corresponding to the input image signal is supplied to the electro-optic element.

  In a liquid crystal display device using a liquid crystal display element as an electro-optical element, the liquid crystal display element is a voltage-driven element, and thus the liquid crystal display element is driven with a voltage signal itself corresponding to an input image signal taken into the storage capacitor. On the other hand, in a display device using a current-driven element such as an organic EL element as an electro-optical element, a drive signal (voltage signal) corresponding to an input image signal captured in a storage capacitor is converted into a current signal by a drive transistor. Then, the drive current is supplied to an organic EL element or the like.

  Here, it is known that the threshold voltage and mobility of an active element (driving transistor) for driving an electro-optical element or the characteristics of the electro-optical element vary depending on process variations and environments. Therefore, in order to uniformly control the display luminance over the entire screen of the display device, a mechanism for correcting the luminance variation caused by the characteristic variation of the driving active element and the electro-optical element described above in each pixel circuit. Various studies have been made on (a drive signal stabilization processing technique for maintaining the drive signal constant) (see Patent Document 1).

JP 2008-033193 A

  The electro-optical element and the driving transistor that drives the electro-optical element itself deteriorate during display. Here, regarding the drive transistor for driving the electro-optic element, if the power source is turned off from the power source and the bias applied to the drive transistor is removed from the energized state during display, the drive transistor is temporarily restored to the original state. It was found that a reversible reaction phenomenon was observed. For this reason, when the return amount is different for each pixel, display unevenness due to the reversible reaction phenomenon occurs, and the display quality is deteriorated.

  The present invention has been made in view of the above circumstances, and an object thereof is to provide a mechanism capable of improving display unevenness associated with a reversible reaction phenomenon of a driving transistor.

  In the present invention, first, a drive transistor for generating a drive signal, an electro-optic element connected to the output terminal of the drive transistor, a holding capacitor for holding information according to the signal amplitude of the video signal, and holding information according to the signal amplitude A pixel array section in which pixel circuits each having a sampling transistor for writing into a capacitor are arranged in a matrix is provided.

  The present invention is characterized in that an aging processing unit is provided for aging the drive transistor in a predetermined bias state prior to display driving of the electro-optic element.

  If the drive transistor is aged before the display after the power is turned on, the current fluctuation accompanying the reversible reaction and the display luminance fluctuation accompanying it can be restored to the original deterioration state. As a result, the variation in the return amount for each pixel can be reduced, and the current fluctuation caused by the drive transistor can be reduced.

  According to one embodiment of the present invention, current fluctuation caused by a driving transistor due to a reversible reaction phenomenon of the driving transistor can be reduced. As a result, display unevenness associated with the reversible reaction phenomenon can be improved.

It is a block diagram which shows the outline of a structure of the active matrix type display apparatus which is one Embodiment of a display apparatus. It is a figure explaining the pixel circuit of this embodiment. 3 is a timing chart for explaining a driving timing of a comparative example relating to the pixel circuit shown in FIG. 2. It is a figure explaining the detail of the bias state of a drive transistor. It is a figure explaining the seizure phenomenon by a reversible reaction. It is a figure explaining the principle of a reversible reaction display nonuniformity countermeasure. It is a figure explaining the effect of a reversible reaction display nonuniformity countermeasure. It is FIG. (1) explaining the 1st example of an aging process part. It is FIG. (2) explaining the 1st example of an aging process part. It is a figure explaining the 2nd example of an aging process part. It is a figure (the 1) which shows an example of the electronic device to which this embodiment is applied. It is FIG. (2) which shows an example of the electronic device to which this embodiment is applied. It is FIG. (3) which shows an example of the electronic device to which this embodiment is applied.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. When distinguishing each functional element according to the embodiment, an uppercase English reference such as A, B,... Is added and described, and when not particularly described, this reference is omitted. To describe. The same applies to the drawings.

The description will be made in the following order.
1. Basic concepts (Overview of display device, basics of pixel drive, reversible reaction suppression drive)
2. 2. Overall overview of display device Pixel circuit Pixel circuit operation (basic, explanation of reversible reaction phenomenon, principle of reversible reaction display unevenness countermeasure, appropriate range of aging bias)
5. Aging processing unit (first example, second example)
6). Electronics

<Basic concept>
[Outline of display device]
First, an outline of a display device including an electro-optic element will be described. The display device includes a plurality of pixels. Each pixel includes a light emitting element (an example of an electro-optical element) including a light emitting unit and a driving circuit thereof. As the light emitting part, for example, an organic electroluminescence light emitting part, an inorganic electroluminescence light emitting part, an LED light emitting part, a semiconductor laser light emitting part, or the like can be used.

  In the example described below, the light emitting element includes an organic electroluminescence light emitting unit. More specifically, the light emitting element is an organic electroluminescent element (organic EL element) having a structure in which organic electroluminescent light emitting parts (light emitting parts ELP) connected to a drive circuit are stacked. The light emitting portion of the organic EL element has a known configuration and structure such as an anode electrode, a hole transport layer, a light emitting layer, an electron transport layer, and a cathode electrode.

  The display device includes at least a horizontal driving unit (signal output circuit) that supplies a signal potential to the pixel circuit P, a writing scanning unit that performs scanning to supply the signal potential supplied from the horizontal driving unit to the gate of the driving transistor, A pixel array unit in which the pixel circuits P are arranged is provided.

  The number of pixel array sections is H in the first direction (for example, the horizontal direction), and in a second direction different from the first direction (specifically, a direction orthogonal to the first direction, for example, the vertical direction). V, a total of H × V light-emitting elements arranged in a two-dimensional matrix, V write scan lines connected to the write scan unit and extending in the first direction, and connected to the horizontal drive unit and second H video signal lines (data lines) extending in the direction are provided. The configurations and structures of the horizontal driving unit, the writing scanning unit, and the pixel array unit can be a known configuration and structure.

  There are various circuits as drive circuits (pixel circuits) for driving a light emitting unit (light emitting element). For example, as a known circuit, a drive circuit basically composed of 5 transistors / 1 capacitor section (5Tr / 1C drive circuit), a drive circuit basically composed of 4 transistors / 1 capacitor section (4Tr / 1C). Driving circuit) A driving circuit basically composed of 3 transistors / 1 capacitor section (3Tr / 1C driving circuit) and a driving circuit basically composed of 2 transistors / 1 capacitor section (2Tr / 1C driving circuit) is there.

  As a minimum structure, the transistor includes a driving transistor that drives the light emitting element and a sampling transistor (writing transistor) that is switched by a writing scanning unit. In the present embodiment, the capacitor is connected between the gate and the source of the driving transistor in order to realize the bootstrap function.

  The connection point of the gate of the driving transistor, the source / drain region of the sampling transistor, and one terminal of the capacitor is defined as the first node, and the connection point of the source of the driving transistor, one terminal of the light emitting element, and the other terminal of the capacitor. Let it be the second node.

  When color display is supported, typically, one pixel circuit includes three subpixels (a red light emitting subpixel that emits red light, a green light emitting subpixel that emits green light, and a blue light emitting subpixel that emits blue light). Consists of.

[Basics of pixel driving]
In the following description, it is assumed that the light-emitting elements constituting each pixel are line-sequentially driven and the display frame rate is FR (times / second). That is, (V / 3) pixels arranged in the v-th row (where v = 1, 2, 3,..., V), more specifically, each of V sub-pixels are configured. The light emitting elements are driven simultaneously. In other words, in each light-emitting element constituting one row, the timing of light emission / non-light emission is controlled in units of rows to which they belong. Note that the process of writing the video signal for each pixel constituting one row may be a process of simultaneously writing the video signal for all the pixels (hereinafter, may be simply referred to as a simultaneous writing process). It may be a process of sequentially writing video signals every time (hereinafter, simply referred to as a sequential writing process). Which writing process is used may be appropriately selected according to the configuration of the drive circuit.

  In principle, the driving and operation related to the light emitting element located in the vth row and the hth column (h = 1, 2, 3,..., H) will be described. The (h, v) th light emitting element will be described below. Alternatively, it is referred to as the (h, v) th subpixel. Various processes (threshold voltage canceling process, writing process, mobility correcting process) are performed before the end of the horizontal scanning period (vth horizontal scanning period) of each light emitting element arranged in the vth row. Done. The writing process and the mobility correction process need to be performed within the v-th horizontal scanning period. On the other hand, depending on the type of the drive circuit, the threshold voltage canceling process and the accompanying preprocessing can be performed prior to the v-th horizontal scanning period.

  Then, after all the various processes are completed, the light emitting units constituting the light emitting elements arranged in the vth row are caused to emit light. The light emitting unit may emit light immediately after all the various processes are completed, or the light emitting unit may emit light after a predetermined period (for example, a horizontal scanning period for a predetermined number of rows) has elapsed. This predetermined period can be set as appropriate according to the specifications of the display device, the configuration of the drive circuit, and the like. In the following description, for convenience of explanation, it is assumed that the light emitting unit emits light immediately after the completion of various processes. The light emission of the light emitting units constituting the light emitting elements arranged in the vth row is continued until just before the start of the horizontal scanning period of the light emitting elements arranged in the (v + v ′) th row.

  “V” is determined by the design specifications of the display device. That is, the light emission of the light emitting units constituting the light emitting elements arranged in the vth row of a certain display frame is continued until the (v + v′−1) th horizontal scanning period. On the other hand, from the beginning of the (v + v ′) th horizontal scanning period to the completion of the writing process and the mobility correction process within the vth horizontal scanning period in the next display frame, they are arranged in the vth row. As a general rule, the light-emitting portion constituting each light-emitting element maintains a non-light-emitting state. By providing the non-light emitting period (non-light emitting period), the afterimage blur caused by the active matrix driving is reduced, and the moving image quality can be further improved.

  However, the light emission state / non-light emission state of each sub-pixel (light-emitting element) is not limited to the state described above. The time length of the horizontal scanning period is a time length of less than (1 / FR) × (1 / V) seconds. When the value of (v + v ′) exceeds V, the excess horizontal scanning period is processed in the next display frame.

  Regardless of the configuration of the driving circuit, the driving method of the light emitting unit is, for example, as follows.

  a) The potential difference between the first node and the second node exceeds the threshold voltage of the driving transistor, and the potential difference between the second node and the cathode electrode provided in the light emitting unit is the threshold voltage of the light emitting unit. So that the first node initialization voltage is applied to the first node and the second node initialization voltage is applied to the second node. This process is called a pretreatment process. This pretreatment process may be classified into a discharge process and an initialization process.

  b) In a state where the potential of the first node is maintained, a threshold voltage canceling process for changing the potential of the second node is performed toward a potential obtained by subtracting the driving transistor threshold voltage from the potential of the first node. This process is called a threshold voltage correction process.

  c) A writing process is performed in which the video signal is applied from the video signal line to the first node through the sampling transistor turned on by the signal from the write scanning line. This process is called a signal writing process.

  d) The sampling transistor is turned off by a signal from the write scanning line, whereby the first node is brought into a floating state, and a current corresponding to the value of the potential difference between the first node and the second node is emitted by the driving transistor. The light emitting part is driven by flowing it through the part. This process is called a light emission process.

  There is a mode in which a mobility correction step is further added between the threshold voltage correction step and the signal writing step, and there is also a mode in which the mobility correction step is performed simultaneously with the signal writing step.

  Here, in the threshold voltage correction step, a threshold voltage canceling process is performed in which the potential of the second node is changed toward the potential obtained by subtracting the threshold voltage of the driving transistor from the potential of the first node. More specifically, in order to change the potential of the second node toward the potential obtained by subtracting the threshold voltage of the driving transistor from the potential of the first node, the threshold voltage of the driving transistor is changed to the potential of the second node in the preprocessing step. Is applied to one of the source / drain regions of the driving transistor.

  Qualitatively, in the threshold voltage cancellation processing, the potential difference between the first node and the second node (in other words, the potential difference between the gate and the source of the driving transistor) approaches the threshold voltage of the driving transistor. Depending on the threshold voltage cancel processing time. Therefore, for example, in a configuration in which the threshold voltage cancel processing time is sufficiently long, the potential of the second node reaches the potential obtained by subtracting the threshold voltage of the drive transistor from the potential of the first node. Then, the potential difference between the first node and the second node reaches the threshold voltage of the driving transistor, and the driving transistor is turned off. On the other hand, for example, in a case where the threshold voltage cancellation processing time has to be set short, the potential difference between the first node and the second node is larger than the threshold voltage of the drive transistor, and the drive transistor is in the off state. May not be. As a result of the threshold voltage canceling process, the driving transistor does not necessarily need to be turned off.

[Reversible reaction suppression drive]
Here, in the pixel driving method of the present embodiment, when the power is turned off / on, the driving transistor is driven in a suitable bias state for a predetermined period before the display is started after being turned on (aging). The operation is called an operation or an aging process), and a normal (original) drive operation is performed. An appropriate bias state means that the drive is not saturated and that the display element does not display.

  The reason why such an aging process is required is to alleviate the luminance fluctuation due to the influence of the reversible reaction of the driving transistor that drives the display element. That is, the drive transistor itself deteriorates when the electro-optic element is displayed, but the amount of deterioration depends on the display image, and therefore the amount of deterioration of each pixel differs. Here, regarding the drive transistor, when the bias applied to the drive transistor is stopped from the energized state during display (power-on state) (power-off state), the drive transistor temporarily returns to the original non-degraded state. There is a brightness fluctuation. This property (phenomenon) is called a reversible reaction. If the return amount (brightness fluctuation amount) due to this reversible reaction is different for each pixel, display unevenness due to the reversible reaction phenomenon occurs even if the drive signal stabilization processing technology or the brightness control according to the deterioration curve is applied. As a result, the display quality is degraded.

  In order to realize such an aging operation for suppressing a reversible reaction, a reversible reaction of the drive transistor occurs by turning off the power supply during display. It is preferable to drive in a bias state. By driving the drive transistor in a state where the electro-optic element does not display, the influence of the reversible reaction of the drive transistor can be mitigated without causing deterioration of the drive transistor or the electro-optic element. By suppressing the reversible reaction of the driving transistor and reducing current fluctuation caused by the driving transistor, a display device without display unevenness can be realized.

  As the aging drive in the “appropriate bias state”, an effect can be expected by operating in the saturation region, but it is preferable to perform the aging drive in the linear region. That is, the basic concept is to deteriorate the drive transistor by applying a bias (return to the original deterioration state). Although the effect can be expected by operating the drive transistor in the saturation region, it is necessary to lower the bias applied to the drive transistor in order to prevent current from flowing to the display element (organic EL element) during aging. Then, since the load applied to the driving transistor is small, the return amount is small and time is required. On the other hand, when the driving transistor is operated in the linear region, a high voltage can be applied to the gate electrode, and the characteristics can be returned to the original deterioration state in a short time.

  When the aging operation is performed, the normal display start is delayed by that amount. The reversible reaction of the drive transistor hardly occurs at the beginning when it is not degraded, and becomes more prominent as the degradation progresses. Therefore, the aging operation for suppressing the reversible reaction is less likely to be performed from the beginning of use, and it is preferable to avoid unnecessary display waiting by performing the aging operation after the deterioration has progressed to some extent. For the determination of the degree of progress of deterioration, various known methods such as monitoring the gate-source voltage being displayed (or simply monitoring the source voltage) can be applied.

  In order to realize such an aging operation, it is conceivable to newly provide a switching transistor for this operation, but this increases the size of the pixel circuit. Therefore, in the present embodiment, the above-described operation is realized by controlling an existing transistor. Which transistor is used depends on the configuration of the pixel circuit. Hereinafter, the 2Tr / 1C driving circuit having the simplest configuration will be described as an example.

<Overview of display device>
FIG. 1 is a block diagram showing an outline of the configuration of an active matrix display device which is an embodiment of a display device. In the present embodiment, for example, an organic EL element is used as a display element (electro-optical element) of a pixel, a thin film transistor (TFT) is used as an active element, and the organic EL element is formed on a semiconductor substrate on which the thin film transistor is formed. A case where the present invention is applied to an active matrix organic EL display (hereinafter referred to as “organic EL display device”) will be described as an example. Such an organic EL display device is used for a display unit of a portable music player or other electronic device using a recording medium such as a semiconductor memory, a mini disk (MD), or a cassette tape.

  In the following, an organic EL element will be specifically described as an example of a pixel display element. However, this is merely an example, and the target display element is not limited to an organic EL element. In general, the embodiments described later can be similarly applied to all display elements that emit light by current drive.

  As shown in FIG. 1, the organic EL display device 1 includes a display panel unit 100, a drive signal generation unit 200, and a video signal processing unit 300. In the display panel unit 100, a pixel circuit P (also referred to as a pixel) having organic EL elements (not shown) as a plurality of display elements has a display aspect ratio of X: Y (for example, 9:16). ) Are arranged so as to constitute an effective video area. The drive signal generation unit 200 is an example of a panel control unit that generates various pulse signals for driving and controlling the display panel unit 100. The drive signal generation unit 200 and the video signal processing unit 300 are built in a one-chip IC (Integrated Circuit).

  For example, in a panel type display device, a pixel array unit 102 in which elements constituting a pixel circuit such as a TFT or an electro-optical element are arranged in a matrix form, and arranged around the pixel array unit 102 to drive each pixel circuit P. A control unit 109 whose main part is a scanning unit (horizontal driving unit or vertical driving unit) connected to a scanning line for performing the operation, a drive signal generation unit 200 that generates various signals for operating the control unit 109, Generally, the entire apparatus is configured to include the video signal processing unit 300.

  As a product form, the display panel unit 100 in which the pixel array unit 102 and the control unit 109 are mounted on the same support substrate 101 (for example, a glass substrate), the drive signal generation unit 200, and the video signal processing unit 300 are separated. As shown in the drawing, the present invention is not limited to being provided as an organic EL display device 1 in the form of a module (composite part) including all of these. It is also possible to mount the pixel array unit 102 on the display panel unit 100 and provide the organic EL display device 1 with the display panel unit 100 alone. In this case, peripheral circuits such as the control unit 109, the drive signal generation unit 200, and the video signal processing unit 300 are mounted on a substrate (for example, a flexible substrate) different from the organic EL display device 1 configured only by the display panel unit 100. Form (referred to as a peripheral circuit panel outside arrangement configuration).

  In the case where the pixel array unit 102 and the control unit 109 are mounted on the same support substrate 101 to constitute the display panel unit 100, the control is performed simultaneously in the process of generating the TFTs of the pixel array unit 102. A pixel array unit 102 by a mechanism (referred to as a TFT integrated configuration) for generating each TFT for the unit 109 (also the drive signal generation unit 200 and the video signal processing unit 300 as necessary) and a COG (Chip On Glass) mounting technique. A mechanism (referred to as a COG mounting configuration) in which a semiconductor chip for the control unit 109 (and the drive signal generation unit 200 and the video signal processing unit 300 as necessary) may be directly mounted on the support substrate 101 on which is mounted.

  The display panel unit 100 is an example of a pixel array unit 102 in which pixel circuits P are arranged in a matrix of n rows × m columns on a support substrate 101, and a vertical scanning unit that scans the pixel circuits P in the vertical direction. A vertical driving unit 103, a horizontal driving unit (also referred to as a horizontal selector or a data line driving unit) 106, which is an example of a horizontal scanning unit that scans the pixel circuit P in the horizontal direction, and a terminal unit (pad) for external connection Part) 108 and the like are integrated. That is, peripheral drive circuits such as the vertical drive unit 103 and the horizontal drive unit 106 are formed on the same support substrate 101 as the pixel array unit 102.

  The vertical drive unit 103 includes, for example, a write scan unit (write scanner WS; Write Scan) 104 and a drive scan unit (drive scanner DS; Drive Scan) 105 that functions as a power supply scanner having power supply capability. The vertical drive unit 103 and the horizontal drive unit 106 constitute a control unit 109 that controls writing of a signal potential to a storage capacitor, threshold correction operation, mobility correction operation, and bootstrap operation.

  The configuration of the illustrated vertical drive unit 103 and the corresponding scanning line is shown in conformity with the case where the pixel circuit P has a 2TR configuration of the present embodiment described later. However, depending on the configuration of the pixel circuit P, other configurations may be used. A scanning unit may be provided.

  For example, the pixel array unit 102 is driven by the writing scanning unit 104 and the driving scanning unit 105 from one side or both sides in the horizontal direction shown in the figure, and driven by the horizontal driving unit 106 from one side or both sides in the vertical direction shown in the figure. It has come to be.

  Various pulse signals are supplied to the terminal unit 108 from the drive signal generation unit 200 arranged outside the organic EL display device 1. Similarly, the video signal Vsig is supplied from the video signal processing unit 300. When color display is supported, video signals Vsig_R, Vsig_G, and Vsig_B for each color (in this example, three primary colors of R (red), G (green), and B (blue)) are supplied.

  For example, necessary pulse signals such as shift start pulses SPDS and SPWS and vertical scanning clocks CKDS and CKWS, which are examples of vertical write start pulses, are supplied as pulse signals for vertical driving. Necessary pulse signals such as a horizontal start pulse SPH and a horizontal scanning clock CKH, which are examples of horizontal write start pulses, are supplied as pulse signals for horizontal driving.

  Each terminal of the terminal unit 108 is connected to the vertical driving unit 103 and the horizontal driving unit 106 via a wiring 199. For example, each pulse supplied to the terminal unit 108 is internally adjusted to a voltage level by a level shifter unit (not shown) as necessary, and then supplied to each unit of the vertical driving unit 103 and the horizontal driving unit 106 via a buffer. Supplied.

  Although the pixel array unit 102 is not shown in the drawing (details will be described later), pixel circuits P in which pixel transistors are provided with respect to an organic EL element as a display element are two-dimensionally arranged in a matrix form. On the other hand, a vertical scanning line is wired for each row, and a signal line (an example of a horizontal scanning line) is wired for each column.

  For example, the pixel array unit 102 includes video signal lines (vertical scanning lines: writing scanning lines 104WS and power supply lines 105DSL) and horizontal scanning side scanning lines (horizontal scanning lines). Data line) 106HS is formed. An organic EL element (not shown) and a thin film transistor (TFT) for driving the organic EL element are omitted at the intersection of the vertical scanning line and the horizontal scanning line. A pixel circuit P is configured by a combination of an organic EL element and a thin film transistor.

  Specifically, for each pixel circuit P arranged in a matrix, the write scanning lines 104WS_1 to 104WS_n for n rows driven by the write scanning unit 104 with the write drive pulse WS and the drive scanning unit Power supply lines 105DSL_1 to 105DSL_n for n rows driven by the power supply drive pulse DSL by 105 are wired for each pixel row.

  The writing scanning unit 104 and the driving scanning unit 105 sequentially select the pixel circuits P via the writing scanning line 104WS and the power supply line 105DSL based on the vertical driving system pulse signal supplied from the driving signal generation unit 200. To do. The horizontal driving unit 106 samples a predetermined potential in the video signal Vsig to the selected pixel circuit P via the video signal line 106HS based on the horizontal driving system pulse signal supplied from the driving signal generation unit 200. To write to the holding capacity.

  The organic EL display device 1 of the present embodiment can be driven by line sequential driving, surface sequential driving, or other methods. For example, the writing scanning unit 104 and the driving scanning unit 105 of the vertical driving unit 103 are The pixel array unit 102 is scanned in units of rows, and in synchronization with this, the horizontal driving unit 106 writes an image signal to the pixel array unit 102 simultaneously for one horizontal line.

  The horizontal driving unit 106 includes, for example, a driver circuit that turns on switches that are not shown in the figure provided on the video signal lines 106HS of all the columns, and receives the pixel signals input from the video signal processing unit 300. In order to simultaneously write in all the pixel circuits P for one line of the row selected by the vertical drive unit 103, the switches provided on the video signal lines 106HS of all the columns are turned on all at once, and the driver circuit The video signal Vsig (an example of the horizontal scanning signal) is supplied to the horizontal scanning line (video signal line 106HS) via the.

  Each unit of the vertical drive unit 103 is configured by a combination of logic gates (including latches) and a driver circuit, and each pixel circuit P of the pixel array unit 102 is selected in units of rows by the logic gates, and is vertically connected via the driver circuit. A vertical scanning signal is supplied to the scanning line. FIG. 1 shows a configuration in which the vertical drive unit 103 is disposed only on one side of the pixel array unit 102. However, a configuration in which the vertical drive unit 103 is disposed on both the left and right sides with the pixel array unit 102 interposed therebetween is employed. Is also possible. Similarly, FIG. 1 shows a configuration in which the horizontal drive unit 106 is disposed only on one side of the pixel array unit 102, but a configuration in which the horizontal drive unit 106 is disposed on both upper and lower sides with the pixel array unit 102 interposed therebetween is employed. It is also possible.

<Pixel circuit>
FIG. 2 is a diagram illustrating the pixel circuit P of the present embodiment. The pixel circuit P uses an n-type drive transistor 121. In addition, the circuit for suppressing the fluctuation of the drive current Ids to the organic EL element due to the change with time of the organic EL element, that is, the change in the current-voltage characteristic of the organic EL element which is an example of the electro-optical element The present invention is characterized in that a drive signal stabilizing circuit for maintaining the drive current Ids constant is provided. Further, the organic EL element is characterized in that it has a function of keeping the driving current constant even when the current-voltage characteristic of the organic EL element changes with time.

  In other words, a 2TR drive configuration using one switching transistor (sampling transistor 125) for scanning in addition to the drive transistor 121 is employed. The on / off timing (switching timing) of the power supply drive pulse DSL and the write drive pulse WS for controlling each switching transistor is set as the operation timing described later. This prevents the influence on the drive current Ids due to the change with time of the organic EL element 127 and the characteristic variation of the drive transistor 121 (for example, variations and fluctuations in threshold voltage, mobility, etc.). Since it is a 2TR drive configuration and the number of elements and wirings are small, high definition can be achieved.

  Specifically, the pixel circuit P includes a storage capacitor 120, an n-type drive transistor 121, an n-type transistor 125 to which an active H (high) write drive pulse WS is supplied, and an electro-optic that emits light when a current flows. It has the organic EL element 127 which is an example of an element (light emitting element).

  The storage capacitor 120 is connected between the gate (node ND122) and the source of the driving transistor 121, and the source of the driving transistor 121 is directly connected to the anode end of the organic EL element 127. The cathode end of the organic EL element 127 is connected to a common cathode line 127K common to all pixels, and a cathode potential Vcath (for example, ground potential GND) is applied.

  The storage capacitor 120 functions also as a bootstrap capacitor. That is, the pixel circuit P first has a feature in the connection mode of the storage capacitor 120, and constitutes a bootstrap circuit which is an example of a drive signal stabilization circuit as a circuit for preventing fluctuations in the drive current due to changes over time of the organic EL element 127. In the point. As a method of suppressing the influence on the drive current Ids due to the characteristic variation of the drive transistor 121 (for example, variation or fluctuation in threshold voltage, mobility, etc.), this is dealt with by devising the drive timing of each of the transistors 121 and 125.

  The drain of the drive transistor 121 is connected to a power supply line 105DSL from the drive scanning unit 105 that functions as a power scanner. The power supply line 105DSL is characterized in that the power supply line 105DSL itself has a power supply capability to the drive transistor 121.

  Specifically, the drive scanning unit 105 supplies power to the drain of the drive transistor 121 by switching between the first voltage Vcc_H on the high voltage side and the second voltage Vcc_L on the low voltage side corresponding to the power supply voltage. A voltage switching circuit is provided.

  The second potential Vcc_L is a potential sufficiently lower than the offset potential Vofs (also referred to as a reference potential) of the video signal Vsig in the video signal line 106HS. Specifically, the gate-source voltage Vgs of the drive transistor 121 (the difference between the gate potential Vg and the source potential Vs) is larger than the threshold voltage Vth of the drive transistor 121. Two potential Vcc_L is set. The offset potential Vofs is used for an initialization operation prior to the threshold correction operation and also used for precharging the video signal line 106HS in advance.

  Sampling transistor 125 has a gate connected to write scan line 104WS from write scan unit 104, a drain connected to video signal line 106HS, and a source connected to the gate (node ND122) of drive transistor 121. An active H write drive pulse WS is supplied to the gate from the write scanning unit 104.

  The sampling transistor 125 may have a connection mode in which the source and the drain are reversed. As the sampling transistor 125, either a depletion type or an enhancement type can be used.

<Operation of pixel circuit>
[Regular period]
FIG. 3 is a timing chart for explaining basic driving timings related to the pixel circuit P shown in FIG. 2, and shows a case of line sequential driving. In the timing chart, the length (time length) of the horizontal axis indicating each period is a schematic one and does not indicate the ratio of the time length of each period.

  In FIG. 3, the change in the potential of the write scanning line 104WS, the change in the potential of the power supply line 105DSL, and the change in the potential of the video signal line 106HS are shown with a common time axis. In parallel with these potential changes, changes in the gate potential Vg and source potential Vs of the drive transistor 121 are also shown for one row (the first row in the figure).

  FIG. 3 shows a basic example for realizing the threshold correction function, the mobility correction function, and the bootstrap function in the pixel circuit P, and realizes the threshold correction function, the mobility correction function, and the bootstrap function. The drive timing for this is not limited to the mode shown in FIG. 3, and various modifications are possible. The mechanism of the present embodiment, which will be described later, can be applied even at the driving timings of these various modifications.

  The drive timing shown in FIG. 3 is the case of line-sequential drive, and the write drive pulse WS, power supply drive pulse DSL, and video signal Vsig are set for one row as one set, and the timing of each signal (particularly phase relationship). Are controlled independently for each row, and when a row is changed, it is shifted by 1H (H is a horizontal scanning period).

  In the following, for ease of explanation and understanding, it is assumed that the write gain is 1 (ideal value) unless otherwise specified, and the information of the signal amplitude ΔVin is written to and held in the storage capacitor 120. Describe and explain briefly. When the write gain is less than 1, not the magnitude of the signal amplitude ΔVin itself but the information multiplied by the gain corresponding to the magnitude of the signal amplitude ΔVin is held in the holding capacitor 120. A ratio of the size of information written in the storage capacitor 120 corresponding to the signal amplitude ΔVin is referred to as a write gain.

  For ease of explanation and understanding, unless otherwise noted, the bootstrap gain is assumed to be 1 (ideal value) and described briefly. When the storage capacitor 120 is provided between the gate and source of the drive transistor 121, the rate of increase of the gate potential Vg relative to the increase of the source potential Vs is referred to as bootstrap gain (bootstrap operation capability).

  At this drive timing, the period in which the video signal Vsig is at the offset potential Vofs, which is an ineffective period, is the first half of one horizontal period, and the period in which the video signal Vsig is in the effective period is the second half of one horizontal period. Part. The threshold value correction operation is repeated a plurality of times (four times in the figure) every horizontal period including the effective period and the ineffective period of the video signal Vsig.

  In the light emission period B (display period) of the organic EL element 127, the power supply line 105DSL is at the first potential Vcc_H and the sampling transistor 125 is turned off. At this time, since the drive transistor 121 is set to operate in the saturation region, the drive current Ids flowing through the organic EL element 127 is expressed by the equation (1) according to the gate-source voltage Vgs of the drive transistor 121. Takes the value indicated.

  That is, the drive transistor 121 is driven in a saturation region where the drive current Ids is constant regardless of the drain-source voltage. Therefore, the current flowing between the drain and source of the transistor operating in the saturation region is Ids, the mobility is μ, the channel width (gate width) is W, the channel length (gate length) is L, and the gate capacitance (gate per unit area) The driving transistor 121 is a constant current source having a value represented by the following formula (1), where Cox is the oxide film capacitance) and Vth is the threshold voltage of the transistor. “^” Indicates a power. As apparent from the equation (1), in the saturation region, the drain current Ids of the transistor is controlled by the gate-source voltage Vgs and operates as a constant current source.

  In the non-light emission period (quenching period), first, in the discharge period C, the power supply line 105DSL is switched to the second potential Vcc_L. At this time, when the second potential Vcc_L is smaller than the sum of the threshold voltage VthEL and the cathode potential Vcath of the organic EL element 127, that is, if “Vcc_L <VthEL + Vcath”, the organic EL element 127 is extinguished and the power supply line 105DSL is It becomes the source side of the driving transistor 121. At this time, the anode of the organic EL element 127 is charged to the second potential Vcc_L. That is, by making the drain (power supply end) and source (output end) of the drive transistor 121 equal to each other, the organic EL element 127 is changed from the light emitting state to the quenching state.

  Further, in the initialization period D, when the video signal line 106HS becomes the offset potential Vofs, the sampling transistor 125 is turned on to set the gate potential of the drive transistor 121 to the offset potential Vofs. At this time, the gate-source voltage Vgs of the driving transistor 121 takes a value of “Vofs−Vcc_L”. Since this threshold value correcting operation cannot be performed unless “Vofs−Vcc_L” is larger than the threshold voltage Vth of the driving transistor 121, it is necessary to satisfy “Vofs−Vcc_L> Vth”.

  Thereafter, when the first threshold correction period E1 is entered, the power supply line 105DSL is switched again to the first potential Vcc_H. By setting the power supply line 105DSL (that is, the power supply voltage to the drive transistor 121) to the first potential Vcc_H, the anode of the organic EL element 127 becomes the source of the drive transistor 121, and the drive current Ids flows from the drive transistor 121. Since an equivalent circuit of the organic EL element 127 is represented by a diode and a capacitor, if the anode potential with respect to the cathode potential Vcath of the organic EL element 127 is Vel, in other words, as long as “Vel ≦ Vcath + VthEL”, in other words, the organic EL element As long as the leakage current 127 is considerably smaller than the current flowing through the driving transistor 121, the driving current Ids of the driving transistor 121 is used to charge the storage capacitor 120 and the parasitic capacitance Cel of the organic EL element 127. At this time, the anode potential Vel of the organic EL element 127 increases with time.

  After a certain period of time, the sampling transistor 125 is turned off. At this time, if the gate-source voltage Vgs of the drive transistor 121 is larger than the threshold voltage Vth (that is, if threshold correction is not completed), the drive current Ids of the drive transistor 121 flows so as to receive the storage capacitor 120. Subsequently, the gate-source voltage Vgs of the drive transistor 121 increases. At this time, since the organic EL element 127 is reverse-biased, the organic EL element 127 does not emit light.

  In the second threshold correction period E2, when the video signal line 106HS becomes the offset potential Vofs again, the sampling transistor 125 is turned on, the gate potential of the drive transistor 121 is set to the offset potential Vofs, and the threshold correction operation is started again. . By repeating this operation, the gate-source voltage Vgs of the drive transistor 121 finally takes the value of the threshold voltage Vth. At this time, “Vel = Vofs−Vth ≦ Vcath + VthEL”.

  In this operation example, the threshold correction operation is performed with one horizontal period as a processing cycle in order to reliably hold the voltage corresponding to the threshold voltage Vth of the drive transistor 121 in the storage capacitor 120 by repeatedly executing the threshold correction operation. However, this repeating operation is not essential, and only one threshold value correcting operation may be executed with one horizontal period as a processing cycle.

  After the threshold correction operation ends (after the fourth threshold correction period E4 in this example), the sampling transistor 125 is turned off and the writing & mobility correction preparation period J starts. When the video signal line 106HS becomes the signal potential Vin (= Vofs + ΔVin), the sampling transistor 125 is turned on again to enter the sampling period & mobility correction period K. The signal amplitude ΔVin is a value corresponding to the gradation. The gate potential of the sampling transistor 125 becomes the signal potential Vin (= Vofs + ΔVin) because the sampling transistor 125 is turned on, but the drain of the drive transistor 121 is the first potential Vcc_H and the drive current Ids flows, so the source potential Vs. Will rise over time. In the figure, this increase is indicated by ΔV.

  If the source voltage Vs does not exceed the sum of the threshold voltage VthEL and the cathode potential Vcath of the organic EL element 127, in other words, if the leakage current of the organic EL element 127 is considerably smaller than the current flowing through the driving transistor 121, The drive current Ids is used to charge the storage capacitor 120, the parasitic capacitance of the organic EL element 127, and Cel.

  At this time, since the threshold value correcting operation of the driving transistor 121 is completed, the current flowing through the driving transistor 121 reflects the mobility μ. Specifically, when the mobility μ is large, the amount of current at this time is large and the source rises quickly. Conversely, when the mobility μ is small, the amount of current is small and the rise of the source is slow. As a result, the gate-source voltage Vgs of the driving transistor 121 decreases to reflect the mobility μ, and becomes a gate-source voltage Vgs that completely corrects the mobility μ after a certain time has elapsed.

  Thereafter, the light emission period L is entered, the sampling transistor 125 is turned off to complete writing, and the organic EL element 127 is caused to emit light. Since the gate-source voltage Vgs of the drive transistor 121 is constant due to the bootstrap effect of the storage capacitor 120, the drive transistor 121 causes a constant current (drive current Ids) to flow through the organic EL element 127 and the anode of the organic EL element 127. The potential Vel rises to a voltage Vx through which a current called a drive current Ids flows through the organic EL element 127, and the organic EL element 127 emits light.

  In the pixel circuit P, the organic EL element 127 changes its IV characteristic as the light emission time becomes longer. Therefore, the potential of the node ND121 (that is, the source potential Vs of the driving transistor 121) also changes. However, since the gate-source voltage Vgs of the drive transistor 121 is maintained at a constant value by the bootstrap effect by the storage capacitor 120, the current flowing through the organic EL element 127 does not change. Therefore, even if the IV characteristic of the organic EL element 127 deteriorates, a constant current (drive current Ids) always flows through the organic EL element 127, and the luminance of the organic EL element 127 does not change.

  Here, the relationship between the drive current Ids and the gate voltage Vgs can be expressed as in Expression (2) by substituting “ΔVin + Vth−ΔV” into Vgs in Expression (1) representing the transistor characteristics. In formula (2), k = (1/2) (W / L) Cox.

  From this equation (2), it can be seen that the term of the threshold voltage Vth is canceled and the drive current Ids supplied to the organic EL element 127 does not depend on the threshold voltage Vth of the drive transistor 121. Basically, the drive current Ids is determined by the signal amplitude ΔVin (specifically, the sampling voltage held in the holding capacitor 120 corresponding to the signal amplitude ΔVin = Vgs). In other words, the organic EL element 127 emits light with a luminance corresponding to the signal amplitude ΔVin.

  At this time, the information held in the holding capacitor 120 is corrected by the increase ΔV of the source potential Vs. The increase ΔV works so as to cancel the effect of the mobility μ located in the coefficient part of the equation (2). The correction amount ΔV for the mobility μ of the driving transistor 121 is added to the signal written in the storage capacitor 120. The direction is actually a negative direction, and in this sense, the increase amount ΔV is the mobility. It is also called a correction parameter ΔV and a negative feedback amount ΔV.

  The drive current Ids flowing through the organic EL element 127 is substantially dependent only on the signal amplitude ΔVin because the fluctuations in the threshold voltage Vth and mobility μ of the drive transistor 121 are offset. Since the drive current Ids does not depend on the threshold voltage Vth or mobility μ, even if the threshold voltage Vth or mobility μ varies depending on the manufacturing process or changes with time, the drain-source drive current Ids does not change. In addition, the light emission luminance of the organic EL element 127 does not vary.

  When the storage capacitor 120 is connected between the gate and the source of the driving transistor 121, the gate potential Vg is interlocked with the fluctuation of the source potential Vs of the driving transistor 121 even when the n-type driving transistor 121 is used. The circuit configuration and drive timing for realizing the bootstrap function are used. Even if there is an anode potential fluctuation (that is, a source potential fluctuation of the driving transistor 121) of the organic EL element 127 due to a change in characteristics of the organic EL element 127 with time, the gate potential Vg can be changed so as to cancel the fluctuation.

  Thereby, the influence of the time-dependent change of the characteristic of the organic EL element 127 is relieved, and the uniformity of screen luminance can be ensured. The bootstrap function by the storage capacitor 120 between the gate and the source of the drive transistor 121 can improve the temporal variation correction capability of a current drive type light emitting element typified by an organic EL element. Of course, in the bootstrap function, the emission current Iel starts to flow through the organic EL element 127 at the start of light emission, and the anode-cathode voltage Vel rises until the anode-cathode voltage Vel becomes stable. It also functions when the source potential Vs of the drive transistor 121 varies with the variation of Vel.

  As described above, according to the driving timing by the pixel circuit P of this example and the control unit 109 that drives the pixel circuit P, even when there is a characteristic variation (variation or variation with time) of the driving transistor 121 or the organic EL element 127 By correcting the variation, the effect does not appear on the display screen, and high-quality image display without luminance change becomes possible.

[Explanation of reversible reaction phenomenon]
FIG. 4 is a diagram for explaining the details of the bias state (gate-source voltage vs. drain current characteristics) of the drive transistor 121. FIG. 4A is a diagram illustrating a seizure phenomenon due to a reversible reaction.

  The organic EL element 127 and the drive transistor 121 itself that supplies current to the organic EL element 127 are deteriorated during light emission. Since the luminance deterioration amount depends on the display image, the deterioration amount of each pixel is different. In particular, with respect to the drive transistor 121 that supplies current to the organic EL element 127, the original deterioration is temporarily caused by removing the bias applied to the drive transistor 121 from the energized state (power-on state) during light emission (power-off state). There is a reversible reaction phenomenon that tries to return to a state where it is not.

  For example, FIG. 4 shows a characteristic line (arrow A in the figure) of gate-source voltage versus drain current when light emission continues, and gate-source voltage pair when light emission is stopped and light is emitted again. A drain current characteristic line (arrow B in the figure) is shown. The horizontal axis represents the video signal Vsig (specifically the amplitude ΔVin) corresponding to the gate-source voltage Vgs, and the vertical axis represents the drain current (that is, the driving current of the organic EL element 127).

  The characteristic line B drifts to a smaller gate-source voltage Vgs than the characteristic line A (drift amount ΔV). The drift amount ΔV varies depending on the drive transistor. The characteristic line A and the characteristic line B have different curves. When the same drive current is to be set, the characteristic line B requires a smaller gate-source voltage Vgs. In other words, if the same gate-source voltage Vgs (video signal Vsig, video amplitude ΔVin), the characteristic line B has a larger drain current than the characteristic line A. For example, in the figure, at the measurement Vsig, the drain current when the light emission is continued (characteristic line A) is I_0, whereas the drain current when the light emission is stopped and the light is emitted again (characteristic line B). Is I_1 (> I_0), and it can be seen that the drain current (that is, the drive current of the organic EL element 127) fluctuates and display unevenness occurs.

  FIG. 4A shows a state of a burn-in phenomenon in which the current is recovered after the power is turned off and the difference from the predicted luminance can be seen in relation to the deterioration curve. The vertical axis represents current (in other words, luminance), and the horizontal axis represents elapsed time. When luminance correction is performed in accordance with the deterioration curve, if the actual deterioration curve matches the predicted deterioration curve, luminance correction (signal voltage) is performed on the predicted curve, so that no problem occurs. However, due to the characteristics of the drive transistor, a reversible change occurs when the power is turned off, and the actual curve immediately after the power is turned on due to the influence of the reversible change greatly deviates from the deterioration curve in which the drive current is predicted. Since luminance correction is performed on this actual curve, overcorrection is required until the predicted deterioration curve is restored. In order to suppress this problem, it is desirable to follow the prediction curve in a short time.

[Principle of Reversible Reaction Display Unevenness]
FIG. 5 to FIG. 6 are diagrams for explaining the principle of a method for suppressing display luminance unevenness associated with the reversible reaction of the drive transistor 121 (measures against reversible reaction display unevenness). Here, FIG. 5 (1) is a timing chart to which a reversible reaction display unevenness countermeasure is applied, and FIG. 5 (2) is a diagram showing a bias state of the driving transistor 121 at each time point in FIG. 5 (1). is there. FIG. 6 is a diagram for explaining the effect of reversible reaction display unevenness countermeasures.

  In order to suppress display luminance unevenness due to the reversible reaction of the driving transistor 121, the power is turned off from the display during the normal driving (period T21) (period T22), and the driving transistor 121 is then turned on when the power is turned on. It is preferable to drive with an appropriate bias state in which 127 does not emit light (period T23). In this case, it is more preferable to always apply a bias during the aging period T23 (to keep the sampling transistor 121 turned on by setting the write drive pulse WS to H) than in the aging period. This is because it is better to always apply a bias during the aging period in order to restore the characteristics in a short time. That is, in order not to deteriorate the organic EL element 127, it is preferable that no current flows through the organic EL element 127 in the driving state during the aging period. In this way, by driving the drive transistor 121 in a state where the organic EL element 127 does not emit light, the deterioration of the drive transistor 121 and the organic EL element 127 is not progressed, so that the reversible reaction of the drive transistor 121 is alleviated and the current fluctuation is reduced. Can be suppressed.

  By providing an aging drive period (T23) between turning on the power and emitting light after the power is turned off, the influence of the reversible reaction caused by turning off the power can be reduced as shown in FIG. Countermeasures against current fluctuation caused by turning off can be realized. In other words, the gate-source voltage versus drain current characteristic line (arrow C in the figure) when the aging drive is performed is the gate-source voltage versus drain current characteristic line when the light emission continues (figure C). It is close to arrow A), and it can be seen that the current drift due to the reversible reaction is improved to be small.

  By reducing the current drift, a display device without display unevenness can be realized. The reversible reaction of the drive transistor 121 is suppressed and the reversible reaction of the drive transistor 121 is suppressed by applying an appropriate bias to the drive transistor 121 during the aging period from when the power switch is turned off in the lighting state to when the power is turned on next time. The current fluctuation caused by the can be reduced. As a result, variation in the return amount for each pixel can be reduced, so that display unevenness associated with the reversible reaction phenomenon can be suppressed.

[Proper range of aging bias]
Here, the problem is how to set the bias potential during the aging drive. The voltage applied to the gate of the drive transistor 121 for performing the aging drive is realized by writing the video signal Vsig by turning on the sampling transistor 125 with the write drive pulse WS similarly to the normal display drive. In this case, the drive level can be adjusted by adjusting the amplitude ΔVin of the video signal Vsig.

  In order to sufficiently drive the drive transistor 121, it is preferable that the video amplitude (aging amplitude ΔVin_ag) of the video signal Vsig for aging is larger, for example, the maximum value during normal display (= video amplitude ΔVin_WH during white display) It is possible to do. Further, by making the aging amplitude ΔVin_ag larger than the maximum value at the time of normal display, it is possible to quickly recover the current fluctuation accompanying the reversible reaction (the display luminance fluctuation accompanying it) by the original deterioration state.

  To prevent the organic EL element 127 from emitting light regardless of the video amplitude ΔVin (here, the aging amplitude ΔVin_ag), the potential of the power supply line 105DSL (referred to as the aging potential Vcc_ag) is equal to the threshold voltage VthEL of the organic EL element 127. It is important to make it smaller than the sum of the cathode potential Vcath. That is, if “Vcc_ag <VthEL + Vcath”, the organic EL element 127 maintains the extinction state.

  At this time, the driving transistor 121 is driven in the linear region by supplying the video amplitude ΔVin_ag, and the anode of the organic EL element 127 is charged to the aging potential Vcc_ag by the driving current Ids at that time, and the drain-source voltage Vds is set to 0V. Reach. That is, by setting the aging potential Vcc_ag to a potential satisfying “Vcc_ag <VthEL + Vcath”, the driving transistor 121 can be linearly driven while the organic EL element 127 is kept in the extinction state, and the reversible reaction can be reduced. From such a viewpoint, the aging potential Vcc_ag may be arbitrarily set within the range of the second potential Vcc_L to “VthEL + Vcath”. As the potential of the power supply driving pulse DSL, in addition to the first potential Vcc_H and the second potential Vcc_L for normal display driving, the aging potential Vcc_ag set in the aging period Tag is required. A configuration corresponding to ternary driving is adopted.

<Aging processing unit>
[First example]
7 to 7A are diagrams illustrating a first example of an aging processing unit for applying the driving method of the present embodiment.

  The organic EL display device 1A of the first example generates an aging potential Vcc_ag in the drive scanning unit 105, and the potential of the power supply drive pulse DSL is any of the three values of the first potential Vcc_H, the second potential Vcc_L, and the aging potential Vcc_ag. This is an aspect in which an output circuit 400A that outputs to the power supply line 105DSL is switched.

  In addition, the organic EL display device 1A of the first example includes an aging drive control unit 440 in the vertical drive unit 103A. The aging drive control unit 440 includes a deterioration determination unit 442 and a timer unit 444 (timer). The output circuit 400A and the aging drive control unit 440 constitute an aging processing unit 490A.

  The deterioration determination unit 442 determines the degree of deterioration of the drive transistor 121 by applying a known method. As an example, a method of determining the degree of deterioration from the characteristic value of the gate-source voltage Vgs with respect to the video signal Vsig (specifically, the video amplitude ΔVin) when the drive current is supplied to the organic EL element 127 is applied. When the degree of progress of deterioration exceeds a predetermined index value, the deterioration determination unit 442 sets the reversible reaction suppression potential for the aging period Tag set by the timer unit 444 each time the power of the organic EL display device 1 is turned on. Set signal GK to H. In other words, the aging drive control unit 440 applies aging drive only when the degree of deterioration of the drive transistor 121 progresses from a predetermined index value, thereby eliminating unnecessary display waiting.

  The timing unit 444 drives the drive transistor 121 in an appropriate bias state in which the organic EL element 127 does not emit light after turning on the power after the power is turned off during display (an aging period Tag, corresponding to T23 in FIG. 5). ). The aging time Tag may be a predetermined fixed value, or may be changed based on the progress degree of deterioration of the drive transistor 121 determined by the deterioration determination unit 442. The aging time Tag is set to about several seconds to several tens of seconds to several tens of seconds, for example. The aging period Tag may be adjusted according to the degree of deterioration of the drive transistor 121. For example, the aging period Tag may be lengthened as the degree of deterioration progresses. This also eliminates unnecessary display waits.

  The aging drive control unit 440 controls the writing scanning unit 104, the driving scanning unit 105, and the horizontal driving unit 106. For example, during the aging period Tag, the horizontal drive unit 106 sets the video signal Vsig to an appropriate value (aging voltage Vag), and the write scanning unit 104 sets the write drive pulse WS to H to turn on the sampling transistor 125. Thus, the aging voltage Vag is supplied to the gate of the drive transistor 121. The aging voltage Vag may be set to the amplitude ΔVin_WH of the video signal Vsig during white display, for example. During this aging period Tag, the drive scanning unit 105 keeps the power supply drive pulse DSL at the aging potential Vcc_ag. Thus, in the aging period Tag, the drive transistor 121 is in a state where the source-drain voltage is 0 V, and the gate-source voltage Vgs is biased to “ΔVin_ag = Vin_WH”.

  In this first example, the existing drive scanning unit 105 needs to be changed, but the aging drive (reversible reaction suppression method) mechanism of the present embodiment is realized without adding substantial (external) changes. There are advantages you can do. Various circuit configurations of the drive scanning unit 105 having such a configuration are conceivable. Here, as an example, the output circuit 400A is configured to output the aging potential Vcc_ag to the existing output circuit 400X. The configuration is changed so that the output of the first potential Vcc_H and the second potential Vcc_L is stopped.

  Specifically, first, although not shown in the figure, the drive scanning unit 105 is provided outside the display panel unit 100 and has a first potential Vcc_H and a second potential Vcc_L from a power supply circuit having a sufficiently small output impedance. Is to be supplied.

  As shown in FIG. 7A (1), an existing (comparative) output circuit 400X includes, as an example, a p-channel transistor (p-type transistor) 402 and an n-channel transistor (n-type transistor) 404. The first potential Vcc_H supply end 400H and the second potential Vcc_L supply end 400L are arranged in series.

  The source terminal S of the p-type transistor 402 is connected to the supply terminal 400H for the first potential Vcc_H, and the source terminal S of the n-type transistor 404 is connected to the supply terminal 400L for the second potential Vcc_L. The drains D of the p-type transistor 402 and the n-type transistor 404 are connected in common, and the connection point is connected to the power supply line 105DSL. As a whole, a CMOS inverter is configured. The gates G of the p-type transistor 402 and the n-type transistor 404 are connected in common, and an active-L power supply scanning pulse NDS is supplied to the connection point.

  When the power supply scanning pulse NDS is active L, the n-type transistor 404 is turned off and the p-type transistor 402 is turned on, so that the first potential Vcc_H is supplied to the power supply line 105DSL. On the other hand, when the power scanning pulse NDS is inactive H, the p-type transistor 402 is turned off and the n-type transistor 404 is turned on, so that the second potential Vcc_L is supplied to the power supply line 105DSL. As can be seen from this operation, the output circuit 400X functions as a power supply voltage switching circuit.

  As shown in FIG. 7 and FIG. 7A (2), the organic EL display device 1A of the first example includes the output circuit 400A of the first example for enabling the power supply driving pulse DSL to be driven in three values in the drive scanning unit 105. In preparation.

  First, the output circuit 400A of the first example includes three types of voltages such as a first potential Vcc_H on the positive voltage side, a second potential Vcc_L on the negative voltage side, and an aging potential Vcc_ag as a reversible reaction suppression potential, and a reference voltage The ground potential GND is supplied. The output circuit 400A is configured to be able to generate a power drive pulse DSL for ternary drive based on a binary power scan pulse NDS and a reversible reaction suppression potential setting signal GK supplied from a vertical decoder (not shown).

  In addition to the p-type transistor 402 and the n-type transistor 404, the output circuit 400A has an n-type transistor 406 that outputs the aging potential Vcc_ag to the power supply line 105DSL. The n-type transistor 406 is connected in series with the p-type transistor 402, and is arranged substantially in parallel with the n-type transistor 406.

  The source of the n-type transistor 406 is connected to the aging potential Vcc_ag. The drains of the p-type transistor 402, the n-type transistor 404, and the n-type transistor 406 are connected in common, and the connection point is connected to the output terminal for the power supply driving pulse DSL.

  The output circuit 400 includes a two-input type OR gate 412, an inverter 414, and a two-input type AND gate 416 before the output stage. A power supply scanning pulse NDS is commonly supplied to one input terminal of each of the OR gate 412 and the AND gate 416.

  A reversible reaction suppression potential setting signal GK is supplied to the other input terminal of the OR gate 412 and the input terminal of the inverter 414. The reversible reaction suppression potential setting signal GK is logical information that becomes active H only during the aging period Tag in which the aging potential Vcc_ag is supplied to the power supply line 105DSL. The output of the inverter 414 (inverted reversible reaction suppression potential setting signal NGM) is supplied to the other input terminal of the AND gate 416.

  The OR gate 412 takes a logical sum of the power supply scanning pulse NDS and the reversible reaction suppression potential setting signal GK, and drives the p-type transistor 402 with the logical sum output. Therefore, the p-type transistor 402 is turned on only when the power supply scanning pulse NDS is L and the reversible reaction suppression potential setting signal GK is L. At this time, the n-type transistor 404 and the n-type transistor 406 are off, and the first potential Vcc_H is supplied to the power supply line 105DSL.

  The AND gate 416 takes the logical product of the power supply scanning pulse NDS and the inverted reversible reaction suppression potential setting signal NGM, and drives the n-type transistor 404 with the logical product output. Accordingly, the n-type transistor 404 is turned on only when the power supply scanning pulse NDS is H and the reversible reaction suppression potential setting signal GK is L (inverted reversible reaction suppression potential setting signal NGM is H). At this time, the p-type transistor 402 and the n-type transistor 406 are off, and the second potential Vcc_L is supplied to the power supply line 105DSL.

  The reversible reaction suppression potential setting signal GK is supplied to the gate of the n-type transistor 406, and the n-type transistor 406 is driven by the reversible reaction suppression potential setting signal GK. Therefore, regardless of whether the power supply scanning pulse NDS is L or H, the n-type transistor 406 is turned on only during the aging period Tag when the reversible reaction suppression potential setting signal GK is H. At this time, the p-type transistor 402 and the n-type transistor 404 are off, and the aging potential Vcc_ag is supplied to the power supply line 105DSL.

  The configuration example corresponding to the ternary driving of the output circuit 400A is merely an example, and various modifications can be adopted. For example, in principle, the configuration shown in FIG. 7A (2) may be used, but in actuality, any one of the p-type transistor 402, the n-type transistor 404, and the n-type transistor 406 is considered due to the gate delay. In order to prevent the occurrence of a through current due to the simultaneous turn-on of two or three transistors, it is conceivable to take a mechanism for slightly shifting the transition timing so that there is no period during which the transistors 402, 404, and 406 are turned on. .

[Second example]
FIG. 8 is a diagram illustrating a second example of an aging processing unit for applying the driving method of the present embodiment. The second example is an aspect in which the aging potential Vcc_ag is generated outside the vertical drive unit 103, and the binary power drive pulse DSRX and the aging potential Vcc_ag output from the drive scanning unit 105 are switched and supplied to the power supply line 105DSL. . This second example has an advantage that the aging drive mechanism of the present embodiment can be realized without changing the existing drive scanning unit 105.

  The vertical drive unit 103B of the organic EL display device 1B of the second example includes a 2-input / 1-output type voltage switching circuit 420 between the drive scanning unit 105 (output circuit 400X) and the power supply line 105DSL. The voltage switching circuit 420 and the aging drive control unit 440 constitute an aging processing unit 490B. The aging drive control unit 440 controls the write scanning unit 104, the voltage switching circuit 420, and the horizontal drive unit 106.

  The voltage switching circuit 420 is supplied at one input terminal with a binary (first potential Vcc_H and second potential Vcc_L) power supply driving pulse DLSX output from the output circuit 400X of the drive scanning unit 105, and at the other input terminal. An aging potential Vcc_ag from a voltage generator (not shown) is supplied. A control input terminal of the voltage switching circuit 420 is supplied with a reversible reaction suppression potential setting signal GK.

  As in the first example, the reversible reaction suppression potential setting signal GK is logical information that becomes active H only during the aging period Tag in which the aging potential Vcc_ag is supplied to the power supply line 105DSL. The selection operation of the voltage switching circuit 420 is controlled by the reversible reaction suppression potential setting signal GK, and the reversible reaction suppression potential setting signal GK regardless of whether the power supply driving pulse DLSX output from the output circuit 400X is L or H. A selects and outputs the aging potential Vcc_ag only during the aging period Tag of H, and when the reversible reaction suppression potential setting signal GK is L, selects and outputs the power supply driving pulse DLSX output from the output circuit 400X.

<Electronic equipment>
The display device to which the countermeasure against the reversible reaction display unevenness of the present embodiment including the organic EL display device 1 of the present embodiment described above is applied is a video signal input to the electronic device or a video generated in the electronic device. The present invention can be applied to display devices for electronic devices in various fields that display signals as images or videos. As an example, the present invention can be applied to various electronic devices shown in FIGS. 9 to 9B, for example, digital cameras, notebook personal computers, portable terminal devices such as mobile phones, and display devices such as video cameras.

  Note that the display device includes a module-shaped device having a sealed configuration. For example, a display module formed by being attached to a facing portion such as transparent glass on the pixel array portion 102 is applicable. The transparent facing portion may be provided with a color filter, a protective film, and further a light shielding film. Note that the display module may be provided with a circuit unit for inputting / outputting a signal from the outside to the pixel array unit, an FPC (flexible printed circuit), and the like.

  Below, the specific example of the electronic device by which the display apparatus to which the reversible reaction display nonuniformity countermeasure of this embodiment is applied is mounted is demonstrated.

  FIG. 9A is a perspective view showing an appearance of a television set on which the display device to which the reversible reaction display unevenness countermeasure of this embodiment is applied is mounted. The television set of this example includes a video display screen unit 901 including a front panel 902, a filter glass 903, and the like, and is manufactured by using the display device according to the present embodiment as the video display screen unit 901.

  FIG. 9 (2) is a perspective view showing the appearance of a digital camera equipped with a display device to which the reversible reaction display unevenness countermeasure of this embodiment is applied, and FIG. 9 (2-1) is a perspective view seen from the front side. FIG. 9 (2-2) is a perspective view seen from the back side. The digital camera of this example includes a light emitting unit 911 for flash, a display unit 912, a menu switch 913, a shutter button 9114, and the like, and is manufactured by using the display device according to the present embodiment as the display unit 912.

  FIG. 9A (1) is a perspective view showing an external appearance of a notebook personal computer on which a display device to which the reversible reaction display unevenness countermeasure of this embodiment is applied is mounted. The notebook personal computer of this example includes a main body 921 that includes a keyboard 122 that is operated when characters and figures are input, a display unit 923 that displays an image, and the like. It is produced by using.

  FIG. 9A (2) is a perspective view showing an appearance of a video camera equipped with a display device to which the reversible reaction display unevenness countermeasure of this embodiment is applied. The video camera of this example includes a main body 931, a lens 932 for shooting an object on the side facing forward, a start / stop switch 933 at the time of shooting, a display unit 934, and the like. The display unit 934 displays according to the present embodiment. It is produced by using an apparatus.

  FIG. 9B is an external view showing a mobile phone (an example of a mobile terminal device) on which the display device to which the reversible reaction display unevenness countermeasure of the present embodiment is applied is mounted. 9B (1) is a front view in an open state, FIG. 9B (2) is a side view, FIG. 9B (3) is a front view in a closed state, FIG. 9B (4) is a left side view, and FIG. 5) is a right side view, FIG. 9B (6) is a top view, and FIG. 9B (7) is a bottom view. The mobile phone of this example includes an upper housing 941, a lower housing 942, a connecting portion 943 (here, a hinge portion), a display 944, a sub-display 945, a picture light 946, a camera 947, and the like. Then, by using the display device according to the present embodiment as the display 944 and the sub display 945, the mobile phone of this example is manufactured.

  As mentioned above, although this invention was demonstrated using embodiment, the technical scope of this invention is not limited to the range as described in the said embodiment. Various changes or improvements can be added to the above-described embodiment without departing from the gist of the invention, and embodiments to which such changes or improvements are added are also included in the technical scope of the present invention.

  Further, the above embodiments do not limit the invention according to the claims (claims), and all combinations of features described in the embodiments are not necessarily essential to the solution means of the invention. Absent. The embodiments described above include inventions at various stages, and various inventions can be extracted by appropriately combining a plurality of disclosed constituent elements. Even if some constituent requirements are deleted from all the constituent requirements shown in the embodiment, as long as an effect is obtained, a configuration from which these some constituent requirements are deleted can be extracted as an invention.

<Modification of Pixel Circuit>
For example, the change from the side surface of the pixel circuit P is possible. For example, since “dual theory” holds in circuit theory, the pixel circuit P can be modified from this point of view. In this case, although illustration is omitted, first, the image circuit P shown in the above-described embodiment is configured using the n-type drive transistor 121, whereas the pixel circuit using the p-type drive transistor 121 is used. P is constructed. In accordance with this, a change according to the dual reason, such as reversing the polarity of the signal amplitude ΔVin with respect to the offset potential Vofs of the video signal Vsig and the magnitude of the power supply voltage, is added.

  In the organic EL display device of the modified example in which the drive transistor 121 is made p-type by applying such dual reason, the threshold correction operation and the mobility are similar to the organic EL display device made of the n-type drive transistor 121. Correction operation and bootstrap operation can be performed, and reversible reaction display unevenness countermeasures (aging driving) can be applied.

  The modified example of the pixel circuit P described here is obtained by adding a change according to “dual theory” to the configuration shown in the above embodiment, but the method of changing the circuit is not limited thereto. It is not something. In executing the threshold correction operation, the video signal Vsig that is switched between the offset potential Vofs and the signal potential Vin (= Vofs + ΔVin) within each horizontal period in accordance with the scanning by the writing scanning unit 104 is transmitted to the video signal line 106HS. The pixel circuit P is configured as long as the drive is performed in such a manner that the drain side (power supply side) of the drive transistor 121 is switched between the first potential and the second potential for the threshold correction initialization operation. Any number of transistors can be used. Further, as long as there is a problem of current fluctuation due to a reversible reaction of the driving transistor and display unevenness associated therewith, the number of transistors and the number of storage capacitors constituting the pixel circuit P are not limited. For example, the number of transistors may be three or more. Measures against uneven reversible reaction display of the present embodiment described above can be applied to all of them.

  Further, the mechanism for supplying the offset potential Vofs and the signal potential Vin to the gate of the drive transistor 121 when executing the threshold correction operation is not limited to the video signal Vsig as in the 2TR configuration of the above embodiment, For example, as described in Japanese Patent Application Laid-Open No. 2006-215213, a mechanism for supplying via another transistor may be employed. Even in these modified examples, when the bias applied to the driving transistor is removed from the energized state (power-on state) during light emission (power-off state), the property of returning to the original undegraded state (reversible reaction) It is possible to apply the idea of the present embodiment in which the luminance fluctuation phenomenon associated with the above is eliminated by aging driving (a measure against uneven reversible reaction display).

  DESCRIPTION OF SYMBOLS 1 ... Organic EL display device, 100 ... Display panel part, 101 ... Support substrate, 102 ... Pixel array part, 103 ... Vertical drive part, 104 ... Write scanning part, 104WS ... Write scanning line, 105 ... Drive scanning part, 105DSL ... Power supply line 106 ... Horizontal drive unit 106HS ... Video signal line 109 ... Control unit 120 ... Retention capacitor 121 ... Drive transistor 125 ... Sampling transistor 127 ... Organic EL element 200 ... Drive signal generation unit , 300 ... Video signal processing unit, 400 ... Output circuit, 420 ... Voltage switching circuit, 440 ... Aging drive control unit, 490 ... Aging processing unit, P ... Pixel circuit

Claims (9)

A driving transistor that generates a driving signal, an electro-optic element connected to an output terminal of the driving transistor, a holding capacitor that holds information corresponding to the signal amplitude of a video signal, and information that corresponds to the signal amplitude is stored in the holding capacitor Pixel circuits having sampling transistors for writing are arranged in a matrix,
A display device comprising: an aging processing unit for aging the drive transistor in a predetermined bias state prior to display driving the electro-optic element. The display device according to claim 1, wherein the aging processing unit performs the aging after the display device is powered on until the electro-optic element is driven to display. The display device according to claim 1, wherein the aging processing unit performs the aging by driving the driving transistor in a linear region. The display device according to claim 3, wherein the aging processing unit performs the aging by driving the driving transistor with a signal amplitude larger than a maximum value during normal display. The display device according to claim 1, wherein the aging processing unit performs the aging while maintaining the electro-optical element in a non-display state. 6. The display device according to claim 1, wherein the aging processing unit performs the aging when the degree of deterioration of the drive transistor progresses more than a predetermined index value. . The display device according to claim 1, wherein the aging processing unit adjusts a period during which the aging is performed based on a degree of deterioration of the driving transistor. A driving transistor that generates a driving signal, an electro-optic element connected to an output terminal of the driving transistor, a holding capacitor that holds information corresponding to the signal amplitude of a video signal, and information that corresponds to the signal amplitude is stored in the holding capacitor A pixel array section in which pixel circuits each having a sampling transistor to be written are arranged in a matrix; and an aging processing section for aging the drive transistor in a predetermined bias state prior to display driving the electro-optic element. An electronic device provided with a display device. A driving transistor that generates a driving signal, an electro-optic element connected to an output terminal of the driving transistor, a holding capacitor that holds information corresponding to the signal amplitude of a video signal, and information that corresponds to the signal amplitude is stored in the holding capacitor In driving the pixel circuit of the display device in which pixel circuits having sampling transistors to be written are arranged in a matrix,
Prior to display driving the electro-optic element, the driving transistor is aged in a predetermined bias state.

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