JP2011199976A - Power source unit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve a power factor and get a large output by widening the conduction angle of an input current by simple control.SOLUTION: This power source unit includes rectifier circuits 3a-3d, a reactor 2, first and second switching means 8 and 9 which connect and break current paths, a capacitor 5 for of a power factor improvement, a capacitor 6 for phase improvement, a smoothing capacitor 4, a zero cross detector 31 which outputs the zero cross detection signal of an AC power source 1, first to fourth detection signal delaying means 32a-32d which output zero cross delay signals with an elapse of a specified time after zero cross detection signal reception, and a switch control means 30 which controls the first and second switching means. The switch control means 30 outputs pulse signals for switching on the first switching means 8 on receiving a first zero cross delay signal, switching on the second switching means 9 on receiving a second zero cross delay signal, switching off the first switching means 8 on receiving a third zero cross delay signal, and switching off the second switching means 9 on receiving a fourth zero cross delay signal.

Description

  The present invention relates to a power supply device for converting AC to DC and reducing a harmonic component of an input current to improve a power factor.

  Capacitor input type rectifier circuits have been used in various fields as an AC-DC converter circuit in which AC voltage is input to a diode rectifier circuit to obtain a pulsating output, and this is smoothed by a capacitor to obtain a DC voltage. ing. The input current of this circuit has a narrow current conduction angle, a poor power factor, and a large amount of reactive power, so that the power cannot be effectively used, and it contains many harmonic components and is an obstacle to equipment connected to the same power supply system. Is a problem.

  Therefore, a power supply device shown in Patent Document 1 has been studied as a technique for improving the power factor and reducing harmonic components. FIG. 9 is a circuit configuration diagram of the power supply device. The power supply device of FIG. 9 includes an AC input terminal and a DC output terminal of the rectifier circuits 73a to 73d, in addition to a capacitor input circuit composed of an AC power supply 71, a reactor 72, diodes 73a to 73d and a smoothing capacitor 74. A power factor improving capacitor 75 is inserted between them. Reference numeral 80 denotes a load such as a motor drive inverter.

  FIG. 10 shows an example of voltage / current waveforms of the power supply device of FIG. Hereinafter, the operation will be described in detail by dividing one cycle of the AC power supply 71 into four periods with reference to FIG.

  Period 1: There is no charging voltage in the power factor improving capacitor 75, the AC power source 71 starts to output a positive voltage from zero, and the AC power source 71, the reactor 72, and the power factor improving capacitor 75 as shown in FIG. The current Iin for charging the voltage Vc of the power factor improving capacitor 75 flows in the order of the diode 73d and the AC power supply 71.

  This operation continues until the power factor improving capacitor 75 is charged and the voltage Vc across the power factor improving capacitor becomes equal to the voltage Vdc across the smoothing capacitor.

  Period 2: Since the voltage value Vac of the AC power supply 71 is larger than the voltage Vdc across the smoothing capacitor, as shown in FIG. 11B, the AC power supply 71, the reactor 72, the diode 73a, the smoothing capacitor 74, the diode 73d, and the AC power supply A current Iin for charging the voltage Vdc of the smoothing capacitor 74 flows in the order of 71.

  In addition to this, the current continues to flow through the path of FIG. 11B until the energy stored in the reactor 72 is released in the periods 1 and 2.

  Period 3: The power factor improving capacitor 75 is charged with the same voltage Vc as the voltage Vdc across the smoothing capacitor, and the AC power supply 71 starts to output a negative voltage from zero, and as shown in FIG. A current Iin for discharging the voltage Vc of the power factor improving capacitor 75 flows in the order of the power source 71, the diode 73c, the smoothing capacitor 74, the power factor improving capacitor 75, the reactor 72, and the AC power source 71.

  This operation continues until the voltage Vc charged in the power factor correction capacitor 75 is discharged to zero.

Period 4: Since the voltage value Vac of the AC power supply 71 is larger than the voltage Vdc across the smoothing capacitor, as shown in FIG. 11D, the AC power supply 71, the diode 73c, the smoothing capacitor 74, the diode 73b, the reactor 72, the AC power supply A current Iin for charging the voltage Vdc of the smoothing capacitor 74 flows in the order of 71.

  In addition to this, current continues to flow through the path of FIG. 11D until the energy stored in the reactor 72 is released in the periods 3 and 4.

  As described above, the current conduction angle is widened by repeating the operations of the periods 1 to 4 for each period of the AC power supply 71, so that the power factor can be improved and the harmonic component contained in the input current Iin can be reduced. it can.

  In particular, the energy stored in the reactor 72 in periods 1 and 3 is released in periods 2 and 4, respectively, so that the output voltage of the power supply device, that is, the voltage Vdc of the smoothing capacitor 74 can be increased.

Japanese Patent No. 3377959

  However, although the conventional power supply apparatus shown in FIG. 9 can improve the power factor with a simple configuration, it is necessary to set a large value for the reactor 72 in order to comply with the IEC harmonic regulation. As the load increases, the phase of the current Iin with respect to the voltage value Vac of the AC power supply 71 is delayed, and the power factor decreases, so that there is a problem that the power that can be supplied to the load 80 decreases.

  Further, since the voltage drop due to the reactor 72 is large and the output voltage, that is, the voltage across the smoothing capacitor 74 is lowered, there is a problem that a necessary voltage cannot be obtained as the load 80 increases.

The present invention solves such a conventional problem,
It aims at providing the power supply device which can implement | achieve a high power factor and high output while responding to IEC high frequency regulation.

In order to solve the above problems, the present invention provides a rectifier that rectifies an AC power supply voltage and outputs a pulsating voltage, a reactor connected to the rectifier, and a first and a second that connect and cut off a current path. Open / close means, a first open / close means connected in series, a power factor improving capacitor connected between an AC input terminal and a DC output terminal of the rectifier circuit, and a second open / close means connected in series, and rectified. A phase improvement capacitor connected between the AC input terminals of the circuit, a smoothing capacitor that smooths the output voltage of the rectifier circuit to obtain a substantially DC voltage, and a zero cross that detects the zero cross of the AC power supply voltage and outputs a zero cross detection signal A detection means, a first detection signal delay means for receiving a zero cross detection signal from the zero cross detection means and outputting a first zero cross delay signal after a predetermined time has elapsed, and a zero cross detection means A second detection signal delay means for outputting a second zero cross delay signal after elapse of a predetermined time after receiving the zero cross detection signal, and a third zero cross delay signal after elapse of a predetermined time after receiving the zero cross detection signal from the zero cross detection means And a third detection signal delay means for receiving the zero cross detection signal from the zero cross detection means and a fourth detection signal delay means for outputting a fourth zero cross delay signal after elapse of a predetermined time. Receives the first zero cross delay signal from the first detection signal delay means and turns on the first opening and closing means, and receives the second zero cross delay signal from the second detection signal delay means and receives the second open and close. The first switching means is turned off in response to the third zero-cross delay signal from the third detection signal delay means, and the fourth detection signal delay means receives the fourth signal from the fourth detection signal delay means. And outputs a pulse signal for turning off the second switching means receiving the Rokurosu delayed signal.

  With the above-described configuration, the power factor and the output voltage can be greatly improved, and a power supply device with high output and low loss can be provided while complying with IEC harmonic regulations with a simple and inexpensive configuration.

  The power supply device of the present invention can achieve high power factor and high output while clearing IEC harmonic regulations.

The circuit block diagram in one Example of the power supply device of this invention Main waveform diagram in one embodiment of the power supply device of the present invention (A)-(f) is the current pathway figure in one Example of the power supply device of this invention. The circuit block diagram in the other Example of the power supply device of this invention The circuit block diagram in the further another Example of the power supply device of this invention The graph which shows the pulse width of the switch drive signal with respect to the magnitude | size of load in further another Example of the power supply device of this invention The graph which shows the pulse width of the switch drive signal with respect to the magnitude | size of load in further another Example of the power supply device of this invention Configuration of the air conditioner of the present invention Circuit diagram of conventional power supply Main waveform diagram of conventional power supply Current path diagram of conventional power supply

  According to a first aspect of the present invention, there is provided a rectifier circuit that rectifies an AC power supply voltage and outputs a pulsating voltage, a reactor connected to the rectifier circuit, first and second opening / closing means for connecting and blocking a current path, A power factor improving capacitor connected in series with the first switching means and connected between the AC input terminal and the DC output terminal of the rectifier circuit, and an AC input terminal of the rectifier circuit connected in series with the second switch means A phase improving capacitor connected in between, a smoothing capacitor that smoothes the output voltage of the rectifier circuit to obtain a substantially DC voltage, a zero-cross detection means that detects a zero-cross of the AC power supply voltage and outputs a zero-cross detection signal, and a zero-cross First detection signal delay means for receiving a zero cross detection signal from the detection means and outputting a first zero cross delay signal after elapse of a predetermined time, and zero cross detection signal from the zero cross detection means The second detection signal delay means for outputting the second zero-cross delay signal after elapse of a predetermined time, and the third detection signal delay means for outputting the third zero-cross delay signal after elapse of the predetermined time after receiving the zero-cross detection signal from the zero-cross detection means. 3 detection signal delay means, and a fourth detection signal delay means for receiving a zero cross detection signal from the zero cross detection means and outputting a fourth zero cross delay signal after a predetermined time has elapsed. The first open / close means is turned on in response to the first zero cross delay signal from the detection signal delay means, and the second open / close means is turned on in response to the second zero cross delay signal from the second detection signal delay means. In response to the third zero-cross delay signal from the third detection signal delay means, the first open / close means is turned off, and the fourth zero-cross delay signal from the fourth detection signal delay means Receiving and outputs a pulse signal for turning off the second switching means.

As a result, it is possible to reliably perform pulse output of each of the two opening / closing means at an optimal timing with simple control, and thus it is possible to provide a power supply apparatus with high power factor, high output, high reliability and low loss. There is an effect. As a result, there is an effect that it is possible to comply with IEC harmonic regulations.

  The second invention further includes load state detection means for detecting the magnitude of the load, and the first and second detection signal delay means are the first and second detection signals according to the load magnitude detected by the load state detection means. Each of the second zero cross delay signals is changed.

  As a result, it is possible to reliably perform pulse output at the optimum timing of the on / off timing of the two switching means according to the size of the load, so the output range is wide, the power factor is high, and the output is highly reliable and low. There is an effect that a lossy power supply device can be provided. As a result, there is an effect that it is possible to comply with IEC harmonic regulations.

  The third aspect of the invention further includes power supply frequency detection means for detecting the frequency of the AC power supply voltage, and the first and second detection signal delay means are the first and second according to the frequency detected by the power supply frequency detection means. The zero-cross delay signal is changed.

  As a result, it is possible to reliably perform pulse output at the optimum timing for the on / off timings of the two switching means according to the power supply frequency, so the power frequency range is wide, the power factor is high, and the output is highly reliable and low. There is an effect that a lossy power supply device can be provided. As a result, there is an effect that it is possible to comply with IEC harmonic regulations.

  The fourth aspect of the invention further includes load state detection means for detecting the magnitude of the load, and the switch control means is one of the first and second opening / closing means according to the magnitude of the load detected by the load state detection means. The pulse signal is output so that the period during which at least one is turned on changes.

  As a result, it is possible to reliably perform pulse output at the optimal timing for the on-time of the two switching means according to the size of the load, so the output range is wide, the power factor is high, and the output is highly reliable and low. There is an effect that a lossy power supply device can be provided. As a result, there is an effect that it is possible to comply with IEC harmonic regulations.

  The fifth aspect of the invention further includes power supply frequency detection means for detecting the frequency of the AC power supply voltage, and the switch control means outputs pulses to the first and second switching means according to the frequency detected by the power supply frequency detection means. It changes the on time of the signal.

  As a result, it is possible to reliably perform pulse output at the optimal timing for the on-time of the two switching means according to the power supply frequency, so the power frequency range is wide, high power factor, high output and high reliability. There is an effect that a lossy power supply device can be provided. As a result, there is an effect that it is possible to comply with IEC harmonic regulations.

  According to the air conditioner of the present invention, there is an effect that current utilization is high and high performance can be exhibited.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. Note that the present invention is not limited to the embodiments.

(Embodiment 1)
FIG. 1 is a circuit configuration diagram showing an embodiment of a power supply device of the present invention. In FIG. 1, 1 is an AC power source, 2 is a reactor for improving the power factor, and 3a to 3d are rectifying elements, which rectify the AC voltage and output a pulsating voltage. 4 is a smoothing capacitor for smoothing the pulsating voltage rectified by the rectifying elements 3a to 3d to obtain a substantially DC voltage, 5 is a power factor improving capacitor for improving the power factor together with the reactor 2, and 6 is for improving the current phase. This is a phase improving capacitor.

  Reference numeral 8 denotes a first switch device connected in series with the power factor improving capacitor 5, and reference numeral 9 denotes a second switch device connected in series with the phase improvement capacitor 6. Here, a semiconductor such as an IGBT or a power MOSFET is used. Consists of switches. Reference numeral 10 denotes a load of the power supply device, which includes a heating wire, an inverter, and a lighting device or a motor that is connected to the inverter and operates. 30 is a switch control device for controlling the first switch device 8 and the second switch device 9, 31 is a zero-cross detection device for detecting the zero-cross point of the AC power supply 1, and 32a is a zero-cross detection signal from the zero-cross detection device 31. Receiving a zero-cross detection signal from the zero-cross detection device 31 and outputting a second zero-cross delay signal after the lapse of a predetermined time. A second detection signal delay device 32c that receives the zero cross detection signal from the zero cross detection device 31 and outputs a third zero cross delay signal after a predetermined time has elapsed, and 32d is a zero cross detection device 31. A third zero-cross delay signal is output after a predetermined time has elapsed after receiving the zero-cross detection signal from A fourth detection signal delay unit. Hereinafter, the power supply device of the present invention will be described in detail with reference to FIGS. 1 and 2.

  FIG. 2 is a main waveform diagram in the power supply device of the present invention, where Vac is a voltage waveform of the AC power source 1, Iin is a current waveform flowing through the reactor 2, Vc1 is a voltage waveform across the power factor improving capacitor 5, and Vc2 is A voltage waveform at both ends of the phase improving capacitor 6, Vdc is a voltage waveform at both ends of the smoothing capacitor 4. Pzc is a zero-cross detection signal output by detecting the zero-cross point of the AC power supply 1 detected by the zero-cross detection device 31, and Pzd1 is a predetermined time after the first detection signal delay device 32a receives the zero-cross detection signal Pzc ( In FIG. 2, the first zero cross delay signal output at the delay time td1) is output, and Pzd2 is output after the second detection signal delay device 32b receives the zero cross detection signal Pzc and a predetermined time has elapsed (zero delay time in FIG. 2). The second zero-cross delay signal, Pzd3, is the third zero-cross delay signal output after the third detection signal delay device 32c receives the zero-cross detection signal Pzc and a predetermined time has elapsed (delay time td3 in FIG. 2). 4 detection signal delay device 32d receives the zero-cross detection signal Pzc and is output after a predetermined time has elapsed (delay time td4 in FIG. 2). A fourth zero crossing delay signal to be.

  Psw1 is a pulse signal for driving the first switch device 8, and is turned ON in synchronization with the falling edge of the first zero-cross delay signal Pzd1, and is turned OFF in synchronization with the falling edge of the third zero-cross delay signal Pzd3. Become. Psw2 is a pulse signal for driving the second switch device 9, and is turned ON in synchronization with the falling edge of the second zero-cross delay signal Pzd2, and is turned OFF in synchronization with the falling edge of the fourth zero-cross delay signal Pzd4. It becomes.

  3 is a current conduction path diagram showing paths through which current flows in each period of the waveform diagram shown in FIG. Hereinafter, the operation in each period will be described in detail with reference to FIGS. 1 to 3.

  Period 1: The voltage Vc1 of the power factor improving capacitor 5 is discharged to some extent during the immediately preceding negative half cycle, and the voltage Vc2 of the phase improving capacitor 6 is charged to approximately -Vdc. When the instantaneous value of the AC power supply 1 exceeds the zero point, the zero cross detection device 31 outputs a zero cross detection signal Pzc. The first detection signal delay device 32a receives the zero cross detection signal Pzc and outputs the first zero cross delay signal Pzd1 after a predetermined time has elapsed (here, the delay time td1), and the second detection signal delay device 32b detects the zero cross detection. The second zero cross delay signal Pzd2 is output after a predetermined time has elapsed after receiving the signal Pzc (here, the delay time is zero). When the switch control device 30 detects the fall of the second zero-cross delay signal Pzd2, the switch control device 30 outputs a signal Psw2 that turns on the second switch device 9.

  After that, the AC power source 1 starts to output a positive voltage, and the voltage Vc2 of the phase improving capacitor 6 is discharged in the order of the AC power source 1, the reactor 2, the phase improving capacitor 6, and the AC power source 1 as shown in FIG. Current Iin flows.

  This operation continues until the voltage Vc2 charged in the phase improving capacitor 6 is discharged to zero and then charged until it reaches the same value as the voltage Vc1 of the power factor improving capacitor 5.

  Period 2: When the predetermined time td1 has elapsed from the zero point of the AC power supply 1, the first zero cross delay signal Pzd1 changes from H to L. When the switch control device 30 detects the fall of the first zero-cross delay signal Pzd1, the switch control device 30 outputs a signal Psw1 that turns on the first switch device 8. After that, as the voltage Vac of the AC power supply 1 rises in both the power factor improving capacitor 5 and the phase improving capacitor 6, as shown in FIG. 3B, the AC power supply 1, the reactor 2, the power factor improving capacitor 5, the diode 3d, A current for charging the voltage Vc1 of the power factor improving capacitor 5 in the order of the AC power supply 1, and a current for charging the voltage Vc2 of the phase improving capacitor 6 in the order of the AC power supply 1, the reactor 2, the phase improving capacitor 6, and the AC power supply 1. And Iin is the sum of these two currents.

  Period 3: the power supply voltage Vac becomes higher than the voltage Vdc of the smoothing capacitor 4, and the AC power source 1, the reactor 2, the diode 3a, the smoothing capacitor 4, the diode 3d, and the AC power source 1 are smoothed in this order as shown in FIG. A current Iin for charging the voltage Vdc of the capacitor 4 flows. In addition, when a predetermined time td3 (= td4) has elapsed from the zero point of the AC power supply 1 at the beginning of this period, the third zero-cross delay signal Pzd3 and the fourth zero-cross delay signal Pzd4 change from H → L. When the switch control device 30 detects the fall of the third zero-cross delay signal Pzd3, it outputs the signal Psw1 that puts the first switch device 8 in the off state, and simultaneously detects the fall of the fourth zero-cross delay signal Pzd4. A signal Psw2 for turning off the second switch device 9 is output. As a result, the first switch device 8 and the second switch device 9 are turned off.

  Period 4: The power factor improving capacitor 5 does not flow because the first switch device 8 is in the off state. In addition, since the voltage of the phase improving capacitor 6 is both charged to approximately Vdc, no current flows. During this period, the energy stored in the reactor 2 in the periods 1, 2, and 3 is released, and as shown in FIG. 3C, the AC power source 1, the reactor 2, the diode 3a, the smoothing capacitor 4, the diode 3d, and the AC power source A current Iin for charging the voltage Vdc of the smoothing capacitor 4 flows in the order of 1.

  Period 5: The voltages of the power factor improving capacitor 5 and the phase improving capacitor 6 are both charged to approximately Vdc, and when the instantaneous value of the AC power supply 1 falls below the zero point, the zero cross detection device 31 outputs the zero cross detection signal Pzc. To do. The first detection signal delay device 32a receives the zero cross detection signal Pzc and outputs the first zero cross delay signal Pzd1 after a predetermined time has elapsed (here, the delay time td1), and the second detection signal delay device 32b detects the zero cross detection. The second zero cross delay signal Pzd2 is output after a predetermined time has elapsed after receiving the signal Pzc (here, the delay time is zero). When the switch control device 30 detects the fall of the second zero-cross delay signal Pzd2, the switch control device 30 outputs a signal Psw2 that turns on the second switch device 9.

  In this period, first, as shown in FIG. 3D, a current Iin for discharging the charge of the phase improving capacitor 6 flows in the order of the AC power source 1, the phase improving capacitor 6, the reactor 2, and the AC power source 1. This operation continues until the voltage Vc2 charged in the phase improving capacitor 6 is discharged to zero.

Period 6: When a predetermined time td1 has elapsed from the zero point of the AC power supply 1, the first zero cross delay signal Pzd1 changes from H to L. When the switch control device 30 detects the fall of the first zero-cross delay signal Pzd1, the switch control device 30 outputs a signal Psw1 that turns on the first switch device 8. Thereafter, the voltage Vc2 of the phase improving capacitor 6 is discharged to zero, but the voltage Vc1 of the power factor improving capacitor 5 remains charged in a positive half cycle, as shown in FIG. Thus, the AC power source 1, the phase improving capacitor 6, the reactor 2, the current for charging the phase improving capacitor in this order, the AC power source 1, the diode 3c, the smoothing capacitor 4, the power factor improving capacitor 5, the reactor 2 Then, a current for discharging the power factor correction capacitor 5 flows in the order of the AC power source 1, and Iin is the sum of these two currents.

  Period 7: The power supply voltage Vac becomes higher than the voltage Vdc of the smoothing capacitor 4, and the AC power supply 1, reactor 2, diode 3a, smoothing capacitor 4, diode 3d, and AC power supply 1 are smoothed in this order as shown in FIG. A current Iin for charging the voltage Vdc of the capacitor 4 flows. In addition, when a predetermined time td3 (= td4) has elapsed from the zero point of the AC power supply 1 at the beginning of this period, the third zero-cross delay signal Pzd3 and the fourth zero-cross delay signal Pzd4 change from H → L. When the switch control device 30 detects the fall of the third zero-cross delay signal Pzd3, it outputs the signal Psw1 that puts the first switch device 8 in the off state, and simultaneously detects the fall of the fourth zero-cross delay signal Pzd4. A signal Psw2 for turning off the second switch device 9 is output. As a result, the first switch device 8 and the second switch device 9 are turned off.

  Period 8: The power factor improving capacitor 5 does not flow because the first switch device 8 is in the off state. Further, since the voltages of the phase improving capacitor 6 are both charged to approximately -Vdc, no current flows. In this period, the energy stored in the reactor 2 in the periods 5, 6 and 7 is released, and as shown in FIG. 3 (f), the AC power source 1, the diode 3c, the smoothing capacitor 4, the diode 3b, the reactor 2, the AC power source A current Iin for charging the voltage Vdc of the smoothing capacitor 4 flows in the order of 1.

  As described above, by repeating the operations in the periods 1 to 8 for each cycle of the AC power supply 1, the rising of the input current can be accelerated and a current waveform having a wide conduction angle can be obtained. Therefore, the power factor can be improved and the harmonic component contained in the input current Iin can be reduced.

  In particular, as compared with the conventional power supply device shown in FIG. 9, when the voltage Vac of the AC power supply 1 rises from zero, the current Iin can be made to flow quickly by the discharge current of the phase improving capacitor 6, and further for power factor improvement. By flowing the current Iin relatively gently by the charging / discharging current of the capacitor 5 and the phase improving capacitor 6, a substantially sinusoidal current waveform can be realized as a whole. Thereby, a very high power factor is realizable compared with the past.

  Furthermore, compared with the power supply device shown in FIG. 9, the amount of increase in energy storage in the reactor 2 in the periods 1 and 4 in FIG. 2, and in addition to the power factor improving capacitor 5 in the periods 2 and 5, the phase improving capacitor 6 Since the increase in the energy accumulation in the reactor 2 due to the increase in charging / discharging to is charged in the smoothing capacitor 4 in the periods 3 and 6, a very large output voltage Vdc can be obtained.

  The output voltage Vdc can be controlled by changing the time for which the first switch device 8 and the second switch device 9 are turned on.

  Furthermore, since the timing for turning on the first switch device 8 and the second switch device 9 can be set optimally, a high power factor can always be obtained.

  As a result, if the circuit constant and the reference value are optimally selected, the output can be changed by clearing the IEC harmonic regulation and controlling the on-time of the first switch device 8, so that loads of various sizes can be obtained. Can also respond.

  In addition, in the power supply device of the present invention, since the timing for turning off the first switch device 8 and the second switch device 9 can be set optimally, loss due to unnecessary consumption of drive power can be eliminated. it can.

  As can be seen from the above description, according to the power supply device of the present invention, the two switch devices 8 and 9 can reliably perform pulse output at the optimum timing, respectively, so that high power factor and high output are realized. At the same time, a highly reliable and low-loss power supply device can be provided.

(Embodiment 2)
FIG. 4 is a circuit diagram showing still another embodiment of the power supply device of the present invention. The same components as those in FIG. 1 are denoted by the same reference numerals, and detailed description thereof is omitted. In FIG. 4, reference numeral 20 denotes a load current detection device that detects a current value flowing through the load 10, and is configured by a resistor or the like. Reference numeral 21 denotes a DC voltage detection device that detects the voltage across the smoothing capacitor 4, and the load current detection device 20 and the DC voltage detection device 21 output detected values to the switch control device 30. Hereinafter, the power supply device of the present invention will be described in detail with reference to FIG.

  When the load 10 is an inverter and a motor driven at a variable speed by the inverter, the size of the load 10 changes depending on the rotational speed of the motor and the like. Therefore, it is desirable that the power supply device secures a power factor necessary for suppressing harmonics and an output voltage (Vdc) necessary for driving the load 10 in the fluctuation range of the load 10.

  The switch control device 30 can calculate the size of the load 10 by detecting the voltage Vdc across the smoothing capacitor 4 from the output voltage detection device 21 and the current flowing through the load 10 from the load current detection device 20.

  The first detection signal delay device 32a and the second detection signal delay device 32b control the first switch device 8 and the second switch device 9 to be turned on according to the size of the load 10 so as to shorten the timing. . For example, the on-timing of a necessary pulse signal may be stored in advance according to the size of the load 10. As a result, if the circuit constants and the on timing of the first switch device 8 and the second switch device 9 are set optimally, a high power factor can be obtained in the entire region of the load 10 and the load varies in size. Can also respond.

  As can be seen from the above description, according to the power supply device of the present invention, a high power factor and output voltage can always be obtained even when the load fluctuates. can do.

  The on operation of the first switch device 8 and the second switch device 9 described in the present embodiment is an example, and the operation of the power supply device of the present invention is not limited to this.

(Embodiment 3)
A further embodiment of the power supply device of the present invention will be described in detail with reference to FIG. In FIG. 5, reference numeral 33 denotes a power supply frequency detection device that detects the frequency of the AC power supply 1 and outputs it to the switch control device 30.

For example, the detection interval of the predetermined voltage of the AC power source 1 detected by the AC voltage detection device 33 is measured, and if this value is greater than or equal to a predetermined value, it is determined to be 50 Hz, and if it is less than the predetermined value, it is determined to be 60 Hz. It can be easily detected.

  The switch control device 30 corrects the pulse output timing output based on the frequency of the AC power supply 1 detected by the AC voltage detection device 33.

  As a result, an optimal pulse signal can be output according to the size of the load 10 when the power supply frequency of the AC power supply 1 is 50 Hz / 60 Hz.

  As can be seen from the above description, according to the power supply device of the present invention, a high power factor and an output voltage can always be obtained regardless of the power supply frequency and the size of the load. A lossy power supply device can be provided.

  The on operation of the first switch device 8 and the second switch device 9 described in the present embodiment is an example, and the operation of the power supply device of the present invention is not limited to this.

(Embodiment 4)
The power supply device of the present invention will be described in detail with reference to FIG. When the load 10 is an inverter and a motor driven at a variable speed by the inverter, the size of the load 10 changes depending on the rotational speed of the motor and the like. Therefore, it is desirable that the power supply device secures a power factor necessary for suppressing harmonics and an output voltage (Vdc) necessary for driving the load 10 in the fluctuation range of the load 10.

  The switch control device 30 can calculate the size of the load 10 by detecting the voltage Vdc across the smoothing capacitor 4 from the output voltage detection device 21 and the current flowing through the load 10 from the load current detection device 20.

  The switch control device 30 controls the first switch device 8 and the second switch device 9 to be turned on in accordance with the size of the load 10 so as to increase the time. For example, the length of a necessary pulse signal may be stored in advance according to the size of the load 10. FIG. 6 shows an example of a pulse width output from the switch control device 30 to the first switch device 8 and the second switch device 9 with respect to the magnitude of the load.

  As a result, if the circuit constant and the on-time of the first switch device 8 and the second switch device 9 are set optimally, a high power factor can be obtained in the entire region of the load 10 and the load varies in size. Can also respond.

  As can be seen from the above description, according to the power supply device of the present invention, a high power factor and output voltage can always be obtained even when the load fluctuates. can do.

  The on operation of the first switch device 8 and the second switch device 9 described in the present embodiment is an example, and the operation of the power supply device of the present invention is not limited to this.

(Embodiment 5)
A further embodiment of the power supply device of the present invention will be described in detail with reference to FIG. The power frequency detector 33 measures the predetermined voltage detection interval of the AC power source 1 and detects it relatively easily by determining that the value is 50 Hz if this value is greater than or equal to the predetermined value and 60 Hz if this value is less than the predetermined value. Is possible.

  The switch control device 30 obtains the timing of the pulse signal output to turn on the first switch device 8 and the second switch device 9 based on the AC voltage detection signal of the AC power source 1 detected by the power frequency detector 33. A pulse signal width to be output is corrected based on the detected frequency of the AC power source 1.

  For example, as shown in FIG. 7, when pulse signal data corresponding to the size of the load 10 at 60 Hz is set in advance and the frequency of the AC power source 1 detected by the AC voltage detection device 32 is 50 Hz. A value obtained by multiplying 60 Hz pulse signal data by (60/50 = 1.2) is output.

  As a result, an optimal pulse signal can be output according to the size of the load 10 when the power supply frequency of the AC power supply 1 is 50 Hz / 60 Hz.

  As can be seen from the above description, according to the power supply device of the present invention, a high power factor and an output voltage can always be obtained regardless of the power supply frequency and the size of the load. A lossy power supply device can be provided.

  The on operation of the first switch device 8 and the second switch device 9 described in the present embodiment is an example, and the operation of the power supply device of the present invention is not limited to this.

(Embodiment 6)
FIG. 8 shows an example of the configuration of an air conditioner to which any of the inverter control devices of the present invention is applied. 8, the same components as those in FIG. 1 are denoted by the same reference numerals, and detailed description thereof is omitted. Hereinafter, the air conditioner of the present invention will be described with reference to FIG.

  As shown in FIG. 8, the air conditioner uses the power supply device of the invention shown in the first embodiment as a compressor drive device. In addition to the inverter device 81 and the electric compressor 82 as the load 10, the indoor unit 92, A refrigeration cycle comprising an outdoor unit 95 and a four-way valve 91 is provided.

  The indoor unit 92 includes an indoor heat exchanger 93 and an indoor fan 94, and the outdoor unit 95 includes an outdoor heat exchanger 96, an outdoor fan 97, and an expansion valve 98.

  During the refrigeration cycle, a refrigerant that is a heat medium circulates. The refrigerant is compressed by the electric compressor 82, and heat is exchanged with outdoor air by blowing from the outdoor blower 97 in the outdoor heat exchanger 96, and indoor air is blown from the indoor blower 94 in the indoor heat exchanger 93. And heat exchange. Indoor air conditioning is performed by the air after heat exchange in the indoor heat exchanger 93. Switching between cooling and heating is performed by reversing the direction of refrigerant circulation by a four-way valve 91.

  The circulation of the refrigerant in the refrigeration cycle as described above is performed by driving the electric compressor 82 by the inverter device 81, and the control method of the inverter device 81 and the electric compressor 82 is the power source of the first embodiment. This is done using a device. Since the configuration and operation of the power supply device are as described above, description thereof will be omitted.

  With the configuration as described above, it is possible to suppress deterioration in control performance such as a decrease in efficiency in the air conditioner.

  In the present embodiment, the air conditioner using the power supply device of the invention shown in the first embodiment as the compressor driving device has been described, but the power supply device of another invention as shown in the second or fifth embodiment. Even if it uses, the air conditioner which had the effect which the power supply device of each invention has similarly can be provided.

  Therefore, the effect of the power supply apparatus according to the present invention can be fully utilized by using it particularly for an air conditioner with a large load change.

  As described above, the power supply device according to the present invention can realize a high power factor and a high output, and therefore can be applied to uses such as an outdoor unit of an air conditioner.

DESCRIPTION OF SYMBOLS 1 AC power supply 2 Reactor 3a, 3b, 3c, 3d Rectifier 4 Smoothing capacitor 5 Power factor improvement capacitor 6 Phase improvement capacitor 8 First switch device 9 Second switch device 10 Load 20 Load current detection device 21 DC voltage Detection device 30 Switch control device 32a First detection signal delay device 32b Second detection signal delay device 32c Third detection signal delay device 32d Fourth detection signal delay device 33 Power supply frequency detection device

Claims (6)

A rectifier circuit that rectifies an AC power supply voltage and outputs a pulsating voltage, a reactor connected to the rectifier circuit, first and second opening / closing means for connecting and blocking a current path, and the first opening / closing means Connected in series with the power factor improving capacitor connected between the AC input terminal and the DC output terminal of the rectifier circuit, and connected in series with the second switching means, and between the AC input terminals of the rectifier circuit. A connected phase improvement capacitor; a smoothing capacitor that smoothes the output voltage of the rectifier circuit to obtain a substantially DC voltage; a zero-cross detection means that detects a zero-cross of an AC power supply voltage and outputs a zero-cross detection signal; and the zero-cross First detection signal delay means for receiving a zero cross detection signal from the detection means and outputting a first zero cross delay signal after a predetermined time has elapsed; A second detection signal delay means for outputting a second zero cross delay signal after elapse of a predetermined time after receiving the cross detection signal; and a third zero cross delay signal after elapse of a predetermined time after receiving the zero cross detection signal from the zero cross detection means. And a third detection signal delay means for receiving a zero cross detection signal from the zero cross detection means and outputting a fourth zero cross delay signal after a lapse of a predetermined time, The switch control means receives the first zero cross delay signal from the first detection signal delay means and turns on the first opening / closing means, and receives the second zero cross delay signal from the second detection signal delay means. In response, the second opening / closing means is turned on and the first opening / closing means is turned off in response to the third zero-cross delay signal from the third detection signal delay means. Power supply outputs a pulse signal, and outputting said fourth detection signal fourth the receiving zero cross delay signal of the second pulse signal for turning off the switching means from the delay means. Load state detection means for detecting the magnitude of the load is further provided, and the first and second detection signal delay means are the first and second zero crossings according to the load magnitude detected by the load state detection means. The power supply apparatus according to claim 1, wherein each of the delay signals is changed. Power supply frequency detection means for detecting the frequency of the AC power supply voltage is further provided, and the first and second detection signal delay means are the first and second zero cross delay signals according to the frequency detected by the power supply frequency detection means. The power supply device according to claim 1, wherein each of the power supply devices is changed. Load state detection means for detecting the magnitude of the load is further provided, and the switch control means includes at least one of the first and second opening / closing means according to the magnitude of the load detected by the load state detection means. The power supply device according to claim 1, wherein a pulse signal is output so that a period during which the switch is turned on is changed. Power supply frequency detection means for detecting the frequency of the AC power supply voltage is further provided, and the switch control means is an on-time of a pulse signal output to the first and second opening / closing means according to the frequency detected by the power supply frequency detection means The power supply device according to claim 1, wherein the power supply device is changed. An air conditioner comprising the power supply device according to any one of claims 1 to 5.

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