JP2011198887A - Method of manufacturing multilayered printed wiring board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method of manufacturing a multilayered printed wiring board, which can efficiently manufacture the multilayered printed wiring board excellent in insulation reliability and having a small transmission loss in an industrial scale.SOLUTION: In the method of manufacturing the multilayered printed wiring board in which a conductor circuit and a resin insulating layer are alternately laminated on a core substrate and the conductor circuit is connected via a via hole and/or a through-hole, after providing a layer consisting of a thermosetting resin composition containing a cyclic olefin polymer and an inorganic filler having 7 or lower Mohs hardness and 1 W/mk or higher thermal conductivity on the core substrate provided with the conductor circuit on the surface and forming the resin insulating layer by curing the layer, a step of forming an opening for the via hole and/or an opening for the through-hole in the resin insulating layer and then forming the conductor circuit including the via hole and/or the through-hole on the resin insulating layer is performed at least one time.

Description

  The present invention relates to a method for manufacturing a multilayer printed wiring board. The present invention also relates to a multilayer printed wiring board and a multilayer printed circuit board.

  In recent years, with the advent of advanced information technology, information transmission has begun to increase in speed and frequency, and microwave communication and millimeter wave communication have become a reality. Insulator materials used for printed circuit boards in such high frequency era are required to have a low dielectric loss tangent from the viewpoint of reducing transmission loss at high frequencies to the limit. As an insulator material having such a small dielectric loss tangent, a cyclic olefin polymer obtained by polymerizing a cyclic olefin monomer has attracted attention. On the other hand, cyclic olefin polymers generally have the disadvantages of low mechanical strength and large linear expansion coefficient. On the other hand, when using a cyclic olefin polymer as an insulator material, a technique is known in which a filler, a reinforcing fiber, or the like is blended to improve mechanical strength or reduce a linear expansion coefficient. Yes.

  As an example of using a cyclic olefin polymer as an insulating material for a printed wiring board and blending an inorganic filler, Patent Document 1 discloses a cyclic olefin resin (A), an inorganic material having an average particle size of 800 nm or less. A resin composition comprising a filler (B) and a solvent (C) in which the cyclic olefin-based resin (A) is soluble, wherein the inorganic filler (B) is previously used in the resin composition. A multilayer wiring board including an insulating layer composed of a resin composition obtained by dispersing an olefin resin (A) in a solvent containing a soluble solvent (C) is disclosed. Patent Document 2 discloses (A) a cyclic olefin resin having at least one crosslinkable group selected from the group consisting of a cyclic ether group, an organic group having a reactive double bond, and an alkoxysilyl group. (B) Disclosed is a wiring board formed by forming an insulating layer using a cyclic olefin-based resin composition having a spherical silica having an average particle diameter of 2 μm or less as an essential component and a thermal expansion coefficient of 30 ppm or less at a glass transition temperature or less. Has been. Patent Documents 1 and 2 describe that these printed wiring boards are excellent in electrical characteristics and mechanical characteristics.

By the way, in a multilayer printed wiring board, a hole to be a via hole or a through hole is formed in a substrate, and the inner wall of the hole is plated to connect a three-dimensional conductor circuit. Since the inner wall of the hole is the base for the next plating, its quality affects the plating quality and is directly related to the performance of the multilayer printed wiring board.
When the insulating layer of a multilayer printed wiring board is formed of a resin material containing a filler or reinforcing fiber, as a problem when drilling into the insulating layer, for example, the inner wall is uneven due to the exposure of the filler or fraying of the reinforcing fiber. It is known that the plating solution tends to penetrate and remain, and the insulation reliability of the multilayer printed wiring board is lowered (for example, Non-Patent Document 1). Further, when plating is performed using the inner wall of the hole as a base, a conductor layer having a large roughness is formed, and transmission loss of the multilayer printed wiring board can be increased. In multilayer printed wiring boards with high density wiring, the amount of wiring is large and the number of holes connecting conductor circuits increases dramatically. Therefore, maintaining the quality of the inner wall of the holes in the insulating layer is good for multilayer printed wiring boards. It is considered to be very important for maintaining good insulation reliability and suppressing an increase in transmission loss. However, sufficient studies have not yet been made on the relationship between the resin material constituting the insulating layer of the multilayer printed wiring board and the quality of the inner wall of the hole in the insulating layer.

JP 2006-86233 A JP 2007-88172 A

Takagi Kiyoshi, “Build-up multilayer printed circuit board technology”, Nikkan Kogyo Shimbun, June 15, 2001, first edition, 2nd edition, p. 190-192

The inventors of the present invention manufactured printed wiring boards according to the examples of Patent Documents 1 and 2 and examined their product characteristics. In the printed wiring board, as the resin material for forming the insulating layer, a cyclic olefin resin blended with a silica filler (Mohs hardness: 7, thermal conductivity: 1 W / mK) is used. As a result, in particular, in a printed wiring board in which a large number of openings for via holes and / or through holes are continuously formed by drills or lasers in the insulating layer to a practically sufficient level, the insulation reliability is reduced. It became clear that transmission loss increased.
An object of the present invention is to provide a method for producing a multilayer printed wiring board that is excellent in insulation reliability and has a small transmission loss and can be produced efficiently on an industrial scale, and a multilayer printed wiring board obtained by the production method. Another object of the present invention is to provide a small and power-saving multilayer printed circuit board using the multilayer printed wiring board.

  In order to solve the above-mentioned problems, the present inventors have intensively examined the relationship between the resin material constituting the insulating layer of the multilayer printed wiring board and the quality of the inner wall of the hole of the insulating layer, and as a result, When formed with a cured product of a curable resin composition containing a cyclic olefin polymer and an inorganic filler having a predetermined hardness and thermal conductivity, via holes and / or through holes are formed in the insulating layer. It has been found that a desired multilayer printed wiring board can be efficiently obtained regardless of the forming method and the number. Based on this finding, the present inventors have completed the present invention.

That is, according to the present invention,
[1] A method for producing a multilayer printed wiring board in which conductor circuits and resin insulating layers are alternately laminated on a core substrate, and the conductor circuits are connected via via holes and / or through holes,
A layer made of a curable resin composition containing a cyclic olefin polymer and an inorganic filler having a Mohs hardness of 7 or less and a thermal conductivity of more than 1 W / mK is provided on a core substrate provided with a conductor circuit on the surface. After the layer is cured to form a resin insulating layer, a via hole opening and / or a through hole opening is formed in the resin insulating layer, and then a via hole and / or a through hole is formed on the resin insulating layer. A method for producing a multilayer printed wiring board, wherein the step of forming a conductor circuit is performed at least once;
[2] A method for producing a multilayer printed wiring board in which conductor circuits and resin insulating layers are alternately laminated on a core substrate, and the conductor circuits are connected via via holes and through holes,
A layer made of a curable resin composition containing a cyclic olefin polymer and an inorganic filler having a Mohs hardness of 7 or less and a thermal conductivity of more than 1 W / mK is provided on a core substrate provided with a conductor circuit on the surface. Then, after the layer is cured to form a resin insulating layer, a step of forming a via hole opening in the resin insulating layer, and then forming a conductor circuit including a via hole on the resin insulating layer is performed at least once,
Resin insulation is performed on the conductor circuit on the surface of the laminate obtained by performing the above process at least once, and the conductor circuit and the resin insulation layer are alternately laminated on the core substrate in the same manner as in the above process. After forming the layer R1, an opening for a through hole is formed in the laminated body on which the resin insulating layer R1 is formed so as to penetrate the laminated body from the resin insulating layer R1 in the thickness direction, and then the resin insulating layer A method for producing a multilayer printed wiring board, comprising performing a step of forming a conductor circuit C1 including a through hole on R1;
[3] The multilayer printed wiring according to the above [1] or [2], wherein at least 500 openings for via holes and / or through holes are continuously formed with respect to at least one resin insulating layer by a drill or a laser. Board manufacturing method,
[4] The method for producing a multilayer printed wiring board according to [3], wherein the via hole opening and / or the through hole opening are formed so that the interval between any two openings is 200 μm or less,
[5] A method for producing a multilayer printed wiring board in which conductor circuits and resin insulating layers are alternately laminated on a core substrate, and the conductor circuits are connected through through holes,
A layer made of a curable resin composition containing a cyclic olefin polymer and an inorganic filler having a Mohs hardness of 7 or less and a thermal conductivity of more than 1 W / mK is provided on a core substrate provided with a conductor circuit on the surface. Then, after the layer is cured to form a resin insulating layer, a step of forming a conductor circuit on the resin insulating layer is performed at least once,
Resin insulation is performed on the conductor circuit on the surface of the laminate obtained by performing the above process at least once, and the conductor circuit and the resin insulation layer are alternately laminated on the core substrate in the same manner as in the above process. After forming the layer R2, an opening for a through hole is formed in the laminate on which the resin insulating layer R2 is formed so as to penetrate the laminate from the resin insulating layer R2 in the thickness direction, and then the resin insulating layer A method of manufacturing a multilayer printed wiring board, wherein a step of forming a conductor circuit C2 including a through hole on R2 is performed;
[6] The method for producing a multilayer printed wiring board according to [5], wherein at least 500 through-hole openings are continuously formed by a drill or a laser.
[7] The method for producing a multilayer printed wiring board according to [6], wherein the through-hole opening is formed so that an interval between any two openings is 200 μm or less,
[8] The method for producing a multilayer printed wiring board according to any one of [1] to [7], wherein the content of the inorganic filler in the curable resin composition is 10 to 60% by volume,
[9] The inorganic filler is the following (A) to (C):
[A]-[A] which is at least one selected from the group consisting of (A) barium titanate, strontium titanate, and calcium titanate (B) a lithium titanate compound containing a rare earth metal (C) inorganic nitride. 8] A method for producing a multilayer printed wiring board according to any one of
[10] Conductor circuits and resin insulating layers are alternately laminated on a core substrate, which can be obtained by the method for manufacturing a multilayer printed wiring board according to any one of [1] to [9], and the conductor circuits are formed as via holes. And / or multilayer printed wiring boards connected through through holes,
[11] The multilayer printed wiring board according to [10], wherein the surface roughness (Rz1) of the opening for via hole and / or the opening for through hole is 5 μm or less,
[12] The average particle size of the inorganic filler is not less than the surface roughness (Rz2) of the conductor layer constituting the conductor circuit and not more than the surface roughness (Rz1) of the via hole opening and / or the through hole opening. [10] or the multilayer printed wiring board according to [11],
[13] An electronic component is mounted on and / or built in the multilayer printed wiring board according to any one of [10] to [12], and the electronic component is connected to a conductor circuit of the multilayer printed wiring board. And [14] an electronic device comprising the multilayer printed circuit board according to [13],
Can be provided.

  According to the present invention, a multilayer printed wiring board having excellent insulation reliability and low transmission loss can be efficiently manufactured on an industrial scale. In addition, a small and power-saving multilayer printed circuit board can be provided.

It is a schematic diagram which shows the positional relationship of two adjacent openings formed in the resin insulating layer. It is a schematic diagram of a cross section when installing so that two layers of a resin insulating layer and a conductor layer may become horizontal. It is a block diagram which shows the transmission part Tx module of a radio | wireless communication apparatus as an example of a lamination | stacking module. It is an example of the circuit diagram of power amplifier part PA contained in the transmission part Tx module of FIG. It is a disassembled perspective view of the PA laminated module produced in the comparative example 1 formed by making power amplifier part PA into a laminated module with the band pass filter BPF. FIG. 6 is a perspective view of the PA laminated module in FIG. 5 in a completed state. FIG. 6 is a schematic cross-sectional view showing an internal connection structure in a completed state of the PA laminated module of FIG. 5. FIG. 7 is a perspective view of the PA laminated module manufactured in Example 2 in which the bandpass filter BPF mounted on the surface of the laminated substrate in the PA laminated module of FIG. 6 is built into the inner layer of the substrate by patterning. is there. It is an example of the circuit of a band pass filter. It is a perspective view of an example of the band pass filter part which incorporates an inductor element (L) and a capacitor element (C) in a multilayer substrate. It is a measurement result of Q value of the inductor element produced with various materials. It is a structural example of the band pass filter by a λ / 4 resonator. It is an example of 1 structure of the band pass filter by a lambda / 2 resonator. It is the measurement result of the transmission loss of the microstrip line produced with various materials. It is a measurement result of the transmission loss in the pass band of the 2.5 GHz band band pass filter produced with various materials. 3 is a schematic cross-sectional view of a PA laminated module manufactured in Comparative Example 1. FIG. 6 is a schematic cross-sectional view of a PA laminated module manufactured in Example 2. FIG.

1. Manufacturing method of multilayer printed wiring board In the manufacturing method of a multilayer printed wiring board of the present invention, a conductor circuit and a resin insulating layer are alternately laminated on a core substrate, and the conductor circuit is connected via a via hole and / or a through hole. A method for producing a multilayer printed wiring board comprising: forming a resin insulating layer by using a cyclic olefin polymer and an inorganic filler (hereinafter referred to as inorganic) having a Mohs hardness of 7 or less and a thermal conductivity of more than 1 W / mK. One major characteristic is that a layer made of a curable resin composition containing a filler X is provided and the layer is cured.

  When the insulating layer of the multilayer printed wiring board is formed of a resin material blended with fillers or reinforcing fibers, it is known that there are problems as described in Non-Patent Document 1 when drilling into the insulating layer. . Currently, such problems are dealt with by appropriately adjusting the drilling process, such as method / equipment selection and process monitoring. Especially in the case of multi-layer printed wiring boards with high-density wiring, As the number increases dramatically, the continuous processing time becomes longer, and the heat generated during drilling is also affected, maintaining the quality of the inner wall of the hole in the insulating layer and making the multilayer printed wiring board efficient on an industrial scale. It is difficult to manufacture automatically. On the other hand, according to the present invention, it is not necessary to consider the above problem, and a desired multilayer printed wiring board can be efficiently manufactured on an industrial scale. Although the mechanism is not necessarily clear, in the multilayer printed wiring board obtained by the present invention, the resin characteristics of the cyclic olefin polymer that is the base resin of the resin insulating layer, and the hardness and thermal conductivity of the inorganic filler X In combination, the effect of various physical effects on the inner wall of the hole in the resin insulation layer in the drilling process is alleviated, and the quality of the inner wall of the hole in the resin insulation layer is kept good, Moreover, it is estimated that the quality of the plating for connection of the conductor circuit formed on the inner wall is excellent. Therefore, according to the present invention, a multilayer printed wiring board having excellent insulation reliability and low transmission loss can be efficiently manufactured on an industrial scale. In addition, according to the wiring board, a small and power-saving multilayer printed circuit board can be efficiently manufactured.

  In this specification, the “hole” in the resin insulating layer refers to an opening for a via hole and / or an opening for a through hole. The “multilayer printed wiring board” refers to a multilayer board on which electronic components are mounted and / or built and used as a base for forming an electronic circuit function by being connected to a conductor circuit. “Multilayer printed circuit board” refers to an electronic component mounted and / or built in a multilayer printed wiring board and connected to a conductor circuit to form an electronic circuit function.

[Curable resin composition]
The curable resin composition used for forming the resin insulation layer in the method for producing a multilayer printed wiring board of the present invention contains a cyclic olefin polymer and an inorganic filler X.

(Cyclic olefin polymer)
The cyclic olefin polymer used in the present invention is a polymer comprising a cyclic olefin monomer unit in a repeating unit of the polymer. From the viewpoint of improving the mechanical strength, heat resistance and the like of the resulting multilayer printed wiring board, the cyclic olefin polymer is a cyclic olefin monomer unit in all repeating units of the polymer, usually 50 mol% or more, The content is preferably 70 mol% or more, more preferably 80 mol% or more. The content of the cyclic olefin monomer unit in the cyclic olefin polymer can be measured by, for example, NMR.

  The cyclic olefin monomer is an olefin having an alicyclic structure in the molecule. Although there is no restriction | limiting in particular in carbon number which comprises an alicyclic structure, Usually, 4-30 pieces, Preferably it is 5-20 pieces, More preferably, it is the range of 5-15 pieces. The alicyclic structure may be polycyclic or monocyclic, but polycyclic is preferred. The carbon-carbon double bond is preferably in the alicyclic structure. The cyclic olefin monomer used in the present invention is particularly preferably a polycyclic monomer having a carbon-carbon double bond in the alicyclic structure.

  The cyclic olefin polymer is not particularly limited, and examples thereof include a norbornene polymer, a monocyclic olefin polymer, a cyclic conjugated diene polymer, and a vinyl alicyclic hydrocarbon polymer. It is done. These polymers are used alone or in combination of two or more. Among these, from the viewpoint of improving the mechanical strength and heat resistance of the resulting multilayer printed wiring board, norbornene-based polymers and cyclic conjugated diene polymers are preferable, and norbornene-based polymers are more preferable. These polymers may be hydrogenated.

  Norbornene-based polymers include ring-opening polymers of norbornene-based monomers, ring-opening polymers of norbornene-based monomers and other monomers capable of ring-opening copolymerization, and norbornene-based monomers. Examples include addition polymers and addition polymers of norbornene monomers and other monomers that can be addition copolymerized therewith. Among these, a ring-opening polymer of a norbornene monomer is preferable from the viewpoint of improving the mechanical strength and heat resistance of the obtained multilayer printed wiring board.

The norbornene monomer used in the present invention is a cyclic olefin monomer having a norbornene ring structure in the molecule as an alicyclic structure. Examples include norbornenes, dicyclopentadiene, and tetracyclododecene.
Examples of the norbornene-based monomer include bicyclo [2.2.1] hept-2-ene (common name: norbornene) and derivatives thereof (those having a substituent on the ring; the same shall apply hereinafter), tricyclo [4. .3.0.1 ^2,5 ] deca-3,7-diene (common name: dicyclopentadiene) and its derivatives, tetracyclo [7.4.0.0 ^2,7 . 1 ^10,13] trideca -2,4,6,11- tetraene (common name: methanolate tetrahydrofluorene) and derivatives thereof, tetracyclo [4.4.0.1 ^{2, 5. 17, 10} ] dodec-3-ene (common name: tetracyclododecene) and its derivatives. Examples of the substituent of the norbornene-based monomer include a hydrocarbon group having 1 to 30 carbon atoms such as an alkyl group, an alkenyl group, an alkylidene group, and an aryl group, and a polar group such as a carboxyl group and an acid anhydride group. Etc. The norbornene-based monomer may have a polar group as a substituent, but from the viewpoint of making the obtained multilayer printed wiring board a low dielectric loss tangent, it has no polar group, that is, only carbon atoms and hydrogen atoms. What is comprised is preferable. These norbornene monomers are used singly or in combination of two or more.

  Examples of the other monomer capable of ring-opening copolymerization with a norbornene-based monomer include monocyclic olefins such as cyclohexene, cycloheptene, and cyclooctene. The other monomers capable of ring-opening copolymerization with the norbornene-based monomer are used alone or in combination of two or more.

  A ring-opening polymer of a norbornene-based monomer, or a ring-opening polymer of a norbornene-based monomer and another monomer capable of ring-opening copolymerization with a monomer component is a known ring-opening polymerization. It can be obtained by polymerization in the presence of a catalyst. Examples of the ring-opening polymerization catalyst include a metathesis polymerization catalyst, and a ruthenium carbene complex in which a complex having ruthenium as a central atom, particularly a carbene compound having a heterocyclic structure and other neutral electron donors are coordinated to ruthenium. Is preferably used. Here, the neutral electron donor means a ligand having a neutral charge when it is separated from the central metal atom. The polymerization reaction form is not particularly limited, and may be bulk polymerization or solution polymerization.

  An addition polymer of a norbornene monomer, or an addition polymer of a norbornene monomer and another monomer that can be addition copolymerized therewith, these monomers can be added to known addition polymerization catalysts, for example, It can be obtained by conducting a polymerization reaction using a catalyst comprising a titanium, zirconium or vanadium compound and an organoaluminum compound. Examples of other monomers that can be addition copolymerized with a norbornene monomer include α-olefins having 2 to 20 carbon atoms such as ethylene, propylene, 1-butene, and 1-pentene; cyclobutene, cyclopentene, And monocyclic olefins such as cyclohexene and cyclooctene; non-conjugated dienes such as 1,4-hexadiene and 1,7-octadiene; Other monomers capable of addition copolymerization with norbornene-based monomers are used alone or in combination of two or more.

  The curable resin composition used in the present invention may contain a known polymer other than the cyclic olefin-based polymer as long as the desired effect of the present invention is not inhibited. Examples of such polymers include PPE (polyphenylene ether), BT resin (bismaleimide triazine), epoxy resin, polyimide resin, fluororesin, phenol resin, and polyamide bismaleimide. The blending amount of these polymers is usually 20% by weight or less in the total polymer blended in the curable resin composition.

(Inorganic filler X)
The inorganic filler X used in the present invention is an inorganic filler having a Mohs hardness of 7 or less and a thermal conductivity of more than 1 W / mK. If the Mohs hardness of the inorganic filler X exceeds 7, it will be difficult to form holes in the resin insulation layer by means that are normally used, and if the thermal conductivity is 1 W / mK or less, the holes in the resin insulation layer will be processed. In this case, it is difficult to mitigate the influence of the heat generated at the time on the inner wall of the hole, and it becomes difficult to form a desired hole in the resin insulating layer, so that the desired effect of the present invention cannot be obtained.
The Mohs hardness is not particularly limited as long as it is 7 or less, but the lower limit is usually about 2. The Mohs hardness can be measured with a Mohs hardness meter. On the other hand, from the viewpoint of improving hole workability, the thermal conductivity is preferably 5 W / mK or more. In addition, as an upper limit of heat conductivity, it is about 320 W / mK normally. The thermal conductivity can be measured by a laser flash method.

  The inorganic filler X is usually used in the form of a powder. The shape is not particularly limited, and may be any shape such as a spherical shape, a granular shape, an indefinite shape, a dendritic shape, a needle shape, a rod shape, and a flat shape. As an average particle diameter of the inorganic filler X, it is 0.5-30 micrometers normally, Preferably it is 1-25 micrometers, More preferably, it is 2-20 micrometers. If the average particle diameter is within such a range, the properties such as the dispersibility and the effect of reducing the linear expansion coefficient are exhibited in a well-balanced manner. The average particle diameter can be measured by a laser diffraction / scattering method.

The inorganic filler X used in the present invention has a relatively high hardness and excellent thermal conductivity, and can be easily selected from known inorganic fillers. Any inorganic filler X is available as a commercial product.
The inorganic filler X is not particularly limited, but the following (A) to (C): from the viewpoint of expressing the dielectric properties and heat dissipation in a balanced manner in the resulting multilayer printed wiring board.
(A) Barium titanate (Mohs hardness: 4.5, thermal conductivity: 6 W / mK), strontium titanate (Mohs hardness: 6, thermal conductivity: 12 W / mK), and calcium titanate (Mohs hardness: 5) .5, thermal conductivity: 6 W / mK),
(B) a lithium titanate compound containing a rare earth metal,
(C) inorganic nitride,
At least one selected from the group consisting of
The compound (B) is a composite oxide of lithium titanate and a rare earth metal. As rare earth metals, neodymium (Nd), samarium (Sm), and praseodymium (Pr) are usually preferred. Examples of the compound (B) include Li _0.5 Nd _0.5 TiO ₃ , Li _0.5 Sm _0.5 TiO ₃ , and Li _0.5 Pr _0.5 TiO ₃ . The compound (B) has a Mohs hardness of about 3 to 7, and a thermal conductivity of about 2 to 10 W / mK.
The inorganic nitride (C) is a compound composed of nitrogen and an inorganic substance. As the inorganic substance, boron (B), aluminum (Al), and silicon (Si) are usually preferable. Examples of the inorganic nitride (C) include BN and SiN. The compound (C) has a Mohs hardness of about 2 to 6, and a thermal conductivity of about 100 to 300 W / mK.
The inorganic fillers X can be used alone or in combination of two or more.

  The inorganic filler X may be surface-treated with a known silane coupling agent such as epoxy silane, aminosilane, and titanate from the viewpoint of increasing the affinity with the cyclic olefin polymer. Such surface treatment methods are known, and the inorganic filler X subjected to the surface treatment is also available as a commercial product.

  In the curable resin composition used in the present invention, the content of the inorganic filler X is usually from the viewpoint of well-balanced expression of the hole workability in the resin insulating layer and the dielectric properties of the resulting multilayer printed wiring board. It is 10-60 volume%, Preferably it is 10-40 volume%.

  In addition, as long as expression of the desired effect of the present invention is not hindered, known fillers other than the inorganic filler X, for example, flame retardants such as antimony oxide, aluminum hydroxide, magnesium hydroxide, and phosphate esters, Further, a colorant or the like may be used in combination. As content of fillers other than the inorganic filler X, it is 60 weight% or less in all the fillers mix | blended with curable resin composition.

(Preparation of curable resin composition)
Although the preparation method of the curable resin composition used for this invention is not specifically limited, From a viewpoint of preparing this composition efficiently, it prepares with the following method (I) or method (II). Is preferred.

Method (I) for preparing the curable resin composition is a method in which a cyclic olefin polymer is dissolved in an appropriate solvent, and the inorganic filler X and a crosslinking agent are mixed to obtain a varnish. In this case, in the production of the multilayer printed wiring board, a layer made of a curable resin composition is provided on the conductor circuit by directly applying varnish on an arbitrary conductor circuit, molding and drying, or in advance The varnish is molded and dried to form a film, or the varnish is impregnated into a reinforcing fiber, and then molded and dried to form a prepreg, and a layer made of a curable resin composition is provided by overlaying it on a conductor circuit. it can.
On the other hand, the method (II) is a method for bulk ring-opening polymerization of a polymerizable composition containing a cyclic olefin monomer capable of bulk ring-opening polymerization, an inorganic filler X, a crosslinking agent, and a metathesis polymerization catalyst. In this case, in the production of a multilayer printed wiring board, a layer made of a curable resin composition is formed on a conductor circuit by directly applying the polymerizable composition on an arbitrary conductor circuit and molding and bulk ring-opening polymerization. Or forming a film by polymerizing the polymerizable composition in advance and bulk ring-opening polymerization, or molding and bulk ring-opening polymerization after impregnating the polymerizable composition into a reinforcing fiber to form a prepreg. The layer which consists of a curable resin composition can be provided by overlapping on top.
In the method (I) or method (II), when a layer made of a curable resin composition is provided on a conductor circuit using a prepreg, the layer is in a state in which a reinforcing fiber is impregnated with a curable resin composition. Will be formed.

  On the other hand, the curable resin composition obtained by the above methods (I) and (II) contains a crosslinking agent, but the resin composition containing the cyclic olefin polymer and the inorganic filler X is curable. That is, a crosslinking agent is not necessarily required as long as it can be used as a crosslinkable resin composition. Examples of the resin composition include a cyclic olefin-based monomer having a carbon-carbon double bond exhibiting metathesis crosslinkability in addition to a carbon-carbon double bond involved in a metathesis polymerization reaction, such as dicyclopentadiene. Examples thereof include a resin composition containing a cyclic olefin polymer formed by using a body.

  In the method (I), the solvent used for the preparation of the varnish is not limited as long as it can dissolve the cyclic olefin polymer. From the viewpoint of easiness of drying, those having a boiling point of 30 to 250 ° C. Preferably, the thing of 50-200 degreeC is more preferable. Examples of such solvents include known solvents such as chain aliphatic hydrocarbons, alicyclic hydrocarbons, and aromatic hydrocarbons. The amount of the solvent used is such that the solid content concentration of the varnish is usually 5 to 70% by weight, preferably 10 to 65% by weight, more preferably 20 to 60% by weight.

  The varnish can be prepared, for example, by dissolving the cyclic olefin polymer in a solvent, adding an inorganic filler X, a crosslinking agent, and other components as required, and mixing them according to a known method. The crosslinking agent is not particularly limited as long as it can induce a crosslinking reaction in the molecule or between molecules in the cyclic olefin polymer constituting the curable resin composition. Preferably used. Examples of the radical generator include organic peroxides, diazo compounds, and nonpolar radical generators. Examples of other components include a crosslinking aid, a crosslinking retarder, a modifier, an antioxidant, and a light stabilizer.

  When the varnish is directly applied on the conductor circuit and a layer made of the curable resin composition is provided on the conductor circuit, for example, the conductor circuit and the resin insulating layer are provided on the core substrate having the conductor circuit on the top layer The laminated body which is laminated | stacked alternately can be performed by mounting in a shaping | molding die previously, inject | pouring a varnish in this shaping | molding die, and then drying. As the mold, a conventionally known mold, for example, a split mold structure, that is, a mold having a core mold and a cavity mold can be used. The core mold and the cavity mold are produced so as to form a void that matches the shape of the target molded product. On the other hand, when a film or prepreg is formed using a varnish and a layer made of a curable resin composition is formed by superimposing it on a conductor circuit, the varnish is made of, for example, polyethylene terephthalate, polypropylene, polyethylene, polycarbonate and nylon Is it possible to obtain a film by coating it on a support such as a resin film made of iron, stainless steel, copper, aluminum, nickel, chromium, gold, silver, etc., and drying to remove the solvent? Alternatively, a reinforcing fiber is placed on the support, and varnish is poured thereon, and if desired, a protective film is further layered thereon, and a varnish is impregnated into the reinforcing fiber by pressing with a roller or the like from above, followed by drying and solvent removal. The prepreg is obtained by removing the film or the prepreg thus obtained as a conductor. It can be easily performed by superimposing on the road. The reinforcing fibers are not particularly limited, and examples thereof include organic fibers such as PET (polyethylene terephthalate) fibers and aramid fibers; inorganic fibers such as glass fibers, carbon fibers, and alumina fibers. Examples of the shape of the reinforcing fiber include a mat, a cloth, and a non-woven fabric. The reinforcing fibers can be used alone or in combination of two or more. The amount used is usually in the range of 10 to 90% by weight, preferably 20 to 80% by weight, more preferably 30 to 70% by weight in the prepreg obtained. If it exists in this range, the mechanical strength and electrical property of the resin insulation layer obtained are highly balanced and suitable.

  The drying conditions of the varnish may be appropriately selected depending on the type of solvent, but in order to obtain a curable resin composition, it is preferable not to cause a crosslinking reaction as much as possible, and the drying temperature is lower than the temperature at which the crosslinking reaction occurs. It is good. What is necessary is just to determine a drying temperature suitably in the range of 20-300 degreeC according to the characteristic of the crosslinking agent to be used. For example, when a radical generator is used as the crosslinking agent, it is usually at most 1 minute half-life temperature of the radical generator, preferably at most 10 minutes of 1-minute half-life temperature, more preferably at most 20 minutes of half-life temperature of 1 minute. is there. The 1-minute half-life temperature is a temperature at which half of the radical generator decomposes in 1 minute.

  In order to cure the layer composed of the curable resin composition formed using the varnish to form the resin insulating layer, the layer composed of the curable resin composition is heated to a temperature at which the crosslinking reaction is induced or higher. Good. For example, when a radical generator is used as the crosslinking agent, the heating temperature is usually at least 1 minute half-life temperature of the radical generator, preferably at a temperature 5 ° C. higher than the 1-minute half-life temperature, more preferably 1 minute. The temperature is 10 ° C. or more higher than the half-life temperature. Typically, it is in the range of 100 to 300 ° C, preferably 150 to 250 ° C. When a layer made of a curable resin composition is provided by directly applying varnish on a conductor circuit, heating is performed at a temperature higher than the temperature at which a crosslinking reaction is induced by the curable resin composition, and the formation and curing of the layer are performed simultaneously. You may do it in parallel.

  The polymerizable composition used in the method (II) is, for example, a cyclic olefin-based monomer capable of bulk ring-opening polymerization, a metathesis polymerization catalyst, a crosslinking agent, an inorganic filler X, and, if desired, other components described above. It can be prepared by mixing according to the method. The crosslinking agent is the same as that used for the preparation of the varnish. As other components, a chain transfer agent may be further used.

When a layer made of a curable resin composition is provided on a conductor circuit by directly applying the polymerizable composition on the conductor circuit and molding and bulk ring-opening polymerization, for example, the conductor circuit is provided on the uppermost layer. Then, a laminate in which conductor circuits and resin insulating layers are alternately laminated on the core substrate is placed in advance in a mold, and then a polymerizable composition is injected into the mold to form and block-open. It can be carried out by ring polymerization. For example, the mold having the split mold structure may be used. In this embodiment, first, only a bulk ring-opening polymerization of the polymerizable composition is allowed to proceed to provide a layer made of the curable resin composition on the conductor circuit, and then a crosslinking reaction with a crosslinking agent is allowed to proceed separately. The layer made of the curable resin composition is cured to form a resin insulating layer, or the bulk ring-opening polymerization of the polymerizable composition and the crosslinking reaction by the crosslinking agent are simultaneously performed in parallel to form a conductor circuit. In parallel with providing the layer which consists of a curable resin composition on this, this layer can be hardened and a resin insulating layer can be formed.
On the other hand, when a film or prepreg is formed using the polymerizable composition and a layer made of the curable resin composition is provided by overlapping it on the conductor circuit, the polymerizable composition is supported according to the case of the varnish. Apply on the body, dry if desired, and then proceed with substantially only the bulk ring-opening polymerization to obtain a film made of the curable resin composition, or the polymerizable composition according to the case of varnish A prepreg formed by impregnating the reinforcing fiber with the curable resin composition and then proceeding with substantially only ring-opening polymerization to obtain a prepreg obtained by impregnating the reinforcing fiber with the reinforcing fiber, and the film or prepreg thus obtained Can be easily performed by superimposing on the conductor circuit. The polymerizable composition has a lower viscosity than the varnish, and can quickly and uniformly impregnate the reinforcing fibers. Therefore, by impregnating the reinforcing fiber with the polymerizable composition, a prepreg excellent in the impregnation property and adhesion of the polymer component to the reinforcing fiber can be obtained.

In the method (II), for example, when a radical generator is used as the crosslinking agent, in order to substantially only advance the bulk ring-opening polymerization of the polymerizable composition and not to cause the crosslinking reaction to proceed, the bulk opening is performed. The peak temperature of the ring polymerization is usually set to the 1 minute half-life temperature or less of the radical generator. The heating temperature at that time is usually in the range of 30 to 250 ° C., preferably 50 to 200 ° C., more preferably 90 to 150 ° C., and not more than the 1 minute half-life temperature of the radical generator, preferably 1 minute. The half-life temperature is 10 ° C. or lower, more preferably, the 1-minute half-life temperature is 20 ° C. or lower. The polymerization time may be appropriately selected, but is usually 1 second to 20 minutes, preferably 10 seconds to 5 minutes.
On the other hand, when the bulk ring-opening polymerization of the polymerizable composition and the crosslinking reaction by the crosslinking agent proceed simultaneously in parallel, the heating temperature is usually equal to or higher than the temperature at which the crosslinking reaction is induced by the crosslinking agent. For example, when a radical generator is used as the crosslinking agent, the heating temperature is usually at least 1 minute half-life temperature of the radical generator, preferably at least 5 ° C higher than the 1-minute half-life temperature, more preferably half-minute for 1 minute. The temperature is 10 ° C. or more higher than the initial temperature. Typically, it is in the range of 100 to 300 ° C, preferably 150 to 250 ° C. The heating time is in the range of 0.1 to 180 minutes, preferably 0.5 to 120 minutes, more preferably 1 to 60 minutes. In addition, also when using the film or prepreg obtained using the said polymeric composition for formation of a resin insulating layer, heating temperature is normally 1 minute half-life temperature or more of a radical generating agent, Preferably it is 1 A resin insulation layer is formed by heating and curing the film or prepreg within the above typical temperature range at a temperature 5 ° C. or more higher than the minute half-life temperature, more preferably 10 ° C. or more higher than the 1-minute half-life temperature.

  In the above method (I) or (II), for example, if a copper foil is used as a support, a resin-coated copper foil [Resin Coated Copper (RCC) is used as a laminate of the support and a layer made of a curable resin composition. )] Can be obtained. If the resin is further cured, a copper clad laminate (Copper Clad Laminates (CCL)) can be obtained. These RCC and CCL can also be appropriately used according to a known method in the production of the multilayer printed wiring board of the present invention. In addition, the layer which consists of curable resin compositions can be made into 1 or 2 or more depending on necessity.

[Manufacturing method of multilayer printed wiring board]
Hereinafter, the manufacturing method of the multilayer printed wiring board of this invention is demonstrated in detail. The manufacturing method of the multilayer printed wiring board of this invention is divided roughly into the 1st-3rd aspect according to the method of forming the via hole and / or through hole in a multilayer printed wiring board.

(First aspect)
In this embodiment, a layer made of the curable resin composition is provided on a core substrate having a conductor circuit provided on the surface, the layer is cured to form a resin insulating layer, and then a via hole is formed in the resin insulating layer. Forming a conductive circuit including a via hole and / or a through hole formed in the opening on the resin insulating layer, and at least one step of forming a through hole and / or a through hole opening, Manufactures multilayer printed wiring boards.

(Second aspect)
In this embodiment, a layer made of the curable resin composition is provided on a core substrate having a conductor circuit provided on the surface, the layer is cured to form a resin insulating layer, and then a via hole is formed in the resin insulating layer. A core obtained by forming an opening for use and then forming a conductor circuit including a via hole formed in the opening on the resin insulating layer at least once, and performing the step at least once After the resin insulation layer R1 is formed on the conductor circuit on the surface of the laminate formed by alternately laminating the conductor circuits and the resin insulation layers on the substrate in the same manner as described above, the resin insulation layer R1 is formed. A through-hole opening is formed in the laminated body so as to penetrate the laminated body in the thickness direction from the resin insulating layer R1, and then the through-hole formed in the opening is included on the resin insulating layer R1. Form conductor circuit C1 By performing the step of, producing a multi-layer printed wiring board.

(Third aspect)
In this embodiment, a layer made of the curable resin composition is provided on a core substrate having a conductor circuit provided on the surface, the layer is cured to form a resin insulation layer, and then the resin insulation layer is formed on the resin insulation layer. Conductor on the surface of a laminate obtained by alternately forming conductor circuits and resin insulating layers on a core substrate, obtained by performing the process of forming a conductor circuit at least once and performing the process at least once. After the resin insulating layer R2 is formed on the circuit in the same manner as in the above step, a through-hole is formed so as to penetrate the laminate from the resin insulating layer R2 in the thickness direction into the laminate on which the resin insulating layer R2 is formed. A multilayer printed wiring board is manufactured by forming a conductive opening and then forming a conductor circuit C2 including a through hole formed in the opening on the resin insulating layer R2.

  Hereinafter, operations in each process performed in the first to third aspects will be described. In addition, since the operation in the process performed in the first aspect is common to both the second and third aspects, the first aspect will be mainly described, and the first and second aspects will be described. Operations different from those of the above will be described supplementarily. Each operation can be appropriately performed according to a known method.

(1) The conductor circuit can be formed on the surface of the core substrate as follows, for example.
As the core substrate, a resin substrate (copper-clad laminate) made of a fiber reinforced resin in which a copper foil is pasted on one side or both sides is usually used. Examples of the resin substrate include a glass / epoxy substrate, a glass / polyimide substrate, a glass / bismaleimide-triazine resin substrate, and a glass / fluorine resin substrate. Moreover, you may use the copper clad laminated board obtained using the said curable resin composition as a core board | substrate. When it is desired to produce a more power-saving multilayer printed circuit board using the multilayer printed wiring board of the present invention, a copper-clad laminate obtained using the curable resin composition is used as the core substrate. Is preferred. From the viewpoint of thinning the multilayer printed wiring board, the thickness of the copper clad laminate as the core substrate is usually 0.06 to 1.2 mm, and the thickness of the copper foil is usually 0.1. ˜100 μm.

  A through hole may be provided in the core substrate. The through hole is formed by providing a through hole (through hole opening) in the thickness direction with a drill in the core substrate and subjecting the wall surface of the through hole and the copper foil surface to electroless plating. As electroless plating, copper plating is usually used. Furthermore, electroplating may be performed for thickening the copper foil. As electroplating, copper plating is usually used. Note that the inner wall of the through-hole opening is roughened by a known method, the opening is filled with a resin paste or the like, and a conductive layer is formed on the surface of the filling portion by electroless plating or electroplating. Good.

  The conductor circuit can be formed in a form that optionally includes a through hole by forming an etching resist on a copper solid pattern on the core substrate by using a photolithography technique and then performing etching. Such a conductor circuit is connected to a conductor layer constituting a through hole.

(2) Next, a roughening process is performed on the formed conductor circuit as desired. Also, without roughening the conductor circuit, the core substrate on which the conductor circuit is formed is immersed in a solution in which any adhesive resin component is dissolved, and an adhesive resin layer is formed on the surface of the conductor circuit. You may ensure adhesiveness with the resin insulation layer.

(3) On the core substrate having a conductor circuit provided on the surface, a layer made of the curable resin composition is provided on the conductor circuit provided on one side or both sides, and the layer is cured to form a resin insulating layer (interlayer) Resin insulation layer). The resin insulating layer can be formed of a curable resin composition as described above. From the viewpoint of increasing production efficiency, a method of forming a resin insulating layer by heat-pressing and curing a film or prepreg made of a curable resin composition is preferable. At that time, the film or the prepreg can be laminated one or more if desired. Thermocompression bonding can be performed by heating the film or prepreg to a temperature equal to or higher than the temperature at which the crosslinking reaction is induced by the crosslinking agent, and usually pressing at a pressing pressure in the range of 0.1 to 20 Mpa. Thermocompression bonding may be performed under vacuum or in a reduced pressure atmosphere. The thickness of the resin insulating layer thus formed is usually 0.04 to 0.2 mm.
In addition, as long as expression of the desired effect of this invention is not inhibited, you may form the resin insulation layer of the multilayer printed wiring board of this invention by well-known materials other than the hardened | cured material of the said curable resin composition. Examples of such known materials include PPE (polyphenylene ether), BT resin (bismaleimide triazine), epoxy resin, polyimide resin, fluororesin, phenol resin, and polyamide bismaleimide.

(4) Next, via hole openings and / or through hole openings are formed in the resin insulating layer.
The opening for the via hole is usually formed by irradiating the resin insulating layer with laser light or using a drill. Examples of the laser light include a carbon dioxide (CO ₂ ) laser, an ultraviolet laser, and an excimer laser. Among these, an excimer laser and a carbon dioxide gas laser are preferable. The excimer laser can form a large number of openings for via holes at a time by using a mask or the like in which through holes are formed in a portion for forming openings for via holes. Further, the carbon dioxide laser is preferable because the resin remaining in the opening is small and the damage to the resin around the opening is small. Generally, the hole diameter of the via hole opening is preferably about 10 to 200 μm.

  On the other hand, the through-hole opening is formed so as to penetrate the resin insulating layer in the thickness direction, for example, according to (1). As a hole diameter of the opening for through holes, about 10 to 500 μm is usually desirable.

  When the opening is formed by laser light, particularly when a carbon dioxide laser is used, it is desirable to perform desmear treatment. The desmear treatment can be carried out using an oxidizing agent comprising an aqueous solution such as chromic acid or permanganate.

In the present invention, since the resin insulating layer is formed of a cured product of the curable resin composition, unlike the conventional case, the quality of the inner wall of the hole of the resin insulating layer is substantially reduced without being deteriorated once. A large number of holes can be formed in the resin insulating layer continuously to the extent necessary for practical use. In addition, the use conditions of a drill or a laser at the time of making a hole in the resin insulating layer are not particularly limited as long as a desired hole can be formed.
The number of via-hole openings and / or through-hole openings formed in the resin insulation layer is not particularly limited and may be selected as desired. However, a desired multilayer printed wiring board can be efficiently produced on an industrial scale. From the viewpoint of manufacturing, it is desirable to form at least 500, preferably 1000, more preferably 2000 continuously by a drill or a laser. Forming openings continuously with a drill means that openings are continuously formed with one drill. Further, when the via hole opening and / or the through hole opening are formed in this way, the via hole opening and / or the through hole opening are adjacent to each other from the viewpoint of enabling higher-density wiring formation. It is desirable that the distance between the two openings is usually 200 μm or less, preferably 150 μm or less. In addition, the lower limit of the opening interval is about 50 μm. Conventionally, in low-temperature fired ceramics (LTCC) used as a material for an interlayer insulating layer, it is practically impossible to form openings at intervals of 200 μm or less. In the multilayer printed wiring board of the present invention, insulation reliability is maintained even when via hole openings and / or through hole openings are formed at intervals of 200 μm or less. Therefore, the multilayer printed wiring board of the present invention is used. Thus, the multilayer printed circuit board can be miniaturized. In the present specification, the distance between the openings is defined by the radius a of the opening 1, the radius b of the opening 2, and the center distance L between the circles of the openings 1 and 2 in two adjacent openings shown in FIG. A distance D expressed as-(a + b). Here, “two adjacent openings” refers to two adjacent openings across the shortest distance.
In producing the multilayer printed wiring board of the present invention, it is desirable to form a via hole opening and / or a through hole opening as described above with respect to at least one resin insulating layer using a drill or a laser. . All the resin insulation layers of the multilayer printed wiring board of the present invention are formed by the resin insulation layer (hereinafter sometimes referred to as “resin insulation layer Y”) in which openings for via holes and / or through holes are thus formed. However, the ratio of the resin insulation layer Y to the total resin insulation layer in the multilayer printed wiring board of the present invention can be appropriately selected as desired.

  Instead of the operations (3) and (4), a resin insulating layer provided with a via hole opening and / or a through hole opening can be formed as follows. For example, the film or prepreg is cured to obtain a cured product thereof. In the cured product, as described in (4) above, a hole to be a via hole opening and / or a through hole opening is formed. The cured product having a desired hole thus obtained is used on the core substrate provided with the conductor circuit on the surface, on the conductor circuit provided on one side or both sides, using an arbitrary adhesive resin component. Bonding and forming a resin insulating layer.

(5) The surface of the resin insulating layer is roughened as desired. Next, electroless plating is performed on the resin insulating layer. As electroless plating, copper plating is usually used. A plating resist is formed on the obtained electroless plating film. The plating resist is formed by stacking a photosensitive dry film on an electroless plating film, and performing exposure and development processing. Note that electroless plating may be omitted.

(6) Next, electroplating is performed using the electroless plating film formed on the resin insulating layer as a plating lead to thicken the conductor circuit. A conductive layer is formed on the inner wall of the via hole opening and / or the through hole opening by electroless plating and electroplating performed on the resin insulating layer, and the resulting in the substrate via the via hole and / or through hole. A conductor circuit is connected. Via holes can be filled vias by filling the openings with electroplating or with a conductive paste (eg, Ag). There are two types of via holes: conformal vias with holes and filled vias filled with holes. Stack vias with vias stacked on top of each other, and joint-on vias with electronic component joints mounted directly above the vias. It is preferable to use a filled via because high density design is possible by using. Further, for example, by using a via-on-via structure, a via hole and / or a through hole can be used as a heat dissipation path.

(7) After the electroplating film is formed, the plating resist is peeled off, and the electroless plating film existing under the plating resist is removed by etching to form an independent conductor circuit. Examples of the etchant include sulfuric acid-hydrogen peroxide aqueous solution, ammonium persulfate aqueous solution, persulfate aqueous solution such as sodium persulfate, potassium persulfate, ferric chloride, cupric chloride aqueous solution, hydrochloric acid, nitric acid, hot dilute sulfuric acid. Etc. As described above, the conductor circuit including the via hole and / or the through hole formed in the opening is formed on the resin insulating layer in which the via hole opening and / or the through hole opening is formed in (4). Such a conductor circuit is connected to a conductor layer constituting a via hole and / or a through hole. In addition, as thickness of the conductor layer which comprises a conductor circuit, it is 10-40 micrometers normally.

(8) By the above operation, a laminate in which one resin insulating layer and one conductor circuit are formed in this order on one side or both sides on the core substrate on which the conductor circuit is provided on the surface is obtained. The formation of the resin insulating layer and the conductor circuit may be terminated at this stage, or, if desired, the above operations (2) to (7) are performed on the conductor circuit on the surface of the laminate. Further, it may be repeated once or more.

(9) By the operations up to (8), a laminated body in which conductor circuits and resin insulating layers are alternately laminated on the core substrate is obtained. Usually, on the conductor circuit on the surface of the laminated body. Further, a solder resist layer is provided, and the solder resist layer is opened to provide solder bumps, whereby a multilayer printed wiring board is obtained.

  In the second aspect, only the via hole is formed in the operations (2) to (8). Next, on the conductor circuit on the surface of the laminate obtained by alternately laminating the conductor circuit and the resin insulating layer on the core substrate, which is obtained by performing the operations (2) to (7) at least once, After forming the resin insulation layer R1 according to the above (2) and (3), the thickness of the laminate from the resin insulation layer R1 to the laminate having the resin insulation layer R1 formed according to the above (4) is increased. A through-hole opening is formed so as to penetrate in the direction, and then a step of forming a conductor circuit C1 including a through-hole according to the above (5) to (7) is performed on the resin insulating layer R1. When the through-hole opening is formed from the resin insulating layer R1, a via-hole opening may be formed in the resin insulating layer R1 according to the above (4), and the conductor circuit C1 may further include a via hole. When there is an opening for a through hole that is unnecessary for the connection of the conductor circuit, for example, the resin composition is filled with the polymerizable composition or the curable resin composition, the opening is filled with the cured product, and then the conductor The circuit C1 may be formed. According to the above (9), usually, a solder resist layer is further provided on the conductor circuit C1 on the surface of the obtained laminate, and a solder bump is provided by opening the solder resist layer to obtain a multilayer printed wiring board. .

  In the third aspect, resin insulation is performed by performing the same operation as that of the second aspect except that neither the via hole nor the through hole is formed in the operations of (2) to (8). A multilayer printed wiring board is obtained by forming the layer R2 and the conductor circuit C2. From the same viewpoint as the first and second embodiments, it is desirable to form at least 500, preferably 1000, more preferably 2000 through-hole openings continuously by a drill or a laser. The gap between any two adjacent openings is usually 200 μm or less, preferably 150 μm or less. In addition, the lower limit of the opening interval is about 50 μm.

  According to the above method, a desired multilayer printed wiring board can be efficiently manufactured on an industrial scale.

2. Multilayer Printed Wiring Board The multilayer printed wiring board of the present invention can be obtained by the above manufacturing method, wherein a conductor circuit and a resin insulating layer are alternately laminated on a core substrate, and the conductor circuit passes through a via hole and / or a through hole. It is the multilayer printed wiring board formed by connecting. The resin insulation layer of the multilayer printed wiring board is made of a cured product of a curable resin composition containing a cyclic olefin polymer and an inorganic filler X, and the number and method of forming openings for via holes and / or openings for through holes. However, the quality of the inner walls of the conductor circuit is kept good, and the quality of the plating for connecting the conductor circuit formed thereon is high. Such a multilayer printed wiring board of the present invention has excellent insulation reliability and a small transmission loss. This characteristic of the multilayer printed wiring board of the present invention is that the insulating layer is made of a resin material other than the cured product of the curable resin composition according to the present invention, particularly for the multilayer printed wiring board including the resin insulating layer Y. Is clearer when compared with a multilayer printed wiring board obtained in the same manner. The same applies to the multilayer printed wiring board obtained by the third aspect and having a predetermined through-hole opening.
The resin insulating layer Y is preferably formed by forming via hole openings and / or through hole openings so that the distance between any two adjacent openings is within the predetermined range.
Moreover, since the inorganic filler X is excellent in thermal conductivity, the multilayer printed wiring board of the present invention is also excellent in heat dissipation.

  The quality of the inner wall of the hole in the resin insulating layer of the multilayer printed wiring board of the present invention is good. Specifically, the surface roughness (Rz1) of the via hole opening and / or the through hole opening in the resin insulating layer is usually 5 μm or less. The surface roughness of the opening is the surface roughness of the inner wall of the opening. From the viewpoint of suppressing transmission loss, Rz1 is preferably 3 μm or less. On the other hand, the lower limit of Rz1 is usually about 100 nm.

  Further, from the viewpoint of suppressing transmission loss as well as the quality of the inner wall of the hole in the resin insulation layer, the surface roughness (Rz2) of the conductor layer constituting the conductor circuit of the multilayer printed wiring board of the present invention is usually 3 μm. Hereinafter, it is preferably 2 μm or less, more preferably 1 μm or less. On the other hand, the lower limit of Rz2 is usually about 10 nm.

  In addition, in this specification, as shown in FIG. 2, the surface roughness means a boundary line between an upper layer and a lower layer in a cross section of a specific two layers placed horizontally (I side is an upper layer, II side is a lower layer), The auxiliary line 1 is drawn horizontally through the uppermost point in the vertical direction, and the auxiliary line 1 is drawn horizontally through the lowest point in the vertical direction of the boundary line between the upper layer and the lower layer. And the shortest distance L between the auxiliary line 2. In the present invention, three surface roughnesses obtained as described above were obtained using optical microscope images (magnification: 10000 times) of arbitrary three cross sections obtained from one multilayer printed wiring board. The average value of the degree values is used as the surface roughness value. When Rz1 is obtained, the two layers are a resin insulating layer and a conductor layer that are in contact with the inner wall of the via hole opening or the through hole opening as a boundary line. When Rz2 is obtained, the two layers are a resin insulating layer and a conductor circuit. It is a conductor layer which comprises. The conductor layer according to Rz1 is a conductor layer for connecting a conductor circuit formed on the resin insulating layer, and is distinguished from the conductor layer constituting the conductor circuit according to Rz2.

  Furthermore, from the viewpoint of enhancing interlayer adhesion and suppressing transmission loss in the multilayer printed wiring board of the present invention, the average particle size of the inorganic filler X contained in the resin insulating layer of the multilayer printed wiring board of the present invention is Rz2 or more and Rz1 or less is preferable. If a predetermined inorganic filler having an average particle diameter as described above is used as the inorganic filler X, such a condition is usually satisfied.

  As described above, the resin insulating layer of the multilayer printed wiring board according to the present invention is cured in addition to the resin insulating layer made of a cured product of the curable resin composition, unless the desired effect of the present invention is inhibited. The resin insulation layer which consists of well-known materials other than a thing may be contained. The ratio in the total resin insulation layer of the multilayer printed wiring board is calculated by dividing (number of resin insulation layers made of known materials) by (number of total resin insulation layers) and multiplying the obtained value by 100. Usually, it is less than 50%.

3. Multilayer Printed Circuit Board The multilayer printed circuit board of the present invention has electronic components mounted on and / or built in the multilayer printed wiring board of the present invention, and the electronic components are connected to the conductor circuit of the multilayer printed wiring board. It will be. In the present specification, “mounting” refers to connecting an electronic component to a conductor circuit of a multilayer printed wiring board. Moreover, the surface of a multilayer printed wiring board means the upper surface of a multilayer printed wiring board, ie, the main surface in which various chip components are mounted.

  The electronic component is not particularly limited, but for example, a large-scale integrated circuit (LSI), a transmission amplifier (Power Amp), a low noise amplifier (Low Noise AMP), a voltage controlled oscillator (VCO), or those integrated in multiple stages Active devices such as integrated ICs, various high-frequency filters such as bandpass filters (band emission filters, high-pass filters, low-pass filters, diplexers, duplexers, etc.), passive devices such as baluns and couplers, and other various types Such electronic parts are listed.

  When mounting electronic components on the surface of a multilayer printed wiring board, mounting area is small and high-density mounting is possible. preferable. As a bare chip mounting method, TAB (Tape Automated Bonding) mounting, in which a substrate-side electrode and a chip-side electrode are connected using a film provided with a lead wire, the substrate-side electrode and the chip-side electrode are connected by a wire. Examples include wire bonding mounting for connection, and flip chip mounting in which bumps (projection electrodes) are formed on the electrode portions of the chip to directly connect the substrate-side electrode and the chip-side electrode. Of these, flip-chip mounting is preferred.

  A semiconductor package can be manufactured by mounting and mounting a semiconductor component such as an LSI chip on the surface of the multilayer printed wiring board of the present invention. A semiconductor component is mounted on at least one surface of the multilayer printed wiring board of the present invention by the mounting method, and a connection portion between the semiconductor component electrode and the multilayer printed wiring board is sealed with a sealing material such as epoxy resin. In addition, the said polymeric composition and curable resin composition based on this invention can also be used as a sealing material. Next, on the substrate on which the semiconductor component is mounted, a plurality of electrodes are arranged on an area by metal wiring on one side, and for example, a connection member such as a solder ball is installed. An example of such a semiconductor package is a multi-chip module (MCM) in which two or more semiconductor components are mounted. For example, the MCM can be used for a computer or a communication device, or can be further connected to a mother board (ordinary printed wiring board) via a connecting member, or can be used as it is as a mother board.

When an electronic component is built in and mounted on a multilayer printed wiring board, a passive element is preferably used as the electronic component.
When mounting a passive element in a multilayer printed wiring board, the passive element is mounted as a conductor pattern formed in a conductor circuit sandwiched between at least two upper and lower resin insulation layers in the multilayer printed wiring board of the present invention. Is done. The conductor pattern is not particularly limited as long as it can function as a passive element. The conductor pattern which comprises a passive element is well-known. In the multilayer printed wiring board of the present invention, one or more passive elements can be incorporated. When two or more passive elements are built in, each passive element may be formed in the same conductor circuit or in separate conductor circuits in the multilayer printed wiring board. Moreover, as a passive element, in addition to what is mounted and mounted in the multilayer printed wiring board, there may be one that is mounted and mounted on the surface of the multilayer printed wiring board.
Incorporation and mounting of the passive element on the multilayer printed wiring board can be performed integrally in the process of forming the multilayer printed wiring board by the operations (5) to (7). For example, after electroless plating is performed on the lower resin insulation layer, a plating resist patterned so as to form a conductor circuit including a conductor pattern constituting a passive element is formed, and then electroplating is performed. Thicken the conductor circuit. Thereafter, the plating resist is peeled off and etching is performed to obtain an independent conductor circuit. Next, when the operations (2) to (7) are performed at least once, a multilayer printed circuit board in which passive elements are incorporated and mounted in the form of conductor patterns can be obtained.

  The active element can also be mounted in the multilayer printed wiring board. For example, it is mounted in the following three forms, that is, mounted on the surface of the multilayer printed wiring board; or a part is mounted on the surface of the multilayer printed wiring board and the remaining part is embedded in the multilayer printed wiring board; Alternatively, it is mounted in a multilayer printed wiring board. Here, a part is mounted on the surface of the multilayer printed wiring board, and the remaining part is built in the multilayer printed wiring board. A part of the active element is located on the surface of the multilayer printed wiring board. It means that the active element is mounted on the multilayer printed wiring board so that the remaining portion is positioned so as to be embedded in the multilayer printed wiring board. The active element can be mounted as a mounting component on the multilayer printed wiring board in a desired form according to a known method. In the multilayer printed circuit board of the present invention, one or more active elements which are the same or different can be mounted. When two or more active elements are mounted, each active element may be mounted in the same form or in different forms.

  For example, various modules can be manufactured as the multilayer printed circuit board of the present invention by mounting predetermined active elements and passive elements on the multilayer printed wiring board of the present invention. The module includes, for example, a multilayer printed wiring board, a passive element built in and mounted on the multilayer printed wiring board, and an active element mounted and mounted on the surface of the multilayer printed wiring board. The module usually further includes an external connection terminal and a grounding electrode.

  Examples of the external connection terminal include a power supply terminal and a signal terminal. Together with the external connection terminals, grounding electrodes are provided on the surface of the multilayer printed wiring board. The external connection terminal and the grounding electrode may be provided together on the same surface of the multilayer printed wiring board, or only the grounding electrode may be provided on the surface opposite to the surface of the multilayer printed wiring board.

  In a module using a multilayer printed wiring board made of a conventional organic resin material, for example, a general-purpose resin material such as an epoxy resin, passive elements such as an inductor, a capacitor, and a band pass filter are incorporated in the multilayer printed wiring board. When mounted, the desired insulation reliability and thermal conductivity could not be obtained, and it was virtually impossible to incorporate passive elements, and it had to be mounted on the surface of the multilayer printed wiring board. . On the other hand, in a module (multilayer printed circuit board) using the multilayer printed wiring board of the present invention, a passive element can be built in the multilayer printed wiring board without such a problem, and therefore can be made smaller than the conventional one. In addition, when used in a high frequency region (100 MHz or higher, particularly 100 MHz or higher and 100 GHz or lower), there is very little electrical loss, excellent heat dissipation, and low power consumption.

  The multilayer printed circuit board of the present invention can be appropriately manufactured according to a known method using the multilayer printed wiring board of the present invention and depending on the intended function. Examples of such multilayer printed circuit boards include power amplifier modules. The multilayer printed circuit board is suitably used, for example, for a transmission unit of a wireless communication device.

4). Electronic Device According to the present invention, an electronic device comprising the multilayer printed circuit board of the present invention can be further provided. In addition to being small and power-saving, the electronic device of the present invention is stable in performance over a wide range of usage environments. Examples of the electronic device include a mobile phone terminal, a portable wireless information terminal, and a wireless LAN device. These electronic devices can be appropriately manufactured according to a known method using the multilayer printed circuit board of the present invention.

  Hereinafter, the present invention will be described more specifically with reference to examples. However, the present invention is not limited to the examples. In the following, parts and% are based on weight unless otherwise specified.

Example 1
Thickness obtained by stacking 12 prepregs described later, sandwiched between 18 μm F0 copper foil (silane coupling agent-treated electrolytic copper foil, manufactured by Furukawa Circuit Foil Co., Ltd.), and heated and pressed at 3 MPa for 2 hours at 220 ° C. A 0.5 mm double-sided copper clad laminate is used as the core substrate. 2000 core through-hole openings (hole diameter 150 μm) are continuously formed on the core substrate with a single drill, electroless plating is performed to connect the upper and lower copper foils, and the copper foils on both sides are etched to form a conductor. Circuit 1 is formed on both sides. The surface roughness (Rz1) of the inner wall of the through-hole opening is 5 μm.

  Next, the conductor circuit 1 is sprayed with a chemical solution mainly composed of hydrogen peroxide and sulfuric acid to perform roughening treatment, and a prepreg (described later) is placed on the conductor circuit 1 on both surfaces of the core substrate. Then, the resin insulating layer 1 is provided by heating and pressing at 3 MPa for 2 hours. In addition, the surface roughness (Rz2) of the conductor layer which comprises the conductor circuit 1 is 1.5 micrometers. The thickness of the resin insulating layer 1 is 70 μm.

  The prepreg is prepared as follows. Benzylidene (1,3-dimesityl-4-imidazolidin-2-ylidene) (tricyclohexylphosphine) ruthenium dichloride 0.05 part and triphenylphosphine 0.01 part are dissolved in indene 1.51 part to form a catalyst. Prepare the solution. Separately, 70 parts of tetracyclododecene (TCD) and 1,4-methano-1.4.4a. 9a Tetrahydrofluorene (MTF) 30 parts, calcium titanate as inorganic filler X (Mohs hardness: 5.5, thermal conductivity: 6 W / mK, average particle size: 1.5 μm, silane coupling agent treated product; 250 parts by Fuji Titanium Industry Co., Ltd., product name: CT), di-t-butyl peroxide (1 minute half-life temperature: 186 ° C .; product by Kayaku Akzo, product name: Kayabutyl D (registered trademark)) as a crosslinking agent After adding 1.14 parts, 100 parts of aluminum hydroxide as a flame retardant, and 1.8 parts of divinylbenzene (manufactured by Tokyo Chemical Industry Co., Ltd.) as a chain transfer agent, 0.12 mL of the above catalyst solution is added per 100 g of norbornene monomer. Is added and stirred to prepare a polymerizable composition. Next, after impregnating the obtained polymerizable composition into glass cloth (E glass), a bulk polymerization reaction is performed at 140 ° C. for 1 minute to obtain a prepreg having a thickness of 70 μm (glass cloth content: 40%). In the obtained prepreg, the content of calcium titanate in the curable resin composition impregnated in the glass cloth is 30% by volume.

  Next, 2000 via-hole openings (hole diameter 150 μm) were continuously formed in the resin insulating layer 1 with a single drill, and after desmearing was performed by dipping in an 80 ° C. potassium permanganate solution for 15 minutes. Then, electroless copper plating is performed to form a copper thin film having a thickness of 0.5 μm. After laminating a photosensitive dry film on the surface of the copper thin film, exposure and development are performed to form a plating resist having a predetermined pattern and a thickness of 50 μm. The via hole openings are formed so that the distance between any two adjacent openings is 200 μm or less. The surface roughness (Rz1) of the inner wall of the via hole opening is 5 μm.

  Subsequently, electrolytic copper plating is performed using the copper thin film as a plating lead to thicken the conductor layer. The plating resist is peeled off, and the copper thin film existing under the plating resist is removed by etching to obtain a conductor circuit 2 made of a conductor layer having a thickness of 20 μm and ensuring insulation between wirings. In addition, the surface roughness (Rz2) of the conductor layer which comprises the conductor circuit 2 is 1 micrometer.

  Further, in the same manner as the resin insulation layer 1 and the conductor circuit 2, the resin insulation layer 2 is formed on the conductor circuit 2, and the conductor circuit 3 is formed on the resin insulation layer 2. On the conductor circuit 3, a dry film type solder resist is vacuum-bonded and laminated to provide a solder resist layer. According to a conventional method, the solder resist layer is opened and solder bumps are provided to obtain a multilayer printed wiring board.

  Subsequently, after flux cleaning using a predetermined mounting device, the solder bumps of the multilayer printed wiring board are aligned with the bumps provided on the IC chip with the target mark as a reference, and the solder is reflowed to reflow the solder. The bump and the bump of the IC chip are joined. Flux cleaning is performed, an underfill is filled between the IC chip and the multilayer printed wiring board, and a multilayer printed circuit board (semiconductor device) in which the IC chip is mounted on the multilayer printed wiring board is obtained.

Reference Examples 1-3 and Reference Comparative Examples 1-3
In accordance with the resin insulation layer and the method for forming the conductor circuit constituting the multilayer printed wiring board of Example 1, sample substrates were prepared according to the following characteristic evaluation methods, and the characteristics of the substrates were evaluated (reference examples) 1-3). Since the multilayer printed wiring board of Example 1 can be said to be an aggregate of those sample boards, the evaluation results of the sample boards are considered to substantially represent the characteristics of the multilayer printed wiring board.
For comparison, a sample substrate was similarly prepared using a polymer other than the cyclic olefin polymer or an inorganic filler other than the inorganic filler X for the preparation of the prepreg, and the characteristics of the substrate were evaluated ( Reference Comparative Examples 1 to 3).

  The characteristic evaluation of each sample substrate was performed according to the following method. Resin and inorganic filler contained in the curable resin composition used for the preparation of the sample substrate in Reference Examples 1 to 3 and Reference Comparative Examples 1 to 3, and the content of the inorganic filler in the composition, It shows in Table 1 with the evaluation result of a sample board | substrate.

1) Resistance to plating soaking A prepreg was obtained according to Example 1 and cured by heating and pressing at 3 MPa at 220 ° C. for 2 hours, and the obtained cured product was used as a sample substrate.
Using an undercut type drill with a diameter of 0.3 mm (manufactured by Union Tool Co., Ltd., product number: UV L095D 0.3 × 5), an opening was formed in the sample substrate under conditions of a rotational speed of 100,000 rpm and a feed rate of 8 mm / sec. The cross section of the inner wall of the 3,000th hole was observed with an optical microscope (magnification 1000 times), and dyed from the inner wall surface toward the inside of the sample substrate along the glass cloth exposed on the inner wall surface. The plated plating length was measured by a linear distance, and the plating penetration resistance of the opening was evaluated according to the following evaluation criteria.
〔Evaluation criteria〕
◎ ... Less than 5 μm ○ ・ ・ ・ 5 μm or more and less than 8 μm Δ ・ ・ ・ 8 μm or more and less than 10 μm

2) Wear resistance of the drill The wear state of the cutting edge of the drill used to form the opening in the sample substrate in 1) was evaluated separately as well as 1). The value obtained by subtracting the diameter (mm) of the drill tip after use from the diameter (mm) of the unused drill tip is divided by the diameter (mm) of the tip of the unused drill and multiplied by 100. The degree of drill wear (%) was obtained, and the drill wear resistance of the opening was evaluated according to the following evaluation criteria. The fact that the wear of the cutting edge of the drill is large means that the resistance of the inner wall of the opening is large. Therefore, it can be determined that the rougher the inner wall of the opening is, the greater the wear resistance of the drill is. In addition, the diameter of the cutting edge of a drill means the diameter when the front-end | tip of a drill is seen from a longitudinal direction front.
〔Evaluation criteria〕
◎ ... Less than 5% ○ ・ ・ ・ 5% or more and less than 10% △ ... 10% or more × ... Severe wear, unable to measure the diameter of the drill tip after use

3) Transmission loss A prepreg was obtained according to Example 1, and a three-layer strip line connected by via holes was produced using the prepreg and used as a sample substrate.
The value obtained by subtracting the transmission loss value of each of the other reference examples and the reference comparative example from the value of the transmission loss of the reference line of the reference comparative example 3 is the value of the transmission loss of the strip line of the reference comparative example 3. Dividing by the value, multiplying the obtained value by 100, and using the transmission loss of the strip line of the reference comparative example 3 as a reference, the ratio (%) of the difference of the transmission loss of each reference example and the reference comparative example The transmission loss was evaluated according to the following evaluation criteria. The transmission loss was measured with a vector network analyzer.
〔Evaluation criteria〕
◎ ・ ・ ・ 15% low loss ○ ・ ・ ・ 10% low loss △ ・ ・ ・ 5% low loss × ・ ・ ・ Transmission loss exceeding the transmission loss of the reference line 3

4) Insulation reliability A double-sided copper-clad laminate was obtained according to Example 1, and 10 electrically aligned via hole rows arranged in a straight line with a spacing of 100 μm on one side were spaced 100 μm apart. A sample substrate having two rows formed in parallel was used as a sample substrate.
Time until a conduction is confirmed by applying a voltage of 100 V for a predetermined time between one via hole row and the other via hole row, which are insulated from each other in an environment of 85% RH at 130 ° C. The insulation reliability was evaluated according to the following evaluation criteria.
〔Evaluation criteria〕
◎ ... 500 hours or more ○ ... 200 hours or more and less than 500 hours Δ ... 100 hours or more and less than 200 hours × ... Less than 100 hours

  From Table 1, it can be seen that in the multilayer printed wiring boards of Reference Examples 1 to 3, an opening having excellent plating penetration resistance and small drill wearability is formed, and the quality of the inner wall of the opening is kept good. . It can also be seen that such a wiring board has low transmission loss and excellent insulation reliability. On the other hand, in the multilayer printed wiring boards of Reference Comparative Examples 1 to 3, an opening having poor plating penetration resistance and a large drill wear property is formed, the quality of the inner wall of the opening is poor, the transmission loss is high, and the insulation is high. It turns out that it is inferior in reliability.

Example 2 and Comparative Example 1
An electronic component is mounted on a multilayer printed wiring board formed according to the first embodiment (some passive elements are built in by patterning on an inner layer), and a transmission unit Tx of a wireless communication device is used as an example of the multilayer printed circuit board. A power amplifier module (PA laminated module) to be incorporated into the module was produced and its characteristics were evaluated (Example 2). For comparison, the resin insulating layer is formed only of a general-purpose resin material [FR-4 (epoxy resin)], and all the electronic components are mounted on the surface of the multilayer printed wiring board in the same manner as in Example 2. A PA laminated module was produced and its characteristics were evaluated (Comparative Example 1).

FIG. 3 shows a block diagram of a transmission unit Tx module of a wireless communication device as an example of a laminated module.
The Tx module includes a voltage controlled oscillator VCO, a mixer MIX, a power amplifier unit PA, and a band pass filter BPF. A high frequency carrier wave is generated by the VCO, a baseband signal is input from the signal input terminal BB IN, and a high frequency signal in which the high frequency carrier wave and the baseband signal are mixed is created by MIX. Next, the high frequency signal is amplified by the PA, and only the necessary high frequency signal is selected through the BPF and connected to the antenna unit via the signal output terminal TX OUT.
In the Tx module shown in FIG. 3, PA and BPF are formed into a stacked module. Hereinafter, the laminated module (PA laminated module) will be specifically described.

(PA laminated module)
FIG. 4 shows an example of a circuit diagram of the PA included in the Tx module of FIG. The PA includes an IC1 having a two-stage configuration of semiconductor elements, an input matching circuit unit IM1, an output matching circuit unit OM1, and a bias circuit unit BC1.
IC1 plays the role of amplifying the signal input from the signal input terminal Pin1, and IM1 matches the impedance (50Ω) at Pin1 with the input impedance of IC1, and the signal input from Pin1 is lost due to impedance mismatch. It plays the role of transmitting to the input of IC1. OM1 matches the output impedance of IC1 to the impedance (50Ω) seen at the BPF input terminal, and plays a role of transmitting the signal output from IC1 to the BPF input terminal without causing loss due to impedance mismatch. Plays a role of supplying DC power and operating a semiconductor included in the IC 1 as an amplifying element. IM1 includes a circuit in which an inductor L1 and a capacitor C1 are connected in an L shape. Further, IM1 is provided with a capacitor C2. OM1 is configured by an L-type circuit including an inductor L2 and a capacitor C3. Further, a capacitor C4 is connected to the output terminal of OM1. Further, the inductors L3 and L4 of BC1 are constituted by inductor elements having high impedance so as not to leak the signal amplified by IC1 to the power supply terminal Vcc1. In some cases, a wiring pattern having a length of λ / 4 is used instead of the inductor element. Grounded capacitors C5 and C6 are connected to the inductors L3 and L4, respectively.

  FIG. 5 is an exploded perspective view of the PA laminated module manufactured in Comparative Example 1 in which PA and BPF are mounted on the surface of a laminated substrate (multilayer printed wiring board) and PA is made into a BPF and laminated module. 6 is a perspective view of the PA laminated module in FIG. 5 in a completed state, and FIG. 7 is a cross-sectional view schematically showing an internal connection structure in the completed state of the PA laminated module in FIG. There is no particular limitation on the arrangement of patterns in the laminated substrate 100.

  The PA multilayer module includes a multilayer substrate 100, an active element IC1, a BPF1, passive elements 60 and 70 such as an inductor element and a coil element, Vcc1, Pin1, BPF input terminal, BPF output terminal, Tx Out, A grounding pattern GND, a through via hole 40, a blind via hole 30, an inner via hole 20, and a conductor pattern 50 are provided. The passive element 60 is a passive element that configures BC1 of FIG. 4, and the passive element 70 is a passive element that configures IM1 and OM1 of FIG. 4 (see FIG. 4).

  As shown in FIG. 5, the multilayer substrate 100 includes five insulating layers 101 to 105. The insulating layers 101 to 105 are sequentially stacked. The active element IC1 is mounted on the constituent layer 101 located on the surface side of the multilayer substrate 100. The electrodes of the IC 1 are connected to a conductor pattern formed on the constituent layer 101 by wire bonding or soldering.

  In FIG. 7, the through via hole 40 penetrates the laminated substrate 100 in the thickness direction and is electrically connected to the ground conductor layer GND. The blind via hole 30 connects between the conductor layer 50 provided on the surface of the multilayer substrate 100 and the next conductor layer 50. The inner via hole 20 connects the conductor layer 50 formed inside the multilayer substrate 100. One end of the blind via hole 30 is terminated inside the multilayer substrate 100, and both ends of the inner via hole 20 are terminated inside the multilayer substrate 100.

  FIG. 8 is a perspective view of the PA laminated module manufactured in Example 2 in which the BPF mounted on the surface of the PA laminated module of FIG. 6 is built into the inner layer of the laminated substrate 100 ′ by patterning. is there. By incorporating BPF in the laminated substrate, the surface mounting area is reduced.

  As can be seen from FIGS. 6 and 8, by patterning passive elements on the inner layer of the multilayer substrate, the mounting area on the surface of the multilayer substrate is reduced, which is advantageous for integration and miniaturization. Furthermore, the reduction of the number of parts and the number of soldering greatly contribute to the improvement of productivity and reliability.

The BPF built in the multilayer substrate 100 ′ of the PA multilayer module shown in FIG. 8 is formed by patterning an inductor element or a capacitor element and using at least one of the conductor layers constituting the inner layer of the multilayer substrate. However, a plurality of conductor layers may be used using inner via holes.
In addition, the PA laminated module of FIG. 8 is different from the PA laminated module of FIGS. 5 to 7 in that part of the passive element is built in the laminated substrate in a predetermined form, and the insulating layer is the curable resin composition according to the present invention. The basic configuration is the same except that it is a resin insulating layer made of a cured product. In the PA laminated module of FIG. 8, the laminated substrate 100 ′ is made of a resin insulating layer 101 ′ to 105 ′ made of a cured product of the curable resin composition of Example 1, and a copper having a surface roughness (Rz2) of 1 μm or less. Conductive layers 50 ′ made of foil are alternately laminated.

  FIG. 9 shows an example of a band-pass filter circuit, and FIG. 10 shows a perspective view of an example of a band-pass filter portion manufactured by patterning an inductor element and a capacitor element. The band-pass filter formed in the multilayer substrate is covered with ground electrodes on the top and bottom to prevent power leakage in the filter and noise from the outside, and the surroundings have a pass frequency of λ / 2 or less. Surrounded by inner via holes or through holes which are arranged at intervals and are connected to the ground electrode.

In a bandpass filter, the degree of power loss in the pass frequency band is one of the most important characteristics. However, in a bandpass filter formed by patterning an inductor element and a capacitor element, the power loss of the inductor element is the bandpass filter. It accounts for the majority of the total loss. FIG. 11 shows measurement results of inductor elements made of various materials up to a Q value of 10 GHz (inductor conditions: both line width and line spacing are 80 μm). Inductors manufactured using the curable resin composition of Example 1 while the Q value of the high-functional resin material (BT resin) and the low-temperature fired ceramic (LTCC) is 20 to 37 at 1 GHz or higher. It can be seen that the element (insulating layer is made of a cured product of a curable resin composition) has an excellent Q value of 40 to 48, which is advantageous for producing a band-pass filter with a small loss. In addition, Q value is based on the data measured by the vector network analyzer, and the following formula:
Q = 2πfL / R (f: frequency, L: inductance, R: resistance value)
Calculated from

  The band-pass filter circuit is not limited to a combination of lumped constants such as an inductor element and a capacitor element as described above, and can be formed using distributed constants. For example, a λ / 4 resonance as shown in FIG. A band-pass filter using a resonator, a band-pass filter using a λ / 2 resonator as shown in FIG. 13, and the like can be formed in the laminated substrate. Even in a circuit with such a distributed constant, the resonator using the curable resin composition of Example 1 has an excellent Q value, which is advantageous for producing a low-loss bandpass filter. The Q value of the resonator can be measured by a triplate resonator method.

FIG. 14 shows measurement results of transmission loss of microstrip lines made of various materials. Transmission loss was measured with a vector network analyzer.
Compared to general-purpose resin material (FR-4), high-functional resin material (BT resin), and low-temperature fired ceramic (LTCC), the one using the curable resin composition of Example 1 (the insulating layer is curable) It can be seen that the transmission loss is small in the case of (made of a cured product of the resin composition), and the superiority becomes more remarkable as the frequency becomes higher.
Therefore, in the wiring on the module substrate, active elements such as IC, active elements and passive elements such as IC and BPF, or passive elements such as antenna input terminal from BPF output terminal, When connecting with a transmission line (usually 50Ω line) of a strip line or a microstrip line, the present invention is compared with a substrate using a conventional general-purpose resin material (FR-4), low-temperature fired ceramic (LTCC) or the like. The substrate using the curable resin composition according to the present invention has a small transmission loss and can produce an excellent power-saving module.
In FIG. 15, the measurement result of the transmission loss in the pass band of the 2.5 GHz band band pass filter produced using the curable resin composition of Example 1 and LTCC which is the material of the conventional band pass filter, respectively is shown. According to the measurement result, the transmission loss of the one using the curable resin composition of Example 1 (the insulating layer is made of a cured product of the curable resin composition) is smaller than that using the LTCC, It turns out that it is effective for power saving.

In FIG. 16, the cross-sectional schematic of the PA laminated module produced by the comparative example 1 is shown. As shown in FIG. 6, the capacitor, inductor, BPF1 and active element PA of the passive element are mounted on the surface of the multilayer substrate (the capacitor and the inductor are omitted in FIG. 16). The material of BPF1 is LTCC and is connected to the microstrip line MSL on the laminated substrate by soldering.
As shown in FIG. 16, the MSF on the output side of the BPF 1 is connected to the strip line SL in the inner layer by a blind via hole or by a blind via hole and an inner via hole. SL is used because the upper and lower layers are covered with the installation electrodes through the resin insulating layer, and are strong against leakage of electric power to the outside or noise from the outside. Furthermore, SL is connected to the MSL connected to the antenna terminal on the surface layer by a blind via hole or by a blind via hole and an inner via hole.

In FIG. 17, the cross-sectional schematic of the PA laminated module produced in Example 2 is shown. As shown in FIG. 8, the capacitor of the passive element, the inductor, and the active element PA are mounted on the surface of the multilayer substrate, and the BPF 1 ′ is built in a pattern on the inner layer (the capacitor and the inductor are omitted in FIG. 17). Therefore, there is no soldering for connecting the BPF and the MSL on the multilayer substrate as shown in FIG.
As shown in FIG. 17, the MSL on the output side of the PA is connected to the SL directly connected to the input portion of the BPF 1 ′ patterned and embedded in the inner layer by the blind via hole or by the blind via hole and the inner via hole. . The output portion of the BPF 1 ′ is also directly connected to the inner SL, and the upper and lower layers of the SL are covered with the installation electrodes via the resin insulating layer. Furthermore, SL is connected to the MSL connected to the antenna terminal on the surface layer by a blind via hole or by a blind via hole and an inner via hole.

  In the PA laminated module of FIG. 17, since the BPF is built in the laminated substrate, the mounting area on the surface of the substrate is smaller than that of the PA laminated module of FIG. Also, in terms of electrical characteristics, in the PA laminated module of FIG. 17, the transmission loss of the BPF is smaller than that of the band-pass filter of LTCC, and the transmission loss of the transmission line such as the microstrip line is higher than that of FR-4 (epoxy resin). Small, no BPF input / output soldering, no transmission loss due to impedance mismatch due to soldering, and formation of blind via holes that connect the MSL of the substrate surface and the SL of the inner layer, The surface roughness (Rz1) of the opening of the resin insulating layer is superior to that of FR-4, and the conductor layer formed by using the inner wall of the opening as a base (the MSL and SL are three-dimensionally connected) In combination with the small transmission loss, a significant power saving effect can be obtained from the PA laminated module of FIG.

According to the integration of the transmission loss difference based on the above electrical characteristics in the PA laminated module of FIG. 17, a power saving effect of about 30% is expected in a frequency band of 2.5 GHz or more. In addition, since the interval between via holes for electromagnetic shielding can be made narrower than that of a conventional circuit board, it is strong against leakage of power to the outside or noise from outside, and the reliability as a PA multilayer module is improved. Increase. In addition, when a through-via hole is provided directly under the PA and used as a heat dissipation via, it is possible to increase the density of the via by narrowing the interval compared to the conventional circuit board, so the heat dissipation effect is increased and the operating temperature of the PA-IC is increased. By reducing the power consumption, the power saving effect can be enhanced, and the long-term reliability of the PA-IC can also be enhanced. FIGS. 16 and 17 show a state in which a heat radiating via is provided directly under the PA. In the PA laminated module of FIG. 17, the via interval is narrowed and the via density is increased as compared with the PA laminated module of FIG. Because it is possible, more heat dissipation vias are provided.
In addition, since the insulation reliability between the vias is maintained even if the via interval is narrowed, vias having different potentials or vias that should be reliably insulated like the ground potential and the signal line, for example, The interval between the heat dissipation vias and the MSL-SL in FIG. 17 can be made narrower than before, which is advantageous for downsizing of the module.

20 Inner via hole 30 Blind via hole 40 Through-via hole 60 Passive element 70 Passive element 100 Multilayer substrate 101-105 Insulating layer

Claims (14)

A method for producing a multilayer printed wiring board in which conductor circuits and resin insulating layers are alternately laminated on a core substrate, and the conductor circuits are connected via via holes and / or through holes,
A layer made of a curable resin composition containing a cyclic olefin polymer and an inorganic filler having a Mohs hardness of 7 or less and a thermal conductivity of more than 1 W / mK is provided on a core substrate provided with a conductor circuit on the surface. After the layer is cured to form a resin insulating layer, a via hole opening and / or a through hole opening is formed in the resin insulating layer, and then a via hole and / or a through hole is formed on the resin insulating layer. A method for producing a multilayer printed wiring board, wherein the step of forming a conductor circuit is performed at least once. A method for producing a multilayer printed wiring board in which conductor circuits and resin insulating layers are alternately laminated on a core substrate, and the conductor circuits are connected via via holes and through holes,
A layer made of a curable resin composition containing a cyclic olefin polymer and an inorganic filler having a Mohs hardness of 7 or less and a thermal conductivity of more than 1 W / mK is provided on a core substrate provided with a conductor circuit on the surface. Then, after the layer is cured to form a resin insulating layer, a step of forming a via hole opening in the resin insulating layer, and then forming a conductor circuit including a via hole on the resin insulating layer is performed at least once,
Resin insulation is performed on the conductor circuit on the surface of the laminate obtained by performing the above process at least once, and the conductor circuit and the resin insulation layer are alternately laminated on the core substrate in the same manner as in the above process. After forming the layer R1, an opening for a through hole is formed in the laminated body on which the resin insulating layer R1 is formed so as to penetrate the laminated body from the resin insulating layer R1 in the thickness direction, and then the resin insulating layer A method for producing a multilayer printed wiring board, comprising performing a step of forming a conductor circuit C1 including a through hole on R1.   3. The method for producing a multilayer printed wiring board according to claim 1, wherein at least 500 via-hole openings and / or through-hole openings are continuously formed with at least one resin insulating layer by a drill or a laser.   4. The method for producing a multilayer printed wiring board according to claim 3, wherein the via-hole opening and / or the through-hole opening are formed so that the distance between any two adjacent openings is 200 [mu] m or less. A method for producing a multilayer printed wiring board in which conductor circuits and resin insulating layers are alternately laminated on a core substrate, and the conductor circuits are connected via through holes,
A layer made of a curable resin composition containing a cyclic olefin polymer and an inorganic filler having a Mohs hardness of 7 or less and a thermal conductivity of more than 1 W / mK is provided on a core substrate provided with a conductor circuit on the surface. Then, after the layer is cured to form a resin insulating layer, a step of forming a conductor circuit on the resin insulating layer is performed at least once,
Resin insulation is performed on the conductor circuit on the surface of the laminate obtained by performing the above process at least once, and the conductor circuit and the resin insulation layer are alternately laminated on the core substrate in the same manner as in the above process. After forming the layer R2, an opening for a through hole is formed in the laminate on which the resin insulating layer R2 is formed so as to penetrate the laminate from the resin insulating layer R2 in the thickness direction, and then the resin insulating layer A method for producing a multilayer printed wiring board, comprising performing a step of forming a conductor circuit C2 including a through hole on R2.   The method for producing a multilayer printed wiring board according to claim 5, wherein at least 500 through-hole openings are continuously formed by a drill or a laser.   The method for producing a multilayer printed wiring board according to claim 6, wherein the through-hole openings are formed so that the interval between any two adjacent openings is 200 μm or less.   Content of the inorganic filler in curable resin composition is 10-60 volume%, The manufacturing method of the multilayer printed wiring board in any one of Claims 1-7. The inorganic filler is the following (A) to (C):
(A) At least one selected from the group consisting of barium titanate, strontium titanate, and calcium titanate (B) a lithium titanate compound containing a rare earth metal (C) inorganic nitride. A method for producing a multilayer printed wiring board as described above.   A conductor circuit and a resin insulating layer, which can be obtained by the method for producing a multilayer printed wiring board according to any one of claims 1 to 9, are alternately laminated on a core substrate, and the conductor circuit has via holes and / or through holes. Multi-layer printed wiring board connected via.   The multilayer printed wiring board according to claim 10, wherein the surface roughness (Rz1) of the via hole opening and / or the through hole opening is 5 µm or less.   The average particle diameter of the inorganic filler is not less than the surface roughness (Rz2) of the conductor layer constituting the conductor circuit and not more than the surface roughness (Rz1) of the via hole opening and / or the through hole opening. 11. The multilayer printed wiring board according to 11.   The multilayer printed circuit board which mounts an electronic component in the multilayer printed wiring board in any one of Claims 10-12, and / or incorporates it, and connects this electronic component to the conductor circuit of this multilayer printed wiring board.   An electronic device comprising the multilayer printed circuit board according to claim 13.

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